[all-commits] [llvm/llvm-project] 0b6db7: [AMDGPU] Handle AV classes in SIFixSGPRCopies::pro...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0b6db777ba9821bc17b969ddf6fefee54519c4f4
      https://github.com/llvm/llvm-project/commit/0b6db777ba9821bc17b969ddf6fefee54519c4f4
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-11-21 (Fri, 21 Nov 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
    M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
    M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
    A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-av-classes.ll
    M llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
    M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
    M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
    M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll

  Log Message:
  -----------
  [AMDGPU] Handle AV classes in SIFixSGPRCopies::processPHINode (#169038)

Fix a problem exposed by #166483 using AV classes in more places.
`isVectorRegister` only accepts registers of VGPR or AGPR classes.
`hasVectorRegisters` additionally accepts the combined AV classes.

Fixes: #168761



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