[all-commits] [llvm/llvm-project] b43293: VectorCombine: Improve the insert/extract fold in ...

[Nicolai Hähnle via All-commits]

  Branch: refs/heads/users/nhaehnle/spr/main/c151bb04
  Home:   https://github.com/llvm/llvm-project
  Commit: b43293a52737145abd98c771156b633ab3e94167
      https://github.com/llvm/llvm-project/commit/b43293a52737145abd98c771156b633ab3e94167
  Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
  Date:   2025-11-20 (Thu, 20 Nov 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
    M llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
    M llvm/test/Transforms/VectorCombine/X86/extract-insert-poison.ll
    M llvm/test/Transforms/VectorCombine/X86/extract-insert.ll
    M llvm/test/Transforms/VectorCombine/X86/pr126085.ll

  Log Message:
  -----------
  VectorCombine: Improve the insert/extract fold in the narrowing case

Keeping the extracted element in a natural position in the narrowed
vector has two beneficial effects:

1. It makes the narrowing shuffles cheaper (at least on AMDGPU), which
   allows the insert/extract fold to trigger.
2. It makes the narrowing shuffles in a chain of extract/insert
   compatible, which allows foldLengthChangingShuffles to successfully
   recognize a chain that can be folded.

There are minor X86 test changes that look reasonable to me. The IR
change for AVX2 in llvm/test/Transforms/VectorCombine/X86/extract-insert-poison.ll
doesn't change the assembly generated by `llc -mtriple=x86_64-- -mattr=AVX2`
at all.

commit-id:c151bb04



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