[all-commits] [llvm/llvm-project] 0363bd: [AArch64][FEAT_CMPBR] Codegen for Armv9.6-a CBB an...
Florian Mayer via All-commits
all-commits at lists.llvm.org
Thu Nov 20 15:46:10 PST 2025
Branch: refs/heads/users/fmayer/spr/main.ubsan-add-fsanitize-preserve-runtime-flag
Home: https://github.com/llvm/llvm-project
Commit: 0363bd81653fc8a8d7b73a1220f4ead897416a98
https://github.com/llvm/llvm-project/commit/0363bd81653fc8a8d7b73a1220f4ead897416a98
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/cmpbr-early-ifcvt.mir
M llvm/test/CodeGen/AArch64/cmpbr-reg-reg.ll
A llvm/test/CodeGen/AArch64/cmpbr-zext-sext.ll
Log Message:
-----------
[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a CBB and CBH (#164899)
This patch adds codegen for CBB and CBH, CB variants operating on bytes
and half-words, allowing to fold sign- and zero-extensions.
Since if-conversion needs to be able to undo conditional branches, we
remember possibly folded zero- and sign-extensions, as well as
potentially folded assertzext and assertsext as additional
arguments of the CBBAssertExt and CBHAssertExt pseudos during codegen.
Commit: c40a69439e277873343e63fd9912ded1c0790ee1
https://github.com/llvm/llvm-project/commit/c40a69439e277873343e63fd9912ded1c0790ee1
Author: Shubham Sandeep Rastogi <Shubham.Rastogi at sony.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
R llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
Log Message:
-----------
Remove instr-ref-target-hooks-sp-clobber.mir (#168125)
This test is failing on the chromium x64 mac build because of invalid
MIR. The rest of the patch is okay, so I am just deleting the test for
now.
Commit: 14296285f92a1a169cf47e30e15e2936e26ada2e
https://github.com/llvm/llvm-project/commit/14296285f92a1a169cf47e30e15e2936e26ada2e
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
A flang/test/Analysis/AliasAnalysis/cuf-alloc-source-kind.mlir
Log Message:
-----------
[flang][cuf] Add to cuf.alloc/cuf.allocate mem alloc effect (#167414)
Add MemAlloc effect to the result so that cuf.alloc/cuf.allocate can be
recognized by FIR alias analysis.
Commit: ab08fbd92cb7557c198be1f9de0b59b23f8e92e1
https://github.com/llvm/llvm-project/commit/ab08fbd92cb7557c198be1f9de0b59b23f8e92e1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/WarningSuppressionMappings.rst
M clang/include/clang/Basic/Diagnostic.h
M clang/lib/Basic/Diagnostic.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
Log Message:
-----------
[clang] Switch warning suppression multi-match rule to "last match takes precedence"
The current "longest match takes precedence" rule
for warning suppression mappings can be confusing,
especially in long suppression files where
tracking the length relationship between globs is
difficult.
For example, with the following rules, it's not
immediately obvious why the first one should
currently take precedence:
```
src:*test/*
src:*lld/*=emit
```
This commit changes the multi-match behavior so
the last match takes precedence. This rule is
easier to understand and consistent with the
approach used by sanitizers, simplifying the
mechanism by providing a uniform experience across
different tools.
This is potentially breaking, but very unlikely.
An investigation of known uses showed they do not
rely on the length.
Reviewers: thurstond, kadircet, fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/162237
Commit: 0a58e49c44ae7cca39b3eb219efed9f0581b8b0f
https://github.com/llvm/llvm-project/commit/0a58e49c44ae7cca39b3eb219efed9f0581b8b0f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Target/VE/CMakeLists.txt
M llvm/lib/Target/VE/VECustomDAG.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.h
A llvm/lib/Target/VE/VESelectionDAGInfo.cpp
A llvm/lib/Target/VE/VESelectionDAGInfo.h
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/VE/VESubtarget.h
M llvm/lib/Target/VE/VVPISelLowering.cpp
Log Message:
-----------
[VE] TableGen-erate SDNode descriptions (#168120)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
There is a couple of nodes that are missing description and one node
that fails validation.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168120
Commit: 488151254fdeb5803f950060b218a867bf9ee296
https://github.com/llvm/llvm-project/commit/488151254fdeb5803f950060b218a867bf9ee296
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/test/DebugInfo/dwarfdump-dwp-str-offsets-64.yaml
Log Message:
-----------
Don't check frame base as varies if registers are available from targets. (#168124)
Fixes a buildbot issue stemming from
https://github.com/llvm/llvm-project/pull/167986
Commit: 944278fef441ec3458c1271f6637154762556935
https://github.com/llvm/llvm-project/commit/944278fef441ec3458c1271f6637154762556935
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
R clang/test/OpenMP/parallel_default_variableCategory_codegen.cpp
Log Message:
-----------
Revert "[Clang][OpenMP] Bug fix Default clause variable category" (#168130)
Reverts llvm/llvm-project#168112
Commit: 274354348e3bcc538bc2c9f59e4a40ad9e8141de
https://github.com/llvm/llvm-project/commit/274354348e3bcc538bc2c9f59e4a40ad9e8141de
Author: Michael Jones <michaelrj at google.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Add apfloat test library (#168115)
The apfloat code was added in #167848, and some bazel was added
in #167916 but the runtime library for test-apfloat-emulation.mlir was
missed. This patch adds the appropriate target.
Commit: 825ebef51ad83492698cd8ac59c12375fc25636b
https://github.com/llvm/llvm-project/commit/825ebef51ad83492698cd8ac59c12375fc25636b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/include/llvm/Support/SpecialCaseList.h
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFC][Support] Remove unused getLongestMatch from SpecialCaseList (#167193)
This method is not used anywhere. Remove it.
Commit: 6dad2c2cfb9255bb8b4fec3565f99ffda32dfb1a
https://github.com/llvm/llvm-project/commit/6dad2c2cfb9255bb8b4fec3565f99ffda32dfb1a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
A lldb/test/API/python_api/command_script_output/TestCommandScriptOutput.py
Log Message:
-----------
[lldb] Add a test for capturing stdout/stderr from Python commands (#168138)
Commit: 72a6ae6844752f2232c64b41e4eccf979289da72
https://github.com/llvm/llvm-project/commit/72a6ae6844752f2232c64b41e4eccf979289da72
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250-t16.mir
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
Log Message:
-----------
[AMDGPU] Fix wrong MSB encoding for V_FMAMK instructions (#168107)
These instructions use `src0`, `imm`, `src1` as operand.
Fixes SWDEV-566579.
Commit: ddf5bb0a2e2d2dd77bce66173387d62ab7174d9f
https://github.com/llvm/llvm-project/commit/ddf5bb0a2e2d2dd77bce66173387d62ab7174d9f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll
Log Message:
-----------
[SLP]Check if the copyable element is a sub instruciton with abs in isCommutable
Need to check if the non-copyable element is an instruction before actually
trying to check its NSW attribute.
Commit: 459a64b9045481cce345e2ec7812bfc8c50e4a44
https://github.com/llvm/llvm-project/commit/459a64b9045481cce345e2ec7812bfc8c50e4a44
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
Log Message:
-----------
[lldb] Diagnose unsupported configurations when targeting the Limited C API (#168145)
Diagnose unsupported configurations when targeting the Python Limited C
API. I used SEND_ERROR so that if there's multiple issues, you don't
need to keep reconfiguring.
Commit: e8cc0d22073fd5f59e0b9e1f940dc7a9d4e82218
https://github.com/llvm/llvm-project/commit/e8cc0d22073fd5f59e0b9e1f940dc7a9d4e82218
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
R llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll
Log Message:
-----------
Revert "[SLP]Check if the copyable element is a sub instruciton with abs in isCommutable"
This reverts commit ddf5bb0a2e2d2dd77bce66173387d62ab7174d9f to fix
buildbots https://lab.llvm.org/buildbot/#/builders/11/builds/28083.
Commit: 4c4ffd30cd94469a940397815e08c1b058fdb8f3
https://github.com/llvm/llvm-project/commit/4c4ffd30cd94469a940397815e08c1b058fdb8f3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ProfileVerify.cpp
Log Message:
-----------
[ProfCheck] Refactor Select Instrumentation to use Early Exits (#168086)
I think this is quite a bit more readable than the nested conditionals.
>From review feedback that was not addressed precommitn in #167973.
Commit: e02fdf0fcea3c02dc0eb692bc38042f9681e4afd
https://github.com/llvm/llvm-project/commit/e02fdf0fcea3c02dc0eb692bc38042f9681e4afd
Author: Thibault Monnier <97551402+Thibault-Monnier at users.noreply.github.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[CIR] Upstream CIR codegen for vec_ext x86 builtins (#167942)
This PR upstreams the codegen for the x86 vec_ext builtins from the
incubator. It is part of #167752.
Commit: 66d5f6a60550a123638bbdf91ec8cff76cb29c5a
https://github.com/llvm/llvm-project/commit/66d5f6a60550a123638bbdf91ec8cff76cb29c5a
Author: Tom Yang <zhenyutyang at gmail.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Target.h
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] fix parallel module loading deadlock for Linux DYLD (#166480)
Another attempt at resolving the deadlock issue @GeorgeHuyubo discovered
(his previous
[attempt](https://github.com/llvm/llvm-project/pull/160225)).
This change can be summarized as the following:
* Plumb through a boolean flag to force no preload in
`GetOrCreateModules` all the way through to `LoadModuleAtAddress`.
* Parallelize `Module::PreloadSymbols` separately from
`Target::GetOrCreateModule` and its caller `LoadModuleAtAddress` (this
is what avoids the deadlock).
These changes roughly maintain the performance characteristics of the
previous implementation of parallel module loading. Testing on targets
with between 5000 and 14000 modules, I saw similar numbers as before,
often more than 10% faster in the new implementation across multiple
trials for these massive targets. I think it's because we have less lock
contention with this approach.
# The deadlock
See [bt.txt](https://github.com/user-attachments/files/22524471/bt.txt)
for a sample backtrace of LLDB when the deadlock occurs.
As @GeorgeHuyubo explains in his
[PR](https://github.com/llvm/llvm-project/pull/160225), the deadlock
occurs from an ABBA deadlock that happens when a thread context-switches
out of `Module::PreloadSymbols`, goes into `Target::GetOrCreateModule`
for another module, possibly entering this block:
```
if (!module_sp) {
// The platform is responsible for finding and caching an appropriate
// module in the shared module cache.
if (m_platform_sp) {
error = m_platform_sp->GetSharedModule(
module_spec, m_process_sp.get(), module_sp, &search_paths,
&old_modules, &did_create_module);
} else {
error = Status::FromErrorString("no platform is currently set");
}
}
```
`Module::PreloadSymbols` holds a module-level mutex, and then
`GetSharedModule` *attempts* to hold the mutex of the global shared
`ModuleList`. So, this thread holds the module mutex, and waits on the
global shared `ModuleList` mutex.
A competing thread may execute `Target::GetOrCreateModule`, enter the
same block as above, grabbing the global shared `ModuleList` mutex.
Then, in `ModuleList::GetSharedModule`, we eventually call
`ModuleList::FindModules` which eventually waits for the `Module` mutex
held by the first thread (via `Module::GetUUID`). Thus, we deadlock.
## Reproducing the deadlock
It might be worth noting that I've never been able to observe this
deadlock issue during live debugging (e.g. launching or attaching to
processes), however we were able to consistently reproduce this issue
with coredumps when using the following settings:
```
(lldb) settings set target.parallel-module-load true
(lldb) settings set target.preload-symbols true
(lldb) settings set symbols.load-on-demand false
(lldb) target create --core /some/core/file/here
# deadlock happens
```
## How this change avoids this deadlock
This change avoids concurrent executions of `Module::PreloadSymbols`
with `Target::GetOrCreateModule` by waiting until after the
`Target::GetOrCreateModule` executions to run `Module::PreloadSymbols`
in parallel. This avoids the ordering of holding a Module lock *then*
the ModuleList lock, as `Target::GetOrCreateModule` executions maintain
the ordering of the shared ModuleList lock first (from what I've read
and tested).
## Why not read-write lock?
Some feedback in https://github.com/llvm/llvm-project/pull/160225 was to
modify mutexes used in these components with read-write locks. This
might be a good idea overall, but I don't think it would *easily*
resolve this specific deadlock. `Module::PreloadSymbols` would probably
need a write lock to Module, so even if we had a read lock in
`Module::GetUUID` we would still contend. Maybe the `ModuleList` lock
could be a read lock that converts to a write lock if it chooses to
update the module, but it seems likely that some thread would try to
update the shared module list and then the write lock would contend
again.
Perhaps with deeper architectural changes, we could fix this issue?
# Other attempts
One downside of this approach (and the former approach of parallel
module loading) is that each DYLD would need to implement this pattern
themselves. With @clayborg's help, I looked at a few other approaches:
* In `Target::GetOrCreateModule`, backgrounding the
`Module::PreloadSymbols` call by adding it directly to the thread pool
via `Debugger::GetThreadPool().async()`. This required adding a lock to
`Module::SetLoadAddress` (probably should be one there already) since
`ObjectFileELF::SetLoadAddress` is not thread-safe (updates sections).
Unfortunately, during execution, this causes the preload symbols to run
synchronously with `Target::GetOrCreateModule`, preventing us from truly
parallelizing the execution.
* In `Module::PreloadSymbols`, backgrounding the `symtab` and `sym_file`
`PreloadSymbols` calls individually, but similar issues as the above.
* Passing a callback function like
https://github.com/swiftlang/llvm-project/pull/10746 instead of the
boolean I use in this change. It's functionally the same change IMO,
with some design tradeoffs:
* Pro: the caller doesn't need to explicitly call
`Module::PreloadSymbols` itself, and can instead call whatever function
is passed into the callback.
* Con: the caller needs to delay the execution of the callback such that
it occurs after the `GetOrCreateModule` logic, otherwise we run into the
same issue. I thought this would be trickier for the caller, requiring
some kinda condition variable or otherwise storing the calls to execute
afterwards.
# Test Plan:
```
ninja check-lldb
```
---------
Co-authored-by: Tom Yang <toyang at fb.com>
Commit: 326d4e90335c9f0c670f0423265625c0a85ec951
https://github.com/llvm/llvm-project/commit/326d4e90335c9f0c670f0423265625c0a85ec951
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll
Log Message:
-----------
[SLP]Check if the copyable element is a sub instruciton with abs in isCommutable
Need to check if the non-copyable element is an instruction before actually
trying to check its NSW attribute.
Commit: 21502bddb37ab62e8f51debb3cd20c71e85b6bec
https://github.com/llvm/llvm-project/commit/21502bddb37ab62e8f51debb3cd20c71e85b6bec
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M lldb/bindings/python/python-typemaps.swig
Log Message:
-----------
[lldb] Drop support for the Buffer Protocol (#168144)
This is an alternative solution to the issue described in #167990, which
can be summarized as that we cannot target Python 3.8 with the stable
API and support building for Python 3.13 and later due to the buffer
protocol.
The approach taken in this PR, and proposed by Ismail, is to sidesteps
the issue by dropping support for the buffer protocol. The only two
users are SBFile::Read and SBFile::Write. Instead, we support PyBytes
and PyByteArray which are the builtin types that conform to the buffer
protocol. Technically, this means a small regression, where those
methods could previously take custom types that conform to Python's
buffer protocol. Like Ismail, I think this is acceptable given the
alternatives.
Co-authored-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 55f634cc7f345a8708f2497c0274144ab1eb3d91
https://github.com/llvm/llvm-project/commit/55f634cc7f345a8708f2497c0274144ab1eb3d91
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libcxx][Github] Attempt to Fix libcxx Container Push
docker-compose could not find the configuration. After this patch it
should be able to.
Commit: 94c384c9eeed58d8921e0f5ad6ed1c517c01879f
https://github.com/llvm/llvm-project/commit/94c384c9eeed58d8921e0f5ad6ed1c517c01879f
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/bindings/python/python.swig
Log Message:
-----------
[lldb] Enforce Py_LIMITED_API in the SWIG typemaps (#168147)
We missed a handful of uses of the Python private API in the SWIG
typemaps because they are included before we include the Python header
that defines Py_LIMITED_API.
This fixes that and guards the last private use on whether or not you're
targeting the limited API. Unfortunately there doesn't appear to be an
alternative, so we have to resort to being slightly less defensive.
Commit: 4eea1573019275071364b25ac6ee4f8e45b1ef95
https://github.com/llvm/llvm-project/commit/4eea1573019275071364b25ac6ee4f8e45b1ef95
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Return byte offsets from computeValueLLTs (NFC) (#166747)
To avoid scaling offsets back and forth. This is also what SelectionDAG
equivalent (ComputeValueVTs) does, and will allow to reuse
ComputeValueTypes with less effort.
Commit: 45300473344c4e71054917f2890f8baa7c14ec50
https://github.com/llvm/llvm-project/commit/45300473344c4e71054917f2890f8baa7c14ec50
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwp-str-offsets-dwarf64-dwp.yaml
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwp-str-offsets-dwarf64-exe.yaml
A lldb/test/Shell/SymbolFile/DWARF/dwp-str-offsets-dwarf64.test
Log Message:
-----------
[lldb] Add the ability to load DWARF64 .debug_str_offsets tables for DWARF32 DWARF units in .dwp files in LLDB. (#167997)
This patch is updating the reading capabilities of the LLDB DWARF parser
for a llvm-dwp patch https://github.com/llvm/llvm-project/pull/167457
that will emit .dwp files where the compile units are DWARF32 and the
.debug_str_offsets tables will be emitted as DWARF64 to allow .debug_str
sections that exceed 4GB in size.
Commit: 5305a536546a8502417a6b9a887569fa5587c118
https://github.com/llvm/llvm-project/commit/5305a536546a8502417a6b9a887569fa5587c118
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn] port c29b29bb6a7f (_LIBCPP_ASSERTION_SEMANTIC_DEFAULT)
Commit: 9036e2359f017b8307a8651ef9969c1cd047ceb8
https://github.com/llvm/llvm-project/commit/9036e2359f017b8307a8651ef9969c1cd047ceb8
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M libcxx/include/__memory/inout_ptr.h
M libcxx/include/__memory/out_ptr.h
A libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
Log Message:
-----------
[libc++] Apply `[[nodiscard]]` to `in/out_ptr` (#167097)
...according to Coding Guidelines: `[[nodiscard]]` should be applied to
functions where discarding the return value is most likely a correctness
issue.
Changes to:
- [x] `inout_ptr()`
- [x] `out_ptr()`
At the time of impelentation the `[[nodiscard]]` policy has not been
established yet.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 6214dccbc991abe5a1679bc88e74b8c7d53f3d45
https://github.com/llvm/llvm-project/commit/6214dccbc991abe5a1679bc88e74b8c7d53f3d45
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[Unwind][AArch64] Match sigreturn instructions in big endian (#167139)
Since insns are always stored LE, on a BE system the opcodes will be
loaded byte-reversed. Therefore, define two sets of opcodes, one for LE
and one for BE.
Commit: 5442aa1853df1ab4406628d7e6ee4f785044c11d
https://github.com/llvm/llvm-project/commit/5442aa1853df1ab4406628d7e6ee4f785044c11d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RDFGraph.h
M llvm/include/llvm/CodeGen/RDFRegisters.h
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RDFLiveness.cpp
M llvm/lib/CodeGen/RDFRegisters.cpp
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
Log Message:
-----------
[RDF] Rename RegisterId field in RegisterRef Reg->Id. NFC (#168154)
Not all RegisterId values are registers, so Id is a more appropriate
name.
Use asMCReg() in some places that assumed it was a register.
Commit: 1f3e2c6b11a1ffba503274bbb1f504adcdc65f94
https://github.com/llvm/llvm-project/commit/1f3e2c6b11a1ffba503274bbb1f504adcdc65f94
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/utils/TableGen/tablegen.gni
Log Message:
-----------
[gn] Let tablegen() add root_build_dir to include search path
See https://github.com/llvm/llvm-project/pull/167700#issuecomment-3535440851
Commit: 7016d432418c88a9b7e27aec3fbcc3e0a3b609ad
https://github.com/llvm/llvm-project/commit/7016d432418c88a9b7e27aec3fbcc3e0a3b609ad
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFC][SpecialCaseList] Convert `preprocess` into `LazyInit` (#167281)
Currently SpecialCaseList created at least twice,
one on by `Driver`, for diagnostics only, and then
the real one by the `ASTContext`.
Also, deppending on enabled sanitizers, not all
sections will be used.
In both cases there is unnecessary RadixTree
construction.
This patch changes `GlobMatcher` to do initialization
lazily only when needed.
And remove empty one from `RegexMatcher`.
This saves saves 0.5% of clang time building large project.
Commit: 321a97e0f7c2536113bd0a901a8fd614e0a3faba
https://github.com/llvm/llvm-project/commit/321a97e0f7c2536113bd0a901a8fd614e0a3faba
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
Log Message:
-----------
[AMDGPU] Delete some dead code (NFC) (#167891)
`getLanesWithProperty()` is called with virtual registers only.
Commit: 0fa6a67a4200ea1516f56e298df4a671af8a0642
https://github.com/llvm/llvm-project/commit/0fa6a67a4200ea1516f56e298df4a671af8a0642
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
AMDGPU: Use v_mov_b32 to implement divergent zext i32->i64 (#168166)
Some cases are relying on SIFixSGPRCopies to force VALU
reg_sequence inputs with SGPR inputs to use all VGPR inputs,
but this doesn't always happen if the reg_sequence isn't
invalid. Make sure we use a vgpr up-front here so we don't
rely on something later.
Commit: e7b41df10e3bcb1d84d5449bc6f9bb0a99554b4c
https://github.com/llvm/llvm-project/commit/e7b41df10e3bcb1d84d5449bc6f9bb0a99554b4c
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/PowerPC/recipest.ll
Log Message:
-----------
[SelectionDAGBuilder] Propagate fast-math flags to fpext (#167574)
As in title. Without this, fpext behaves in selectionDAG as always
having no fast-math flags.
Commit: f8d65fd874ca6dc8652c7bfd8f58931929091e5e
https://github.com/llvm/llvm-project/commit/f8d65fd874ca6dc8652c7bfd8f58931929091e5e
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
M llvm/test/CodeGen/AArch64/fpext.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
Log Message:
-----------
[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)
This PR improves the lowering of vectors of fp16 when using fpext.
Previously vectors of fp16 were scalarized leading to lots of extra
instructions. Now, vectors of fp16 will be lowered when extended to fp64
via the preexisting lowering logic for extends. To make use of the
existing logic, we need to add elements until we reach the next power of
2.
Commit: d8f6e108da56b0cc08cdb9cbb98b853fa9b406b0
https://github.com/llvm/llvm-project/commit/d8f6e108da56b0cc08cdb9cbb98b853fa9b406b0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
AMDGPU: Use vgpr to implement divergent i32->i64 anyext (#168167)
Handle this for consistency with the zext case.
Commit: 9fecebf97bef08aeb4ce11025d2569fa95a0debc
https://github.com/llvm/llvm-project/commit/9fecebf97bef08aeb4ce11025d2569fa95a0debc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
Log Message:
-----------
AMDGPU: Consider isVGPRImm when forming constant from build_vector (#168168)
This probably should have turned into a regular integer constant
earlier. This is to defend against future regressions.
Commit: fbf74b2553dea68873f2c0c9692ba28bd1369884
https://github.com/llvm/llvm-project/commit/fbf74b2553dea68873f2c0c9692ba28bd1369884
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsic-mmo-type.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.ll
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/vector_range_metadata.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
AMDGPU: Select vector reg class for divergent build_vector (#168169)
The main improvement is to the mfma tests. There are some
mild regressions scattered around, and a few major ones.
The worst regressions are in some of the bitcast tests;
these are cases where the SGPR argument list runs out
and uses VGPRs, and the copies-from-VGPR are misidentified
as divergent. Most of the shufflevector tests are also
regressions. These end up with cleaner MIR, but then get poor
regalloc decisions.
Commit: d9dfe7540f81663f75350bb5ceb66d2f94dac078
https://github.com/llvm/llvm-project/commit/d9dfe7540f81663f75350bb5ceb66d2f94dac078
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
Log Message:
-----------
MCNopsFragment,MCBoundaryAlignFragment: Use parent MCSubtargetInfo
Commit: 29e3c2e7e13dc037dccdee1fe637ac0413bbb8e9
https://github.com/llvm/llvm-project/commit/29e3c2e7e13dc037dccdee1fe637ac0413bbb8e9
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-14 (Fri, 14 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
MCAsmBackend: Remove unneeded MCAssembler parameter
Commit: 30c84658c2d6e5b1dfa3abdc8652ffc7793b3909
https://github.com/llvm/llvm-project/commit/30c84658c2d6e5b1dfa3abdc8652ffc7793b3909
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/offset-of.cpp
Log Message:
-----------
[CIR] Implement support for OffsetOfExpr (#167726)
Implement support for the OffsetOfExpr
Commit: 22f550bec269cc1b9ce9879d554984bd0441ff19
https://github.com/llvm/llvm-project/commit/22f550bec269cc1b9ce9879d554984bd0441ff19
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
Log Message:
-----------
[CIR] ExtVectorElementExpr with result Vector type (#167925)
Upstream ExtVectorElementExpr with result Vector type
Commit: e48f2be9422cb4956c87a243e118f5052d55092c
https://github.com/llvm/llvm-project/commit/e48f2be9422cb4956c87a243e118f5052d55092c
Author: A. Jiang <de34 at live.cn>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M libcxx/include/limits
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/traps.pass.cpp
Log Message:
-----------
[libc++] Make `std::numeric_limits<NonPromoted>::traps` `false` (#166724)
Per [LWG554](https://cplusplus.github.io/LWG/issue554), the rationale is
that even if `true / false` traps, the values causing trap are the
converted `int` values produced by usual arithmetic conversion, but not
the original `bool` values.
This is also true for all other non-promoted integer types. As a result,
`std::numeric_limits<I>` should be `false` if `I` is a non non-promoted
integer type.
Fixes #166053.
Commit: 85db92884cd6d8838d6f7cc8f760fa49662d8426
https://github.com/llvm/llvm-project/commit/85db92884cd6d8838d6f7cc8f760fa49662d8426
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip outdated comment in optimizeForVFAndUF (NFC) (#168068)
Commit: 5593f451bba339a5b7762c1205842d835e0551bb
https://github.com/llvm/llvm-project/commit/5593f451bba339a5b7762c1205842d835e0551bb
Author: Ella Ma <alansnape3058 at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/test/Analysis/z3-unarysymexpr.c
Log Message:
-----------
[analyzer] Fix crash in Z3 SMTConv when negating a boolean expression (#165779) (#168034)
Refer to #158276 for previous hotfix.
In Z3, boolean expressions are incompatible with bitvec operators.
However, C expressions like `-(5 && a)` will generate such symbolic
expressions, which will be further used as an integer. To be compatible
with such usages, this fix converts such expressions to integer using
the existing `fromCast`.
Commit: ca26cf86119e0e1c4020fff8d81ce485de9f0e06
https://github.com/llvm/llvm-project/commit/ca26cf86119e0e1c4020fff8d81ce485de9f0e06
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
Log Message:
-----------
[LV] Use variables in CHECK lines for unnamed VPValues in test.
Update test to capture unnamed VPValues in variables, making it easier
to update with future VPlan changes.
Commit: eb98b65e82125ebadef48cf668689ec34a4f811f
https://github.com/llvm/llvm-project/commit/eb98b65e82125ebadef48cf668689ec34a4f811f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[ValueTracking] Check across single predecessors in willNotFreeBetween. (#167965)
Extend willNotFreeBetween to perform simple checking across blocks to
support the case where CtxI is in a successor of the block that contains
the assume, but the assume's parent is the single predecessor of CtxI's
block.
This enables using _builtin_assume_dereferenceable to vectorize
std::find_if and co in practice.
End-to-end reproducer: https://godbolt.org/z/6jbsd4EjT
PR: https://github.com/llvm/llvm-project/pull/167965
Commit: 4cd8c113685bcc218490b98b097f7edc61cc7c2b
https://github.com/llvm/llvm-project/commit/4cd8c113685bcc218490b98b097f7edc61cc7c2b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512fp16intrin.h
M clang/test/CodeGen/X86/avx512fp16-builtins-constrained.c
Log Message:
-----------
[X86] Replace default _mm512_sqrt_pd/s/h implementations with generic __builtin_elementwise_sqrt (#168057)
Followup to #165682
Commit: 76c69ca29c1b0ffa86cddb5e199f53915215be8c
https://github.com/llvm/llvm-project/commit/76c69ca29c1b0ffa86cddb5e199f53915215be8c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/SimplifyCFG/switch-on-const.ll
Log Message:
-----------
[ValueTracking] Bail out on non-immediate constant expressions (#168084)
In https://github.com/llvm/llvm-project/pull/165748 constant expressions
were allowed in `collectPossibleValues` because we are still using
insertelement + shufflevector idioms to represent a scalable vector
splat. However, it also accepts some unresolved constants like ptrtoint
of globals or pointer difference between two globals. Absolutely we can
ask the user to check this case with the constant folding API. However,
since we don't observe the real-world usefulness of handling constant
expressions, I decide to be more conservative and only handle immediate
constants in the helper function. With this patch, we don't need to
touch the SimplifyCFG part, as the values can only be either ConstantInt
or undef/poison values (NB: switch on undef condition is UB).
Fix the miscompilation reported by
https://github.com/llvm/llvm-project/pull/165748#issuecomment-3532245218
Commit: 5613e4accce663b5993bce066b01ef56c7ee9eea
https://github.com/llvm/llvm-project/commit/5613e4accce663b5993bce066b01ef56c7ee9eea
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc-copy.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-copy.mlir
Log Message:
-----------
[mlir][emitc] Fix ineffective tests (#168197)
These tests were only checking the specialized prefix, leaving common
code unchecked (and incorrect). Checked code was also not using patterns
for SSA values.
Commit: 820daa5c1ed856f9edab68a4e471e5ce46cf61c4
https://github.com/llvm/llvm-project/commit/820daa5c1ed856f9edab68a4e471e5ce46cf61c4
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Support VPWidenIntOrFpInduction in getSCEVExprForVPValue. (NFCI)
Construct SCEVs for VPWidenIntOrFpInductionRecipe analogous to
VPCanonicalInductionPHIRecipe: create an AddRec with start + step from
the recipe.
Currently the only impact should be computing more costs of replicating
stores directly in VPlan.
Commit: ea66d269a79d1c8186962fbe7ca8f84d84d61870
https://github.com/llvm/llvm-project/commit/ea66d269a79d1c8186962fbe7ca8f84d84d61870
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-spirv-translator-new-driver.c
M clang/test/Driver/hip-toolchain-no-rdc.hip
A clang/test/Driver/linker-wrapper-hip-no-rdc.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
HIP non-RDC: enable new offload driver on Windows via linker wrapper (#167918)
Use clang linker wrapper to device-link and embed HIP fat binary
directly. Match CUDA non-RDC flow in new driver by producing .hipfb like
.fatbin.
Previously, llvm offload binary is used to package the device IR's and
embed them in the host object file, then clang linker wrapper is used
with each host object file to extract device IR's, perform device
linking, bundle code objects into a fat binary, wrap it in a host object
file, then merge it with the original host object by the host linker
with '-r' option. However, the host linker in MSVC toolchain does not
support '-r' option.
The new approach still package the device IR's with llvm offload binary,
but instead of embed it in a host object, it is passed to clang linker
wrapper directly, where device IR's are extracted and linked, fat binary
is generated, then embeded in the host object directly. Compared with
the old offload driver, this approach can parallelize the device linking
for different GPU's by using the parallelization feature of clang linker
wrapper.
Fixes: SWDEV-565994
Commit: 20db716418bd102c35c29b2e05c0f20b7458e559
https://github.com/llvm/llvm-project/commit/20db716418bd102c35c29b2e05c0f20b7458e559
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Only check up to CtxIter in willNotFreeBetween.
Only check up to CtxI (CtxIter) when checking for calls that may free
in CtxI's block.
Missed update in https://github.com/llvm/llvm-project/pull/167965.
This should be NFC, as all current callers pass a terminator that is
guaranteed to not free as CtxI
Commit: 8f6c7aa2b1f80afe58e2011cb457c5cb67337274
https://github.com/llvm/llvm-project/commit/8f6c7aa2b1f80afe58e2011cb457c5cb67337274
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/lib/Headers/cpuid.h
M clang/test/CodeGen/attr-target-x86.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/TargetParser/X86TargetParser.cpp
A llvm/test/CodeGen/X86/llc-accept-avx10-512.ll
Log Message:
-----------
[X86] Remove vector length (256 vs 512) distinction of AVX10 (#167736)
As in title. AVX10.x doesn't distinguish between available vector
lengths.
-mattr=avx10.x-512 and defining of macros with _512 is kept for compatibility.
Bit-positions of avx10.1/2 features in compiler-rt and X86TargetParser
are synced to match those in the gcc.
Commit: 9fa15ef91601a2b254ee3c52dab03c1c33eb48d5
https://github.com/llvm/llvm-project/commit/9fa15ef91601a2b254ee3c52dab03c1c33eb48d5
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/shrink-insts-scalar-bit-ops.mir
Log Message:
-----------
[AMDGPU] When shrinking and/or to bitset*, remove implicit scc def (#168128)
When shrinking and/or to bitset* remove leftover implicit scc def.
bitset* instructions do not set scc.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: d99c840d1629038b624c11a46df0b1238248208e
https://github.com/llvm/llvm-project/commit/d99c840d1629038b624c11a46df0b1238248208e
Author: nerix <nerixdev at outlook.de>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
A llvm/test/tools/llvm-pdbutil/dbi-section-headers.test
M llvm/tools/llvm-pdbutil/PdbYaml.cpp
M llvm/tools/llvm-pdbutil/PdbYaml.h
M llvm/tools/llvm-pdbutil/YAMLOutputStyle.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.h
Log Message:
-----------
[llvm-pdbutil] Create DBI section headers in yaml2pdb (#166566)
The section headers present in the DBI stream got lost when using
`pdb2yaml` and `yaml2pdb`.
They are a list of COFF section headers. The
`llvm::object::coff_section` didn't have a YAML mapping, so I added one
in llvm-pdbutil. The mapping for COFF sections in ObjectYAML includes
the section data itself, so we can't use it here.
Creation of the section map and headers in yaml2pdb is done like in LLD:
https://github.com/llvm/llvm-project/blob/438a18c1e105ca04e624239644195e48b28b5099/lld/COFF/PDB.cpp#L1695-L1703
Commit: 59d2e9359089f39e626678103195346254a46a62
https://github.com/llvm/llvm-project/commit/59d2e9359089f39e626678103195346254a46a62
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
Log Message:
-----------
[LV] Add test with to check different interleave counts for fmaxnum.
This adds additional test coverage for folding FCMP uno
(https://github.com/llvm/llvm-project/pull/166823)
Commit: 636e370b8aec2ec1b2f6c0616193a801aa588578
https://github.com/llvm/llvm-project/commit/636e370b8aec2ec1b2f6c0616193a801aa588578
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/unittests/Transforms/Utils/LocalTest.cpp
Log Message:
-----------
[Utils] Remove an unused local variable (NFC) (#168181)
Identified with bugprone-unused-local-non-trivial-variable.
Commit: 7a8237bbb63b27d1f899235a25ef33dfbd7137c0
https://github.com/llvm/llvm-project/commit/7a8237bbb63b27d1f899235a25ef33dfbd7137c0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/RegAllocPBQP.h
M llvm/include/llvm/IR/PredIteratorCache.h
M llvm/lib/ObjCopy/COFF/COFFObject.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
M llvm/lib/Support/Mustache.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-readobj/COFFDumper.cpp
M llvm/unittests/Object/ELFTypesTest.cpp
M llvm/unittests/Support/Path.cpp
Log Message:
-----------
[llvm] Use llvm::copy (NFC) (#168182)
Identified with llvm-use-ranges.
Commit: 3a7876d7897d66fe9f9a88f18b7577489e621d18
https://github.com/llvm/llvm-project/commit/3a7876d7897d66fe9f9a88f18b7577489e621d18
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/ConcurrentHashtable.h
M llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[llvm] Delete pointers without null checks (NFC) (#168183)
Identified with readability-delete-null-pointer.
Commit: 268ea1aeaa02f492d019bd26148c5484c12de0c6
https://github.com/llvm/llvm-project/commit/268ea1aeaa02f492d019bd26148c5484c12de0c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
Log Message:
-----------
[Analysis] Remove a redundant cast (NFC) (#168184)
NumElts is alreadyof type int.
Identified with readability-redundant-casting.
Commit: 63e059de233348e464101ff07e28ed81769043b0
https://github.com/llvm/llvm-project/commit/63e059de233348e464101ff07e28ed81769043b0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/docs/HowToBuildWindowsItaniumPrograms.rst
M llvm/docs/HowToUpdateDebugInfo.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/InstrProfileFormat.rst
M llvm/docs/KernelInfo.rst
M llvm/docs/LangRef.rst
M llvm/docs/Lexicon.rst
M llvm/docs/LinkTimeOptimization.rst
M llvm/docs/MLGO.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/PCSectionsMetadata.rst
M llvm/docs/QualGroup.rst
M llvm/docs/ReleaseProcess.rst
M llvm/docs/ResponseGuide.rst
M llvm/docs/Security.rst
Log Message:
-----------
[llvm] Proofread *.rst (#168185)
This patch is limited to single-word replacements to fix spelling
and/or grammar to ease the review process. Punctuation and markdown
fixes are specifically excluded.
Commit: 67f61df22bd98e182447fbdd5a7cdc2795f2da25
https://github.com/llvm/llvm-project/commit/67f61df22bd98e182447fbdd5a7cdc2795f2da25
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Always set trip count when creating plan for unit tests (NFC).
Simplifies some tests which no do not need to pass TC, and future
changes will require to always have a trip count available.
Commit: 33a7bb1f1a78396fc4259963bac236d588dde7bd
https://github.com/llvm/llvm-project/commit/33a7bb1f1a78396fc4259963bac236d588dde7bd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
DAG: Use poison when legalizing scalar_to_vector results (#167751)
Commit: 70349c17d3f7b0513fab901f542c8a12ab8ae855
https://github.com/llvm/llvm-project/commit/70349c17d3f7b0513fab901f542c8a12ab8ae855
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
DAG: Use poison in SplitVecRes_VP_LOAD_FF (#167753)
Commit: a4e7d150ea69753982bc8a1dcce310c455a069a6
https://github.com/llvm/llvm-project/commit/a4e7d150ea69753982bc8a1dcce310c455a069a6
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M mlir/test/python/dialects/nvvm.py
Log Message:
-----------
[MLIR][Python] Add tests for nvvm barrier ops (#167976)
Found this issue #167958 when adding these tests, thanks for the quick
fix @clementval.
Commit: 358e9a56af21b18eab0e1d6a52b6e99002affe2e
https://github.com/llvm/llvm-project/commit/358e9a56af21b18eab0e1d6a52b6e99002affe2e
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
M llvm/test/Transforms/LoopUnroll/peel-last-iteration-expansion-cost.ll
M llvm/test/lit.cfg.py
Log Message:
-----------
[LP] Assign weights when peeling last iteration. (#166858)
Commit: 82214ffeeebf4f2b133b80bb720ff64716b3b3e7
https://github.com/llvm/llvm-project/commit/82214ffeeebf4f2b133b80bb720ff64716b3b3e7
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/assets/comment-template.mustache
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
Log Message:
-----------
[clang-doc] add throws comments to comment template (#150649)
Serialize throw Doxygen comments for exceptions. Accepts both \throw and
\throws.
Commit: eb9d56cb558cd7412edc8488f331517f3bb3df30
https://github.com/llvm/llvm-project/commit/eb9d56cb558cd7412edc8488f331517f3bb3df30
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M mlir/python/mlir/dialects/transform/__init__.py
M mlir/test/python/dialects/transform_interpreter.py
Log Message:
-----------
[MLIR][Transform][Python] Expose applying named_sequences as a method (#168223)
Makes it so that a NamedSequenceOp can be directly applied to a Module,
via a method `apply(...)`.
Commit: b1b0be201b9043c3c417a58f24eb9ced62a52638
https://github.com/llvm/llvm-project/commit/b1b0be201b9043c3c417a58f24eb9ced62a52638
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Make DenseMapBase::moveFrom safer (NFC) (#168180)
Without this patch, DenseMapBase::moveFrom() moves buckets and leaves
the moved-from object in a zombie state. This patch teaches
moveFrom() to call kill() so that the move-from object is in a known
good state. This brings moveFrom()'s behavior in line with standard
C++ move semantics.
kill() is implemented so that it takes the fast path in the destructor
-- both destroyAll() and deallocateBuckets().
Commit: ff8ed4d80aafbce13413bf95d3f6ff0964900287
https://github.com/llvm/llvm-project/commit/ff8ed4d80aafbce13413bf95d3f6ff0964900287
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Linalg/Transforms/HoistPadding.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.h
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/Tools/PDLL/AST/Nodes.cpp
Log Message:
-----------
[mlir] Use llvm::copy (NFC) (#168213)
Identified with llvm-use-ranges.
Commit: d3439138e158541b65f3d759f5071a445d3297f2
https://github.com/llvm/llvm-project/commit/d3439138e158541b65f3d759f5071a445d3297f2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/lib/Analysis/BodyFarm.cpp
Log Message:
-----------
[Analysis] Remove a redundant cast. (#168214)
callOperatorDecl is already of type FunctionDecl *.
Identified with readability-redundant-casting.
Commit: 3705921f60914df3cfb59e088cf9e476fe7992b7
https://github.com/llvm/llvm-project/commit/3705921f60914df3cfb59e088cf9e476fe7992b7
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
A llvm/test/CodeGen/ARM/force-global-merge.ll
Log Message:
-----------
[CodeGen] add a command to force global merge
I found that in some performance scenarios, such as under O2, this pr can be helpful for a series of loading global variables.
Commit: 700aa5e376af26b76bf76bf8f4e1e1dca22a2a6e
https://github.com/llvm/llvm-project/commit/700aa5e376af26b76bf76bf8f4e1e1dca22a2a6e
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
R llvm/test/CodeGen/ARM/force-global-merge.ll
Log Message:
-----------
[revert][CodeGen] add a command to force global merge (#168230)
sorry, this was my mistake
Commit: 6b4fef029aac441ce728eac556b0d330d0eaa870
https://github.com/llvm/llvm-project/commit/6b4fef029aac441ce728eac556b0d330d0eaa870
Author: Ryan Mast <3969255+nightlark at users.noreply.github.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/docs/CIBestPractices.rst
Log Message:
-----------
[CI] Fix typo in CI Best Practices for the release branch names push filter (#168226)
The CIBestPractices.rst document uses `releases/*` as the branch name
filter for push events. The actual release branch names match the
pattern `release/*`.
Commit: 1fd9c02513c22271ff16b3091d6849aba96e5407
https://github.com/llvm/llvm-project/commit/1fd9c02513c22271ff16b3091d6849aba96e5407
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/IR/TypeUtilities.cpp
Log Message:
-----------
[mlir] Adopt cast function objects. NFC. (#168228)
These were added in https://github.com/llvm/llvm-project/pull/165803.
Commit: 95c93f40ac186be1e16e5b6216b98f9addbe3806
https://github.com/llvm/llvm-project/commit/95c93f40ac186be1e16e5b6216b98f9addbe3806
Author: Eric Christopher <echristo at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MacroFusion.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/X86/X86Subtarget.cpp
Log Message:
-----------
Cleanups in AArch64 (#168025)
Forward declare a couple of classes for simplicity, remove some unused
headers, clean up a comment.
Tested with check-all.
Commit: f210fc1a1ca611e9584478a50ed32011ba210c8f
https://github.com/llvm/llvm-project/commit/f210fc1a1ca611e9584478a50ed32011ba210c8f
Author: clf <53817093+clingfei at users.noreply.github.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/CodeGen/builtins.c
M clang/test/CodeGenCXX/builtins.cpp
M clang/test/Sema/constant-builtins-2.c
M clang/test/Sema/constant-builtins.c
A clang/test/SemaCXX/builtin-bswapg.cpp
Log Message:
-----------
[Clang] Add __builtin_bswapg (#162433)
Add a new builtin function __builtin_bswapg. It works on any integral
types that has a multiple of 16 bits as well as a single byte.
Closes #160266
Commit: f5b73760e1c4d5d82c02c871b461d665861761fb
https://github.com/llvm/llvm-project/commit/f5b73760e1c4d5d82c02c871b461d665861761fb
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefBase.td
M mlir/lib/Dialect/MemRef/IR/CMakeLists.txt
M mlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
M mlir/test/Dialect/MemRef/mem2reg.mlir
Log Message:
-----------
[mlir][MemRef] Add UB as a dependent dialect and use `ub.poison` for Mem2Reg (#168066)
This patch adds `ub` as a dependent dialect to `memref`, and uses
`ub.poison` as the default value in `AllocaOp::getDefaultValue` for the
mem2reg pass.
This aligns the behavior of `mem2reg` with LLVM, where loading a value
before having a value should be poison.
---------
Signed-off-by: Fabian Mora <fabian.mora-cordero at amd.com>
Commit: d831f8df52e5ef7bbea27bde467293ff76828f25
https://github.com/llvm/llvm-project/commit/d831f8df52e5ef7bbea27bde467293ff76828f25
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/alias_mask.ll
A llvm/test/CodeGen/AArch64/loop-dependence-mask-ccmp.ll
Log Message:
-----------
[SelectionDAG] Fix AArch64 machine verifier bug when expanding LOOP_DEPENDENCE_MASK (#168221)
TargetConstant nodes don't match TableGen ImmLeaf patterns during
instruction selection. When this zero constant flows into the AArch64
CCMP formation code, the machine verifier hits an assertion in expensive
checks.
Fixes: #168227
Commit: e009de26b6d0a8d9e67d741f84350a4ffe116983
https://github.com/llvm/llvm-project/commit/e009de26b6d0a8d9e67d741f84350a4ffe116983
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[LV] Use VPlan pattern matching in adjustRecipesForReductions (NFC)
Replace the assert checking if CurrentLinkI is a CmpInst with a pattern
matching check in the if condition. This uses VPlan-level pattern matching
instead of inspecting the underlying instruction type.
Commit: 6cedafbfbc526fd6f643ee6f1528338559a745a8
https://github.com/llvm/llvm-project/commit/6cedafbfbc526fd6f643ee6f1528338559a745a8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vselect.ll
Log Message:
-----------
X86: Handle poison in buildFromShuffleMostly (#168218)
Commit: 019e90ff8b7f11339f23a5f3c9441846f50a83ae
https://github.com/llvm/llvm-project/commit/019e90ff8b7f11339f23a5f3c9441846f50a83ae
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Group public functions in DenseMap.h (NFC) (#168239)
This patch groups public functions, including the constructors, the
destructor, and the copy/move assignment operators.
Commit: edbf9e4c30fd2fe18a8d40f929bc8a1cb77b24ea
https://github.com/llvm/llvm-project/commit/edbf9e4c30fd2fe18a8d40f929bc8a1cb77b24ea
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
Log Message:
-----------
[mlir] Remove a redundant cast (NFC) (#168241)
llvm::all_of already returns bool.
Identified with readability-redundant-casting.
Commit: 17408f70d1bfb0d6f8e082842a627dd2c12b081a
https://github.com/llvm/llvm-project/commit/17408f70d1bfb0d6f8e082842a627dd2c12b081a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-15 (Sat, 15 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
A llvm/lib/Target/AArch64/AArch64SMEAttributes.cpp
A llvm/lib/Target/AArch64/AArch64SMEAttributes.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
R llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
R llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/lib/Target/AArch64/Utils/CMakeLists.txt
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
Log Message:
-----------
[AArch64] Move AArch64SMEAttributes out of Utils library to fix layering. NFC (#168236)
The AArch64 MCTargetDesc library links the Utils library. The
AArch64SMEAttributes.cpp/h requires the Core library and includes files
from AArch64's CodeGen library. These are layering violations.
The MCTargetDesc doesn't need anything from AArch64SMEAttributes.cpp/h
so the easiest fix is to move them to the CodeGen library.
We should probably merge the remaining files in Utils into MCTargetDesc.
Commit: 5ed26ade0c585d2a081f23546902f64a0366de19
https://github.com/llvm/llvm-project/commit/5ed26ade0c585d2a081f23546902f64a0366de19
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port 17408f70d1bf
Commit: a1e523bece1278f00a5cc678a8ef4511c6a4bf91
https://github.com/llvm/llvm-project/commit/a1e523bece1278f00a5cc678a8ef4511c6a4bf91
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
Log Message:
-----------
[CIR] ExtVectorElementExpr with pointer to a vector (#168203)
Upstream ExtVectorElementExpr with a pointer to a vector
Commit: 8240552e8886e5abc5bbe957d848ed7dba5e8725
https://github.com/llvm/llvm-project/commit/8240552e8886e5abc5bbe957d848ed7dba5e8725
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/allocator_oom_test.cpp
Log Message:
-----------
[compiler-rt] Update test to export variables instead of using env
To work around a bug in lit's internal test runner around ulimit.
Commands that use env to set environment variables for that command do
not have limits applied to them. This needs to be fixed, but for now we
can work around without degrading the readability of the test too much.
Commit: d68c71e41b7047cdc5838d87ebd5073f7c402298
https://github.com/llvm/llvm-project/commit/d68c71e41b7047cdc5838d87ebd5073f7c402298
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Remove unused GetOutputStream params (#167949)
Commit: bde90624185ea2cead0a8d7231536e2625d78798
https://github.com/llvm/llvm-project/commit/bde90624185ea2cead0a8d7231536e2625d78798
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
Reapply "[compiler-rt] Default to Lit's Internal Shell" (#168232)
This reverts commit 8cc49fb99a4798f67b6b70fabfd584095d022e92.
This was causing failures on two specific buildbots that have since been
fixed.
Commit: c73870dbe89a8219130e21a0b3f13df76d299352
https://github.com/llvm/llvm-project/commit/c73870dbe89a8219130e21a0b3f13df76d299352
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/cert/con36-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/con54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/ctr56-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl16-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl59-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err09-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err34-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err60-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err61-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/exp42-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp37-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/mem57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos44-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos47-c.rst
M clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/security.SetgidSetuidOrder.rst
M clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/security.insecureAPI.decodeValueOfObjCType.rst
M clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/unix.StdCLibraryFunctions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-c-arrays.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-capturing-lambda-coroutines.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-do-while.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-magic-numbers.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-reference-coroutine-parameters.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/c-copy-assignment-signature.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/explicit-virtual-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/macro-to-enum.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/narrowing-conversions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-malloc.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-move-operations.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/non-private-member-variables-in-classes.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/owning-memory.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/prefer-member-initializer.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-avoid-unchecked-container-access.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-const-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-cstyle-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-vararg.rst
M clang-tools-extra/docs/clang-tidy/checks/fuchsia/statically-constructed-objects.rst
M clang-tools-extra/docs/clang-tidy/checks/google/explicit-constructor.rst
M clang-tools-extra/docs/clang-tidy/checks/google/objc-avoid-throwing-exception.rst
M clang-tools-extra/docs/clang-tidy/checks/google/objc-global-variable-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-avoid-underscore-in-googletest-name.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-braces-around-statements.rst
M clang-tools-extra/docs/clang-tidy/checks/google/upgrade-googletest-case.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
Log Message:
-----------
[clang-tidy][docs][NFC] Enforce 80 characters limit (2/N) (#167632)
Fix documentation in `cert`, `clang-analyzer`, `concurrency`,
`cppcoreguidelines`, `darwin`, `fuchsia` and `google`.
This is part of the codebase cleanup described in
[#167098](https://github.com/llvm/llvm-project/issues/167098)
Commit: 74c40293c309dbd142bf1f0ebfbfde6be8d30655
https://github.com/llvm/llvm-project/commit/74c40293c309dbd142bf1f0ebfbfde6be8d30655
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/hicpp/braces-around-statements.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/explicit-conversions.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/function-size.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/invalid-access-moved.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/move-const-arg.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/multiway-paths-covered.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-array-decay.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/linuxkernel/must-check-errs.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/coroutine-hostile-raii.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/header-include-cycle.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/misleading-identifier.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/no-recursion.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/override-with-different-visibility.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/throw-by-value-catch-by-reference.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unused-parameters.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unused-using-decls.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-anonymous-namespace.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-setjmp-longjmp.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-variadic-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/concat-nested-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/loop-convert.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/replace-disallow-copy-and-assign-macro.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/replace-random-shuffle.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/type-traits.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/unary-static-assert.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-auto.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-constraints.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-designated-initializers.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-emplace.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-equals-delete.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-format.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-print.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-trailing-return-type.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-using.rst
Log Message:
-----------
[clang-tidy][docs][NFC] Enforce 80 characters limit (3/N) (#167830)
Fix documentation in `hicpp`, `linuxkernel`, `llvm`, `llvmlibc`, `misc`
and `modernize`.
This is part of the codebase cleanup described in
https://github.com/llvm/llvm-project/issues/167098
Commit: 3d01d6ebfd23d57f4f860a3bf7a462c0c506295b
https://github.com/llvm/llvm-project/commit/3d01d6ebfd23d57f4f860a3bf7a462c0c506295b
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/EHScopeStack.h
A clang/test/CIR/CodeGen/try-catch-tmp.cpp
Log Message:
-----------
[CIR] Upstream non-empty Try block with catch all (#165158)
Upstream support for try block and catch all block with a function call
that may throw an exception.
Issue https://github.com/llvm/llvm-project/issues/154992
Commit: 56733058ed01eaccdf6fc520c38824d0d1eb6733
https://github.com/llvm/llvm-project/commit/56733058ed01eaccdf6fc520c38824d0d1eb6733
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang/test/CodeGen/builtins.c
Log Message:
-----------
[NFC][clang] Correct bswapg test to work when int128 is not available (#168261)
This updates the test to avoid inclusion of int128 bswapg tests on
targets that don't support int128 at all.
This fixes failures introduced by #162433
Commit: be9e287b041ee7db2cde6c46ea7a6c7eb55a8743
https://github.com/llvm/llvm-project/commit/be9e287b041ee7db2cde6c46ea7a6c7eb55a8743
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/pr166870.ll
Log Message:
-----------
[AArch64][test] Improve pr166870.ll test case (#168194)
As pointed out in post-commit discussion on #167336
<https://github.com/llvm/llvm-project/pull/167336#issuecomment-3523794206>,
although the test case succeeds in showing a codegen difference now the
faulty MachineCopyPropagation logic was removed, the example was reduced
so much that it actually would have been legal to remove the seemingly
redundant mov.
This is a re-reduction of that test case which should now demonstrate a
mov that can't safely be removed (mov w9, w9) because the upper bits no
longer being zeroed may alter the program logic.
Commit: a464e3856e36cc8d887aafdf382876c8675c03e8
https://github.com/llvm/llvm-project/commit/a464e3856e36cc8d887aafdf382876c8675c03e8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[LV] Check debug location for more recipes in vplan-printing.ll.
Extend test to check printing of debug locations to cover a range of
wide and replicating recipes. Currently those do not print the debug
metadata.
Commit: c61a4406db904bd33ca01db8eda67d52560265a3
https://github.com/llvm/llvm-project/commit/c61a4406db904bd33ca01db8eda67d52560265a3
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
Log Message:
-----------
[libc++][test] re-enable the inference test for clang (#168258)
Fixes #168210
Commit: f12ad95991144c35e95d331afc29b9b065d4e0b8
https://github.com/llvm/llvm-project/commit/f12ad95991144c35e95d331afc29b9b065d4e0b8
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M polly/docs/ReleaseNotes.rst
M polly/include/polly/CodeGen/CodeGeneration.h
M polly/include/polly/CodeGen/IslAst.h
M polly/include/polly/CodePreparation.h
M polly/include/polly/DeLICM.h
M polly/include/polly/DeadCodeElimination.h
M polly/include/polly/DependenceInfo.h
M polly/include/polly/ForwardOpTree.h
M polly/include/polly/JSONExporter.h
M polly/include/polly/MaximalStaticExpansion.h
M polly/include/polly/Pass/PhaseManager.h
M polly/include/polly/PruneUnprofitable.h
M polly/include/polly/ScheduleOptimizer.h
M polly/include/polly/ScopGraphPrinter.h
M polly/include/polly/ScopInfo.h
R polly/include/polly/ScopPass.h
M polly/include/polly/Simplify.h
M polly/lib/Analysis/DependenceInfo.cpp
M polly/lib/Analysis/PruneUnprofitable.cpp
M polly/lib/Analysis/ScopDetection.cpp
M polly/lib/Analysis/ScopInfo.cpp
R polly/lib/Analysis/ScopPass.cpp
M polly/lib/CMakeLists.txt
M polly/lib/CodeGen/CodeGeneration.cpp
M polly/lib/CodeGen/IslAst.cpp
M polly/lib/Exchange/JSONExporter.cpp
M polly/lib/Pass/PhaseManager.cpp
M polly/lib/Support/PollyPasses.def
M polly/lib/Support/RegisterPasses.cpp
M polly/lib/Transform/CodePreparation.cpp
M polly/lib/Transform/DeLICM.cpp
M polly/lib/Transform/DeadCodeElimination.cpp
M polly/lib/Transform/FlattenSchedule.cpp
M polly/lib/Transform/ForwardOpTree.cpp
M polly/lib/Transform/MatmulOptimizer.cpp
M polly/lib/Transform/MaximalStaticExpansion.cpp
M polly/lib/Transform/ScheduleOptimizer.cpp
M polly/lib/Transform/ScopInliner.cpp
M polly/lib/Transform/Simplify.cpp
M polly/test/CodeGen/invariant_load_base_pointer_conditional.ll
M polly/unittests/CMakeLists.txt
R polly/unittests/ScopPassManager/CMakeLists.txt
R polly/unittests/ScopPassManager/PassManagerTest.cpp
Log Message:
-----------
[Polly] Remove ScopPass infrastructure (#125783)
PR #125442 replaces the pass-based Polly architecture with a monolithic
pass consisting of phases. Reasons listed in
https://github.com/llvm/llvm-project/pull/125442.
With this change, the SCoP-passes became redundant problematic versions
of the same functionality and are removed.
Commit: b8059e757fb95b1d3cd9b657e540bf2cd47dad82
https://github.com/llvm/llvm-project/commit/b8059e757fb95b1d3cd9b657e540bf2cd47dad82
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/combine-mul.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-mul.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
Log Message:
-----------
[X86] Avoid extra (PMADDUBSW(X,AND(Y)) in <X x i8> multiplication (#168262)
On SSSE3 targets we use PMADDUBSW of odd/even with suitable masking to
avoid having to extend/truncate with `<X x i16>` types and avoid
additional Port0/5 pressure.
However, lower i8 elements in the pair can safely use PMULLW directly
without any pre-masking as we will only use the lower i8 bits of the
result which is only affected by the lower i8 of the inputs.
Commit: e413343ca7ee65ecf04fc455abb55604c7191e34
https://github.com/llvm/llvm-project/commit/e413343ca7ee65ecf04fc455abb55604c7191e34
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SDNodeInfo.h
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kSelectionDAGInfo.cpp
M llvm/lib/Target/M68k/M68kSelectionDAGInfo.h
M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
M llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
M llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
A llvm/test/TableGen/SDNodeInfoEmitter/hw-mode.td
M llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
M llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
M llvm/test/TableGen/SDNodeInfoEmitter/skipped-nodes.td
M llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
M llvm/utils/TableGen/Basic/SequenceToOffsetTable.h
M llvm/utils/TableGen/Common/InfoByHwMode.h
M llvm/utils/TableGen/SDNodeInfoEmitter.cpp
Log Message:
-----------
[SelectionDAG] Verify SDTCisVT and SDTCVecEltisVT constraints (#150125)
Teach `SDNodeInfoEmitter` TableGen backend to process `SDTypeConstraint`
records and emit tables for them. The tables are used by
`SDNodeInfo::verifyNode()` to validate a node being created.
This PR only adds validation code for `SDTCisVT` and `SDTCVecEltisVT`
constraints to keep it smaller.
Pull Request: https://github.com/llvm/llvm-project/pull/150125
Commit: e5b9e80a54bb75d4b0fee7197d78f909b1f4ba93
https://github.com/llvm/llvm-project/commit/e5b9e80a54bb75d4b0fee7197d78f909b1f4ba93
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang/test/Driver/linker-wrapper-hip-no-rdc.c
Log Message:
-----------
[ClangLinkerWrapper] Fix test linker-wrapper-hip-no-rdc.c
https://github.com/llvm/llvm-project/pull/167918 broke buildbots:
https://lab.llvm.org/buildbot/#/builders/64/builds/6531
https://lab.llvm.org/buildbot/#/builders/108/builds/19881
with error:
# | clang: error: unable to execute command: posix_spawn failed: No such file or directory
# | clang: error: ld.lld command failed with exit code 1 (use -v to see invocation)
This is due to the test requiring lld but these buildbots do not build them.
Fix the lit test by adding REQUIRES: lld
Commit: 47da0f1e91d06deae5d60229485f42242891a7f4
https://github.com/llvm/llvm-project/commit/47da0f1e91d06deae5d60229485f42242891a7f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang/test/CodeGen/X86/avx512bf16-builtins.c
M clang/test/CodeGen/X86/avx512vlbf16-builtins.c
Log Message:
-----------
[X86] Add experimental-new-constant-interpreter test coverage to BF16 intrinsics tests (#168274)
Commit: e8cc0c3eb82789c9d2a22e094a941be180e9ab4b
https://github.com/llvm/llvm-project/commit/e8cc0c3eb82789c9d2a22e094a941be180e9ab4b
Author: Anton Kesy <antonkesy at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang/docs/ClangFormat.rst
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
[clang-format]: Fix JSON casing (#168156)
This commit aligns the user clang-format output to always show JSON, not Json.
Commit: 2394eb118045bd47c1c75f9cab42d701221846a0
https://github.com/llvm/llvm-project/commit/2394eb118045bd47c1c75f9cab42d701221846a0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/TargetParser/PPCTargetParser.cpp
Log Message:
-----------
[TargetParser] Avoid repeated hash lookups (NFC) (#168216)
Commit: 688b190745655c30a39a25f2e274fd62f0e9cce4
https://github.com/llvm/llvm-project/commit/688b190745655c30a39a25f2e274fd62f0e9cce4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Simplify DenseMap::grow (NFC) (#168238)
This patch simplifies DenseMap::grow by reimplementing it in terms of
DenseMapBase::moveFrom.
Since moveFrom iterates over the bucket range, we don't need:
if (!OldBuckets)
The old bucket array is released by the destructor on Tmp.
This patch removes moveFromOldBuckets as it's no longer used with this
patch. moveFromImpl is "inlined" into moveFrom.
Commit: 7262c592c124a5bd8a5b534af5ed0390511116d9
https://github.com/llvm/llvm-project/commit/7262c592c124a5bd8a5b534af5ed0390511116d9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/CAS/OnDiskGraphDB.cpp
Log Message:
-----------
[CAS] Remove a redundant cast (NFC) (#168240)
D.Offset.get() already returns uint64_t.
Identified with readability-redundant-casting.
Commit: ea0ecd63d4aa6ebe0fd11fe48bb707ba024d5a49
https://github.com/llvm/llvm-project/commit/ea0ecd63d4aa6ebe0fd11fe48bb707ba024d5a49
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodeGenerator.rst
M llvm/docs/CommandLine.rst
M llvm/docs/LangRef.rst
M llvm/docs/SPIRVUsage.rst
M llvm/docs/XRayFDRFormat.rst
Log Message:
-----------
[llvm] Proofread *.rst (#168254)
This patch is limited to hyphenation to ease the review process.
Commit: e1e696d2eb0f4467133275ff6a2661f389dd3dbe
https://github.com/llvm/llvm-project/commit/e1e696d2eb0f4467133275ff6a2661f389dd3dbe
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#168217)
Commit: 180b59c37ab2082a2e68a2b75283e7fa4527552a
https://github.com/llvm/llvm-project/commit/180b59c37ab2082a2e68a2b75283e7fa4527552a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang/docs/AutomaticReferenceCounting.rst
M clang/docs/Block-ABI-Apple.rst
M clang/docs/BoundsSafety.rst
M clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/CXXTypeAwareAllocators.rst
M clang/docs/ClangTools.rst
M clang/docs/ClangTransformerTutorial.rst
M clang/docs/DataFlowSanitizerDesign.rst
M clang/docs/InternalsManual.rst
M clang/docs/JSONCompilationDatabase.rst
M clang/docs/LibASTImporter.rst
M clang/docs/MisExpect.rst
M clang/docs/PCHInternals.rst
M clang/docs/PointerAuthentication.rst
M clang/docs/RAVFrontendAction.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/SafeStack.rst
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang] Proofread *.rst (#168215)
This patch is limited to single-word replacements to fix spelling
and/or grammar to ease the review process. Punctuation and markdown
fixes are specifically excluded.
Commit: 8a055f8067f4c3a121acaa25d4f20918e1dc0b81
https://github.com/llvm/llvm-project/commit/8a055f8067f4c3a121acaa25d4f20918e1dc0b81
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/umin-sub-to-usubo-select-combine.ll
A llvm/test/CodeGen/X86/umin-sub-to-usubo-select-combine.ll
Log Message:
-----------
[DAG] Add baseline test coverage for #161036 (#168278)
Baseline tests from #161651 that were reverted in #167854
Still missing test coverage for the ffmpeg regression failures
Commit: 6f3f1088df0d48c3f56f6eaec695868f9e239318
https://github.com/llvm/llvm-project/commit/6f3f1088df0d48c3f56f6eaec695868f9e239318
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-mul.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
Log Message:
-----------
[X86] LowerMUL - remove vXi8 UNPCK(BUILD_VECTOR,UNDEF) special case handling (#168277)
getUnpackl/h + shuffle combining can now handle this for us generically
Commit: 97a60aa37a048155fec0c560fc51ed52dbd84e44
https://github.com/llvm/llvm-project/commit/97a60aa37a048155fec0c560fc51ed52dbd84e44
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervalUnion.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/CodeGen/LiveRegUnits.h
M llvm/include/llvm/CodeGen/MachineTraceMetrics.h
M llvm/include/llvm/CodeGen/RDFRegisters.h
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/RegisterClassInfo.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/MC/MCRegister.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/InterferenceCache.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/LiveRegUnits.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RDFRegisters.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/X86/X86FixupBWInsts.cpp
Log Message:
-----------
[CodeGen] Turn MCRegUnit into an enum class (NFC) (#167943)
This changes `MCRegUnit` type from `unsigned` to `enum class : unsigned`
and inserts necessary casts.
The added `MCRegUnitToIndex` functor is used with `SparseSet`,
`SparseMultiSet` and `IndexedMap` in a few places.
`MCRegUnit` is opaque to users, so it didn't seem worth making it a
full-fledged class like `Register`.
Static type checking has detected one issue in
`PrologueEpilogueInserter.cpp`, where `BitVector` created for
`MCRegister` is indexed by both `MCRegister` and `MCRegUnit`.
The number of casts could be reduced by using `IndexedMap` in more
places and/or adding a `BitVector` adaptor, but the number of casts *per
file* is still small and `IndexedMap` has limitations, so it didn't seem
worth the effort.
Pull Request: https://github.com/llvm/llvm-project/pull/167943
Commit: 789ef89860e991f536b7ab896bf0562029804f58
https://github.com/llvm/llvm-project/commit/789ef89860e991f536b7ab896bf0562029804f58
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
Log Message:
-----------
[libcxx] Install ninja in CI container from system repo (#168225)
To fix the TODO now that the ninja version available in the Ubuntu
repositories (1.11) is new enough.
Commit: 13b6d9a094cd1107019407615b99117f9976adc0
https://github.com/llvm/llvm-project/commit/13b6d9a094cd1107019407615b99117f9976adc0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
AArch64: Use isUndef instead of checking opcode is UNDEF (#168219)
This is to avoid regressions by poison introduction
Commit: dd9bd3e8f0186b231c24a89af3d1b61202c68d91
https://github.com/llvm/llvm-project/commit/dd9bd3e8f0186b231c24a89af3d1b61202c68d91
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
DAG: Preserve poison in combineConcatVectorOfScalars (#168220)
Commit: 8b55d774631b8df99cdbe42e1b6fc4ce75147eb6
https://github.com/llvm/llvm-project/commit/8b55d774631b8df99cdbe42e1b6fc4ce75147eb6
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
R clang-tools-extra/clang-tidy/cert/LimitedRandomnessCheck.cpp
R clang-tools-extra/clang-tidy/cert/LimitedRandomnessCheck.h
M clang-tools-extra/clang-tidy/misc/CMakeLists.txt
M clang-tools-extra/clang-tidy/misc/MiscTidyModule.cpp
A clang-tools-extra/clang-tidy/misc/PredictableRandCheck.cpp
A clang-tools-extra/clang-tidy/misc/PredictableRandCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/misc/predictable-rand.rst
R clang-tools-extra/test/clang-tidy/checkers/cert/limited-randomness.c
R clang-tools-extra/test/clang-tidy/checkers/cert/limited-randomness.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/predictable-rand.c
A clang-tools-extra/test/clang-tidy/checkers/misc/predictable-rand.cpp
Log Message:
-----------
[clang-tidy] Rename `cert-msc30-c` and `cert-msc50-cpp` to `misc-predictable-rand` (#167689)
Closes #157292
Commit: 7761a89e1230d8ccbb8e6ee15dc14ea74792a53c
https://github.com/llvm/llvm-project/commit/7761a89e1230d8ccbb8e6ee15dc14ea74792a53c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/misc/BUILD.gn
Log Message:
-----------
[gn build] Port 8b55d774631b
Commit: 306b5a3d64b4abbfb07bcfb77fadb506da897f16
https://github.com/llvm/llvm-project/commit/306b5a3d64b4abbfb07bcfb77fadb506da897f16
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
Log Message:
-----------
[SLP]Do not consider split nodes, when checking parent PHI-based nodes
The compiler should not consider split vectorize nodes, when checking
for non-schedulable PHI-based parent nodes. Only pure PHI nodes must be
considered, they only can be considered as explicit users, split nodes
are not.
Fixes #168268
Commit: 977d6cfe3ec2027d12415f32d34d53ec0db95218
https://github.com/llvm/llvm-project/commit/977d6cfe3ec2027d12415f32d34d53ec0db95218
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
Log Message:
-----------
[Scalar] Remove a redaundant cast (NFC) (#168284)
ThisPartition is already of type int.
Identified with readability-redundant-casting.
Commit: 98d49d51c00255b7c9f36403f774d52ae84cbe58
https://github.com/llvm/llvm-project/commit/98d49d51c00255b7c9f36403f774d52ae84cbe58
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/TargetPassConfig.cpp
Log Message:
-----------
[CodeGen] Remove a redundant declaration (NFC) (#168285)
EnableFSDiscriminator is declared in DebugInfoMetadata.h.
Identified with readability-redundant-declaration.
Commit: 67c8e38b8b439b44c2cd35f590c4897b928eb682
https://github.com/llvm/llvm-project/commit/67c8e38b8b439b44c2cd35f590c4897b928eb682
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Delegate to other VPInstruction constructors. (NFCI)
Update VPInstruction constructor to delegate to constructor with more
comprehensive checking and validation.
This required updating some unit tests, to make sure the constructed
VPInstructions are valid.
Commit: 1a7cb1e0c7d0d1621ed264383f4b5807462971be
https://github.com/llvm/llvm-project/commit/1a7cb1e0c7d0d1621ed264383f4b5807462971be
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Move initWithExactBucketCount to DenseMapBase (NFC) (#168283)
This patch moves initWithExactBucketCount and ExactBucketCount to
DenseMapBase to share more code.
Since SmallDenseMap::allocateBuckets always returns true,
initWithExactBucketCount is equivalent to:
void initWithExactBucketCount(unsigned NewNumBuckets) {
allocateBuckets(NewNumBuckets);
initEmpty();
}
for SmallDenseMap.
Note that ExactBucketCount is not used within DenseMapBase yet.
This moves us closer to the storage policy idea outlined in #168255.
Commit: 6d5f87fc4284c4c22512778afaf7f2ba9326ba7b
https://github.com/llvm/llvm-project/commit/6d5f87fc4284c4c22512778afaf7f2ba9326ba7b
Author: ronlieb <ron.lieberman at amd.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/select-load-to-load-select-ptr-combine.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bug22246.ll
M llvm/test/CodeGen/NVPTX/fast-math.ll
M llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
Log Message:
-----------
Revert "DAG: Allow select ptr combine for non-0 address spaces" (#168292)
Reverts llvm/llvm-project#167909
Commit: 900c517919794ff0ea83c6b15ffe03707a164800
https://github.com/llvm/llvm-project/commit/900c517919794ff0ea83c6b15ffe03707a164800
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
Log Message:
-----------
[AMDGPU] TableGen-erate SDNode descriptions (#168248)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
Autogenerated node names start with "AMDGPUISD::", hence the changes in
the tests.
The few nodes defined in R600.td are *not* imported because TableGen
processes AMDGPU.td that doesn't include R600.td. Ideally, we would have
two sets of nodes, but that would require careful reorganization of td
files since some nodes are shared between AMDGPU/R600. Not sure if it
something worth looking into.
Some nodes fail validation, those are listed in
`AMDGPUSelectionDAGInfo::verifyTargetNode()`.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168248
Commit: cce852ff03be5da56a9dc3d102a142812b2008d1
https://github.com/llvm/llvm-project/commit/cce852ff03be5da56a9dc3d102a142812b2008d1
Author: Owen Anderson <resistor at mac.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/include/llvm/Object/ELF.h
M llvm/lib/Object/ELF.cpp
M llvm/unittests/Object/ELFTest.cpp
Log Message:
-----------
[Object] Add getRISCVVendorRelocationTypeName to render RISCV vendor-specific relocations to strings. (#168293)
This will be used in places like LLD to render them for error messages.
Commit: 11278cf63c8f7e635d52c675a695c8974cb197d2
https://github.com/llvm/llvm-project/commit/11278cf63c8f7e635d52c675a695c8974cb197d2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/MC/MCELFStreamer.cpp
Log Message:
-----------
[MC] Remove a redundant cast (NFC) (#168298)
Symbol is already of type MCSymbolELF *.
Identified with readability-redundant-casting.
Commit: 99630eb1bf752d93f31aae8f90bd3772a0566ad5
https://github.com/llvm/llvm-project/commit/99630eb1bf752d93f31aae8f90bd3772a0566ad5
Author: Wenju He <wenju.he at intel.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/test/CodeGenSYCL/address-space-conversions.cpp
Log Message:
-----------
[NFC][Clang][Test] Drop calling convention check from address-space-conversions.cpp (#167261)
Calling convention is irrelevant to address space verification and adds
complixity for other target triples.
Commit: 6152a8b31003d38eefb5dd9023a6c7e4e4e09ac4
https://github.com/llvm/llvm-project/commit/6152a8b31003d38eefb5dd9023a6c7e4e4e09ac4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Log Message:
-----------
[AArch64] Use llvm::any_of (NFC) (#168294)
Identified with llvm-use-ranges.
Commit: 4206558f715b7a67daa9c39528d04106f88612b4
https://github.com/llvm/llvm-project/commit/4206558f715b7a67daa9c39528d04106f88612b4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Add roundUpNumBuckets to DenseMap (NFC) (#168301)
This patch adds computeNumBuckets, a helper function to compute the
number of buckets.
This is part of the effort outlined in #168255. This makes it easier
to move the core logic of grow() to DenseMapBase::grow().
Commit: d5cdfd40d424c07e275308bc32cd3045f0195705
https://github.com/llvm/llvm-project/commit/d5cdfd40d424c07e275308bc32cd3045f0195705
Author: Mend Renovate <bot at renovateapp.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-lit.yml
M .github/workflows/scorecard.yml
Log Message:
-----------
Update [Github] Update GHA Dependencies (#168299)
This PR contains the following updates:
| Package | Type | Update | Change |
|---|---|---|---|
| [aminya/setup-cpp](https://redirect.github.com/aminya/setup-cpp) |
action | patch | `v1.7.1` -> `v1.7.2` |
| ghcr.io/llvm/ci-ubuntu-24.04-abi-tests | container | digest |
`01e66b0` -> `f80125c` |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | patch | `v4.31.2` -> `v4.31.3` |
| llvm/actions | action | digest | `42d8057` -> `5dd9550` |
Commit: 49d5bb0ad0cb31410184c462801c5049ad671517
https://github.com/llvm/llvm-project/commit/49d5bb0ad0cb31410184c462801c5049ad671517
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
A llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
A llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
Log Message:
-----------
[AMDGPU] Add amdgpu-lower-exec-sync pass to lower named-barrier globals (#165692)
This PR introduces `amdgpu-lower-exec-sync` pass which specifically
lowers named-barrier LDS globals introduced by #114550 .
Changes include:
- Moving the logic of lowering named-barrier LDS globals from
`amdgpu-lower-module-lds` pass to this new pass.
- This PR adds the pass to pipeline, remove the existing lowering logic for
named-barrier LDS in `amdgpu-lower-module-lds`
See #161827 for discussion on this topic.
Commit: b7a673c882fbebc6e0fac0ad3be56d39e3902daf
https://github.com/llvm/llvm-project/commit/b7a673c882fbebc6e0fac0ad3be56d39e3902daf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-16 (Sun, 16 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Delegate among DenseMap constructors (NFC) (#168309)
This patch teaches DenseMap constructors to delegate to other DenseMap
constructors where we can.
The intent is for these constructors to build on top of a higher-level
concept like the default-constructed instance instead of calling init
on our own.
This is part of the effort outlined in #168255.
Commit: 5e4cdd6d57ade1e47ff023f7648e7bed44ebd893
https://github.com/llvm/llvm-project/commit/5e4cdd6d57ade1e47ff023f7648e7bed44ebd893
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-fp-vp-bf16.ll
Log Message:
-----------
[VP][RISCV] Enable promotion on fixed-length vp intrinsics with zvfbfmin (#167541)
Following #112393, this aims to promote vp intrinsics for zvfbfmin
without zvfbfa
Commit: 0602678652b773fce9a2b84da7d8b77c13f72a3f
https://github.com/llvm/llvm-project/commit/0602678652b773fce9a2b84da7d8b77c13f72a3f
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
A clang/test/CodeGen/builtin-os_log.c
M clang/test/CodeGen/builtins.c
Log Message:
-----------
[clang][NFC] Make CodeGen/builtins.c cover more architectures (#168319)
The change made in #162433 exposed a weakness in this test that showed
different results on different archs that were not caught on the CI
bots. This expands the tests to cover more archs, and out of necessity
moves the os_log test into a separate test file.
Commit: 0555f427487fc1238fc98025ce9f0a0e6077329d
https://github.com/llvm/llvm-project/commit/0555f427487fc1238fc98025ce9f0a0e6077329d
Author: Abhishek Varma <avarma094 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/test/Dialect/Linalg/convolution/roundtrip-convolution.mlir
Log Message:
-----------
[Linalg] Add *Conv1D* matchers (#168050)
-- This commit is the second in the series of adding matchers
for linalg.*conv*/*pool*. Refer:
https://github.com/llvm/llvm-project/pull/163724
-- In this commit all variants of Conv1D convolution ops have been
added.
-- For sake of completion for a specific infra required for those
ops which don't require dilations/strides information during their
creation, this commit also includes a basic Conv2D and Conv3D op as
part of the lit test.
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
Commit: 90e1391d18ae68c40d78e023ab8d0be6de67d5f3
https://github.com/llvm/llvm-project/commit/90e1391d18ae68c40d78e023ab8d0be6de67d5f3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Check pointers in GetPtrField{,Pop} (#167335)
The pointer needs to point to a record.
Fixes https://github.com/llvm/llvm-project/issues/166371
Commit: 51c81805153bcf56eda22d984d7234bf314de9e7
https://github.com/llvm/llvm-project/commit/51c81805153bcf56eda22d984d7234bf314de9e7
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/test/CodeGen/AArch64/global-merge.ll
M llvm/test/CodeGen/ARM/global-merge-1.ll
Log Message:
-----------
[GlobalMerge]Prefer use global-merge-max-offset instead of the target-specific constant offset. (#165591)
In the Dhrystone benchmark, I find some adjacent global not be merged,
on the contrary the GCC's anchor optimize is work. Use
global-merge-max-offset to set the max offset can yield similar results
(still slightly different, at least we can control the offset).
Commit: e80339092d2e94cd0869c27a0ef9f0eae9aa9c2f
https://github.com/llvm/llvm-project/commit/e80339092d2e94cd0869c27a0ef9f0eae9aa9c2f
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M libclc/www/index.html
Log Message:
-----------
[libclc] Fix link to source in index.html (#167494)
Commit: 998dd1b233d703060d5e1810681df2c89b2d7af2
https://github.com/llvm/llvm-project/commit/998dd1b233d703060d5e1810681df2c89b2d7af2
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth_noalloc_sections.yaml
R llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth_noolloc_sections.yaml
Log Message:
-----------
[JITLink][MachO][AArch64] Specify endianness, fix name of testcase. (#168323)
The "MachO_ptrauth_noolloc_sections.yaml" testcase had a typo in the
name, and didn't explicitly specify its endianness. This was causing it
to fail when enabled on big endian platforms.
See conversation in https://github.com/llvm/llvm-project/pull/167902
Commit: f00bf4f850616d901602c343d3975aa981721acc
https://github.com/llvm/llvm-project/commit/f00bf4f850616d901602c343d3975aa981721acc
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Add missing headers to Session.h (#168330)
Commit: daa30ae263d0be81268e65cbdcff747df14704ab
https://github.com/llvm/llvm-project/commit/daa30ae263d0be81268e65cbdcff747df14704ab
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Improve code in RemoveMask_match (NFC) (#168065)
Commit: 54fdf67bdbf3bca188308c504dcacec097aa5425
https://github.com/llvm/llvm-project/commit/54fdf67bdbf3bca188308c504dcacec097aa5425
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Mark getPredicatedMask static (NFC) (#168067)
Commit: 95aa70cf209ab317d908e38630c92bf62d149247
https://github.com/llvm/llvm-project/commit/95aa70cf209ab317d908e38630c92bf62d149247
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
A mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy_invalid.mlir
Log Message:
-----------
[MLIR][NVVM] Add support for shared::cta destination (#168056)
This patch adds support for shared::cta as destination space in
the TMA non-tensor copy Op (from global to shared::cta).
* Appropriate verifier checks are added.
* Unit tests are added to verify the lowering.
The related intrinsic changes were merged through PR #167508.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 4268e677daaa6499083d142098b8d70c289549b0
https://github.com/llvm/llvm-project/commit/4268e677daaa6499083d142098b8d70c289549b0
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/DebugObjectManagerPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupport.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC] Update ELF debugger support plugin to use AllocActions (#167866)
The `DebugObjectManagerPlugin` implements debugger support for ELF
platforms with the GDB JIT Interface. It emits a separate debug object
allocation in addition to the LinkGraph's own allocation. This used to
happen in the plugin's `notifyEmitted()` callback, i.e. after the
LinkGraph's allocation was finalized. In the meantime, it had to block
finalization of the corresponding materialization unit to make sure that
the debugger can register the object before the code runs.
This patch switches the plugin to use an allocation action instead. We
can remove the `notifyEmitted()` hook and implement all steps as JITLink
passes.
Commit: 42a1184e4298b382324248c394ecef361066ffc3
https://github.com/llvm/llvm-project/commit/42a1184e4298b382324248c394ecef361066ffc3
Author: Vladi Krapp <vladi.krapp at arm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/LoopUnroll/AArch64/force-unroll-threshold.ll
Log Message:
-----------
[AArch64] Allow forcing unrolling of small loops (#167488)
- Introduce the -aarch64-force-unroll-threshold option; when a loop’s
cost is below this value we set UP.Force = true (default 0 keeps current
behaviour)
- Add an AArch64 loop-unroll regression test that runs once at the
default threshold and once with the flag raised, confirming forced
unrolling
Commit: 26e42c7e5321a233cfe75d18435090045241f1ec
https://github.com/llvm/llvm-project/commit/26e42c7e5321a233cfe75d18435090045241f1ec
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll
Log Message:
-----------
[CostModel][AArch64] Remove promotion cost for SVE bfloat arith supported with +sve-b16b16 (#167717)
The resulting costs are the same as the standard SVE costs for `half`
types.
Commit: b07bfdb6fbfba261a46c9bc1a2edc62c4cf21bd4
https://github.com/llvm/llvm-project/commit/b07bfdb6fbfba261a46c9bc1a2edc62c4cf21bd4
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[AMDGPU][SIMemoryLegalizer] Combine all GFX6-9 CacheControl Classes (#168052)
Merge the following classes into `SIGfx6CacheControl`:
- SIGfx7CacheControl
- SIGfx90ACacheControl
- SIGfx940CacheControl
They were all very similar and had a lot of duplicated boilerplate just
to implement one or two codegen differences. GFX90A/GFX940 have a bit
more differences, but they're still manageable under one class because
the general behavior is the same.
This removes 500 lines of code and puts everything into a single place
which I think makes it a lot easier to maintain, at the cost of a slight
increase in complexity for some functions.
There is still a lot of room for improvement but I think this patch is
already big enough as is and I don't want to bundle too much into one
review.
Commit: 853ed3b3b7d891d4fc6b140ded9326381047cb7c
https://github.com/llvm/llvm-project/commit/853ed3b3b7d891d4fc6b140ded9326381047cb7c
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
Log Message:
-----------
[InlineAsmLowering] unsigned -> TypeSize for getTypeStoreSize result
Commit: 15958f2f9bc9af05316352ea07470bbf6fa3d49d
https://github.com/llvm/llvm-project/commit/15958f2f9bc9af05316352ea07470bbf6fa3d49d
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
Log Message:
-----------
[clang][Stdlib] Add special mapping for std::compare_three_way
Commit: c94641833023ea1ed62b9a1c2b34c583719375cb
https://github.com/llvm/llvm-project/commit/c94641833023ea1ed62b9a1c2b34c583719375cb
Author: Abinaya Saravanan <quic_asaravan at quicinc.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
A llvm/test/CodeGen/Hexagon/swp-phi-cycle.ll
Log Message:
-----------
[MachinePipeliner] Detect a cycle in PHI dependencies early on (#167095)
- This patch detects cycles by phis and bails out if one is found.
- It prevents to violate DAG restrictions.
Abort pipelining in the below case
%1 = phi i32 [ %a, %entry ], [ %3, %loop ]
%2 = phi i32 [ %a, %entry ], [ %1, %loop ]
%3 = phi i32 [ %b, %entry ], [ %2, %loop ]
---------
Co-authored-by: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Commit: 44f72fb39c833a8d53f433c6a03e88c81534c83e
https://github.com/llvm/llvm-project/commit/44f72fb39c833a8d53f433c6a03e88c81534c83e
Author: Ahmed Nour <ahmednour.mohamed2012 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
Log Message:
-----------
[X86][Clang] Add AVX512 kunpck intrinsics to be used in constexp (#167683)
Resolves #166976
Commit: 0dead9e1cbaf6f15af2205496700cf8bbba63f02
https://github.com/llvm/llvm-project/commit/0dead9e1cbaf6f15af2205496700cf8bbba63f02
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/dwp-str-offsets-dwarf64.test
Log Message:
-----------
[lldb][test] Try to fix dwarf64 test on Windows
Think it's just a path slash difference.
Fixes #167997.
Commit: e992280f9d5ba91d772c26446e1107c7a1793f78
https://github.com/llvm/llvm-project/commit/e992280f9d5ba91d772c26446e1107c7a1793f78
Author: Vadim Curcă <80581374+VadimCurca at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[MLIR] Fix empty optional access in DialectConversion (#168331)
When both `MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS` and MLIR
multithreading are enabled, `topLevelFingerPrint` is empty but its value
is accessed. This adds a `has_value()` check before dereferencing the
optional.
Commit: bdae26f3b47b1022402d578c2a748c1c5744f308
https://github.com/llvm/llvm-project/commit/bdae26f3b47b1022402d578c2a748c1c5744f308
Author: Kiva <imkiva at islovely.icu>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
A lldb/test/API/lang/rust/enum-variant-same-name/RustEnumValue.py
A lldb/test/API/lang/rust/enum-variant-same-name/TestRustEnumVariantSameName.py
A lldb/test/API/lang/rust/enum-variant-same-name/main.rs
A lldb/test/API/lang/rust/enum-variant-same-name/main.yaml
Log Message:
-----------
[LLDB][DWARF] Use the same qualified name computation for Rust (#165840)
Currently LLDB's `ParseRustVariantPart` generates the following
`CXXRecordDecl` for a Rust enum
```rust
enum AA {
A(u8)
}
```
```
CXXRecordDecl 0x5555568d5970 <<invalid sloc>> <invalid sloc> struct AA
|-CXXRecordDecl 0x5555568d5ab0 <<invalid sloc>> <invalid sloc> union test_issue::AA$Inner definition
| |-CXXRecordDecl 0x5555568d5d18 <<invalid sloc>> <invalid sloc> struct A$Variant definition
| | |-DefinitionData pass_in_registers aggregate standard_layout trivially_copyable trivial
| | | `-Destructor simple irrelevant trivial needs_implicit
| | `-FieldDecl 0x555555a77880 <<invalid sloc>> <invalid sloc> value 'test_issue::AA::A'
| `-FieldDecl 0x555555a778f0 <<invalid sloc>> <invalid sloc> $variant$ 'test_issue::AA::test_issue::AA$Inner::A$Variant'
|-CXXRecordDecl 0x5555568d5c48 <<invalid sloc>> <invalid sloc> struct A definition
| `-FieldDecl 0x555555a777e0 <<invalid sloc>> <invalid sloc> __0 'unsigned char'
`-FieldDecl 0x555555a77960 <<invalid sloc>> <invalid sloc> $variants$ 'test_issue::AA::test_issue::AA$Inner'
```
While when the Rust enum type name is the same as its variant name, the
generated `CXXRecordDecl` becomes the following – there's a circular
reference between `struct A$Variant` and `struct A`, causing #163048.
```rust
enum A {
A(u8)
}
```
```
CXXRecordDecl 0x5555568d5760 <<invalid sloc>> <invalid sloc> struct A
|-CXXRecordDecl 0x5555568d58a0 <<invalid sloc>> <invalid sloc> union test_issue::A$Inner definition
| |-CXXRecordDecl 0x5555568d5a38 <<invalid sloc>> <invalid sloc> struct A$Variant definition
| | `-FieldDecl 0x5555568d5b70 <<invalid sloc>> <invalid sloc> value 'test_issue::A' <---- bug here
| `-FieldDecl 0x5555568d5be0 <<invalid sloc>> <invalid sloc> $variant$ 'test_issue::A::test_issue::A$Inner::A$Variant'
`-FieldDecl 0x5555568d5c50 <<invalid sloc>> <invalid sloc> $variants$ 'test_issue::A::test_issue::A$Inner'
```
The problem was caused by `GetUniqueTypeNameAndDeclaration` not
returning the correct qualified name for DWARF DIE `test_issue::A::A`,
instead, it returned `A`. This caused `ParseStructureLikeDIE` to find
the wrong type `test_issue::A` and returned early.
The failure in `GetUniqueTypeNameAndDeclaration` appears to stem from a
language check that returns early unless the language is C++. I changed
it so Rust follows the C++ path rather than returning. I’m not entirely
sure this is the right approach — Rust’s qualified name rules look
similar, but not identical? Alternatively, we could add a Rust-specific
implementation that forms qualified names according to Rust's rules.
Commit: 63e6373efd82b0ccd53955a10ced9fa9b6a8db77
https://github.com/llvm/llvm-project/commit/63e6373efd82b0ccd53955a10ced9fa9b6a8db77
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
Log Message:
-----------
[WebAssembly] Truncate extra bits of large elements in BUILD_VECTOR (#167223)
Fixes https://github.com/llvm/llvm-project/issues/165713
This patch handles out-of-bound vector elements and truncates extra
bits.
Commit: 19c1381662ec48fd67ab62b1dbec3b66efdc8fc1
https://github.com/llvm/llvm-project/commit/19c1381662ec48fd67ab62b1dbec3b66efdc8fc1
Author: David Green <david.green at arm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
Log Message:
-----------
[AArch64][GlobalISel] Fix vecreduce(zext) fold from illegal types. (#167944)
We generate a ADDLV node that incorporates a vecreduce(zext) from
elements of half the size. This means that we need the input type to be
at least twice the size of the input.
I updated some variable names whilst I was here.
Fixes #167935
Commit: 22968f5b4a5327de3037e6bc5cfee826893c5847
https://github.com/llvm/llvm-project/commit/22968f5b4a5327de3037e6bc5cfee826893c5847
Author: David Green <david.green at arm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
A llvm/test/CodeGen/AArch64/strictfp-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
A llvm/test/CodeGen/ARM/strictfp-inlineasm.ll
A llvm/test/CodeGen/X86/strictfp-inlineasm.ll
Log Message:
-----------
[DAG] Add strictfp implicit def reg after metadata. (#168282)
This prevents a machine verifier error, where it "Expected implicit
register after groups".
Fixes #158661
Commit: dfac905925a66f7077d9ade3f2719f4fc9164aa3
https://github.com/llvm/llvm-project/commit/dfac905925a66f7077d9ade3f2719f4fc9164aa3
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/DynamicExtent.h
M clang/lib/StaticAnalyzer/Core/DynamicExtent.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/Analysis/ArrayBound/verbose-tests.c
Log Message:
-----------
[clang][analyzer] Extend lifetime of dynamic extent information (#163562)
Symbols used for dynamic extent information of memory regions are now
kept as live as long as the memory region exists.
Commit: 4d4a60cde00539db5033dcbc289ed2ec37b9ad8b
https://github.com/llvm/llvm-project/commit/4d4a60cde00539db5033dcbc289ed2ec37b9ad8b
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[VPlan] Fix LastActiveLane assertion on scalar VF (#167897)
For a scalar only VPlan with tail folding, if it has a phi live out then
legalizeAndOptimizeInductions will scalarize the widened canonical IV
feeding into the header mask:
<x1> vector loop: {
vector.body:
EMIT vp<%4> = CANONICAL-INDUCTION ir<0>, vp<%index.next>
vp<%5> = SCALAR-STEPS vp<%4>, ir<1>, vp<%0>
EMIT vp<%6> = icmp ule vp<%5>, vp<%3>
EMIT vp<%index.next> = add nuw vp<%4>, vp<%1>
EMIT branch-on-count vp<%index.next>, vp<%2>
No successors
}
Successor(s): middle.block
middle.block:
EMIT vp<%8> = last-active-lane vp<%6>
EMIT vp<%9> = extract-lane vp<%8>, vp<%5>
Successor(s): ir-bb<exit>
The verifier complains about this but this should still generate the
correct last active lane, so this fixes the assert by handling this case
in isHeaderMask. There is a similar pattern already there for
ActiveLaneMask, which also expects a VPScalarIVSteps recipe.
Fixes #167813
Commit: 550522d07e7481bf74255a014745f0f9c739ff8a
https://github.com/llvm/llvm-project/commit/550522d07e7481bf74255a014745f0f9c739ff8a
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
Log Message:
-----------
[AMDGPU][NFC] Mark GEPs in flat offset folding tests as inbounds (#165426)
This is in preparation for a patch that will only fold offsets into flat
instructions if their addition is inbounds. Marking the GEPs inbounds here
means that their output won't change with the later patch.
Basically a retry of the very similar PR #131994, as part of an updated stack
of PRs.
For SWDEV-516125.
Commit: af45b0202cdd443beedb02392f653d8cff5bd931
https://github.com/llvm/llvm-project/commit/af45b0202cdd443beedb02392f653d8cff5bd931
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/test/COFF/arm64ec-codemap.test
Log Message:
-----------
[LLD][COFF] Align EC code ranges to page boundaries (#168222)
We already ensure that code for different architectures is always placed
in different pages in `assignAddresses`. We represent those ranges using
their first and last chunks. However, the RVAs of those chunks may not
be page-aligned, for example, due to extra padding for entry-thunk
offsets. Align the chunk RVAs to the page boundary so that the emitted
ranges correctly include the entire region.
This change affects an existing test that checks corner cases triggered
by merging a data section into a code section. We may now include such
data in the code range. This differs from MSVC’s behavior, but it should
not cause practical issues, and the new behavior is arguably more
correct.
Fixes #168119.
Commit: c2ba81c780c2eba700db0b6bc7a58b4c3de8ba76
https://github.com/llvm/llvm-project/commit/c2ba81c780c2eba700db0b6bc7a58b4c3de8ba76
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/include/lldb/Core/EmulateInstruction.h
Log Message:
-----------
[lldb][nfc] Fix comment about UINT32_MAX in UnwindAssemblyInstruction (#168339)
Commit: 74c91680e6c9e68c9915ac10eb95c2fe31fd5651
https://github.com/llvm/llvm-project/commit/74c91680e6c9e68c9915ac10eb95c2fe31fd5651
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
Log Message:
-----------
[lldb][nfc] Avoid duplicate calls to GetInstructionCondition in UnwindAssemblyInstEmulation (#168340)
Commit: fdbb888db53f156699ba3a94d5a0ce2005fd6e3c
https://github.com/llvm/llvm-project/commit/fdbb888db53f156699ba3a94d5a0ce2005fd6e3c
Author: guillem-bartrina-sonarsource <guillem.bartrina at sonarsource.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
M clang/test/Analysis/std-variant-checker.cpp
Log Message:
-----------
[analyzer] StdVariantChecker: fix crashes and incorrect retrieval of template arguments (#167341)
Although very unusual, the SVal of the argument is not checked for
UnknownVal, so we may get a null pointer dereference.
In addition, the template arguments of the variant are retrieved
incorrectly when type aliases are involved, causing crashes and FPs/FNs.
Commit: 7e730da128df186a63c6fde19693129322024c50
https://github.com/llvm/llvm-project/commit/7e730da128df186a63c6fde19693129322024c50
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Add printRecipe, prepare printing metadata in ::print (NFC) (#166244)
Add a new pinrRecipe which handles printing the recipe without common
info like debug info or metadata.
Prepares to print them once, in ::print(), after/in combination with
https://github.com/llvm/llvm-project/pull/165825.
PR: https://github.com/llvm/llvm-project/pull/166244
Commit: 82ba3f5d316c102aad1b0721d64c028a8724a3a4
https://github.com/llvm/llvm-project/commit/82ba3f5d316c102aad1b0721d64c028a8724a3a4
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGVTables.cpp
M clang/test/CodeGenCXX/tmp-md-nodes1.cpp
M clang/test/CodeGenCXX/tmp-md-nodes2.cpp
Log Message:
-----------
[clang][DebugInfo] Clear retained nodes list of vararg trunk's DISubprogram (#167758)
This fixes the issue reported in
https://github.com/llvm/llvm-project/pull/166855#issuecomment-3518604073
that had been revealed after
https://github.com/llvm/llvm-project/pull/166855 was merged.
`CodeGenFunction::GenerateVarArgsThunk` creates thunks for vararg
functions by cloning and modifying them. It is different from
`CodeGenFunction::generateThunk`, which is used for Itanium ABI.
According to https://reviews.llvm.org/D39396,
`CodeGenFunction::GenerateVarArgsThunk` may be called before metadata
nodes are resolved. So, it tries to avoid remapping DISubprogram and all
metadata nodes it references inside `CloneFunction()` by manually
cloning DISubprogram.
If optimization level is not OptNone, DILocalVariables for a function
are saved in DISubprogram's retainedNodes field. When
`CodeGenFunction::GenerateVarArgsThunk` clones such DISubprogram without
remapping, it produces a subprogram with incorrectly-scoped retained
nodes. It triggers Verifier checks added in
https://github.com/llvm/llvm-project/pull/166855.
To solve that, retained nodes list of a cloned DISubprogram is cleared.
Commit: 3ee54a6b992c6053726764905030946f8bc10cd0
https://github.com/llvm/llvm-project/commit/3ee54a6b992c6053726764905030946f8bc10cd0
Author: Katya Romanova <56653669+romanova-ekaterina at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
A cross-project-tests/dtlto/dtlto-cache.test
A cross-project-tests/dtlto/dtlto-thinlto-cache.test
M llvm/include/llvm/LTO/Config.h
M llvm/lib/LTO/LTO.cpp
A llvm/test/ThinLTO/X86/dtlto/dtlto-cache.ll
Log Message:
-----------
[DTLTO] [LLVM] Initial DTLTO cache implementation (#156433)
This patch implements DTLTO cache. DTLTO cache is implemented the same
way as ThinLTO cache. In fact the same class Cache is used for both of
them.
Because parameters for codegen are different for DTLTO and ThinLTO
(DTLTO codegen is done by invoking clang and its codegen parameters are
not fully synchronized with codegen parameters used by LTO backend).
The object files generated by DTLTO and ThinLTO might be different and
shouldn't be mixed. If ThinLTO and DTLTO share the same cache
directory, the cache file won't interfere with each other.
I added a couple of test files in cross-project-test/dtlto directory,
but if more tests are required for initial implementation, I could add
them.
Commit: c2ddaaa4255cd4ab82eb9be6b1ac1842ec1e4edd
https://github.com/llvm/llvm-project/commit/c2ddaaa4255cd4ab82eb9be6b1ac1842ec1e4edd
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
Log Message:
-----------
[NFC][analyzer] Add missing documentation for `decodeValueOfObjCType` (#167822)
This check is introduced in
https://github.com/llvm/llvm-project/commit/b284005072122fe4af879725e3c8090009f89ca0,
but the documentation seems missing from `checkers.rst`.
Commit: 515924f765407565efb65a70709b3f7d169366d0
https://github.com/llvm/llvm-project/commit/515924f765407565efb65a70709b3f7d169366d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/test/CodeGen/X86/bittest-big-integer.ll
Log Message:
-----------
[X86] bittest-big-integer.ll - add BLSR style pattern test (#168356)
Test using CTTZ to determine the lowest set bit, clear it and return the
index
Shows failure to use RMW pattern on the load-btr-store due to additional
(but non-interference) uses of the load.
Commit: 6b464e4ac0b1ce4638c0fa07abcba329119836cb
https://github.com/llvm/llvm-project/commit/6b464e4ac0b1ce4638c0fa07abcba329119836cb
Author: Sergej Salnikov <skill at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/include/clang/Basic/SourceManager.h
M clang/lib/Basic/SourceManager.cpp
M clang/test/Analysis/plist-macros-with-expansion.cpp
M clang/test/C/C23/n2350.c
M clang/test/ExtractAPI/macro_undefined.c
M clang/test/FixIt/format.cpp
M clang/test/Preprocessor/macro_arg_directive.c
M clang/test/Preprocessor/print_line_track.c
Log Message:
-----------
[clang][SourceManager] Use `getFileLoc` when computing `getPresumedLoc` (#166255)
Now the files location is used for macro expansions. This provides more
accurate location when reporting compilation errors.
Move from `getDecomposedExpansionLoc(Loc)` to
`getDecomposedLoc(getFileLoc(Loc))` when computing Presumed location.
Commit: e3cfb1710ed6380dc0e50bcf3c697d8977cb0037
https://github.com/llvm/llvm-project/commit/e3cfb1710ed6380dc0e50bcf3c697d8977cb0037
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Update Clang Maintainers (#168271)
I've left Sonar by the end of October. For my upcoming contributions,
I'll simply use my personal (this) account.
I'll remain a Clang Static Analyser maintainer, but I'll likely spend
less time on that part as in my new job this falls out of my key
responsibilities.
>From now on, I'm part of the Apple org, but for accessibility, I'll keep
using my personal email address for open-source contributions and for
the build bots.
Commit: ae2fec04cc2cc771070d33437dd4b03560c49657
https://github.com/llvm/llvm-project/commit/ae2fec04cc2cc771070d33437dd4b03560c49657
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix build after #167848. (#168366)
Commit: e468ea3f40415c48281755c68548ba49480a2259
https://github.com/llvm/llvm-project/commit/e468ea3f40415c48281755c68548ba49480a2259
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Dialect/AMDGPU/invalid.mlir
Log Message:
-----------
[mlir][amdgpu] Fix documentation and verifiers (#167369)
Commit: ef023cae388d7becd18df602cb2d77bdb3d59e55
https://github.com/llvm/llvm-project/commit/ef023cae388d7becd18df602cb2d77bdb3d59e55
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M flang/test/Integration/unroll-loops.f90
M flang/test/Lower/HLFIR/unroll-loops.fir
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-store-with-gap.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/cse-gep-source-element-type.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-no-wrap.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr34681.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr36983-multiple-lcssa.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
Log Message:
-----------
Reland [VPlan] Expand WidenInt inductions with nuw/nsw (#168354)
Changes: The previous patch had to be reverted to a mismatching-OpType
assert in cse. The reduced-test has now been added corresponding to a
RVV pointer-induction, and the pointer-induction case has been updated
to use createOverflowingBinaryOp.
While at it, record VPIRFlags in VPWidenInductionRecipe.
Commit: fd1bdfde14c05f00a802f33717dfa72284317bbf
https://github.com/llvm/llvm-project/commit/fd1bdfde14c05f00a802f33717dfa72284317bbf
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/include/clang/Basic/SourceManager.h
M clang/lib/Basic/SourceManager.cpp
M clang/test/Analysis/plist-macros-with-expansion.cpp
M clang/test/C/C23/n2350.c
M clang/test/ExtractAPI/macro_undefined.c
M clang/test/FixIt/format.cpp
M clang/test/Preprocessor/macro_arg_directive.c
M clang/test/Preprocessor/print_line_track.c
Log Message:
-----------
Revert "[clang][SourceManager] Use `getFileLoc` when computing `getPresumedLoc`" (#168368)
Reverts llvm/llvm-project#166255
It broke bots:
https://lab.llvm.org/buildbot/#/builders/190/builds/31102
Commit: e70e9ec3b83757761ccbba217a566d77b561ec53
https://github.com/llvm/llvm-project/commit/e70e9ec3b83757761ccbba217a566d77b561ec53
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M flang/test/Semantics/OpenMP/simd-only.f90
Log Message:
-----------
[flang][OpenMP] Store Block in OpenMPLoopConstruct, add access functions (#168078)
Instead of storing a variant with specific types, store parser::Block as
the body. Add two access functions to make the traversal of the nest
simpler.
This will allow storing loop-nest sequences in the future.
Commit: 29e7b4f9a72576a2901407834b988ec37f931d28
https://github.com/llvm/llvm-project/commit/29e7b4f9a72576a2901407834b988ec37f931d28
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenACC/acc-atomic-update.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-host-data.f90
M flang/test/Lower/OpenACC/acc-loop-exit.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-routine-named.f90
M flang/test/Lower/OpenACC/acc-routine.f90
M flang/test/Lower/OpenACC/acc-routine02.f90
M flang/test/Lower/OpenACC/acc-routine03.f90
M flang/test/Lower/OpenACC/acc-routine04.f90
M flang/test/Lower/OpenACC/acc-shutdown.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-use-device.f90
M flang/test/Lower/OpenACC/locations.f90
Log Message:
-----------
[flang][NFC] Strip trailing whitespace from tests (5 of N)
Only the fortran source files in flang/test/Lower/OpenACC have been
modified. The other files in flang/test will be cleaned up in subsequent
commits
Commit: b6fd3c62bb8af8b9c79d32207d96e3674aeccb36
https://github.com/llvm/llvm-project/commit/b6fd3c62bb8af8b9c79d32207d96e3674aeccb36
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/test/Preprocessor/predefined-arch-macros.c
M llvm/lib/Target/X86/X86.td
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[X86] Enable APX and AVX10.2 on NVL (#168061)
Per Intel Architecture Instruction Set Extensions Programming Reference
rev. 60 (https://cdrdv2.intel.com/v1/dl/getContent/671368), table 1-2,
NVL supports APX and AVX10.2
Commit: 6eab083e2dc21be8ef18fc2c58f762938f949799
https://github.com/llvm/llvm-project/commit/6eab083e2dc21be8ef18fc2c58f762938f949799
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
Log Message:
-----------
[mlir][emitc] Refactor brackets in expressions (#168267)
This patch is a minor NFC-intended refactoring to the way emitting
redundant parentheses is prevented.
The current implementation pushes and later pops a fake low precedence
into the precedence stack when emitting function calls. The new
implementation adds a boolean argument to `emitOperand()` that explicity
guarantees that the operand is being emitted between some kind of
brackets, exempting the method from enforcing correct evaluation order
w.r.t precedence and associativity up the expression tree.
Commit: 9fe0a70579ee9e5477a77695822e026c67026ef3
https://github.com/llvm/llvm-project/commit/9fe0a70579ee9e5477a77695822e026c67026ef3
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-bf16.ll
Log Message:
-----------
[llvm][RISCV] Support splat and vp_splat for zvfbfa codegen (#167920)
Commit: 53e3f8e3c50ee28e33181514933c5632a001033b
https://github.com/llvm/llvm-project/commit/53e3f8e3c50ee28e33181514933c5632a001033b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M compiler-rt/test/xray/TestCases/Posix/basic-filtering.cpp
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/c-test.cpp
M compiler-rt/test/xray/TestCases/Posix/common-trampoline-alignment.cpp
M compiler-rt/test/xray/TestCases/Posix/custom-event-handler-alignment.cpp
M compiler-rt/test/xray/TestCases/Posix/custom-event-logging.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-inmemory.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-multiple.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-thread-order.cpp
M compiler-rt/test/xray/TestCases/Posix/fork_basic_logging.cpp
M compiler-rt/test/xray/TestCases/Posix/profiling-multi-threaded.cpp
M compiler-rt/test/xray/TestCases/Posix/profiling-single-threaded.cpp
M compiler-rt/test/xray/TestCases/Posix/quiet-start.cpp
Log Message:
-----------
[XRay] Prefix setting XRAY_OPTIONS with env
So setting the environment variable works with the new internal shell.
This does not fix all the XRay tests because some of them are using
subshells and need to be rewritten to not use subshells.
Commit: e95c5c85113066fbf14307e31a533fdb1a7387ef
https://github.com/llvm/llvm-project/commit/e95c5c85113066fbf14307e31a533fdb1a7387ef
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++] Refactor basic_string::__recommend (#162631)
This does a couple of things:
- code that is only useful for `shrink_to_fit` is moved into that
function
- `shrink_to_fit` is simplified a bit
- `__recommend` is renamed to better reflect what the function actually
does
- `__allocate_long_buffer` asserts that the passed capacity doesn't fit
into the SSO
Commit: c7a9be81be9a08a4be208a89fa514ff0fe4de915
https://github.com/llvm/llvm-project/commit/c7a9be81be9a08a4be208a89fa514ff0fe4de915
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M compiler-rt/test/xray/TestCases/Posix/basic-filtering.cpp
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-inmemory.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-multiple.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode.cpp
M compiler-rt/test/xray/TestCases/Posix/fork_basic_logging.cpp
M compiler-rt/test/xray/TestCases/Posix/profiling-multi-threaded.cpp
M compiler-rt/test/xray/TestCases/Posix/profiling-single-threaded.cpp
Log Message:
-----------
[XRay] Rewrite tests to not use subshells
So that they will actually function with the internal shell.
Commit: e9743e24189d02b4ba71095c8581f2fb6412c140
https://github.com/llvm/llvm-project/commit/e9743e24189d02b4ba71095c8581f2fb6412c140
Author: Jakub Ficek <jakub.ficek at intel.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/strictfp-elementwise-builtins.cpp
M clang/test/CodeGenHLSL/builtins/exp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp.hlsl
M clang/test/CodeGenHLSL/builtins/exp2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp2.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/lit.hlsl
M clang/test/CodeGenHLSL/builtins/round-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/round.hlsl
Log Message:
-----------
[clang] Support constrained fp elementwise builtins (#166905)
Currently only __builtin_elementwise_sqrt emits contrained fp intrinsic
and propagates fp options.
This commit adds this support for the rest of elementwise builtins.
Commit: 47c1aa4cef638c97b74f3afb7bed60e92bba1f90
https://github.com/llvm/llvm-project/commit/47c1aa4cef638c97b74f3afb7bed60e92bba1f90
Author: Ahmed Nour <ahmednour.mohamed2012 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/pmmintrin.h
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/sse3-builtins.c
Log Message:
-----------
[X86] Add constexpr support for addsub intrinsics (#167512)
Recent commits (7fe069121b57a, 53ddeb493529a) marked several x86
intrinsics as constexpr in headers without providing the necessary
constant evaluation support in the compiler backend. This caused
compilation failures when attempting to use these intrinsics in constant
expressions.
Resolves #166814
Resolves #161203
Commit: 17cbb48c49a8d4408f7afa088f9c8a30be567a75
https://github.com/llvm/llvm-project/commit/17cbb48c49a8d4408f7afa088f9c8a30be567a75
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/lib/Query/Matcher/Parser.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-identifier-naming in Parser.cpp (NFC)
Commit: 38811bea5a567b8b848735af7ed6bacd52d3a3dc
https://github.com/llvm/llvm-project/commit/38811bea5a567b8b848735af7ed6bacd52d3a3dc
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
A flang/test/Parser/OpenMP/name-with-space.f
Log Message:
-----------
[Flang] [OpenMP] Add support for spaces in between the name (#168311)
Supports the fixed form syntax which has spaces in between the
identifier
Commit: d65be16ab6adf00af21e75d29049ae5de0f3a38a
https://github.com/llvm/llvm-project/commit/d65be16ab6adf00af21e75d29049ae5de0f3a38a
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
Log Message:
-----------
[AArch64][GlobalISel] Add combine for build_vector(unmerge, unmerge, undef, undef) (#165539)
This PR adds a new combine to the `post-legalizer-combiner` pass. The
new combine checks for vectors being unmerged and subsequently padded
with `G_IMPLICIT_DEF` values by building a new vector. If such a case is
found, the vector being unmerged is instead just concatenated with a
`G_IMPLICIT_DEF` that is as wide as the vector being unmerged.
This removes unnecessary `mov` instructions in a few places.
Commit: ff7896e0fa2e24fb4e07c33ce1c96f87b0b0344a
https://github.com/llvm/llvm-project/commit/ff7896e0fa2e24fb4e07c33ce1c96f87b0b0344a
Author: Tim Noack <noack at esa.tu-darmstadt.de>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/test/IR/invalid-ops.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[MLIR] Add verification that symbol operations must not have results (#168390)
This patch adds verification to the `SymbolOpInterface` to enforce the
design constraint that symbol operations must not produce SSA results,
as documented in [Symbols and
SymbolTables](https://mlir.llvm.org/docs/SymbolsAndSymbolTables/#defining-or-declaring-a-symbol).
This is a follow-up of #168376
Commit: 498a01db9b1a5424e28665aa0c02eacad5ab027f
https://github.com/llvm/llvm-project/commit/498a01db9b1a5424e28665aa0c02eacad5ab027f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Option/OptTable.cpp
Log Message:
-----------
[Option] Use llvm::is_contained (NFC) (#168295)
Identified with llvm-use-ranges.
Commit: 99bf41cd11daa3ee32431c12ff5084fc90f1f91d
https://github.com/llvm/llvm-project/commit/99bf41cd11daa3ee32431c12ff5084fc90f1f91d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[TargetParser] Use range-based for loops (#168296)
While I am at it, this patch converts one of the loops to use
llvm::is_contained.
Identified with modernize-loop-convert.
Commit: bf21156ee69a7c8b27733d037abc0ab108451de9
https://github.com/llvm/llvm-project/commit/bf21156ee69a7c8b27733d037abc0ab108451de9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/IPO/IROutliner.cpp
Log Message:
-----------
[IPO] Remove a redundant cast (NFC) (#168297)
Idx is already of type unsigned.
Identified with readability-redundant-casting.
Commit: dcf8cd9c5b7cf15a07850484c6bb50516c4faacd
https://github.com/llvm/llvm-project/commit/dcf8cd9c5b7cf15a07850484c6bb50516c4faacd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Consolidate the grow() logic in DenseMapBase (NFC) (#168316)
This patch consolidates the grow() logic in DenseMapBase::grow.
With this patch, DenseMapBase::grow() creates a temporary grown
instance and then lets DenseMap/SmallDenseMap attempt to move the
instance back to *this. If it doesn't work, we move again.
The "attempt to move" always succeeds for DenseMap. For
SmallDenseMap, it succeeds only in the large mode.
This is part of the effort outlined in #168255.
Commit: 3c54972def503440e351a0ec6553c8fed884fe13
https://github.com/llvm/llvm-project/commit/3c54972def503440e351a0ec6553c8fed884fe13
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Remove DenseMap::init (NFC) (#168322)
This patch removes DenseMap::init and SmallDenseMap::init by inlining
them into their call sites and simplifying them.
init() is defined as:
void init(unsigned InitNumEntries) {
auto InitBuckets =
BaseT::getMinBucketToReserveForEntries(InitNumEntries);
this->initWithExactBucketCount(InitBuckets);
}
- Constuctors: Now that we have constructors that allocate the exact
number of buckets (as opposed to the number of key/value pairs),
init() does too much. Once we convert the number of key/value pairs
to the number of buckets, we can call the constructors that take the
exact number of buckets.
- init(0) in the move assignment operators simplifies down to:
initWithExactBucketCount(0)
- shrink_and_clear() computes the number of buckets to have after the
clear operation. As such, we should call initWithExactBucketCount,
not init. Otherwise, we would end up adding "load factor padding"
on top of NewNumBuckets:
NextPowerOf2(NewNumBuckets * 4 / 3 + 1)
All in all, init() doesn't bring any value in the current setup.
This patch is part of the effort outlined in #168255.
Commit: e69d2bf6031a534c824d1ce4191f5fc334ab4ae6
https://github.com/llvm/llvm-project/commit/e69d2bf6031a534c824d1ce4191f5fc334ab4ae6
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M openmp/tools/omptest/test/CMakeLists.txt
Log Message:
-----------
[OpenMP][omptest] Fix missing source extention
The file extention was accidentally omitted from #164794.
Commit: a9633aac31cb1ec42153fb3ada815aa1572eb58f
https://github.com/llvm/llvm-project/commit/a9633aac31cb1ec42153fb3ada815aa1572eb58f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M libcxx/include/__hash_table
M libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/erase_range.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.modifiers/erase_range.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/erase_range.pass.cpp
M libcxx/test/std/containers/unord/unord.set/erase_range.pass.cpp
Log Message:
-----------
[libc++] Fix __hash_table::erase(iterator, iterator) to update the bucket list correctly when erasing the last bucket (#167865)
Fixes #167820
Commit: 7659cd42578c59d1bef1313053d493171b9146a2
https://github.com/llvm/llvm-project/commit/7659cd42578c59d1bef1313053d493171b9146a2
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
Log Message:
-----------
[VectorUtils] Use PatternMatch in findScalarElement (NFC) (#168389)
Commit: 4dd27960706cf2681b72cc2cf7cd8ccbcf0f4f9d
https://github.com/llvm/llvm-project/commit/4dd27960706cf2681b72cc2cf7cd8ccbcf0f4f9d
Author: vangthao95 <vang.thao at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Add RegBankLegalize support for G_FMUL (#167847)
Commit: d163988dd2833f28fbca8c144265108d25ae7bd2
https://github.com/llvm/llvm-project/commit/d163988dd2833f28fbca8c144265108d25ae7bd2
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[MLIR][NVVM][NFC] Re-order mem_scope and shared_space attrs (#168348)
The mbarrier Ops also require access to the `mem_scope` and
`shared_space` attributes. Hence, this patch moves their definitions
to the beginning of the file alongside the other attribute definitions.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 83fc85c9547e7e55b326f86e946cff8358cbe0c2
https://github.com/llvm/llvm-project/commit/83fc85c9547e7e55b326f86e946cff8358cbe0c2
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
Remove shadowing "size" field from classes that inherit from SyntheticSection (#166323)
A field-named 'size' already available and perfectly usable via
inheritance from InputSection, and these variables shadow it for no good
reason.
The only interesting change here is in PaddingSection, because a
parent's field cannot be initialized via a constructor initializer list,
setting it needs to be done inside the constructor body.
Commit: 35ae5157c0ab98a90231ff655b1a47d3f8a20d2b
https://github.com/llvm/llvm-project/commit/35ae5157c0ab98a90231ff655b1a47d3f8a20d2b
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[MLIR][NVVM][Docs] Explain memory spaces (#168059)
Commit: c66f1fdfb74802204afc425317062017d2487194
https://github.com/llvm/llvm-project/commit/c66f1fdfb74802204afc425317062017d2487194
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/MC/MCInst.cpp
M llvm/lib/MC/MCRegisterInfo.cpp
Log Message:
-----------
[MC] Use MCRegister::id() to avoid implicit casts. NFC (#168233)
Commit: 39e7712ac520ccfc43383b3e9d6ea8cf2958b8e3
https://github.com/llvm/llvm-project/commit/39e7712ac520ccfc43383b3e9d6ea8cf2958b8e3
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Intrinsics.cpp
A llvm/test/CodeGen/NVPTX/tcgen05-mma-tensor-formatted.ll
A llvm/test/TableGen/intrinsic-arginfo.td
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[LLVM-Tablegen] Pretty Printing Arguments in LLVM Intrinsics (#162629)
This patch adds LLVM infrastructure to support pretty printing of the
intrinsic arguments.
The motivation is to improve the readability of LLVM intrinsics and
facilitate easy
modifications and debugging of LLVM IR.
This feature adds a property `ArgInfo<ArgIndex, [ArgName<"argName">,
ImmArgPrinter<"functionName">]>`
to the intrinsic arguments to print self-explanatory inline comments for
the arguments.
The addition of pretty print support can provide a simple, low-overhead
feature that
enhances the usability of LLVM intrinsics without disrupting existing
workflows.
Link to the RFC, where this feature was discussed:
https://discourse.llvm.org/t/rfc-pretty-printing-immediate-arguments-in-llvm-intrinsics/88536
---------
Signed-off-by: Dharuni R Acharya <dharunira at nvidia.com>
Co-authored-by: Rahul Joshi <rjoshi at nvidia.com>
Commit: 6f5c8fe1c1d24604d3328b82f5a1ed348e59326f
https://github.com/llvm/llvm-project/commit/6f5c8fe1c1d24604d3328b82f5a1ed348e59326f
Author: Govind Malasani <145235389+gmalasan at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/IterationGraphSorter.cpp
Log Message:
-----------
[MLIR][SparseTensor] Dense Outer Loop Ordering Strategy (#160168)
This PR builds upon the infrastructure set up for Sparse Tensor Loop
Ordering Heuristics (#154656) by adding a preference to have dense loops
outer and sparse loops inner.
As always I'd love to get feedback and know if there's any other
direction to go with this work that might be better.
Commit: 0c8464330a510e0c3b629883ed1acd81da17da5d
https://github.com/llvm/llvm-project/commit/0c8464330a510e0c3b629883ed1acd81da17da5d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/base-to-derived.cpp
Log Message:
-----------
[CIR] Upstream handling for BaseToDerived casts (#167769)
Upstream handling for BaseToDerived casts, adding the
cir.base_class_addr operation and lowering to LLVM IR.
Commit: 72b02c7b376f211a6fffd5524e5db4c006ec6704
https://github.com/llvm/llvm-project/commit/72b02c7b376f211a6fffd5524e5db4c006ec6704
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
Log Message:
-----------
[AMDGPU] Fix layering violations in AMDGPUMCExpr.cpp. NFC (#168242)
AMDGPUMCExpr lives in the MC layer it should not depend on Function.h or
GCNSubtarget.h
Move the function that needed GCNSubtarget to the one file that called
it.
Commit: fb2b1387fb73a390d5d3e033277ed328c20553c3
https://github.com/llvm/llvm-project/commit/fb2b1387fb73a390d5d3e033277ed328c20553c3
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/asm-label-inline-builtins.c
Log Message:
-----------
[CIR] Handle __asm labels on function declarations (#168149)
This updates the CIR direct callee builder code to handle the case of
calls to functions that were declared with an assembly label using
`__asm`. The implementation doesn't actually have any explicit handling
of the AsmLabelAttr. It is handled by the name mangler.
See https://reviews.llvm.org/D137073 and
https://reviews.llvm.org/D134362 for details on how this was implemented
in classic codegen. The test here is copied from
https://reviews.llvm.org/D134362 because the test in
https://reviews.llvm.org/D134362 requires a target that isn't yet
supported in CIR.
Commit: 8c674f04aa57766bbc7fac97c1e42526b22a95a4
https://github.com/llvm/llvm-project/commit/8c674f04aa57766bbc7fac97c1e42526b22a95a4
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/map-mapper.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Parser/OpenMP/declare-mapper-unparse.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Semantics/OpenMP/declare-mapper-symbols.f90
M llvm/include/llvm/Frontend/OpenMP/OMPConstants.h
Log Message:
-----------
[OpenMP][Flang] Change the OmpDefaultMapperName suffix (#168399)
This PR fixes a Fortran syntax violation in the OpenMP default mapper
naming convention. The suffix .omp.default.mapper contains dots which
are invalid in Fortran identifiers, causing failures when mappers are
written to and read from module files. The fix changes the suffix to
_omp_default_mapper which uses underscores instead of dots, complying
with Fortran syntax rules.
Key changes:
- Changed OmpDefaultMapperName constant from .omp.default.mapper to
_omp_default_mapper
- Added GetUltimate() calls in mapper symbol resolution to properly
handle symbols across module boundaries
- Added new test case verifying default mappers work correctly when
defined in a module and used in consuming programs
This fixes #168336.
Commit: 2b22e9b13330d47ae22cb0aa8016ddbb567bf94f
https://github.com/llvm/llvm-project/commit/2b22e9b13330d47ae22cb0aa8016ddbb567bf94f
Author: Steven Perron <stevenperron at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
Log Message:
-----------
[SPIRV] Use a worklist in the post-legalizer (#165027)
This commit refactors the SPIRV post-legalizer to use a worklist to
process
new instructions. Previously, the post-legalizer would iterate through
all
instructions and try to assign types. This could fail if a new
instruction
depended on another new instruction that had not been processed yet.
The new implementation adds all new instructions that require a SPIR-V
type
to a worklist. It then iteratively processes the worklist until it is
empty.
This ensures that all dependencies are met before an instruction is
processed.
This change makes the post-legalizer more robust and fixes potential
ordering
issues with newly generated instructions.
Existing tests cover existing functionality. More tests will be added as
the legalizer is modified.
Part of #153091
Commit: be6296ea8faccec5d2fbaa2625112e26a5deeb85
https://github.com/llvm/llvm-project/commit/be6296ea8faccec5d2fbaa2625112e26a5deeb85
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Fold Zba-expanded (mul (shr exact X, C1), C2) (#168019)
Commit: a9a4515b0a442ea58826047b7efb9aa2bfe48749
https://github.com/llvm/llvm-project/commit/a9a4515b0a442ea58826047b7efb9aa2bfe48749
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lld/MachO/SectionPriorities.cpp
M lld/MachO/SectionPriorities.h
M lld/MachO/SyntheticSections.cpp
M lld/test/MachO/order-file-cstring.s
Log Message:
-----------
[lld][MachO] Read cstring order for non deduped sections (#161879)
https://github.com/llvm/llvm-project/pull/140307 added support for
cstring hashes in the orderfile to layout cstrings in a specific order,
but only when `--deduplicate-strings` is used. This PR supports cstring
ordering when `--no-deduplicate-strings` is used.
1. Create `cStringPriorities`, separate from `priorities`, to hold only
priorities for cstring pieces. This allows us to lookup by hash
directly, instead of first converting to a string. It also fixes a
contrived bug where we want to order a symbol named `CSTR;12345` rather
than a cstring.
2. Rather than calling `buildCStringPriorities()` which always
constructs and returns a vector, we use `forEachStringPiece()` to
efficiently iterate over cstring pieces without creating a new vector if
no cstring is ordered.
3. Create `SymbolPriorityEntry::{get,set}Priority()` helper functions to
simplify code.
Commit: eb879ac50b27d4651d8650b7d769cf651d0a89bd
https://github.com/llvm/llvm-project/commit/eb879ac50b27d4651d8650b7d769cf651d0a89bd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M .ci/premerge_advisor_explain.py
M .github/workflows/premerge.yaml
Log Message:
-----------
[CI] Make premerge upload/write comments (#166609)
This only does this for Linux currently as the issue-write workflow
currently does not support writing out multiple comments. This gets the
ball rolling as the failures that most people see are common to both
platforms. Ensuring we have coverage on Windows for comments will be
done in a future patch.
Commit: a770d2b439ec246002cd77ce33e52f6efa577849
https://github.com/llvm/llvm-project/commit/a770d2b439ec246002cd77ce33e52f6efa577849
Author: Jeremy Furtek <jfurtek at nvidia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Conversion/LLVMCommon/VectorPattern.h
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/VectorPattern.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
Log Message:
-----------
Add 'exact' flag to arith.shrui/shrsi/divsi/divui operations (#165923)
This MR adds support for the `exact` flag to the
`arith.shrui/shrsi/divsi/divui` operations. The semantics are identical
to those of the LLVM dialect and the LLVM language reference.
This MR also modifies the mechanism for converting `arith` dialect
**attributes** to corresponding **properties** in the `LLVM` dialect.
(As a specific example, the integer overflow flags `nsw/nuw` are
**properties** in the `LLVM` dialect, as opposed to attributes.)
Previously, attribute converter classes were required to have a specific
method to support integer overflow flags:
```C++
template <typename SourceOp, typename TargetOp>
class AttrConvertPassThrough {
public:
...
LLVM::IntegerOverflowFlags getOverflowFlags() const {
return LLVM::IntegerOverflowFlags::none;
}
};
```
This method was required, even for `arith` source operations that did
not use integer overflow flags (e.g. `AttrConvertFastMathToLLVM`).
This MR modifies the interface required by `arith` dialect attribute
converters to instead provide a (possibly NULL) properties attribute:
```C++
template <typename SourceOp, typename TargetOp>
class AttrConvertPassThrough {
public:
...
Attribute getPropAttr() const { return {}; }
};
```
For `arith` operations with attributes that map to `LLVM` dialect
**properties**, the attribute converter can create a `DictionaryAttr`
containing target properties and return that attribute from the
attribute converter's `getPropAttr()` method. The `arith` attribute
conversion framework will set the `propertiesAttr` of an
`OperationState`, and the target operation's `setPropertiesFromAttr()`
method will be invoked to set the properties when the target operation
is created. The `AttrConvertOverflowToLLVM` class in this MR uses the
new approach.
Commit: 9349a10f93308a196499d2c80a222476c78f1065
https://github.com/llvm/llvm-project/commit/9349a10f93308a196499d2c80a222476c78f1065
Author: Jeremy Furtek <jfurtek at nvidia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Transforms/loop-invariant-code-motion.mlir
M mlir/unittests/Dialect/LLVMIR/CMakeLists.txt
Log Message:
-----------
Fix side effects for LLVM integer operations (udiv, sdiv) incorrectly marked as Pure (#166648)
This MR modifies side effect traits of some integer arithmetic
operations in the LLVM dialect.
Prior to this MR, the LLVM dialect `sdiv` and `udiv` operations were
marked as `Pure` through `tblgen` inheritance of the
`LLVM_ArithmeticOpBase` class. The `Pure` trait allowed incorrect
hoisting of `sdiv`/`udiv` operations by the
`loop-independent-code-motion` pass.
This MR modifies the `sdiv` and `udiv` LLVM operations to have traits
and code motion behavior identical to their counterparts in the `arith`
dialect, which were established by the commit/review below.
https://github.com/llvm/llvm-project/commit/ed39825be48805b174d3177f1d8d41ed84784d18
https://reviews.llvm.org/D137814
Commit: a7579fda53b55ae7d7d064d08e58b1269420095d
https://github.com/llvm/llvm-project/commit/a7579fda53b55ae7d7d064d08e58b1269420095d
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[PowerPC][AIX] Remove flag for no semantic interposition (#168109)
Remove flag to sepecifcy "no semantic interposition" since this is the
default for AIX.
Commit: 72059bebb3a9427dc70723a37e4c38adfa44553a
https://github.com/llvm/llvm-project/commit/72059bebb3a9427dc70723a37e4c38adfa44553a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M compiler-rt/test/profile/Darwin/instrprof-debug-info-correlate.c
Log Message:
-----------
[compiler-rt][Profile] Mark Darwin test work with internal shell
This test was using subshells and then passing the results to diff. Write out
the results to files before passing to diff as the internal shell does not
support subshells.
Commit: 05bd742ad790f207f5c94c4bf327d3e87b8819dc
https://github.com/llvm/llvm-project/commit/05bd742ad790f207f5c94c4bf327d3e87b8819dc
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/GotoSolver.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/label-values.c
A clang/test/CIR/IR/block-adress.cir
A clang/test/CIR/IR/invalid-block-address.cir
A clang/test/CIR/Transforms/goto_solver.cir
M clang/tools/cir-opt/cir-opt.cpp
Log Message:
-----------
[CIR] Upstream the initial BlockAddressOp implementation (#168151)
This PR adds initial support for codegen of `blockAddressOp`. This is
emitted when using the GNU extension labels as values. The operation is
used together with `indirectBrOp`, which will be implemented in a future
PR. Lowering will be added in a later PR.
Commit: 1425d75c7116c33b084f49eda1c12b299b342315
https://github.com/llvm/llvm-project/commit/1425d75c7116c33b084f49eda1c12b299b342315
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
R llvm/lib/Target/X86/X86DiscriminateMemOps.cpp
R llvm/lib/Target/X86/X86InsertPrefetch.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/O0-pipeline.ll
R llvm/test/CodeGen/X86/discriminate-mem-ops-missing-info.ll
R llvm/test/CodeGen/X86/discriminate-mem-ops-skip-pfetch.ll
R llvm/test/CodeGen/X86/discriminate-mem-ops.ll
R llvm/test/CodeGen/X86/insert-prefetch-inline.afdo
R llvm/test/CodeGen/X86/insert-prefetch-inline.ll
R llvm/test/CodeGen/X86/insert-prefetch-invalid-instr.afdo
R llvm/test/CodeGen/X86/insert-prefetch-invalid-instr.ll
R llvm/test/CodeGen/X86/insert-prefetch-other.afdo
R llvm/test/CodeGen/X86/insert-prefetch.afdo
R llvm/test/CodeGen/X86/insert-prefetch.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
Log Message:
-----------
[X86] Delete Profile Guided Prefetch Passes (#167317)
As the PGPF effort has been turned down, there is no current way to
generate profiles that will be used by these passes. Current efforts are
also focused around inserting prefetches in PLO optimizers, which have a
more accurate view of how the code looks.
Commit: 472e4ab0b02d3dec001f885beb535c9d727d1ea2
https://github.com/llvm/llvm-project/commit/472e4ab0b02d3dec001f885beb535c9d727d1ea2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
R llvm/unittests/CodeGen/MLRegAllocDevelopmentFeatures.cpp
Log Message:
-----------
[MLGO] Fully Remove MLRegalloc Experimental Features (#168252)
20a22a45e96bc94c3a8295cccc9031bd87552725 was supposed to fully remove
these, but left around the functionality to actually compute them and a
unittest that ensured they worked. These are not development features in
the sense of features used in development mode, but experimental
features that have been superseded by MIR2Vec.
Commit: 4be0ab659e6a65436c4e3629706318acd0c1cdc9
https://github.com/llvm/llvm-project/commit/4be0ab659e6a65436c4e3629706318acd0c1cdc9
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/target-loop-still-there.f90
Log Message:
-----------
[flang][OpenMP] Undeprecate accidentally deprecated TARGET LOOP (#167495)
Commit: c4be17a8877ba406bcda63c5398bc09ebb32598a
https://github.com/llvm/llvm-project/commit/c4be17a8877ba406bcda63c5398bc09ebb32598a
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M compiler-rt/test/fuzzer/merge-posix.test
Log Message:
-----------
[compiler-rt] [libFuzzer] Fix merge-posix.test file size test (#168137)
This test uses `ulimit -f 1` to test what libFuzzer does when trying to
create a file > **_1KB_**. However, the none of the input files used by
this test are actually >= 1KB, so there's no reason to expect this test
to pass.
This test appears to be passing on accident since the "control file"
happens to be > 1KB, but this is not always the case depending upon the
length of the path where the test is run from.
This modifies the test to ensure that one of the input file is actually
>1KB.
Commit: cc304e5a5cf43d454d597eb9108f0bc7e6605722
https://github.com/llvm/llvm-project/commit/cc304e5a5cf43d454d597eb9108f0bc7e6605722
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/TableGen/Main.cpp
Log Message:
-----------
[TableGen] Strip directories from filename prefixes. (#168355)
Fixes https://github.com/llvm/llvm-project/pull/167700 to support
builds where TableGen's output file is specified as full path
rather than just filename.
Commit: aa4de7b4ef510427b5997e525feb642fc0c51053
https://github.com/llvm/llvm-project/commit/aa4de7b4ef510427b5997e525feb642fc0c51053
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
Log Message:
-----------
[bazel] Add support for multiple tblgen outputs (#168158)
Required after https://github.com/llvm/llvm-project/pull/167700
This adds yet another format for `tbl_outs` where you pass the list of
opts, and a list of outputs (where previously you could only have 1
output). In that case all outputs must be produced, but the first is
used for the `-o` arg since tblgen is generating the other names based
on that single argument.
Commit: 6360bbbb6890c965016a98fab8ea76551f577c1f
https://github.com/llvm/llvm-project/commit/6360bbbb6890c965016a98fab8ea76551f577c1f
Author: David Tenty <daltenty at ibm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Support/InitLLVM.cpp
Log Message:
-----------
[AIX] Raise soft memory limits to hard limits (#167928)
AIX out-of-box memory soft limits are often
insufficient to run LLVM on reasonably size
inputs. Thus, we often encounter users who run
into spurious out of memory errors.
This change raises the memory soft limits
to the hard limits at LLVM startup to prevent
these types of issues.
Commit: bb9df2e3bd7ec903f5040ec9e78bdc9e06561d67
https://github.com/llvm/llvm-project/commit/bb9df2e3bd7ec903f5040ec9e78bdc9e06561d67
Author: John Harrison <harjohn at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/include/lldb/API/SBFile.h
M lldb/include/lldb/Host/File.h
M lldb/include/lldb/Host/StreamFile.h
M lldb/source/API/SBCommandReturnObject.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBFile.cpp
M lldb/source/API/SBInstruction.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBStream.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Host/common/File.cpp
M lldb/source/Host/common/StreamFile.cpp
M lldb/unittests/Host/FileTest.cpp
Log Message:
-----------
[lldb] Ensure FILE* access mode is correctly specified when creating a NativeFile. (#167764)
If we open a `NativeFile` with a `FILE*`, the OpenOptions default to
`eOpenOptionReadOnly`. This is an issue in python scripts if you try to
write to one of the files like `print("Hi",
file=lldb.debugger.GetOutputFileHandle())`.
To address this, we need to specify the access mode whenever we create a
`NativeFile` from a `FILE*`. I also added an assert on the `NativeFile`
that validates the file is opened with the correct access mode and
updated `NativeFile::Read` and `NativeFile::Write` to check the access
mode.
Before these changes:
```
$ lldb -b -O 'script lldb.debugger.GetOutputFileHandle().write("abc")'
(lldb) script lldb.debugger.GetOutputFileHandle().write("abc")
Traceback (most recent call last):
File "<input>", line 1, in <module>
io.UnsupportedOperation: not writable
```
After:
```
$ lldb -b -O 'script lldb.debugger.GetOutputFileHandle().write("abc")'
(lldb) script lldb.debugger.GetOutputFileHandle().write("abc")
abc3
```
Fixes #122387
Commit: aba3269bc98733f56a4b694dddf816c32ff50341
https://github.com/llvm/llvm-project/commit/aba3269bc98733f56a4b694dddf816c32ff50341
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M .gitignore
Log Message:
-----------
[.gitignore] Ignore .claude and .gemini in subdirectories (#167029)
Currently `.claude/` and `.gemini/` are only ignored in the root of the
repo. Developers might conceivable run these tools in project
subdirectories, in which case these should be ignored as well.
Commit: adeedad449d19087baa5ec4fbc246d1f6664b7d4
https://github.com/llvm/llvm-project/commit/adeedad449d19087baa5ec4fbc246d1f6664b7d4
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port 900c517919794ff0ea83c6b15ffe03707a164800 (#168423)
Commit: 18b5e2a7266bfe8f211be7ae1198e6bed4ab0c06
https://github.com/llvm/llvm-project/commit/18b5e2a7266bfe8f211be7ae1198e6bed4ab0c06
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python.swig
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Log Message:
-----------
[lldb] Push down the SWIG module to avoid an import cycle (#166265)
This is a reland of #129135 (by dingxiangfei2009) with Vladislav
(dzhidzhoev) fix on top.
Fixes #92603
Commit: 7672a5cee12a299a083b93a6d304b27ab3f4707f
https://github.com/llvm/llvm-project/commit/7672a5cee12a299a083b93a6d304b27ab3f4707f
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/primary64.h
Log Message:
-----------
[scudo] Fix wrong return type. (#168157)
Commit: cd5d5b31bff0052be214357133ad3dd7f3f24a74
https://github.com/llvm/llvm-project/commit/cd5d5b31bff0052be214357133ad3dd7f3f24a74
Author: Dmitry Chigarev <dmitry.chigarev at intel.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[mlir][XeGPU] Use DistributeLayoutAttr instead of LayoutAttr for load gather/scatter ops (#167850)
The PR changes the layout attribute type for
`xegpu::LoadGatherOp/StoreScatterOp` from `LayoutAttr` to
`DistributeLayoutAttr` to also support `xegpu.slice` layouts.
Initially we [wanted to restrict slice
layouts](https://github.com/llvm/llvm-project/pull/163414#discussion_r2478978798)
from the attribute, but now it turns out there are actually valid use
cases for that:
```mlir
gpu.func @distribute_load_slice_attr() {
%2 = memref.alloca() {alignment = 1024} : memref<4096xf32>
%offset = arith.constant {layout_result_0 = #xegpu.layout<sg_layout = [8], sg_data = [32], inst_data = [16]> } dense<0> : vector<256xindex>
%mask = arith.constant {layout_result_0 = #xegpu.layout<sg_layout = [8], sg_data = [32], inst_data = [16]> } dense<1> : vector<256xi1>
%3 = xegpu.load %2[%offset], %mask <{chunk_size = 1, layout = #xegpu.slice<#xegpu.layout<sg_layout = [8, 8], sg_data = [32, 32], inst_data = [8, 16]>, dims = [0]>>} {
layout_result_0 = #xegpu.slice<#xegpu.layout<sg_layout = [8, 8], sg_data = [32, 32], inst_data = [8, 16]>, dims = [0]>
} : memref<4096xf32>, vector<256xindex>, vector<256xi1> -> vector<256xf32>
%4 = vector.broadcast %3 {layout_result_0 =
#xegpu.layout<sg_layout = [8, 8], sg_data = [32, 32], inst_data = [8, 16]>} : vector<256xf32> to vector<256x256xf32>
gpu.return
}
```
Signed-off-by: dchigarev <dmitry.chigarev at intel.com>
Commit: bafb3f67880d716fcc0ad14f10d8a98699591cd5
https://github.com/llvm/llvm-project/commit/bafb3f67880d716fcc0ad14f10d8a98699591cd5
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/metadata.ll
Log Message:
-----------
[LV] Add test with existing noalias metadata and runtime checks.
Add test where we have loads with existing noalias metadata and noalias
metadata gets added by loop versioning.
Commit: af6af8e4eb778acc1b655574cdf2a4086a9fdcce
https://github.com/llvm/llvm-project/commit/af6af8e4eb778acc1b655574cdf2a4086a9fdcce
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port 0a58e49c44ae7cca39b3eb219efed9f0581b8b0f (#168424)
Commit: c555522818ff3acaa928f4147546ecec81e579eb
https://github.com/llvm/llvm-project/commit/c555522818ff3acaa928f4147546ecec81e579eb
Author: John Harrison <harjohn at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/unittests/DAP/ProtocolRequestsTest.cpp
Log Message:
-----------
[lldb-dap] Migrating 'evaluate' to structured types. (#167720)
Adding structured types for the evaluate request handler.
This should be mostly a non-functional change. I did catch some spelling
mistakes in our tests ('variable' vs 'variables').
Commit: c1c22cd3e16beb3937eb0d11da014451397be5d6
https://github.com/llvm/llvm-project/commit/c1c22cd3e16beb3937eb0d11da014451397be5d6
Author: Amit Kumar Pandey <pandey.kumaramit2023 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
Log Message:
-----------
[ASan][HIP] Add ASan declarations and macros. (#167522)
This patch adds the following device ASan hooks and guarded macros in
__clang_hip_libdevice_declares.h
- Function Declarations
- __asan_poison_memory_region
- __asan_unpoison_memory_region
- __asan_address_is_poisoned
- __asan_region_is_poisoned
- Macros
- ASAN_POISON_MEMORY_REGION
- ASAN_UNPOISON_MEMORY_REGION
Commit: 69b4190d5f1b483524f2f539f373960ef8de8d84
https://github.com/llvm/llvm-project/commit/69b4190d5f1b483524f2f539f373960ef8de8d84
Author: Guy David <guyda96 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/ctlz.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/extbinopload.ll
M llvm/test/CodeGen/AArch64/load.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/sitofp-to-tbl.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-ext-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/v3f-to-int.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
Log Message:
-----------
[AArch64] Optimize extending loads of small vectors (#163064)
Reduces the total amount of loads and the amount of moves between SIMD
registers and general-purpose registers.
Commit: 21e0b56d7afc2f1af0ad5b728fcc039bfe1d37ff
https://github.com/llvm/llvm-project/commit/21e0b56d7afc2f1af0ad5b728fcc039bfe1d37ff
Author: David Green <david.green at arm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/llround-conv-fp16.ll
M llvm/test/CodeGen/AArch64/llround-conv.ll
M llvm/test/CodeGen/AArch64/lround-conv-fp16.ll
M llvm/test/CodeGen/AArch64/lround-conv.ll
Log Message:
-----------
[AArch64][GlobalISel] Add basic GISel test coverage for lround and llround. NFC
Commit: 320c18a066b29e90ab5f3ef33b6c510f28edeb80
https://github.com/llvm/llvm-project/commit/320c18a066b29e90ab5f3ef33b6c510f28edeb80
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/SystemZ/CMakeLists.txt
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
Log Message:
-----------
[SystemZ] TableGen-erate node descriptions (#168113)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
There is only one node that is missing a description -- `GET_CCMASK`,
others were successfully imported.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168113
Commit: b32c434426a181590234f65f2e32f43735bf5b5a
https://github.com/llvm/llvm-project/commit/b32c434426a181590234f65f2e32f43735bf5b5a
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
A libc/cmake/caches/armv6m-none-eabi.cmake
A libc/cmake/caches/armv7em-none-eabi.cmake
A libc/cmake/caches/armv7m-none-eabi.cmake
A libc/cmake/caches/armv8.1m.main-none-eabi.cmake
A libc/cmake/caches/armv8m.main-none-eabi.cmake
A libc/cmake/caches/baremetal_common.cmake
A libc/cmake/caches/riscv32-unknown-elf.cmake
Log Message:
-----------
[libc][Github] Perform baremetal libc builds (#167583)
Currently there are no 32 bit presubmit builds for libc. This PR
performs 32 bit build only (no test) to check any changes that land in
libc break 32 bit builds.
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 557a6b826b865cd1797ae421f59f286609b94e59
https://github.com/llvm/llvm-project/commit/557a6b826b865cd1797ae421f59f286609b94e59
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/source/Symbol/Symtab.cpp
Log Message:
-----------
[lldb][NFC] use llvm::erase_if to remove non matching types (#168279)
Commit: bac8d01a4da14802ec03907d094f3bbc68f6a5cc
https://github.com/llvm/llvm-project/commit/bac8d01a4da14802ec03907d094f3bbc68f6a5cc
Author: Pranav Kant <prka at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Fixes #165219 (#168429)
Commit: 3fb374256b2fcd3dc091612c6c18a6ad6b6bf138
https://github.com/llvm/llvm-project/commit/3fb374256b2fcd3dc091612c6c18a6ad6b6bf138
Author: Pranav Kant <prka at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix #168113 (#168434)
Commit: 4bec74a9fb82b70db0c1acfc3d1d92d8003d51fd
https://github.com/llvm/llvm-project/commit/4bec74a9fb82b70db0c1acfc3d1d92d8003d51fd
Author: Pranav Kant <prka at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix #168066 (#168435)
Commit: b00588ffb4f518605b3a1778458e38f21784b9fa
https://github.com/llvm/llvm-project/commit/b00588ffb4f518605b3a1778458e38f21784b9fa
Author: Alan Li <me at alanli.org>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
Log Message:
-----------
Fix bazel dep caused by f5b73760 (#168436)
Commit: 321b9d190b32c2c10bbd59761e34ef0305bdb954
https://github.com/llvm/llvm-project/commit/321b9d190b32c2c10bbd59761e34ef0305bdb954
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Replace VPIRMetadata::addMetadata with setMetadata. (NFC)
Replace addMetadata with setMetadata, which sets metadata, updating
existing entries or adding a new entry otherwise.
This isn't strictly needed at the moment, but will be needed for
follow-up patches.
Commit: 54c2c7cf0da21bf7d85f144aa6cb6875e2a9373a
https://github.com/llvm/llvm-project/commit/54c2c7cf0da21bf7d85f144aa6cb6875e2a9373a
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/test/API/commands/target/auto-install-main-executable/Makefile
M lldb/test/API/macosx/find-dsym/bundle-with-dot-in-filename/Makefile
M lldb/test/API/macosx/find-dsym/deep-bundle/Makefile
M lldb/test/API/macosx/posix_spawn/Makefile
Log Message:
-----------
[LLDB] Fix test compilation errors under asan (NFC) (#168408)
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/lldb-cmake-sanitized/2744/consoleText
Commit: 24c524d01423dd4b922fd4118613717a1b7e7f41
https://github.com/llvm/llvm-project/commit/24c524d01423dd4b922fd4118613717a1b7e7f41
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M libcxx/docs/VendorDocumentation.rst
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Enable compiler-rt when performing a bootstrapping build (#167065)
Otherwise, we end up using whatever system-provided compiler runtime is
available, which doesn't work on macOS since compiler-rt is located
inside the toolchain path, which can't be found by default.
However, disable the tests for compiler-rt since those are linking
against the system C++ standard library while using the just-built
libc++ headers, which is non-sensical and leads to undefined references
on macOS.
Commit: aae2b891e8b28adafde9be1ee2ddd327aa72ccfa
https://github.com/llvm/llvm-project/commit/aae2b891e8b28adafde9be1ee2ddd327aa72ccfa
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
A libcxx/test/std/input.output/file.streams/c.files/gets-removed.verify.cpp
R libcxx/test/std/input.output/file.streams/c.files/gets.compile.fail.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/array.compile.fail.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/init.compile.fail.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/int.compile.fail.cpp
A libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/temporary-objects.verify.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/vector.compile.fail.cpp
Log Message:
-----------
[libc++] Replace a few .compile.fail.cpp tests by proper clang-verify tests (#167346)
We want to eliminate all .compile.fail.cpp tests since they are brittle:
these tests pass regardless of the specific compilation error, which
means that e.g. a mising include will render the test null.
This is not an exhaustive pass, just a few tests I stumbled upon.
Commit: 7693f124ff7fbeacce66ef3012fef119b40db330
https://github.com/llvm/llvm-project/commit/7693f124ff7fbeacce66ef3012fef119b40db330
Author: Pranav Kant <prka at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix #167957 (#168441)
Commit: 0d8c29409ceeba7fc0561bae2b9d4e4e4e936cba
https://github.com/llvm/llvm-project/commit/0d8c29409ceeba7fc0561bae2b9d4e4e4e936cba
Author: Daniel Wedzicha <danielgitmail at proton.me>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/tools/llvm-objdump/OtoolOpts.td
Log Message:
-----------
Fixed typo in llvm-otool (#168395)
Commit: ed617bd78082bb569059f2f698e41cbba5317afb
https://github.com/llvm/llvm-project/commit/ed617bd78082bb569059f2f698e41cbba5317afb
Author: Pranav Kant <prka at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][buildifier] reformat changes in #168434 (#168443)
Commit: 3cba379e3d9bd2f929f5625fe38d17c34f4b7bb7
https://github.com/llvm/llvm-project/commit/3cba379e3d9bd2f929f5625fe38d17c34f4b7bb7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Populate and use VPIRMetadata from VPInstructions (NFC) (#167253)
Update VPlan to populate VPIRMetadata during VPInstruction construction
and use it when creating widened recipes, instead of constructing
VPIRMetadata from the underlying IR instruction each time.
This centralizes VPIRMetadata in VPInstructions and ensures metadata is
consistently available throughout VPlan transformations.
PR: https://github.com/llvm/llvm-project/pull/167253
Commit: 92c8c87c49100e3f14e3ec46abf47f27191f8b53
https://github.com/llvm/llvm-project/commit/92c8c87c49100e3f14e3ec46abf47f27191f8b53
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcstod.cpp
A libc/src/wchar/wcstod.h
A libc/src/wchar/wcstold.cpp
A libc/src/wchar/wcstold.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcstod_test.cpp
A libc/test/src/wchar/wcstold_test.cpp
Log Message:
-----------
[libc] Implement wcstod and wcstold. (#168020)
These are simply implemented as specializations of strtofloatingpoint
for double / long double and for wchar_t. The unit tests are copied from
the strtod / strtold ones.
Commit: 3f60d220514c4be00e548a17a85c2fa8fa89cc35
https://github.com/llvm/llvm-project/commit/3f60d220514c4be00e548a17a85c2fa8fa89cc35
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-fold-conditional.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fold the expression "cond ? E1 : E2" when checking safe patterns, if "cond" is a constant (#167989)
In `-Wunsafe-buffer-usage`, many safe pattern checks can benefit from
constant folding. This commit improves null-terminated pointer checks by
folding conditional expressions.
rdar://159374822
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 909c9aacead077b14e2bff123d09641d08939fe5
https://github.com/llvm/llvm-project/commit/909c9aacead077b14e2bff123d09641d08939fe5
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
A mlir/test/Conversion/AMDGPUToROCDL/cvt_scale_pk-gfx1250.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
Log Message:
-----------
[mlir][amdgpu] Add lowerings for ScaledExtPacked816 (#168123)
* Adds lowerings for amdgpy.scaled_ext_packed816
* updates verifiers
Commit: 7d0a2082bffb162f79fd739c79f2bf0b552b9007
https://github.com/llvm/llvm-project/commit/7d0a2082bffb162f79fd739c79f2bf0b552b9007
Author: Guy David <guyda96 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/test/CodeGen/AArch64/licm-regclass-copy.mir
Log Message:
-----------
[AArch64] Treat COPY between cross-register banks as expensive (#167661)
The motivation is to allow passes such as MachineLICM to hoist trivial
FMOV instructions out of loops, where previously it didn't do so even
when the RHS is a constant.
On most architectures, these expensive move instructions have a latency
of 2-6 cycles, and certainly not cheap as a 0-1 cycle move.
Commit: 6245a4f875700594281022de6e38fba4439f5edf
https://github.com/llvm/llvm-project/commit/6245a4f875700594281022de6e38fba4439f5edf
Author: Ben Kallus <benjamin.p.kallus.gr at dartmouth.edu>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/MC/MCParser/AsmParser.cpp
A llvm/test/MC/AsmParser/directive_base64.s
Log Message:
-----------
Add support for the .base64 directive (#165549)
Starting in version 15, GCC emits a `.base64` directive instead of
`.string` or `.ascii` for char arrays of length `>= 3`.
See [this godbolt link](https://godbolt.org/z/ebhe3oenv) for an example.
This patch adds support for the .base64 directive to AsmParser.cpp, so
tools like `llvm-mc` can process the output of GCC more effectively.
This addresses #165499.
Commit: 88b3969dfe20bd624209e44d5c8cef365d9484e0
https://github.com/llvm/llvm-project/commit/88b3969dfe20bd624209e44d5c8cef365d9484e0
Author: John Harrison <harjohn at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
Log Message:
-----------
[lldb-dap] Address a unit test race condition during initialization. (#167981)
During the initialization sequence in our tests the first 'threads'
response sould only be kept if the process is actually stopped,
otherwise we will have stale data.
In VSCode, during the debug session startup sequence immediately after
'configurationDone' a 'threads' request is made. This initial request is
to retrieve the main threads name and id so the UI can be populated.
However, in our tests we do not want to cache this value unless the
process is actually stopped. We do need to make this initial request
because lldb-dap is caching the initial thread list during
configurationDone before the process is resumed. We need to make this
call to ensure the cached initial threads are purged.
I noticed this in a CI job for another review
(https://github.com/llvm/llvm-project/actions/runs/19348261989/job/55353961798)
where the tests incorrectly failed to fetch the threads prior to
validating the thread names.
Commit: e89e359313a036131e4926ce2a9a97b06f5993ce
https://github.com/llvm/llvm-project/commit/e89e359313a036131e4926ce2a9a97b06f5993ce
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
[libc]Github] Fix typo on build_type param (#168453)
There is an extra underscore in build_type param in #167583 patch.
Fixing it in this PR.
Commit: f0f53326c735b9f2cb52f5a63312f2d0b700d6cf
https://github.com/llvm/llvm-project/commit/f0f53326c735b9f2cb52f5a63312f2d0b700d6cf
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
A mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitRoutine.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][acc] Add ACCImplicitRoutine pass for implicit `acc routine` (#168433)
This change adds the ACCImplicitRoutine pass which implements the
OpenACC specification for implicit routine directives (OpenACC 3.4 spec,
section 2.15.1).
According to the specification: "If no explicit routine directive
applies to a procedure whose definition appears in the program unit
being compiled, then the implementation applies an implicit routine
directive to that procedure if any of the following conditions holds:
The procedure is called or its address is accessed in a compute region."
The pass automatically generates `acc.routine` operations for functions
called within OpenACC compute constructs or within existing routine
functions that do not already have explicit routine directives. It
recursively applies implicit routine directives while avoiding infinite
recursion when dependencies form cycles.
Key features:
- Walks through all OpenACC compute constructs (parallel, kernels,
serial) to identify function calls
- Creates implicit `acc.routine` operations for functions without
explicit routine declarations
- Recursively processes existing `acc.routine` operations to handle
transitive dependencies
- Avoids infinite recursion through proper tracking of processed
routines
- Respects device-type specific bind clauses to skip routines bound to
different device types
Requirements:
- Function operations must implement `mlir::FunctionOpInterface` to be
identified and associated with routine directives.
- Call operations must implement `mlir::CallOpInterface` to detect
function calls and traverse the call graph.
- Optionally pre-register `acc::OpenACCSupport` if custom behavior is
needed for determining if a symbol use is valid within GPU regions (such
as functions which are already considerations for offloading even
without `acc routine` markings)
Co-authored-by: delaram-talaashrafi<dtalaashrafi at nvidia.com>
Commit: 43dacd07f660064d4023342efb067f39fafc592f
https://github.com/llvm/llvm-project/commit/43dacd07f660064d4023342efb067f39fafc592f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/PowerPC/CMakeLists.txt
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
Log Message:
-----------
[PowerPC] TableGen-erate SDNode descriptions (#168108)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
The validation functionality has detected several issues, see
`PPCSelectionDAGInfo::verifyTargetNode()`.
Most of the nodes have a description in `*.td` files and were
successfully "imported". Those that don't have a description are listed
in the enum in `PPCSelectionDAGInfo.td`. These nodes are not validated.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168108
Commit: 5cf5eb7714ea4d2a9a7775c1a054b9ea6556b78b
https://github.com/llvm/llvm-project/commit/5cf5eb7714ea4d2a9a7775c1a054b9ea6556b78b
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-fixup.ll
A llvm/test/Transforms/MemProfContextDisambiguation/fixup.ll
Log Message:
-----------
[MemProf] Fixup edges for largest N cold contexts (#167599)
We build the callsite graph by first adding nodes and edges for all
allocation contexts, then match the interior callsite nodes onto actual
calls (IR or summary), which due to inlining may result in the
generation of new nodes representing the inlined context sequence. We
attempt to update edges correctly during this process, but in the case
of recursion this becomes impossible to always get correct.
Specifically, when creating new inlined sequence nodes for stack ids on
recursive cycles we can't always update correctly, because we have lost
the original ordering of the context.
This PR introduces a mechanism, guarded by -memprof-top-n-important=
flag, to keep track of extra information for the largest N cold
contexts. Another flag -memprof-fixup-important (enabled by default)
will perform more expensive fixup of the edges for those largest N cold
contexts, by saving and walking the original ordered list of stack ids
from the context.
Commit: 7a14ef0293ba8eb6942118e560b8bb7208822291
https://github.com/llvm/llvm-project/commit/7a14ef0293ba8eb6942118e560b8bb7208822291
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/map_test.cpp
Log Message:
-----------
[scudo] Skip test if mlock fails. (#168448)
Some linux versions might not support the mlock call, so skip that part
of the test if the mlock fails.
Commit: 3bec613d88be5e9ca52230157c713f0cb80b820d
https://github.com/llvm/llvm-project/commit/3bec613d88be5e9ca52230157c713f0cb80b820d
Author: David Peixotto <peix at meta.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Add helper to create mock objects for dwarf expression tests (#167956)
This commit adds a new helper function that creates various mock objects
that can be used in dwarf expression testing. The optional register
value and memory contents are used to create MockProcessWithMemRead and
MockRegisterContext that can return expected memory contents and
register values.
This simplifies some tests by removing redundant code that creates these
objects in individual tests and consolidates the logic into one place.
Commit: b48f29356641102a52ac8aa05f007bfce719df24
https://github.com/llvm/llvm-project/commit/b48f29356641102a52ac8aa05f007bfce719df24
Author: Jeremy Furtek <jfurtek at nvidia.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/unittests/Dialect/LLVMIR/CMakeLists.txt
Log Message:
-----------
Fix build breakage (MLIR LLVM dialect requires MLIRInferIntRangeInterface) (#168440)
This MR fixes a recent build breakage by this MR:
https://github.com/llvm/llvm-project/pull/166648
(Post-merge build error here:
https://lab.llvm.org/buildbot/#/builders/138/builds/21929)
The `MLIRInferIntRangeInterface` library is now a public dependency of
`MLIRLLVMDialect`.
Commit: da61dd28c6dd77901058580e391cb8c88bb506f2
https://github.com/llvm/llvm-project/commit/da61dd28c6dd77901058580e391cb8c88bb506f2
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/include/wchar.yaml
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/mbstowcs.cpp
A libc/src/stdlib/mbstowcs.h
A libc/src/stdlib/mbtowc.cpp
A libc/src/stdlib/mbtowc.h
A libc/src/stdlib/wcstombs.cpp
A libc/src/stdlib/wcstombs.h
A libc/src/stdlib/wctomb.cpp
A libc/src/stdlib/wctomb.h
M libc/src/wchar/CMakeLists.txt
R libc/src/wchar/mbstowcs.cpp
R libc/src/wchar/mbstowcs.h
R libc/src/wchar/mbtowc.cpp
R libc/src/wchar/mbtowc.h
R libc/src/wchar/wcstombs.cpp
R libc/src/wchar/wcstombs.h
R libc/src/wchar/wctomb.cpp
R libc/src/wchar/wctomb.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mbstowcs_test.cpp
A libc/test/src/stdlib/mbtowc_test.cpp
A libc/test/src/stdlib/wcstombs_test.cpp
A libc/test/src/stdlib/wctomb_test.cpp
M libc/test/src/wchar/CMakeLists.txt
R libc/test/src/wchar/mbstowcs_test.cpp
R libc/test/src/wchar/mbtowc_test.cpp
R libc/test/src/wchar/wcstombs_test.cpp
R libc/test/src/wchar/wctomb_test.cpp
Log Message:
-----------
[libc] Move mbtowc, mbstowcs and inverse functions to stdlib.h (#168455)
These functions should be declared in `stdlib.h`, not `wchar.h`, as
confusing as it is. Move them to the proper header file and matching
directories in src/ and test/ trees.
This was discovered while testing libc++ build against llvm-libc, which
re-declares functions like mbtowc in std-namespace in `<cstdlib>`
header, and then uses those functions in its locale implementation.
Commit: 865c92be033477d07832af13342f8129614c942d
https://github.com/llvm/llvm-project/commit/865c92be033477d07832af13342f8129614c942d
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/ilist_node_base.h
Log Message:
-----------
llvm: Export `ilist_node_base` template specialization (#168094)
The core LLVM library implements a specialization for
`ilist_node_base<true, void>`, which is used by other components. This
is needed to link properly when building LLVM as a library on Windows.
This effort is tracked in #109483.
Commit: 0f0cf84dba666af56778bc163f65060585d55390
https://github.com/llvm/llvm-project/commit/0f0cf84dba666af56778bc163f65060585d55390
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn] port 900c51791979 (amdgpu SDNodeInfo)
Commit: 5f38ae4a77d42a0165070a8ad9b6ea2dbbfdfb51
https://github.com/llvm/llvm-project/commit/5f38ae4a77d42a0165070a8ad9b6ea2dbbfdfb51
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
A llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
Log Message:
-----------
[AMDGPU] update LDS block size for gfx1250 (#167614)
LDS block size should be 2048 bytes (512 dwords) based on current spec.
Commit: 26b15b761462da1ca26516310af91325ece070c1
https://github.com/llvm/llvm-project/commit/26b15b761462da1ca26516310af91325ece070c1
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
Log Message:
-----------
[gn] port 43dacd07f660064 (ppc SDNodeInfo)
Commit: 1bf902ec599e07c060370c93e23f3938c3c48cf9
https://github.com/llvm/llvm-project/commit/1bf902ec599e07c060370c93e23f3938c3c48cf9
Author: Pranav Kant <prka at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix #168108 (#168461)
Commit: 2c4bce4048c55aede9eb927a41d5be3283f0f33d
https://github.com/llvm/llvm-project/commit/2c4bce4048c55aede9eb927a41d5be3283f0f33d
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn
Log Message:
-----------
[gn] port 320c18a066b29 (systemz SDNodeInfo)
Commit: eb20b5392599996ce94e4c0392095cacaa33687c
https://github.com/llvm/llvm-project/commit/eb20b5392599996ce94e4c0392095cacaa33687c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
Revert "Reapply "[compiler-rt] Default to Lit's Internal Shell" (#168232)"
This reverts commit bde90624185ea2cead0a8d7231536e2625d78798.
This caused failures on Darwin that were not caught by upstream
buildbots. Reverting for now to give myself some time to fix.
Commit: efee326373545d6decf69a3df7c216a40cdcf2ec
https://github.com/llvm/llvm-project/commit/efee326373545d6decf69a3df7c216a40cdcf2ec
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Gracefully Fail when Job Completion Timestamp is None (#168457)
There seem to be cases where the workflow status is completed but the
jobs have not completed. We need to gracefully handle these changes to
avoid a crash loop in the metrics container.
Commit: 5ba8579312fc54f6286bab3f3232cae697c1a38c
https://github.com/llvm/llvm-project/commit/5ba8579312fc54f6286bab3f3232cae697c1a38c
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.td
A llvm/test/CodeGen/AArch64/arm64ec-indirect-call.ll
Log Message:
-----------
[Arm64EC] Preserve X9 for indirect calls. (#167782)
Arm64EC indirect calls use a function __os_arm64x_check_icall... this
has one obvious return value, x11, which is the function to call.
However, it actually returns one other important value: x9, which is the
final destination for the emulator after the call. If the call is
calling x64 code, x9 is used by the thunk.
Previously, we didn't model this, and it mostly worked because the
compiler usually doesn't modify x9 in the narrow window between the
check, and the call. That said, it can happen in some cases; one
reliable way is to do an indirect tail-call with stack protectors
enabled. (You can also just get unlucky with register allocation, but
it's harder to write a testcase for that.)
This patch uses the cfguardtarget bundle to simplify the calling
convention handling, for similar reasons that x64 uses it: modifying
arbitrary calls is difficult without a separate marking.
Fixes #167430.
Commit: be9613775084a3f0d53b64af96cecca9281d48cf
https://github.com/llvm/llvm-project/commit/be9613775084a3f0d53b64af96cecca9281d48cf
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port 1425d75c7116
Commit: ec3e5dcf8f649277f756c173e0c56ef8ab1df4cb
https://github.com/llvm/llvm-project/commit/ec3e5dcf8f649277f756c173e0c56ef8ab1df4cb
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 472e4ab0b02d
Commit: 307d7ed92e00b1169bf2691e9df497266d86ab96
https://github.com/llvm/llvm-project/commit/307d7ed92e00b1169bf2691e9df497266d86ab96
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 49d5bb0ad0cb
Commit: 186b8ba3680ed1bb381af88cdc2d757456c88822
https://github.com/llvm/llvm-project/commit/186b8ba3680ed1bb381af88cdc2d757456c88822
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lldb/bindings/lua/lua-typemaps.swig
Log Message:
-----------
[lldb] Update Lua typemap for #167764 (#168464)
Commit: f6ebb357e56402ef82881a20593580e6c982b45a
https://github.com/llvm/llvm-project/commit/f6ebb357e56402ef82881a20593580e6c982b45a
Author: Eric Christopher <echristo at gmail.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/docs/CMake.rst
Log Message:
-----------
Add documentation about CMAKE_OSX_SYSROOT (#168024)
Add documentation about CMAKE_OSX_SYSROOT so that folks bringing up on
OSX can have a clean test run.
Commit: 17f0afe40ae899d500089156b80b403e63fba71e
https://github.com/llvm/llvm-project/commit/17f0afe40ae899d500089156b80b403e63fba71e
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
R llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
M llvm/lib/ExecutionEngine/Orc/MachO.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC] Merge GetDylibInterface.h APIs into MachO.h. (#168462)
These APIs are MachO specific, and the interfaces are about to be
extended to support more MachO-specific behavior. For now it makes sense
to group them with other MachO specific APIs in MachO.h.
Commit: 5b1a4db5be788f1f1ab4ee38a40daa1597ab640d
https://github.com/llvm/llvm-project/commit/5b1a4db5be788f1f1ab4ee38a40daa1597ab640d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Remove unused function declaration. NFC (#168459)
Commit: 7c09f12108a1e13951ce8515b2fe345f946f42b4
https://github.com/llvm/llvm-project/commit/7c09f12108a1e13951ce8515b2fe345f946f42b4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 17f0afe40ae8
Commit: a5590a2aabc29f37f9c3d0ce738553e612e13e5c
https://github.com/llvm/llvm-project/commit/a5590a2aabc29f37f9c3d0ce738553e612e13e5c
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/arpa/inet.yaml
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_addr.cpp
A libc/src/arpa/inet/inet_addr.h
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_addr_test.cpp
Log Message:
-----------
[libc] implement inet_addr (#167708)
This patch adds the posix function `inet_addr`. Since most of the
parsing logic is delegated to `inet_aton`, I have only included some
basic smoke tests for testing purposes.
Commit: 4b0d42275382e4cff2c30070efd5625dae27e330
https://github.com/llvm/llvm-project/commit/4b0d42275382e4cff2c30070efd5625dae27e330
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/lib/ExecutionEngine/Orc/MachO.cpp
R llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo.tbd
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo_arm64.tbd
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo_arm64e.tbd
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_weak_link.test
Log Message:
-----------
[ORC] Support scanning "fallback" slices for interfaces. (#168472)
When scanning an interface source (dylib or TBD file), consider
"fallback" architectures (CPUType / CPUSubType pairs) in addition to the
process's CPUType / CPUSubType.
Background:
When dyld loads a dylib into a process it may load dylib or slice whose
CPU type / subtype isn't an exact match for the process's CPU type /
subtype. E.g. arm64 processes can load arm64e dylibs / slices.
When building an interface we need to follow the same logic, otherwise
we risk generating a spurious "does not contain a compatible slice"
error. E.g. If we're running an arm64 JIT'd program and loading an
interface from a TBD file, and if no arm64 slice is present in that
file, then we should fall back to looking for an arm64e slice.
rdar://164510783
Commit: d464c99f595b69d3a34b361b6a935e803c60d308
https://github.com/llvm/llvm-project/commit/d464c99f595b69d3a34b361b6a935e803c60d308
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-imageinfo.S
Log Message:
-----------
[ORC] Make tests work with Internal Shell (#168471)
This patch makes objc-imageinfo.S work with the internal shell. The test
uses a subshell to temporarily change the directory. The internal shell
does not support subshells, so this construct was replaced with a
pushd/popd sequence.
Commit: 0e3fba83da54ca9ff7ffa95942f39d223472e512
https://github.com/llvm/llvm-project/commit/0e3fba83da54ca9ff7ffa95942f39d223472e512
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
Log Message:
-----------
[RISCV] Remove Match_InvalidXSfmmVType. NFC (#168465)
It's not reachable because the custom parser will accept or fail the
whole instruction.
Commit: 3fb98e78563e421e8b023e0a5ceb0b68305c6e6d
https://github.com/llvm/llvm-project/commit/3fb98e78563e421e8b023e0a5ceb0b68305c6e6d
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libcxx/include/span
A libcxx/test/libcxx/containers/views/views.span/nodiscard.verify.cpp
Log Message:
-----------
[libc++][span] Mark functions as `[[nodiscard]]` (#168033)
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: b3c54914ef2066347370949ea30dd3fcbc4493f1
https://github.com/llvm/llvm-project/commit/b3c54914ef2066347370949ea30dd3fcbc4493f1
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-17 (Mon, 17 Nov 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll
M llvm/test/Transforms/InstCombine/icmp-shr.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
M llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll
Log Message:
-----------
InstCombine: Stop transforming EQ/NE of SHR to 0 to ULT/UGT if >1 use
This is a small code size optimization that lets us avoid both shifting
and comparing to a constant if we need the shifted value anyway. On most
architectures the zero comparison is cheaper than a constant comparison
(or free if the shift sets flags).
Although this change appears to remove the optimization entirely, we
continue to do this transform if there is one use because of the code
below the removed code that transforms the shift into an and, followed
by the PR10267 case in InstCombinerImpl::foldICmpAndConstConst that
transforms the and into a ult/ugt. Added a test case to verify this
explicitly.
Per [1] reduces clang .text size by 0.09% and dynamic instruction count
by 0.01%.
[1] https://llvm-compile-time-tracker.com/compare.php?from=1f38d49ebe96417e368a567efa4d650b8a9ac30f&to=0873787a12b8f2eab019d8211ace4bccc1807343&stat=size-text
Reviewers: nikic, dtcxzyw
Reviewed By: dtcxzyw
Pull Request: https://github.com/llvm/llvm-project/pull/168007
Commit: 35a95fe9e98f039f89c7eb0d05c0d91de643689a
https://github.com/llvm/llvm-project/commit/35a95fe9e98f039f89c7eb0d05c0d91de643689a
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/test/CodeGen/builtins-nvptx.c
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm89.ll
Log Message:
-----------
[clang][NVPTX] Fix SM requirement of f32-tf32 rna satfinite conversion (#167836)
This change fixes the SM requirement of the f32 to tf32 conversion with
`rna` rounding mode and `.satfinite` modifier. The current requirement
specified is `sm_89` but this conversion is supported from `sm_80`
onwards after it was added in PTX 8.1.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
Commit: 951ab04d6cdde7fe32e4fbe82ea5384378717765
https://github.com/llvm/llvm-project/commit/951ab04d6cdde7fe32e4fbe82ea5384378717765
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/GPUToNVVM/memref.mlir
M mlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-maxsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-minsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/alloc-host-shared.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/command-line-arg.mlir
M mlir/test/Integration/GPU/CUDA/concurrent-kernels.mlir
M mlir/test/Integration/GPU/CUDA/dump-ptx.mlir
M mlir/test/Integration/GPU/CUDA/dump-sass.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
Log Message:
-----------
[mlir][NVVM] Add no-rollback option to NVVM lowering passes (#168477)
Add pass options to run lowerings to NVVM without pattern rollback. This
makes the dialect conversions easier to debug and improves
performance/memory usage.
Commit: ea26d92c5317317464c7b37672520adbd8807054
https://github.com/llvm/llvm-project/commit/ea26d92c5317317464c7b37672520adbd8807054
Author: Garth Lei <garthlei at linux.alibaba.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Remove unused argument check (NFC) (#168313)
The index == 0 scenerio has already been handled by the early return, so
only the upper half scenerio is relevant here.
Commit: 485b3af135dca84f5c81a07cd123b40d6f52e7a6
https://github.com/llvm/llvm-project/commit/485b3af135dca84f5c81a07cd123b40d6f52e7a6
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
A llvm/test/CodeGen/RISCV/rvv/vl-opt-live-out.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV] Reduce minimum VL needed for vslidedown.vx in RISCVVLOptimizer (#168392)
Whenever #149042 is relanded we will soon start EVL tail folding
vectorized loops that have live-outs, e.g.:
```c
int f(int *x, int n) {
for (int i = 0; i < n; i++) {
int y = x[i] + 1;
x[y] = y;
}
return y;
}
```
These are vectorized by extracting the last "active lane" in the loop's
exit:
```llvm
loop:
%vl = call i32 @llvm.experimental.get.vector.length(i64 %avl, i32 4, i1 true)
...
exit:
%lastidx = sub i64 %vl, 1
%lastelt = extractelement <vscale x 4 x i32> %y, i64 %lastidx
```
Which in RISC-V translates to a vslidedown.vx with a VL of 1:
```llvm
bb.loop:
%vl:gprnox0 = PseudoVSETVLI ...
%y:vr = PseudoVADD_VI_M1 $noreg, %x, 1, AVL=-1
...
bb.exit:
%lastidx:gprnox0 = ADDI %vl, -1
%w:vr = PseudoVSLIDEDOWN_VX_M1 $noreg, %y, %lastidx, AVL=1
```
However today we will fail to reduce the VL of %y in the loop and will
end up with two extra VL toggles. The reason being that today
RISCVVLOptimizer is conservative with vslidedown.vx as it can read the
lanes of %y past its own VL. So in `getMinimumVLForUser` we say that
vslidedown.vx demands the entirety of %y.
One observation with the sequence above is that it only actually needs
to read the first %vl lanes of %y, because the last lane of vs2 used is
offset + 1. In this case, that's `%lastidx + 1 = %vl - 1 + 1 = %vl`.
This PR teaches RISCVVLOptimizer about this case in
`getMinimumVLForVSLIDEDOWN_VX`, and in doing so removes the VL toggles.
The one case that I had to think about for a bit was whenever `ADDI %vl,
-1` wraps, i.e. when %vl=0 and the resulting offset is all ones. This
should always be larger than the largest VLMAX, so vs2 will be
completely slid down and absent from the output. So we don't need to
read anything from vs2.
This patch on its own has no observable effect on llvm-test-suite or
SPEC CPU 2017 w/ rva23u64 today.
Commit: 73545337f1bf320ffc8d1938c33ed587201f0c49
https://github.com/llvm/llvm-project/commit/73545337f1bf320ffc8d1938c33ed587201f0c49
Author: woruyu <1214539920 at qq.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
A clang/test/CIR/CodeGen/builtin-fcmp-sse.c
Log Message:
-----------
[CIR] X86 vector fcmp-sse vector builtins (#167125)
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/163895.
Just add fcmp-sse part of X86 vector builtins for CIR.
---------
Co-authored-by: liuzhenya <zyliu at siorigin.com>
Commit: 886d24d03adb25f9309a60f9eb59552bb9df2587
https://github.com/llvm/llvm-project/commit/886d24d03adb25f9309a60f9eb59552bb9df2587
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Fix fallthrough to switch labels (#168484)
We need to fallthrough here in case we're not jumping to the labels.
This is only needed in expression contexts.
Commit: f15b756b56d0653181f062901916806bc5eba280
https://github.com/llvm/llvm-project/commit/f15b756b56d0653181f062901916806bc5eba280
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/MachO.cpp
Log Message:
-----------
[ORC] Remove unnecessary LLVM_ABI on function def. NFCI. (#168478)
Commit: 6886d4945f8c46b64fecf2fa6708128bcee8cadc
https://github.com/llvm/llvm-project/commit/6886d4945f8c46b64fecf2fa6708128bcee8cadc
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/test/CodeGen/RISCV/pipeline-options.ll
Log Message:
-----------
[RISCV] Add an option to enable CFIInstrInserter. (#164477)
Commit: 5327c6b57efba007350ab961899150d3fbfe5b45
https://github.com/llvm/llvm-project/commit/5327c6b57efba007350ab961899150d3fbfe5b45
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
Log Message:
-----------
[mlir][SCF] Add pass option to deactivate pattern rollback (#168481)
Add a pass option to `convert-scf-to-cf` to deactivate pattern rollback
for better performance. The lowering patterns from SCF->CF to benefit a
lot from this feature because `splitBlock` is expensive in the rollback
driver.
Commit: a61889580e5244a7a25610bc23b9a0d7f69e1200
https://github.com/llvm/llvm-project/commit/a61889580e5244a7a25610bc23b9a0d7f69e1200
Author: Michael Bedy <Michael.Bedy at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AMDGPU/invariant-load-no-alias-store.ll
Log Message:
-----------
[SLP] Invariant loads cannot have a memory dependency on stores. (#167929)
Commit: 9f6932138569a0c2267076cb17022f58f07059ab
https://github.com/llvm/llvm-project/commit/9f6932138569a0c2267076cb17022f58f07059ab
Author: John Harrison <harjohn at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
Log Message:
-----------
Improve error response message parsing for DAP evaluate requests. (#168430)
Updated the evaluate handler to check for DAP ErrorResponse bodies,
which are used to display user errors if a request fails. This was
updated in PR https://github.com/llvm/llvm-project/pull/167720
This should fix https://lab.llvm.org/buildbot/#/builders/163
Commit: ee1abb8d80691e5ef24da3273587dc789c9c6f1b
https://github.com/llvm/llvm-project/commit/ee1abb8d80691e5ef24da3273587dc789c9c6f1b
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/hip-sanitize-options.hip
Log Message:
-----------
[AMDGPU][clang] Fix clang driver check for multiple sanitizer arguments (#166851)
`-fsanitize=address,fuzzer` should be rejected like
`-fsanitize=fuzzer,address`.
The address sanitizer enables the device sanitizer pipeline. The fuzzer
implicitly turns on LLVMs SanitizerCoverage, which the driver then
forwards to the device cc1. SanitizerCoverage is not supported on
amdgcn.
Commit: 20795e06ed8b91109d5237ffb02f37245d1f781d
https://github.com/llvm/llvm-project/commit/20795e06ed8b91109d5237ffb02f37245d1f781d
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[AMDGPU][SIMemoryLegalizer] Combine GFX10-11 CacheControl Classes (#168058)
Also breaks the long inheritance chains by making both
`SIGfx10CacheControl` and
`SIGfx12CacheControl` inherit from `SICacheControl` directly.
With this patch, we now just have 3 `SICacheControl` implementations
that each
do their own thing, and there is no more code hidden 3 superclasses
above (which made this code harder to read and maintain than it needed
to be).
Commit: beb06eb884be10449b515f215c859fd432fb2635
https://github.com/llvm/llvm-project/commit/beb06eb884be10449b515f215c859fd432fb2635
Author: Katya Romanova <56653669+romanova-ekaterina at users.noreply.github.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M cross-project-tests/dtlto/dtlto-cache.test
M cross-project-tests/dtlto/dtlto-thinlto-cache.test
M llvm/test/ThinLTO/X86/dtlto/dtlto-cache.ll
Log Message:
-----------
Fixed 2 tests that failed on MacOS (#168482)
1. Fixed 2 DTLTO cache tests that failed on MacOS because input to grep
command is different compared to Windows
2. Removed unneeded comments from dtlto-cache.ll
Commit: 603ac57ef9768dc557d223f61c5e3c5cb5e50a12
https://github.com/llvm/llvm-project/commit/603ac57ef9768dc557d223f61c5e3c5cb5e50a12
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/test/CodeGen/AArch64/expand-sme-pseudos.mir
Log Message:
-----------
[AArch64][SME] Add support for zeroing ZT0 to CommitZASavePseudo (#166360)
This will be used to support ZT0 in the MachineSMEABIPass.
Commit: 7c34848ae1405127a66abf10a963d8c7748f2e51
https://github.com/llvm/llvm-project/commit/7c34848ae1405127a66abf10a963d8c7748f2e51
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/ScopedNoAliasAA.h
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
Log Message:
-----------
[VPlan] Hoist loads with invariant addresses using noalias metadata. (#166247)
This patch implements a transform to hoists single-scalar replicated
loads with invariant addresses out of the vector loop to the preheader
when scoped noalias metadata proves they cannot alias with any stores in
the loop.
This enables hosting of loads we can prove do not alias any stores in
the loop due to memory runtime checks added during vectorization.
PR: https://github.com/llvm/llvm-project/pull/166247
Commit: f369a53d823b003ece9fee1020d3780c974f1db5
https://github.com/llvm/llvm-project/commit/f369a53d823b003ece9fee1020d3780c974f1db5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/AArch64/partial-reduction-add-predicated.ll
M llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
Log Message:
-----------
[DAGCombiner] Fold select into partial.reduce.add operands. (#167857)
This generates more optimal codegen when using partial reductions with
predication.
```
partial_reduce_*mla(acc, sel(p, mul(*ext(a), *ext(b)), splat(0)), splat(1))
-> partial_reduce_*mla(acc, sel(p, a, splat(0)), b)
partial.reduce.*mla(acc, sel(p, *ext(op), splat(0)), splat(1))
-> partial.reduce.*mla(acc, sel(p, op, splat(0)), splat(trunc(1)))
```
Commit: 542d88d2a861577433ea64e99b97cbfbf1c50b8a
https://github.com/llvm/llvm-project/commit/542d88d2a861577433ea64e99b97cbfbf1c50b8a
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
Log Message:
-----------
[lldb][nfc] Fix incorrect union usage in UnwindAssemblyInstEmulation (#168341)
This is harmless due to the previous checks for > 0, but it is still
confusing for the readers.
Commit: 8603552133c832080dac6de2460ebf5d2a1f1be0
https://github.com/llvm/llvm-project/commit/8603552133c832080dac6de2460ebf5d2a1f1be0
Author: Szymon Piotr Milczek <szymon.milczek at intel.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/AsmLexer.h
M llvm/lib/MC/MCParser/AsmLexer.cpp
Log Message:
-----------
[MC] AsmLexer assert buffer is null-terminated at CurBuf.end() (#154972)
AsmLexer expects the buffer it's provided for lexing to be
NULL-terminated, where the NULL terminator is pointed to by
`CurBuf.end()`. However, this expectation isn't explicitly stated
anywhere.
This commit adds a couple of comments as well as an assert as means of
documenting this expectation.
Commit: 128caa1ba37fe7f216226d24e8d616bab2d68ee9
https://github.com/llvm/llvm-project/commit/128caa1ba37fe7f216226d24e8d616bab2d68ee9
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationDialect.cpp
M mlir/test/Dialect/Bufferization/invalid.mlir
M mlir/test/Dialect/Bufferization/ops.mlir
M mlir/test/lib/Dialect/Test/TestTypes.cpp
Log Message:
-----------
[mlir][bufferization] Refine tensor-buffer compatibility checks (#167705)
Generally, to_tensor and to_buffer already perform sufficient
verification. However, there are some unnecessarily strict constraints:
* builtin tensor requires its buffer counterpart to always be memref
* to_buffer on ranked tensor requires to always return memref
These checks are assertions (i.e. preconditions), however, they actually
prevent an apparently useful bufferization where builtin tensors could
become custom buffers. Lift these assertions, maintaining the
verification procedure unchanged, to allow builtin -> custom
bufferizations at operation boundary level.
Commit: f9256ca6cc8636347a73c028a1e30596aa27ac89
https://github.com/llvm/llvm-project/commit/f9256ca6cc8636347a73c028a1e30596aa27ac89
Author: woruyu <1214539920 at qq.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512fp16intrin.h
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512fp16-builtins.c
Log Message:
-----------
[Headers][X86] Allow AVX512 masked arithmetic ss/sd intrinsics to be used in constexpr (#162816)
This PR just resolves ss/sd part of AVX512 masked arithmetic intrinsics of #160559.
Commit: 2ea1a09244bc870499b316e8576c526a6e04b644
https://github.com/llvm/llvm-project/commit/2ea1a09244bc870499b316e8576c526a6e04b644
Author: woruyu <1214539920 at qq.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vlintrin.h
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
Log Message:
-----------
[Headers][X86] Allow AVX512 masked arithmetic pd/ps/epi/epu intrinsics to be used in constexpr (#168496)
### Summary
This PR resolves #160559 - other pd/ps/epi/epu part of AVX512 masked arithmetic intrinsics.
Commit: 672757bf556eecff11f8e6af64e8298023d4722f
https://github.com/llvm/llvm-project/commit/672757bf556eecff11f8e6af64e8298023d4722f
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
A llvm/test/CodeGen/WebAssembly/simd-extadd.ll
Log Message:
-----------
[WebAssembly] Add patterns for extadd pairwise (#167960)
Add a few patterns for extadd pairwise.
Commit: 3ce893f83450fd487710c5a319bd62b851a32291
https://github.com/llvm/llvm-project/commit/3ce893f83450fd487710c5a319bd62b851a32291
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
R llvm/include/llvm/ExecutionEngine/Orc/DebugObjectManagerPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
A llvm/include/llvm/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupport.cpp
A llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[ORC] Move DebugObjectManagerPlugin into Debugging/ELFDebugObjectPlugin (NFC) (#168343)
In 4 years the plugin wasn't adapted to other object formats. This patch
makes it specific for ELF, which will allow to remove some abstractions
down the line. It also moves the plugin from LLVMOrcJIT into
LLVMOrcDebugging, which didn't exist back then.
Commit: 49d77d87d418e6e8e1a41e5ddefe74b1848da2af
https://github.com/llvm/llvm-project/commit/49d77d87d418e6e8e1a41e5ddefe74b1848da2af
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
A llvm/test/CodeGen/X86/isel-arg-attrs.ll
Log Message:
-----------
[X86][GlobalISel] Enable nest arguments (#165173)
Nest arguments are supported by CC in X86CallingConv.td. Nothing special
is required in GlobalISel as we reuse the code.
Nest attribute is mostly generated by fortran frontend.
Commit: 88465af8d922a19d7098860339859ae484aba524
https://github.com/llvm/llvm-project/commit/88465af8d922a19d7098860339859ae484aba524
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port
Commit: 3378ea27242e0ace407c09dab3f32c17e26f4768
https://github.com/llvm/llvm-project/commit/3378ea27242e0ace407c09dab3f32c17e26f4768
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Debugging/BUILD.gn
Log Message:
-----------
[gn build] Port 3ce893f83450
Commit: 8592a65a436ff1955bf82fb4a57e1ba13708374a
https://github.com/llvm/llvm-project/commit/8592a65a436ff1955bf82fb4a57e1ba13708374a
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/test/MC/AArch64/armv9.7a-gcie-diagnostics.s
M llvm/test/MC/AArch64/armv9.7a-gcie.s
Log Message:
-----------
[AArch64][llvm] GICv5 instruction `GIC CDEOI` takes no operand (#167322)
There was a minor oversight in commit 6836261ee; the AArch64 GICv5
instruction `GIC CDEOI` takes no operands, since the text of the
specification says:
```
The Rt field should be set to 0b11111. If the Rt field is not
set to 0b11111, it is CONSTRAINED UNPREDICTABLE whether:
* The instruction is UNDEFINED.
* The instruction behaves as if the Rt field is set to 0b11111.
```
Commit: fb829bf11feeb53f815a3abf539e63ec3a23ed3d
https://github.com/llvm/llvm-project/commit/fb829bf11feeb53f815a3abf539e63ec3a23ed3d
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
Log Message:
-----------
[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)
This commit adds support for tgen05.mma family of instructions in the NVVM MLIR dialect and lowers to LLVM Intrinsics. Please refer [PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#tcgen05-mma-instructions) for information
Commit: 200793ac218735e2186e9f2850f8e74a28c36a27
https://github.com/llvm/llvm-project/commit/200793ac218735e2186e9f2850f8e74a28c36a27
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGenOpenCL/convergent.cl
M llvm/docs/LangRef.rst
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Support/ModRef.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/Support/ModRef.cpp
M llvm/test/Assembler/memory-attribute.ll
M llvm/test/Bitcode/memory-attribute-upgrade.ll
A llvm/test/TableGen/target-mem-intrinsic-attrs.td
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/read-write-scc.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/InferFunctionAttrs/norecurse_debug.ll
M llvm/test/Transforms/LowerTypeTests/cfi-nounwind-direct-call.ll
M llvm/test/Transforms/SCCP/ipscp-drop-argmemonly.ll
M llvm/unittests/Support/ModRefTest.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
Extend MemoryEffects to Support Target-Specific Memory Locations (#148650)
This patch introduces preliminary support for additional memory
locations.
They are: target_mem0 and target_mem1 and they model memory locations
that cannot be represented with existing memory locations.
It was a solution suggested in :
https://discourse.llvm.org/t/rfc-improving-fpmr-handling-for-fp8-intrinsics-in-llvm/86868/6
Currently, these locations are not yet target-specific. The goal is to
enable the compiler to express read/write effects on these resources.
Commit: 5efce7392f3f6cc41f603a8d84070f05b277010a
https://github.com/llvm/llvm-project/commit/5efce7392f3f6cc41f603a8d84070f05b277010a
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A compiler-rt/cmake/Modules/CheckAssemblerFlag.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/divsf3.S
A compiler-rt/lib/builtins/arm/fnan2.c
A compiler-rt/lib/builtins/arm/fnorm2.c
A compiler-rt/lib/builtins/arm/funder.c
A compiler-rt/lib/builtins/arm/mulsf3.S
A compiler-rt/lib/builtins/arm/thumb1/mulsf3.S
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/builtins/Unit/divsf3_test.c
A compiler-rt/test/builtins/Unit/mulsf3_test.c
Log Message:
-----------
[compiler-rt][ARM] Optimized mulsf3 and divsf3 (#168394)
(Reland of #161546, fixing three build and test issues)
This commit adds optimized assembly versions of single-precision float
multiplication and division. Both functions are implemented in a style
that can be assembled as either of Arm and Thumb2; for multiplication, a
separate implementation is provided for Thumb1. Also, extensive new
tests are added for multiplication and division.
These implementations can be removed from the build by defining the
cmake variable COMPILER_RT_ARM_OPTIMIZED_FP=OFF.
Outlying parts of the functionality which are not on the fast path, such
as NaN handling and underflow, are handled in helper functions written
in C. These can be shared between the Arm/Thumb2 and Thumb1
implementations, and also reused by other optimized assembly functions
we hope to add in future.
Commit: 2432465d99d5740bc335bcce50024878134fcc08
https://github.com/llvm/llvm-project/commit/2432465d99d5740bc335bcce50024878134fcc08
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Support isa/dyn_cast from VPRecipeBase to VPIRMetadata (NFC). (#166245)
Implement CastInfo from VPRecipeBase to VPIRMetadata to support
isa/dyn_Cast. This is similar to CastInfoVPPhiAccessors, supporting
dyn_cast by down-casting to the concrete recipe types inheriting from
VPIRMetadata.
Can be used for more generalized VPIRMetadata printing following
https://github.com/llvm/llvm-project/pull/165825.
PR: https://github.com/llvm/llvm-project/pull/166245
Commit: 27231bc28a1cedf3a8463eb455f4af639915a676
https://github.com/llvm/llvm-project/commit/27231bc28a1cedf3a8463eb455f4af639915a676
Author: Hank <49036880+hankluo6 at users.noreply.github.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
Log Message:
-----------
[MLIR][SPIRV] Lower SPIR-V Tan/Tanh ops to LLVM intrinsics (#168419)
Fixed #148354
Lower SPIR-V Tan/Tanh ops using the corresponding LLVM intrinsics to
reduce instructions and prevent overflow caused by the previous
`exp`-based expansion.
Commit: 591c463e0754fe67f77ba72c0dd2b2b2416dcdd0
https://github.com/llvm/llvm-project/commit/591c463e0754fe67f77ba72c0dd2b2b2416dcdd0
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/test/Assembler/aarch64-intrinsics-attributes.ll
A llvm/test/Transforms/LICM/AArch64/speculative-intrinsic-hoisting.ll
Log Message:
-----------
[LLVM][AArch64] Mark SVE integer intrinsics as speculatable. (#167915)
Exceptions include intrinsics that:
* take or return floating point data
* read or write FFR
* read or write memory
* read or write SME state
Commit: 76dac58c9a77d9fb78a33c832f80d40f236ecd66
https://github.com/llvm/llvm-project/commit/76dac58c9a77d9fb78a33c832f80d40f236ecd66
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A mlir/docs/Dialects/NVVM/_index.md
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[MLIR][NVVM] Move the docs to markdown file (#168375)
Commit: 4ecfaa602f56a29ea8acd3fd39cf0cf3958b4dae
https://github.com/llvm/llvm-project/commit/4ecfaa602f56a29ea8acd3fd39cf0cf3958b4dae
Author: David Green <david.green at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/llround-conv-fp16.ll
M llvm/test/CodeGen/AArch64/llround-conv.ll
M llvm/test/CodeGen/AArch64/lround-conv-fp16.ll
M llvm/test/CodeGen/AArch64/lround-conv.ll
Log Message:
-----------
[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)
This adds handling for f16 and f128 lround/llround under LP64 targets,
promoting the f16 where needed and using a libcall for f128. This
codegen is now identical to the selection dag version.
Commit: 59ed6dfe97b35a4dc88f69e3d830edf8caa99d10
https://github.com/llvm/llvm-project/commit/59ed6dfe97b35a4dc88f69e3d830edf8caa99d10
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
M llvm/test/CodeGen/AArch64/sve-fp-combine.ll
M llvm/test/CodeGen/AArch64/sve-fp-reduce-fadda.ll
M llvm/test/CodeGen/AArch64/sve-fptosi-sat.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
This helps cases where the immediate range of FDUP is not sufficient.
Commit: 22a2cae5d6735a510b17859848b14f60d2e5cdfa
https://github.com/llvm/llvm-project/commit/22a2cae5d6735a510b17859848b14f60d2e5cdfa
Author: Guillot Tony <tony.guillot at protonmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Sema/CMakeLists.txt
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/Sema/type-dependent-attrs.c
M clang/test/SemaCXX/attr-cleanup.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M llvm/docs/TableGen/BackEnds.rst
Log Message:
-----------
[Clang] Fix cleanup attribute by delaying type checks after the type is deduced (#164440)
Previously, the handling of the `cleanup` attribute had some checks
based on the type, but we were deducing the type after handling the
attribute.
This PR fixes the way the are dealing with type checks for the `cleanup`
attribute by delaying these checks after we are deducing the type.
It is also fixed in a way that the solution can be adapted for other
attributes that does some type based checks.
This is the list of C/C++ attributes that are doing type based checks
and will need to be fixed in additional PRs:
- CUDAShared
- MutualExclusions
- PassObjectSize
- InitPriority
- Sentinel
- AcquireCapability
- RequiresCapability
- LocksExcluded
- AcquireHandle
NB: Some attributes could have been missed in my shallow search.
Fixes #129631
Commit: 0be4218d7b7080fec73fe13bc759439d49159c05
https://github.com/llvm/llvm-project/commit/0be4218d7b7080fec73fe13bc759439d49159c05
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[CMake] Declare all parts of *GenRegisterInfo.inc as outputs. (#168405)
This tells the build system to check and regenerate the
*GenRegisterInfo*.inc files, should any of them be missing for
whatever reason.
A follow-up from
<https://github.com/llvm/llvm-project/pull/167700>.
Commit: 3c87119a910e95396b26c519fa90d63a59442267
https://github.com/llvm/llvm-project/commit/3c87119a910e95396b26c519fa90d63a59442267
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/TableGen/Main.h
M llvm/lib/TableGen/Main.cpp
M llvm/utils/TableGen/Basic/TableGen.cpp
Log Message:
-----------
[TableGen][NFCI] Change TableGenMain() to take function_ref. (#167888)
It was switched from a function pointer to std::function in
TableGen: Make 2nd arg MainFn of TableGenMain(argv0, MainFn) optional.
f675ec6165ab6add5e57cd43a2e9fa1a9bc21d81
but there's no mention of any particular reason for that.
Commit: 4c9020ded754707448f2d541c0b5d13a95725384
https://github.com/llvm/llvm-project/commit/4c9020ded754707448f2d541c0b5d13a95725384
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
Log Message:
-----------
[ORC] Fix shlibs build: add Object to libLLVMOrcDebugging (#168343)
Commit: 52f4c360e382e6926dccb315d4402af6211e25f0
https://github.com/llvm/llvm-project/commit/52f4c360e382e6926dccb315d4402af6211e25f0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bittest-big-integer.ll
Log Message:
-----------
[X86] combineTruncate - trunc(srl(load(p),amt)) -> load(p+amt/8) - ensure amt doesn't depend on original load chain (#168400)
Relax fix for #165755 / #165850 - it doesn't matter if the amt is dependent on the original load value, just any users of the chain
Commit: 3d5d32c6058807008e579dd5ea2faced33a7943b
https://github.com/llvm/llvm-project/commit/3d5d32c6058807008e579dd5ea2faced33a7943b
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/i128_with_overflow.ll
A llvm/test/CodeGen/AArch64/mul-i128-overflow.ll
M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
Log Message:
-----------
[CGP]: Optimize mul.overflow. (#148343)
- Detect cases where LHS & RHS values will not cause overflow
(when the Hi halfs are zero).
Commit: c61c5d29334c7ff044ba46bff17e1f3d57e230a3
https://github.com/llvm/llvm-project/commit/c61c5d29334c7ff044ba46bff17e1f3d57e230a3
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Tosa/Transforms/TosaNarrowI64ToI32.cpp
A mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
A mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
Log Message:
-----------
[mlir][tosa] Add a pass to narrow i64 to i32 (#165581)
This pass aims to narrow i64 types on TOSA operations to i32. It can be
useful for legalizations from various frameworks. It comes with the
following options:
- "aggressive-rewrite" - This option is typically able to narrow more
values, but may impact numerical behaviour if not used carefully.
- "convert-function-boundaries" - If enabled, parameters/ results
to/from a function may be narrowed. Otherwise, casts are inserted to
preserve the I/O of the function.
Currently the non aggressive mode is very limited, targeting an argmax
-> cast sequence that has been observed during legalization as well as
some data layout operations that can always narrow. Support for more
operations will be added in the future.
Co-authored-by: Vitalii Shutov <vitalii.shutov at arm.com>
Co-authored-by: Shubham <shubham at arm.com>
Co-authored-by: Declan Flavin <declan.flavin at arm.com>
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Vitalii Shutov <vitalii.shutov at arm.com>
Co-authored-by: Shubham <shubham at arm.com>
Co-authored-by: Declan Flavin <declan.flavin at arm.com>
Commit: c771159ab54ae9185c651216614715c1d28f1a74
https://github.com/llvm/llvm-project/commit/c771159ab54ae9185c651216614715c1d28f1a74
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M compiler-rt/test/rtsan/Darwin/dlopen.cpp
Log Message:
-----------
[RTSan] Fix tests under Internal Shell (#168470)
This patch fixes the only RTSan test that was broken by enabling lit's
internal shell on Darwin. This patch rewrites the test to prefix env
variables with `env` and to avoid the use of subshells.
Commit: e9f74dff138c9d31bb582efe097f326253368834
https://github.com/llvm/llvm-project/commit/e9f74dff138c9d31bb582efe097f326253368834
Author: Alan Li <me at alanli.org>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[BAZEL] Fix BAZEL build issue (#168539)
Commit: 38891bacaef474e10b87356545b10d2d1ed8fb2d
https://github.com/llvm/llvm-project/commit/38891bacaef474e10b87356545b10d2d1ed8fb2d
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][tosa] Fix shared build
Commit: 65c4a534bd55ed56962fb99c36f464b3f1c9732f
https://github.com/llvm/llvm-project/commit/65c4a534bd55ed56962fb99c36f464b3f1c9732f
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M offload/include/OpenMP/omp.h
M offload/include/omptarget.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/exports
A offload/test/api/omp_device_uid.c
M openmp/device/include/DeviceTypes.h
M openmp/device/include/Interface.h
M openmp/device/src/State.cpp
M openmp/runtime/src/dllexports
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/include/omp_lib.F90.var
M openmp/runtime/src/include/omp_lib.h.var
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_ftn_os.h
A openmp/runtime/test/api/omp_device_uid.c
Log Message:
-----------
[OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (#164392)
Use the implementation in libomptarget. If libomptarget is not
available, always return the UID / device number of the host / the
initial device.
Commit: 6fc2bc1ccc0d8f08ed794c792ec6ef145ee4ea1f
https://github.com/llvm/llvm-project/commit/6fc2bc1ccc0d8f08ed794c792ec6ef145ee4ea1f
Author: Alan Li <me at alanli.org>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[BAZEL] Fix OrcDebugging dep (#168540)
Commit: f2b5d04f2968727270a9d9368c6a4222bbebf12c
https://github.com/llvm/llvm-project/commit/f2b5d04f2968727270a9d9368c6a4222bbebf12c
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/Constant.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/Constants.cpp
A llvm/test/Transforms/InstSimplify/AArch64/aarch64-sve-reductions.ll
A llvm/test/Transforms/InstSimplify/AArch64/lit.local.cfg
Log Message:
-----------
[LLVM][InstSimplify] Add folds for SVE integer reduction intrinsics. (#167519)
[andv, eorv, orv, s/uaddv, s/umaxv, s/uminv]
sve_reduce_##(none, ?) -> op's neutral value
sve_reduce_##(any, neutral) -> op's neutral value
[andv, orv, s/umaxv, s/uminv]
sve_reduce_##(all, splat(X)) -> X
[eorv]
sve_reduce_##(all, splat(X)) -> 0
Commit: 75792d60778b34f20cd350d717baeb4ec6fadbcf
https://github.com/llvm/llvm-project/commit/75792d60778b34f20cd350d717baeb4ec6fadbcf
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libcxx/include/__config
M libcxx/include/ccomplex
M libcxx/include/ciso646
M libcxx/include/cstdalign
M libcxx/include/cstdbool
M libcxx/include/ctgmath
M libcxx/test/libcxx/transitive_includes.gen.py
M libcxx/test/std/depr/depr.cpp.headers/ccomplex.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/ciso646.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/cstdalign.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/cstdbool.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/ctgmath.verify.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/make_from_tuple.verify.cpp
M libcxx/utils/libcxx/test/format.py
Log Message:
-----------
[libc++] Fix header deprecations (#163356)
Currently, there are no diagnostics issued when including a deprecated
header, since the diagnostic is issued inside a system header. This
patch fixes that by using `#warning` instead, which also simplifies the
implementation of the deprecation warnings.
Commit: 9a0fd22da1013281d6269f19facc5d5c1be58904
https://github.com/llvm/llvm-project/commit/9a0fd22da1013281d6269f19facc5d5c1be58904
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M offload/include/OpenMP/omp.h
M offload/include/omptarget.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/exports
R offload/test/api/omp_device_uid.c
M openmp/device/include/DeviceTypes.h
M openmp/device/include/Interface.h
M openmp/device/src/State.cpp
M openmp/runtime/src/dllexports
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/include/omp_lib.F90.var
M openmp/runtime/src/include/omp_lib.h.var
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_ftn_os.h
R openmp/runtime/test/api/omp_device_uid.c
Log Message:
-----------
Revert "[OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid()" (#168547)
Reverts llvm/llvm-project#164392 due to fortran issues
Commit: 2befda2225a6c61d0308e536c19b066ab27bbf2a
https://github.com/llvm/llvm-project/commit/2befda2225a6c61d0308e536c19b066ab27bbf2a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Populate and use VPIRFlags from initial VPInstruction. (#168450)
Update VPlan to populate VPIRFlags during VPInstruction construction and
use it when creating widened recipes, instead of constructing VPIRFlags
from the underlying IR instruction each time. The VPRecipeWithIRFlags
constructor taking an underlying instruction and setting the flags based
on it has been removed.
This centralizes initial VPIRFlags creation and ensures flags are
consistently available throughout VPlan transformations and makes sure
we don't accidentally re-add flags from the underlying instruction that
already got dropped during transformations.
Follow-up to https://github.com/llvm/llvm-project/pull/167253, which did
the same for VPIRMetadata.
Should be NFC w.r.t. to the generated IR.
PR: https://github.com/llvm/llvm-project/pull/168450
Commit: 1e18b4885bb44cfe7b03990274ab9de9d94935e0
https://github.com/llvm/llvm-project/commit/1e18b4885bb44cfe7b03990274ab9de9d94935e0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
Log Message:
-----------
[DWARFCFIChecker] Remove an unused local variable (NFC) (#168487)
Note that getCurrentUnwindRow does not change any state.
Identified with unused-local-non-trivial-variable.
Commit: 4749cc407114f1e2da591491aacd0a8d3afb54e0
https://github.com/llvm/llvm-project/commit/4749cc407114f1e2da591491aacd0a8d3afb54e0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
Log Message:
-----------
[Bitcode] Use a range-based for loop (NFC) (#168489)
Identified with modernize-loop-convert.
Commit: 00ef94805a8c3ced416f8854b80452eb7d0bac2a
https://github.com/llvm/llvm-project/commit/00ef94805a8c3ced416f8854b80452eb7d0bac2a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
Log Message:
-----------
[AMDGPU] Remove const on a return type. (#168490)
While I am at it, this patch switches to the constructor that takes
a container instead of a pair of begin/end.
Identified with readability-const-return-type.
Commit: cc0c899765db2c9a2ec16ff11824a8c1055174bb
https://github.com/llvm/llvm-project/commit/cc0c899765db2c9a2ec16ff11824a8c1055174bb
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/test/CIR/CodeGen/call.c
Log Message:
-----------
[clang][CIR] Temporarily fix CIR codegen test on call. NFC
- MemoryEffectsAttr in MLIR LLVM dialect is out of sync with LLVM
itself.
Commit: 906f17566c3ad30696d5b51016acaa52e4c88ecc
https://github.com/llvm/llvm-project/commit/906f17566c3ad30696d5b51016acaa52e4c88ecc
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
Log Message:
-----------
[ELF][AArch64] Fix copy/paste error in llvm_unreachable message
Fixes: e1979aed0a15 ("Implement gd to ie relaxation for aarch64.")
Commit: 2ede6afff07ad26419f22e00967120dbfc9e5617
https://github.com/llvm/llvm-project/commit/2ede6afff07ad26419f22e00967120dbfc9e5617
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/tsan/Darwin/dlopen.cpp
M compiler-rt/test/tsan/Darwin/external-ignore-noninstrumented.cpp
M compiler-rt/test/tsan/Darwin/external.cpp
M compiler-rt/test/tsan/Darwin/malloc-stack-logging.cpp
Log Message:
-----------
[TSan] Make tests work with internal shell
This patch makes all tsan tests work with the internal shell on Darwin. Tests
were using various features not supported by the internal shell, mainly subshells
and not using env to set environment variables. This patch also fixes one of the
dynamiclib substitutions to not use a subshell.
Reviewers: ndrewh, DanBlackwell, fmayer, vitalybuka
Reviewed By: DanBlackwell
Pull Request: https://github.com/llvm/llvm-project/pull/168544
Commit: 40645ed4ed7ce853d9cc76bcc4aeabb6a83a0f2c
https://github.com/llvm/llvm-project/commit/40645ed4ed7ce853d9cc76bcc4aeabb6a83a0f2c
Author: Discookie <viktor.cseh at ericsson.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unsafe-functions.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unsafe-functions-custom.c
Log Message:
-----------
[clang-tidy] Add a fully custom message to `bugprone-unsafe-functions` (#162443)
In some cases, such as when recommending the compiler option
_FORTIFY_SOURCE, the current custom message format is clunky. Now, when
the reason starts with `>`, the replacement string is omitted., so only
the Reason is shown.
`^function$,,has a custom message;` - function 'function' has a custom
message; it should not be used
`^function$,,>has a custom message and no replacement suggestion;` -
function 'function' has a custom message and no replacement suggestion
---------
Co-authored-by: Donát Nagy <donat.nagy at ericsson.com>
Commit: 1fcfd5c67bbabe5f134ef4268c2a890f2b0cfa0f
https://github.com/llvm/llvm-project/commit/1fcfd5c67bbabe5f134ef4268c2a890f2b0cfa0f
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
Log Message:
-----------
[mlir][amdgpu] Sink op creation in scaled conversion intrinsics (NFC) (#168542)
Where possible:
* notifyMatchFailure happen first
* then op.emitOpError
* finally assertions / op creation.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: ed60cd2563ca6ee474f76487857dd5fd56b83925
https://github.com/llvm/llvm-project/commit/ed60cd2563ca6ee474f76487857dd5fd56b83925
Author: Alexander Johnston <alexander.javen.johnston at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/ddx-coarse-builtin.hlsl
A clang/test/CodeGenHLSL/builtins/ddx-coarse.hlsl
A clang/test/CodeGenHLSL/builtins/ddy-coarse-builtin.hlsl
A clang/test/CodeGenHLSL/builtins/ddy-coarse.hlsl
A clang/test/SemaHLSL/BuiltIns/ddx-coarse-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ddy-coarse-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/DirectX/ddx_coarse-errors.ll
A llvm/test/CodeGen/DirectX/ddx_coarse.ll
A llvm/test/CodeGen/DirectX/ddy_coarse-errors.ll
A llvm/test/CodeGen/DirectX/ddy_coarse.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ddx_coarse.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ddy_coarse.ll
A llvm/test/CodeGen/SPIRV/opencl/ddx_coarse-error.ll
A llvm/test/CodeGen/SPIRV/opencl/ddy_coarse-error.ll
Log Message:
-----------
[HLSL] Implement ddx/ddy_coarse intrinsics (#164831)
Closes https://github.com/llvm/llvm-project/issues/99097
Closes https://github.com/llvm/llvm-project/issues/99100
As ddx and ddy are near identical implementations I've combined them in
this PR. This aims to unblock
https://github.com/llvm/llvm-project/pull/161378
---------
Co-authored-by: Alexander Johnston <alexander.johnston at amd.com>
Commit: 61c2cc9462d4cf4a1925975e34eed7122463ef16
https://github.com/llvm/llvm-project/commit/61c2cc9462d4cf4a1925975e34eed7122463ef16
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A clang/test/Driver/linker-wrapper-hip-amdgcnspirv.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[clang][clang-linker-wrapper] Use the correct triple for clang-offload-bundler and AMD SPIR-V. (#168521)
`clang-linker-wrapper` was incorrectly calling `clang-offload-bundler`
for AMD SPIR-V. This resulted in a binary that couldn't be executed if
built using the new driver.
The runtime couldn't recognise the triple triggering this error at
execution time:
```
No compatible code objects found for: gfx90a:sramecc+:xnack-,
```
With this PR, this is solved:
```
Creating ISA for: gfx90a:sramecc+:xnack- from spirv
```
Commit: 4d093683ceab90a8df17f6887c5b21a27ed95ba6
https://github.com/llvm/llvm-project/commit/4d093683ceab90a8df17f6887c5b21a27ed95ba6
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A utils/bazel/MODULE.bazel
A utils/bazel/MODULE.bazel.lock
A utils/bazel/extensions.bzl
Log Message:
-----------
[bazel] Add MODULE.bazel (#164891)
This is a simple translation of the current WORKSPACE file.
* External repos are replaced with `bazel_dep()`. The versions have been
bumped to newer versions.
* `maybe()` doesn't seem to be a thing, so I just removed that.
* Existing repos where we define our own BUILD file in third_party_build
have *not* been replaced due to compatibility issues. For example,
`nanobind_bazel` could replace the `nanobind` config we have, but
switching to that caused some build errors.
* For these existing repos, they have been specified as module
extensions
This should have no effect since `.bazelrc` defines `common
--enable_bzlmod=false --enable_workspace`
Tested locally: `bazel test --enable_bzlmod --noenable_workspace
--config=generic_clang @llvm-project//... //...`
Commit: 47d9d735a7aef937256536af490876879c4b4731
https://github.com/llvm/llvm-project/commit/47d9d735a7aef937256536af490876879c4b4731
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/python/mlir/dialects/gpu/__init__.py
M mlir/test/python/dialects/gpu/dialect.py
Log Message:
-----------
[MLIR][Python] Add arg_attrs and res_attrs to gpu func (#168475)
I missed these attributes when I added the wrapper for GPUFuncOp in
fbdd98f74f0d.
Commit: 83d27f6c84d92b4450a62f4b650b9cfadc0dab0f
https://github.com/llvm/llvm-project/commit/83d27f6c84d92b4450a62f4b650b9cfadc0dab0f
Author: Nabeel Omer <nabeel.omer at sony.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
A clang/test/Driver/crash-ir-repro.cpp
Log Message:
-----------
[Clang][Driver] Create crash reproducers for IR inputs (#165572)
This patch makes Clang produce the crash reproducer shell script for IR
inputs as well.
Commit: a1e47cefa913d53e55d924a6326697f3fe5d1206
https://github.com/llvm/llvm-project/commit/a1e47cefa913d53e55d924a6326697f3fe5d1206
Author: Emil Tsalapatis <aimilios.tsalapatis at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
Log Message:
-----------
[llvm][AddressSanitizer] option for specifying the address space of the shadow map (#167772)
The AddressSanitizer transform currently defaults to placing the shadow
map in address space 0, but it is desirable for some targets (namely
BPF) to select a different address space for the map. Add a compilation
option for specifying the address space of the target.
Commit: 82a7832de27aad8f681773875b081013c2c0c9dd
https://github.com/llvm/llvm-project/commit/82a7832de27aad8f681773875b081013c2c0c9dd
Author: Emil Tsalapatis <aimilios.tsalapatis at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
Log Message:
-----------
[llvm][AddressSanitizer][BPF] add default shadow mapping offset for BPF target (#167768)
The AddressSanitizer transform does not have a default offset registered
for the shadow map. Set the default shadow map offset for BPF be
dynamically set by the KASAN implementation.
Commit: 1347b23cd6510a4149665616433e8505bb6fc6bc
https://github.com/llvm/llvm-project/commit/1347b23cd6510a4149665616433e8505bb6fc6bc
Author: Emil Tsalapatis <aimilios.tsalapatis at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
Log Message:
-----------
[clang][BPF] Turn on AddressSanitizer pass (#167766)
The BPF LLVM target currently doesn't support turning on the
AddressSanitizer pass, either for userspace ASAN or KASAN. Enable the
KASAN option for the BPF target in anticipation of a KASAN
implementation for BPF.
Commit: 7aeb2646bff41973f03d4a928ecd7be6ca4a019e
https://github.com/llvm/llvm-project/commit/7aeb2646bff41973f03d4a928ecd7be6ca4a019e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/atos-symbolizer-dyld-root-path.cpp
M compiler-rt/test/asan/TestCases/Darwin/atos-symbolizer.cpp
M compiler-rt/test/asan/TestCases/Darwin/dyld_insert_libraries_reexec.cpp
M compiler-rt/test/asan/TestCases/Darwin/dyld_insert_libraries_remove.cpp
M compiler-rt/test/asan/TestCases/Darwin/init_for_dlopen.cpp
M compiler-rt/test/asan/TestCases/Darwin/malloc_zone-protected.cpp
M compiler-rt/test/asan_abi/TestCases/Darwin/llvm_interface_symbols.cpp
Log Message:
-----------
[ASan] Make most tests run under internal shell on Darwin
This patch fixes most of the ASan tests that were failing on Darwin when
running under the internal shell. There are still a couple left that
are more interesting cases that I'll do in a follow up patch. The
tests that still need to be done:
```
TestCases/Darwin/duplicate_os_log_reports.cpp
TestCases/Darwin/dyld_insert_libraries_reexec.cpp
TestCases/Darwin/interface_symbols_darwin.cpp
```
Reviewers: thetruestblue, fhahn, vitalybuka, DanBlackwell, ndrewh
Reviewed By: DanBlackwell
Pull Request: https://github.com/llvm/llvm-project/pull/168545
Commit: 38c1a58605e8347afd05e31360d3bfd5c4c19ced
https://github.com/llvm/llvm-project/commit/38c1a58605e8347afd05e31360d3bfd5c4c19ced
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M flang/test/Lower/PowerPC/ppc-vec-load-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-store.f90
M flang/test/Lower/allocatable-assignment.f90
M flang/test/Lower/allocatable-globals.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocated.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/array-elemental-calls.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/array-substring.f90
M flang/test/Lower/array-wide-char.f90
M flang/test/Lower/array.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/forall-2.f90
M flang/test/Lower/forall/forall-ranked.f90
M flang/test/Lower/forall/forall-where-2.f90
M flang/test/Lower/forall/forall-where.f90
Log Message:
-----------
[flang][NFC] Strip trailing whitespace from tests (6 of N)
Only the fortran source files in flang/test/Lower/PowerPC and some in
flang/test/Lower have been modified. The other files in the directory
will be cleaned up in subsequent commits
Commit: 67d5c14ad66f022d689cbcb0709df690938e5b6d
https://github.com/llvm/llvm-project/commit/67d5c14ad66f022d689cbcb0709df690938e5b6d
Author: Emil Tsalapatis <aimilios.tsalapatis at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
Log Message:
-----------
[llvm][AddressSanitizer] option for applying AddressSanitizer to specific address spaces (#167770)
For some backends, e.g., BPF, it is desirable to only sanitize memory
belonging to specific address spaces. More specifically, it is sometimes
desirable to only apply address sanitization for arena memory belonging
to address space 1. However, AddressSanitizer currently does not support
selectively sanitizing address spaces. Add a new option to select which
address spaces to apply AddressSanitizer to.
No functional change for existing targets (namely AMD GPU) that hardcode
which address spaces to sanitize
Commit: 1fb8e3d76e87a6c6f0d8fc7aa4e7ed75e3641fee
https://github.com/llvm/llvm-project/commit/1fb8e3d76e87a6c6f0d8fc7aa4e7ed75e3641fee
Author: Matej Košík <m4tej.kosik at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/source/Utility/DataExtractor.cpp
M lldb/source/Utility/RegisterValue.cpp
M lldb/unittests/Utility/RegisterValueTest.cpp
Log Message:
-----------
[lldb] Support integer registers with more than 64 bits. (#166363)
In this PR we are proposing to change LLDB codebase so that LLDB is able
to print values of integer registers that have more than 64-bits (even
if the number of bits is not equal to 128).
---------
Co-authored-by: Matej Košík <matej.kosik at codasip.com>
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 93a8ca8fc738379333242ee51d9e080fbb283c6e
https://github.com/llvm/llvm-project/commit/93a8ca8fc738379333242ee51d9e080fbb283c6e
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-copy-vector-crash.ll
Log Message:
-----------
[AArch64][GISel] Don't crash in known-bits when copying from vectors to non-vectors (#168081)
Updates the demanded elements before recursing through copies in case
the type of the source register changes from a non-vector register to a
vector register.
Fixes #167842.
Commit: 2675dcd72d02ee1ac2472b7d2914bfe601ff33d4
https://github.com/llvm/llvm-project/commit/2675dcd72d02ee1ac2472b7d2914bfe601ff33d4
Author: Chad Smith <cssmith at meta.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
R lldb/test/Shell/lldb-server/TestErrorMessages.test
A lldb/test/Shell/lldb-server/TestGdbserverErrorMessages.test
A lldb/test/Shell/lldb-server/TestPlatformErrorMessages.test
A lldb/test/Shell/lldb-server/TestPlatformHelp.test
M lldb/tools/lldb-server/CMakeLists.txt
A lldb/tools/lldb-server/PlatformOptions.td
M lldb/tools/lldb-server/lldb-platform.cpp
Log Message:
-----------
[lldb] update lldb-server platform help parsing (attempt 3) (#164904)
* original change #162730
* with windows fix #164843
* remove timeout that was pointed out in the comment above
* Remove test that starts and listens on a socket to avoid timeout
issues
Commit: c7d2ed43648ebd9076ee290928d7bc805906882d
https://github.com/llvm/llvm-project/commit/c7d2ed43648ebd9076ee290928d7bc805906882d
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Support/Parallel.cpp
M llvm/unittests/Support/JobserverTest.cpp
Log Message:
-----------
Reland [Support][Jobserver][Tests] Simplify default executor init (#168165)
and make (#165264)
Truely recover Executor::getDefaultExecutor. The previous change missed
std::unique_ptr, which is needed in a normal program exit, since only
with that ThreadPoolExecutor destructor will be called in a normal
program exit, where it ensures the executor has been stopped and waits
for worker threads to finish. The wait is important as it prevents
intermittent crashes on Windows when the process is doing a full exit.
Commit: 727ee7e2f169ec60797004dfb9b29ef7ea7cc47a
https://github.com/llvm/llvm-project/commit/727ee7e2f169ec60797004dfb9b29ef7ea7cc47a
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
M llvm/lib/Support/APInt.cpp
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[APInt] Introduce carry-less multiply primitives (#168527)
In line with a std proposal to introduce std::clmul, and in preparation
to introduce a clmul intrinsic, implement carry-less multiply primitives
for APIntOps, clmul[rh].
Ref: https://isocpp.org/files/papers/P3642R3.html
Commit: cb5812982d96e4c6a07ab77dfa969192d201bd20
https://github.com/llvm/llvm-project/commit/cb5812982d96e4c6a07ab77dfa969192d201bd20
Author: vangthao95 <vang.thao at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add RegBankLegalize support for G_IS_FPCLASS (#167575)
Commit: 6d3971d97f362c02a0dd3f148b6e82f61810d025
https://github.com/llvm/llvm-project/commit/6d3971d97f362c02a0dd3f148b6e82f61810d025
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
Log Message:
-----------
[AsmParser] Use a range-based for loop (NFC) (#168488)
Identified with modernize-loop-convert.
Commit: 58cffea94a31e52d6492ce7103e04c6b073dee16
https://github.com/llvm/llvm-project/commit/58cffea94a31e52d6492ce7103e04c6b073dee16
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/canonicalize-const-to-bop.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
Log Message:
-----------
[InstCombine] Canonicalize signed saturated additions (#153053)
https://alive2.llvm.org/ce/z/YGT5SN
https://alive2.llvm.org/ce/z/PVDxCw
https://alive2.llvm.org/ce/z/8buR2N
This is tricky because with positive numbers, we only go up, so we can
in fact always hit the signed_max boundary. This is important because
the intrinsic we use has the behavior of going the OTHER way, aka clamp
to INT_MIN if it goes in that direction.
And the range checking we do only works for positive numbers.
Because of this issue, we can only do this for constants as well.
Commit: b53371210fcf1f23d1f87e5727fdf1e9aefa674f
https://github.com/llvm/llvm-project/commit/b53371210fcf1f23d1f87e5727fdf1e9aefa674f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Only run normal check targets if requested (#168412)
When building just the runtimes (eg a patch only touches compiler-rt),
we do not actually run any normal check targets. This ends up causing an
empty ninja invocation, which builds more targets than necessary. Gate
the ninja build for normal check-* targets under an if statement to fix
this.
Commit: 94e9bfb80365de0c9c71303418b33ceb767f7cf9
https://github.com/llvm/llvm-project/commit/94e9bfb80365de0c9c71303418b33ceb767f7cf9
Author: Marius Kamp <msk at posteo.org>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/ccmp-cse.ll
Log Message:
-----------
[AArch64] Reorder Comparison Trees to Facilitate CSE (#168064)
The AArch64 backend converts trees formed by conjunctions/disjunctions
of comparisons into sequences of `CCMP` instructions. The implementation
before this change checks whether a sub-tree must be processed first. If
not, it processes the operations in the order they occur in the DAG.
This may not be optimal if there is a corresponding `SUB` node for one
of the comparisons. In this case, we should process this comparison
first because we can then use the same instruction for the `SUB` node
and the comparison.
To achieve this, this commit comprises the following changes:
- Extend `canEmitConjunction` with a new output parameter `PreferFirst`,
which reports to the caller whether the sub-tree should preferably be
processed first.
- Set `PreferFirst` to `true` if we can find a corresponding `SUB` node
in the DAG.
- If we can process a sub-tree with `PreferFirst = true` first (i.e., we
do not violate any `MustBeFirst` constraint by doing so), we swap the
sub-trees.
- The already existing code for performing the common subexpression
elimination takes care to use only a single instruction for the
comparison and the `SUB` node if possible.
Closes #149685.
Commit: 3cf1f0c127bcc11185a5f8f6a295ce678827b923
https://github.com/llvm/llvm-project/commit/3cf1f0c127bcc11185a5f8f6a295ce678827b923
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMInstrThumb2.td
Log Message:
-----------
[ARM] Pattern match Low Overhead Loops pseudos (NFC) (#168209)
Pull Request: https://github.com/llvm/llvm-project/pull/168209
Commit: 0b82415c59c57c40beb072a716675293e7007a65
https://github.com/llvm/llvm-project/commit/0b82415c59c57c40beb072a716675293e7007a65
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/lds-branch-vmem-hazard.mir
Log Message:
-----------
[AMDGPU] Consider FLAT instructions for VMEM hazard detection (#137170)
In general, "Flat instructions look at the per-workitem address and
determine for each work item if the target memory address is in global,
private or scratch memory." (RDNA2 ISA) That means that FLAT
instructions need to be considered for VMEM hazards even without
"specific segment". Also, LDS DMA should be considered for LDS hazard
detection.
See also #137148
Commit: c88ae6eb21201ee3c699a76ba424cbe42ae2e7b1
https://github.com/llvm/llvm-project/commit/c88ae6eb21201ee3c699a76ba424cbe42ae2e7b1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Move two utilities from Semantics to Parser, NFC (#168549)
Move `GetInnermostExecPart` and `IsStrictlyStructuredBlock` from
Semantics/openmp-utils.* to Parser/openmp-utils.*. These two only depend
on the AST contents and properties.
Commit: bd8c94177537ba30c6a160afa6dd1b8b8fc1e813
https://github.com/llvm/llvm-project/commit/bd8c94177537ba30c6a160afa6dd1b8b8fc1e813
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
Log Message:
-----------
Reapply "[Github] Update PR labeller to v6.0.1 (#167246)"
This reverts commit b3d62645158cd6f463f2e1c878f6d63b9dc4b164.
This broke the workflow because the sync-labels flag was set to a
zero-length string to work around an issue. The underlying issue has
been fixed and the value is now required to be a boolean. We can just
drop the value because we want the default behavior anyways. This should
be the last remaining breaking change from v5 that we need to migrate.
Commit: d772663a9f003a08ee76414397963c58e80b27d7
https://github.com/llvm/llvm-project/commit/d772663a9f003a08ee76414397963c58e80b27d7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
Log Message:
-----------
Revert "[Github] Update PR labeller to v6.0.1 (#167246)"
This reverts commit bd8c94177537ba30c6a160afa6dd1b8b8fc1e813.
This still broke things and evidently needs more testing on a fork
before relanding.
https://github.com/llvm/llvm-project/actions/runs/19475911086
Commit: 5af03989cc01e7bf9a45240d86411e9eee5b0e8b
https://github.com/llvm/llvm-project/commit/5af03989cc01e7bf9a45240d86411e9eee5b0e8b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
Log Message:
-----------
[X86] Add test examples of build vectors of reversed scalar loads that could be converted to vector loads plus shuffles (#168571)
This is turning up in some legalisation code when shuffling vectors bitcast from illegal loads.
Ideally we'd handle more complex shuffles, but reverse is a start.
Commit: 5407e62611abfbb359f595d89d9f29adf647be02
https://github.com/llvm/llvm-project/commit/5407e62611abfbb359f595d89d9f29adf647be02
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
Log Message:
-----------
Revert "[MLIR][NVVM] Add tcgen05.mma MLIR Ops" (#168583)
Reverts llvm/llvm-project#164356
The bots are broken.
Commit: 8bdd82ce1dd9c7da647b270b3a58eb36641e8e34
https://github.com/llvm/llvm-project/commit/8bdd82ce1dd9c7da647b270b3a58eb36641e8e34
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .ci/premerge_advisor_explain.py
M .ci/premerge_advisor_upload.py
Log Message:
-----------
[CI] Skip Running Premerge Advisor on AArch64 (#168404)
They were still running because the conditional was not correct. This
patch fixes that so they do not interefere with the results of the job.
Commit: 40ed57c5054615d172f266dddb7b1ef5abf9b402
https://github.com/llvm/llvm-project/commit/40ed57c5054615d172f266dddb7b1ef5abf9b402
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .ci/utils.sh
Log Message:
-----------
[CI] Prefer Bash Tests over Empty String Comparisons (#168575)
These are more idiomatic in bash.
Commit: 0ae2bccde4593b456bb7a13264a885e7dda0e80a
https://github.com/llvm/llvm-project/commit/0ae2bccde4593b456bb7a13264a885e7dda0e80a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/ARM/CMakeLists.txt
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
Log Message:
-----------
[ARM] TableGen-erate node descriptions (#168212)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
Some nodes fail validation, those are enumerated in
`ARMSelectionDAGInfo::verifyTargetNode()`. Some of the bugs are easy to
fix, but probably they should be fixed separately, this patch is already big.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168212
Commit: 523bd2df6d1542e92ed70d7c6baec74dbe181699
https://github.com/llvm/llvm-project/commit/523bd2df6d1542e92ed70d7c6baec74dbe181699
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
Log Message:
-----------
[GISel][RISCV] Compute CTPOP of small odd-sized integer correctly (#168559)
Fixes the assertion in #168523
This patch lifts the small, odd-sized integer to 8 bits, ensuring that
the following lowering code behaves correctly.
Commit: 46565f32d8d70f5eb9aa3aa4fba15fbd19912ccb
https://github.com/llvm/llvm-project/commit/46565f32d8d70f5eb9aa3aa4fba15fbd19912ccb
Author: Dan Liew <dan at su-root.co.uk>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lldb/include/lldb/Utility/LLDBLog.h
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Utility/LLDBLog.cpp
Log Message:
-----------
[LLDB] Add log channel for InstrumentationRuntime plugins (#168508)
This patch adds `LLDBLog::InstrumentationRuntime` as a log channel to
provide an appropriate channel for instrumentation runtime plugins as
previously one did not exist.
A small use of the channel is added to illustrate its use. The logging
added is not intended to be comprehensive.
This is primarily motivated by an `-fbounds-safety` instrumentation
plugin (https://github.com/swiftlang/llvm-project/pull/11835).
rdar://164920875
Commit: 3f614026f9a5af9409acac225516c868e927ac7a
https://github.com/llvm/llvm-project/commit/3f614026f9a5af9409acac225516c868e927ac7a
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A clang/test/ClangScanDeps/module-in-stable-dir-by-name.c
Log Message:
-----------
[clang][DependencyScanning] Add Test Coverage of `StabeDirs` during By-Name Lookups (#168143)
This PR adds some test coverage for `StableDirs` during by-name lookups.
Commit: 8f67759585f7bd25cfebf2224680b131ffe5425b
https://github.com/llvm/llvm-project/commit/8f67759585f7bd25cfebf2224680b131ffe5425b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
Log Message:
-----------
[NFC][TableGen] Remove `close` member from various CodeGenHelpers (#167904)
Always rely on local scopes to enforce the lifetime of these helper
objects and by extension where the "closing" of various C++ code
constructs happens.
Commit: 4ab24235cbebee68a9cba4a5caba3325542b64b9
https://github.com/llvm/llvm-project/commit/4ab24235cbebee68a9cba4a5caba3325542b64b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[ConstantFolding] Generalize constant folding for vector_interleave2 to interleave3-8. (#168473)
Commit: 96e58b83a3aa681cbf5b8288c3012d5d5d20398c
https://github.com/llvm/llvm-project/commit/96e58b83a3aa681cbf5b8288c3012d5d5d20398c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
Log Message:
-----------
[RISCV] Legalize misaligned unmasked vp.load/vp.store to vle8/vse8. (#167745)
If vector-unaligned-mem support is not enabled, we should not generate
loads/stores that are not aligned to their element size.
We already do this for non-VP vector loads/stores.
This code has been in our downstream for about a year and a half after
finding the vectorizer generating misaligned loads/stores. I don't think
that is unique to our downstream.
Doing this for masked vp.load/store requires widening the mask as well
which is harder to do.
NOTE: Because we have to scale the VL, this will introduce additional
vsetvli and the VL optimizer will not be effective at optimizing any
arithmetic that is consumed by the store.
Commit: 0dd3cb55e2bc93586d15920d5ccd0437c0c6f3ee
https://github.com/llvm/llvm-project/commit/0dd3cb55e2bc93586d15920d5ccd0437c0c6f3ee
Author: Shubham Sandeep Rastogi <Shubham.Rastogi at sony.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
Log Message:
-----------
Reland instr-ref-target-hooks-sp-clobber.mir (#168136)
This test was failing on chromium builds with error:
```
/Volumes/Work/s/w/ir/x/w/llvm_build/bin/llc -o - /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir -run-pass=livedebugvalues | /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir # RUN: at line 8
+ /Volumes/Work/s/w/ir/x/w/llvm_build/bin/llc -o - /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir -run-pass=livedebugvalues
+ /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
error: YAML:121:3: unknown key 'stackSizePPR'
stackSizePPR: 0
^~~~~~~~~~~~
FileCheck error: '<stdin>' is empty.
FileCheck command line: /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
```
This is an attempt to reland the failing test
Commit: b630721d543091821fec1c631285573763370e83
https://github.com/llvm/llvm-project/commit/b630721d543091821fec1c631285573763370e83
Author: Pranav Kant <prka at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Fix #164904 (#168593)
Commit: e93763e7909b746136c88caf77572d937b8f2af8
https://github.com/llvm/llvm-project/commit/e93763e7909b746136c88caf77572d937b8f2af8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/tools/dsymutil/Options.td
Log Message:
-----------
[dsymutil] Specify that -flat is for testing in the help output (#168590)
Gently discourage users from relying on -flat by specifying in the help
output that it's meant for testing.
Commit: 2ad93b4775cf8524bc775e871f2224f30ef92947
https://github.com/llvm/llvm-project/commit/2ad93b4775cf8524bc775e871f2224f30ef92947
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] getRoundingModeX86 - add missing "clang-format on" toggle comment (#168588)
This was preventing later code to be formatted
Commit: ac6e48de40ec8be78d407072479cdbf7aa35535d
https://github.com/llvm/llvm-project/commit/ac6e48de40ec8be78d407072479cdbf7aa35535d
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/DWP/DWP.h
M llvm/include/llvm/DWP/DWPStringPool.h
M llvm/lib/DWP/DWP.cpp
A llvm/test/tools/llvm-dwp/X86/dwarf64-str-offsets.test
M llvm/tools/llvm-dwp/Opts.td
M llvm/tools/llvm-dwp/llvm-dwp.cpp
Log Message:
-----------
Modify llvm-dwp to be able to emit string tables over 4GB without losing data (#167457)
We can change llvm-dwp to emit DWARF64 version of the .debug_str_offsets
tables for .dwo files in a .dwp file. This allows the string table to
exceed 4GB without truncating string offsets into the .debug_str section
and losing data. llvm-dwp will append all strings to the .debug_str
section for a .dwo file, and if any of the new string offsets exceed
UINT32_MAX, it will upgrade the .debug_str_offsets table to a DWARF64
header and then each string offset in that table can now have a 64 bit
offset.
Fixed LLDB to be able to successfully load the 64 bit string tables in
.dwp files.
Fixed llvm-dwarfdump and LLVM DWARF parsing code to do the right thing
with DWARF64 string table headers.
Commit: 58b8e6e4241ba71c8ffeef4578f1bebb9cec9db9
https://github.com/llvm/llvm-project/commit/58b8e6e4241ba71c8ffeef4578f1bebb9cec9db9
Author: Laxman Sole <lsole at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/diderivedtype-extradata-tuple.ll
Log Message:
-----------
[DebugInfo][IR] Verifier checks for the extraData (#167971)
LLVM IR verifier checks for `extraData` in debug info metadata.
This is a follow-up PR based on discussions in #165023
Commit: 04a1fd5c5434d47cac7488d777d9a1b472cb71f8
https://github.com/llvm/llvm-project/commit/04a1fd5c5434d47cac7488d777d9a1b472cb71f8
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
Log Message:
-----------
[RISCV] Make XFAIL test UNSUPPORTED. (#168525)
Currently the test cfi-multiple-location.mir is marked as XFAIL. This
causes failures on some build bots because the test unexpectedly passes.
Mark this test as UNSUPPORTED for now. Later I plan to merge an MR which
fixes an issue in CFIInstrInserter and this test will be enabled.
Commit: 576e1affab35cff50a7b3beded51c752f1ea2940
https://github.com/llvm/llvm-project/commit/576e1affab35cff50a7b3beded51c752f1ea2940
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[NFC][AMDGPU] IGLP: Fixes for unsigned int handling (#135090)
Fixes unsigned int underflows in
`MFMASmallGemmSingleWaveOpt::applyIGLPStrategy`.
Commit: 124fa5ce5f211dff6dbdc5f433a445386ac2c26b
https://github.com/llvm/llvm-project/commit/124fa5ce5f211dff6dbdc5f433a445386ac2c26b
Author: Pawan Nirpal <pnirpal at qti.qualcomm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
A llvm/test/Transforms/VectorCombine/AArch64/identity-shuffle-sve.ll
Log Message:
-----------
[AArch64] - Improve costing for Identity shuffles for SVE targets. (#165375)
Identity masks can be treated as free when scalable vectorization is
possible making the check agnostic of the vectorization policy
fixed/scalable, This allows for aggressive vector combines for identity
shuffle masks.
Commit: 4155cdc0f1bac39bad35ac390da4170c0482812f
https://github.com/llvm/llvm-project/commit/4155cdc0f1bac39bad35ac390da4170c0482812f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
Log Message:
-----------
Mips: Remove manual libcall name search and table (#168595)
This should really check if the libcall is known supported.
For now mips doesn't configure its RuntimeLibcallsInfo
correctly, and does not have any of the mips16 calls in it.
For now there isn't a way to add them without triggering conflicting
cases in tablegen, so keep parsing the raw name as it was before.
Commit: 8aca6c39e2b4ccf4d739c6450ca012d920de8e45
https://github.com/llvm/llvm-project/commit/8aca6c39e2b4ccf4d739c6450ca012d920de8e45
Author: Marco Elver <elver at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/test/Driver/fsanitize-alloc-token.c
Log Message:
-----------
[AllocToken] Test compatibility with -fsanitize=kcfi,memtag (#168600)
Test that -fsanitize=alloc-token is compatible with kcfi and memtag, as
these should also be possible to combine.
NFC.
Commit: e1bb50b2845379ef696b26e78aba0f62a3e61fb1
https://github.com/llvm/llvm-project/commit/e1bb50b2845379ef696b26e78aba0f62a3e61fb1
Author: Pranav Kant <prka at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] fix #168212 (#168598)
Commit: 56b1d42a65653b23ec9fb96d3cac13d54b4b32ba
https://github.com/llvm/llvm-project/commit/56b1d42a65653b23ec9fb96d3cac13d54b4b32ba
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/constant-inits.cpp
A clang/test/CIR/CodeGen/global-constant.c
M clang/test/CIR/CodeGen/record-zero-init-padding.c
M clang/test/CIR/CodeGen/vtt.cpp
Log Message:
-----------
[CIR] Mark globals as constants (#168463)
We previously added support for marking GlobalOp operations as constant,
but the handling to actually do so was left mostly unimplemented. This
fills in the missing pieces.
Commit: 1157a2213445199169f1f5bbe6edf8839f440498
https://github.com/llvm/llvm-project/commit/1157a2213445199169f1f5bbe6edf8839f440498
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Log Message:
-----------
[GISel] Use getScalarSizeInBits in LegalizerHelper::lowerBitCount (#168584)
For vectors, CTLZ, CTTZ, CTPOP all operate on individual elements. The
lowering should be based on the element width.
I noticed this by inspection. No tests in tree are currently affected,
but I thought it would be good to fix so someone doesn't have to debug
it in the future.
Commit: 3e8dc4dc4d04fe4c42f139423a61802b1ba719fc
https://github.com/llvm/llvm-project/commit/3e8dc4dc4d04fe4c42f139423a61802b1ba719fc
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
Log Message:
-----------
[clang][deps] NFC: Use qualified names for function definitions (#168586)
The compiler doesn't emit a diagnostics when the signature of a function
defined in a namespace gets out-of-sync with its declaration. Let's use
qualified names for function definitions instead of nesting them in a
namespace so that mismatches are diagnosed by the compiler rather than
by the (less understandable) linker.
Commit: d3c2973da0466408aa9cfe1081cd08125a3491a1
https://github.com/llvm/llvm-project/commit/d3c2973da0466408aa9cfe1081cd08125a3491a1
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
Log Message:
-----------
[lldb/aarch64] Add STR/LDR instructions for FP registers to Emulator (#168187)
A function prologue can begin with a pre-index STR instruction for a
floating-point register. To construct an unwind plan from assembly
correctly, the instruction emulator must support such instructions.
Commit: 507f236f5ee5d153300d303fbb74389c1a2eebf4
https://github.com/llvm/llvm-project/commit/507f236f5ee5d153300d303fbb74389c1a2eebf4
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
A llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
Log Message:
-----------
[VPlan] Fix OpType-mismatch in getFlagsFromIndDesc (#168560)
Follow up on a cse OpType-mismatch crash reported due to ef023cae388d
(Reland [VPlan] Expand WidenInt inductions with nuw/nsw), setting the
OpType correctly when returning from getFlagsFromIndDesc.
Commit: 8fce476c81225c5e74866020eff5cba81a272b33
https://github.com/llvm/llvm-project/commit/8fce476c81225c5e74866020eff5cba81a272b33
Author: Sean Perry <perry at ca.ibm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M llvm/CMakeLists.txt
R llvm/include/llvm/Support/SystemZ/zOSSupport.h
A llvm/include/llvm/Support/SystemZ/zos_wrappers/string.h
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Unix/Program.inc
A llvm/lib/Support/zOSLibFunctions.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/Error.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.cpp
M llvm/tools/obj2yaml/macho2yaml.cpp
Log Message:
-----------
Implement a more seamless way to provide missing functions on z/OS (#167703)
In this PR I'm changing the way we provide the missing functions like
strnlen() on z/OS from the separate header file to a wrapper around the
system headers that declare these functions. This will be less
intrusive.
---------
Co-authored-by: Zibi Sarbinowski <zibi at ca.ibm.com>
Commit: 31ec633a0edaeca4d68f7f04269223a4c29396c5
https://github.com/llvm/llvm-project/commit/31ec633a0edaeca4d68f7f04269223a4c29396c5
Author: higher-performance <higher.performance.github at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/CoroutineHostileRAIICheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/coroutine-hostile-raii.cpp
Log Message:
-----------
[clang-tidy] Fix bugs in misc-coroutine-hostile-raii check (#167947)
1. Handle transformed awaitables for `AllowedCallees`, which generate
temporaries and weren't being handled by #167778.
1. Fix name mismatches in `storeOptions`.
Commit: c4898f3f229027e6cbdf8f9db77b8c14d70f6599
https://github.com/llvm/llvm-project/commit/c4898f3f229027e6cbdf8f9db77b8c14d70f6599
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
A clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
M llvm/docs/DirectX/DXILResources.rst
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/unused.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWStructuredBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer_unused.ll
Log Message:
-----------
[HLSL][DirectX] Use a padding type for HLSL buffers. (#167404)
This change drops the use of the "Layout" type and instead uses explicit
padding throughout the compiler to represent types in HLSL buffers.
There are a few parts to this, though it's difficult to split them up as
they're very interdependent:
1. Refactor HLSLBufferLayoutBuilder to allow us to calculate the padding
of arbitrary types.
2. Teach Clang CodeGen to use HLSL specific paths for cbuffers when
generating aggregate copies, array accesses, and structure accesses.
3. Simplify DXILCBufferAccesses such that it directly replaces accesses
with dx.resource.getpointer rather than recalculating the layout.
4. Basic infrastructure for SPIR-V handling, but the implementation
itself will need work in follow ups.
Fixes several issues, including #138996, #144573, and #156084.
Resolves #147352.
Commit: 5cde345d51aaf7f29cef2bad6a3c6db288b89b76
https://github.com/llvm/llvm-project/commit/5cde345d51aaf7f29cef2bad6a3c6db288b89b76
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Remove pstl from the list of supported runtimes (#168414)
The pstl top-level directory was removed, but we forgot to remove pstl
from the list of valid subdirectories.
Commit: 1e3ea03293229c4b5ca65427076fce154988675f
https://github.com/llvm/llvm-project/commit/1e3ea03293229c4b5ca65427076fce154988675f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] VPIRFlags kind for FCmp with predicate + fast-math flags (NFCI).
FCmp instructions have both a predicate and fast-math flags. Introduce a
new FCmp kind, that combines both to model this correctly in the current
system.
This should be NFC modulo VPlan printing which now includes the correct
fast-math flags.
Commit: 6665642ce40c70b65624a5aa67566725c5a87da5
https://github.com/llvm/llvm-project/commit/6665642ce40c70b65624a5aa67566725c5a87da5
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/bug-pk-f32-imm-fold.mir
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
Log Message:
-----------
[AMDGPU] Don't fold an i64 immediate value if it can't be replicated from its lower 32-bit (#168458)
On some targets, a packed f32 instruction can only read 32 bits from a
scalar operand (SGPR or literal) and replicates the bits to both
channels. In this case, we should not fold an immediate value if it
can't be replicated from its lower 32-bit.
Fixes SWDEV-567139.
Commit: db71cc58ec9471c67c6b80996930a19222dd9f03
https://github.com/llvm/llvm-project/commit/db71cc58ec9471c67c6b80996930a19222dd9f03
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/mman.yaml
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/generic/CMakeLists.txt
A libc/src/sys/mman/linux/generic/pkey_common.h
M libc/src/sys/mman/linux/mprotect.cpp
A libc/src/sys/mman/linux/mprotect_common.h
A libc/src/sys/mman/linux/pkey_alloc.cpp
A libc/src/sys/mman/linux/pkey_common.h
A libc/src/sys/mman/linux/pkey_free.cpp
A libc/src/sys/mman/linux/pkey_get.cpp
A libc/src/sys/mman/linux/pkey_mprotect.cpp
A libc/src/sys/mman/linux/pkey_set.cpp
A libc/src/sys/mman/linux/x86_64/CMakeLists.txt
A libc/src/sys/mman/linux/x86_64/pkey_common.h
A libc/src/sys/mman/pkey_alloc.h
A libc/src/sys/mman/pkey_free.h
A libc/src/sys/mman/pkey_get.h
A libc/src/sys/mman/pkey_mprotect.h
A libc/src/sys/mman/pkey_set.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/pkey_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/mman/BUILD.bazel
Log Message:
-----------
[libc] Implement pkey_alloc/free/get/set/mprotect for x86_64 linux (#162362)
This patch provides definitions for `pkey_*` functions for linux x86_64.
`pkey_alloc`, `pkey_free`, and `pkey_mprotect` are simple syscall
wrappers. `pkey_set` and `pkey_get` modify architecture-specific
registers. The logic for these live in architecture specific
directories:
* `libc/src/sys/mman/linux/x86_64/pkey_common.h` has a real
implementation
* `libc/src/sys/mman/linux/generic/pkey_common.h` contains stubs that
just return `ENOSYS`.
Commit: e47e9f3b7b136f0af549e785896b0584088d0d2c
https://github.com/llvm/llvm-project/commit/e47e9f3b7b136f0af549e785896b0584088d0d2c
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.h
Log Message:
-----------
[NVPTX] TableGen-erate SDNode descriptions (#168367)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
The verification functionality detected a few issues, two of them were
fixed (missing `SDNPMemOperand` property on `TCGEN05_MMA` nodes and
extra glue operand/result on `CallPrototype`), the one remaining is with
`ProxyReg` node, see `NVPTXSelectionDAGInfo::verifyTargetNode()`.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168367
Commit: ed78ab7ca0c217c7a4905b559d23aef44c3db13d
https://github.com/llvm/llvm-project/commit/ed78ab7ca0c217c7a4905b559d23aef44c3db13d
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt/Session.h
A orc-rt/include/orc-rt/TaskDispatcher.h
A orc-rt/include/orc-rt/ThreadPoolTaskDispatcher.h
M orc-rt/lib/executor/CMakeLists.txt
M orc-rt/lib/executor/Session.cpp
A orc-rt/lib/executor/TaskDispatcher.cpp
A orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
M orc-rt/unittests/CMakeLists.txt
M orc-rt/unittests/SessionTest.cpp
A orc-rt/unittests/ThreadPoolTaskDispatcherTest.cpp
Log Message:
-----------
[orc-rt] Introduce Task and TaskDispatcher APIs and implementations. (#168514)
Introduces the Task and TaskDispatcher interfaces (TaskDispatcher.h),
ThreadPoolTaskDispatcher implementation (ThreadPoolTaskDispatch.h), and
updates Session to include a TaskDispatcher instance that can be used to
run tasks.
TaskDispatcher's introduction is motivated by the need to handle calls
to JIT'd code initiated from the controller process: Incoming calls will
be wrapped in Tasks and dispatched. Session shutdown will wait on
TaskDispatcher shutdown, ensuring that all Tasks are run or destroyed
prior to the Session being destroyed.
Commit: 3e499e9427e006a4204d1cb5b6eebe957844e06e
https://github.com/llvm/llvm-project/commit/3e499e9427e006a4204d1cb5b6eebe957844e06e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGen/no-common.c
Log Message:
-----------
[CIR] Add support for common linkage (#168613)
Add support for marking global variables with common linkage.
Commit: 5e803587eee01e860a58cd4a211018f9a5e3a859
https://github.com/llvm/llvm-project/commit/5e803587eee01e860a58cd4a211018f9a5e3a859
Author: Loïc Yhuel <loic.yhuel at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
A llvm/test/MC/ARM/arm-movt-movw-absolute-pass.s
Log Message:
-----------
[llvm][ARM] Allow MOVT and MOVW on the offset between two labels (#168072)
In this case, the value is a constant, not an addend to a relocation.
So the "Relocation Not In Range" error must not be triggered.
Regression from PR #112877
Fixes #132322
Commit: 1262acf4ecc9f55d0699705c7810bbf84d3da09e
https://github.com/llvm/llvm-project/commit/1262acf4ecc9f55d0699705c7810bbf84d3da09e
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
Log Message:
-----------
Introduce DwarfUnit::addBlock helper method (#168446)
This patch is just a small cleanup that unifies the various spots that
add a DWARF expression to the output.
Commit: 0a96b240fcb715c082ab9b4cab6fddae02065602
https://github.com/llvm/llvm-project/commit/0a96b240fcb715c082ab9b4cab6fddae02065602
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp
Log Message:
-----------
[mlir][acc][flang] Introduce OpenACC interfaces for globals (#168614)
Introduce two new OpenACC operation interfaces for identifying global
variables and their address computations:
- `GlobalVariableOpInterface`: Identifies operations that define global
variables. Provides an `isConstant()` method to query whether the global
is constant.
- `AddressOfGlobalOpInterface`: Identifies operations that compute the
address of a global variable. Provides a `getSymbol()` method to
retrieve the symbol reference.
This is being done in preparation for `ACCImplicitDeclare` pass which
will automatically ensure that `acc declare` is applied to globals when
needed.
The following operations now implement these interfaces:
- `memref::GlobalOp` implements `GlobalVariableOpInterface`
- `memref::GetGlobalOp` implements `AddressOfGlobalOpInterface`
- `fir::GlobalOp` implements `GlobalVariableOpInterface`
- `fir::AddrOfOp` implements `AddressOfGlobalOpInterface`
Commit: 411c75210e2326f7d6926ae4a303e05c1d0eab9d
https://github.com/llvm/llvm-project/commit/411c75210e2326f7d6926ae4a303e05c1d0eab9d
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M orc-rt/lib/executor/TaskDispatcher.cpp
M orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
Log Message:
-----------
[orc-rt] Fix typos in file comments.
Commit: 651785a5bacb9bba2c9dbcbb6e21e28135937129
https://github.com/llvm/llvm-project/commit/651785a5bacb9bba2c9dbcbb6e21e28135937129
Author: Pranav Kant <prka at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix #168367 (#168635)
Commit: 7819071c41273e603d1fe1f3e8ab0b11c356a899
https://github.com/llvm/llvm-project/commit/7819071c41273e603d1fe1f3e8ab0b11c356a899
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Drop install-ninja action (#167070)
ninja is already installed by default on Linux and macOS.
Commit: c32d2ee4659170d281d0d89a1d396267e36fc7da
https://github.com/llvm/llvm-project/commit/c32d2ee4659170d281d0d89a1d396267e36fc7da
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/TableGen/CodeGenMapTable.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in CodeGenMapTable (#168592)
Adopt `IfDefEmitter` and `NamespaceEmitter` in CodeGenMapTable.cpp
Commit: 88efd0e88b8dafe9dd5bc118895750dd7413f811
https://github.com/llvm/llvm-project/commit/88efd0e88b8dafe9dd5bc118895750dd7413f811
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Transforms/LowerTypeTests/function-weak.ll
Log Message:
-----------
[LTT] Mark as unkown weak function tests. (#167399)
We don't have enough information to infer the probability of a weak function pointer being nullptr or not (open question if we could propagate this from the linker)
Issue #147390
Commit: 9a15556d6d6b207084bea8f02381b0459624a006
https://github.com/llvm/llvm-project/commit/9a15556d6d6b207084bea8f02381b0459624a006
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
Log Message:
-----------
[OpenACC] add cl::values to ACCImplicitRoutineOptions (#168601)
Add the cl::values to the pass options so an assert is not reached when
trying to generate a reproducer e.g. "unknown data value for option"
Commit: 522177c959ed7ec99a237387ef41aa1e250410e8
https://github.com/llvm/llvm-project/commit/522177c959ed7ec99a237387ef41aa1e250410e8
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-tensormap-invalid.ll
A llvm/test/CodeGen/NVPTX/fence-proxy.ll
A llvm/test/CodeGen/NVPTX/op-fence.ll
A llvm/test/CodeGen/NVPTX/thread-fence.ll
Log Message:
-----------
[NVPTX] Add a few more missing fence intrinsics (#166352)
This commit adds the below fence intrinsics:
- llvm.nvvm.fence.acquire.sync_restrict.space.cluster.scope.cluster
- llvm.nvvm.fence.release.sync_restrict.space.cta.scope.cluster
- llvm.nvvm.fence.mbarrier_init.release.cluster
-
llvm.nvvm.fence.proxy.async.generic.acquire.sync_restrict.space.cluster.scope.cluster
-
llvm.nvvm.fence.proxy.async.generic.release.sync_restrict.space.cta.scope.cluster
llvm.nvvm.fence.proxy.alias
- llvm.nvvm.fence.proxy.async
- llvm.nvvm.fence.proxy.async.global
- llvm.nvvm.fence.proxy.async.shared_cluster
- llvm.nvvm.fence.proxy.async.shared_cta
For more information, please refere the [PTX
ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-membar)
Commit: bfb953926c3d5021e3ac6ddbf22fd98f002da208
https://github.com/llvm/llvm-project/commit/bfb953926c3d5021e3ac6ddbf22fd98f002da208
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Target/Target.td
A llvm/test/TableGen/target-specialized-pseudos.td
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
TableGen: Support target specialized pseudoinstructions (#159880)
Allow a target to steal the definition of a generic pseudoinstruction
and remap the operands. This works by defining a new instruction, which
will simply swap out the emitted entry in the InstrInfo table.
This is intended to eliminate the C++ half of the implementation
of PointerLikeRegClass. With RegClassByHwMode, the remaining usecase
for PointerLikeRegClass are the common codegen pseudoinstructions.
Every target maintains its own copy of the generic pseudo operand
definitions anyway, so we can stub out the register operands with
an appropriate class instead of waiting for runtime resolution.
In the future we could probably take this a bit further. For example,
there is a similar problem for ADJCALLSTACKUP/DOWN since they depend
on target register definitions for the stack pointer register.
Commit: 961940e1a7c9b4bbe0ae54c2ea4bdc69308947d6
https://github.com/llvm/llvm-project/commit/961940e1a7c9b4bbe0ae54c2ea4bdc69308947d6
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[TTI] Use MemIntrinsicCostAttributes for getMaskedMemoryOpCost (#168029)
- Split from #165532. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.
API change:
```
- InstructionCost getMaskedMemoryOpCost(Opcode, Src, Alignment,
- AddressSpace, CostKind);
+ InstructionCost getMaskedMemoryOpCost(MemIntrinsicCostAttributes,
+ CostKind);
```
Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with the
same information as before.
- Follow-up: migrate gather/scatter, strided, and expand/compress cost
queries to the same attributes-based entry point.
Commit: a3ab11007ba277fb8a126d8199925f4ce184e195
https://github.com/llvm/llvm-project/commit/a3ab11007ba277fb8a126d8199925f4ce184e195
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
Log Message:
-----------
[TableGen] Silence a warning (NFC)
/llvm-project/llvm/utils/TableGen/Common/CodeGenTarget.cpp:286:12:
error: variable 'SkippedInsts' set but not used [-Werror,-Wunused-but-set-variable]
unsigned SkippedInsts = 0;
^
1 error generated.
Commit: b4aa3d3ae334fea392f62df9693fab07142443ae
https://github.com/llvm/llvm-project/commit/b4aa3d3ae334fea392f62df9693fab07142443ae
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[NFC] Check operand type instead of opcode (#168641)
A folow-up of #168458.
Commit: 52a58a4193935f60df70eb45f8ec7c61f142ac3b
https://github.com/llvm/llvm-project/commit/52a58a4193935f60df70eb45f8ec7c61f142ac3b
Author: Shoreshen <372660931 at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/OpenMP/amdgcn-attributes.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
Log Message:
-----------
[AMDGPU] Adding instruction specific features (#167809)
Commit: 5ee95f48b84308dbbad46df313c2bd44e2613ac5
https://github.com/llvm/llvm-project/commit/5ee95f48b84308dbbad46df313c2bd44e2613ac5
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add regbankselect rules for G_FSHR (#159818)
Commit: 52ed0f215faedf3ceb26368ccd180fe3e27760e4
https://github.com/llvm/llvm-project/commit/52ed0f215faedf3ceb26368ccd180fe3e27760e4
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Basic/Targets/Sparc.cpp
A clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
Log Message:
-----------
[SPARC][clang] Add condition code register names for inline asm (#168498)
This follows the list of names used by GCC.
Commit: fa50a684c5ad91ef9eb6c5e8070b9363eea12f5e
https://github.com/llvm/llvm-project/commit/fa50a684c5ad91ef9eb6c5e8070b9363eea12f5e
Author: Aditi Medhane <aditimedhane73 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
Log Message:
-----------
[PowerPC] Add custom lowering for SADD overflow for i32 and i64 (#159255)
This patch improves the codegen for saddo on i32 and i64 in both 32-bit
and 64-bit modes by custom lowering. It implements signed-add overflow
detection using the `(x eqv y) & (sum xor x)`bit-level sequence.
Commit: c942ebdb66bfdfae5f3665e0dc674c68c70a18f9
https://github.com/llvm/llvm-project/commit/c942ebdb66bfdfae5f3665e0dc674c68c70a18f9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
Log Message:
-----------
Reapply "[Github] Update PR labeller to v6.0.1 (#167246)"
This reverts commit d772663a9f003a08ee76414397963c58e80b27d7.
This fixes the final issue with the labeller landing. There were
two remaining issues:
1. There was an extra quote on one of the globs
2. Some of the yaml keys were named incorrectly (should have been
plural)
Commit: f7f41350b4eb6cfb036242ae0427b6b4c76dce6e
https://github.com/llvm/llvm-project/commit/f7f41350b4eb6cfb036242ae0427b6b4c76dce6e
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
Log Message:
-----------
[LV]: Skip Epilogue scalable VF greater than RemainingIterations. (#156724)
Consider skipping epilogue scalable VF when they are greater than
RemainingIterations same as fixed VF.
And skip scalable RemainingIterations from that comparison because
SCEV ATM can't evaluate non-canonical vscale-based expressions.
Commit: f38cf01fc888850900c22a9c84ce3bcb85112f24
https://github.com/llvm/llvm-project/commit/f38cf01fc888850900c22a9c84ce3bcb85112f24
Author: Wenju He <wenju.he at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int32.inc
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int64.inc
M libclc/opencl/lib/amdgcn/SOURCES
R libclc/opencl/lib/amdgcn/cl_khr_int64_extended_atomics/minmax_helpers.ll
M libclc/opencl/lib/generic/atomic/atom_add.cl
M libclc/opencl/lib/generic/atomic/atom_and.cl
M libclc/opencl/lib/generic/atomic/atom_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atom_dec.cl
M libclc/opencl/lib/generic/atomic/atom_inc.cl
R libclc/opencl/lib/generic/atomic/atom_int32_binary.inc
M libclc/opencl/lib/generic/atomic/atom_max.cl
M libclc/opencl/lib/generic/atomic/atom_min.cl
M libclc/opencl/lib/generic/atomic/atom_or.cl
M libclc/opencl/lib/generic/atomic/atom_sub.cl
M libclc/opencl/lib/generic/atomic/atom_xchg.cl
M libclc/opencl/lib/generic/atomic/atom_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_add.cl
M libclc/opencl/lib/generic/atomic/atomic_and.cl
M libclc/opencl/lib/generic/atomic/atomic_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
M libclc/opencl/lib/generic/atomic/atomic_max.cl
M libclc/opencl/lib/generic/atomic/atomic_min.cl
M libclc/opencl/lib/generic/atomic/atomic_or.cl
M libclc/opencl/lib/generic/atomic/atomic_sub.cl
M libclc/opencl/lib/generic/atomic/atomic_xchg.cl
M libclc/opencl/lib/generic/atomic/atomic_xor.cl
Log Message:
-----------
[libclc] Use CLC atomic functions for legacy OpenCL atom/atomic builtins (#168325)
Main changes:
* OpenCL legacy atom/atomic builtins now call CLC atomic functions
(which use Clang __scoped_atomic_*), replacing previous Clang __sync_*
functions.
* Change memory order from seq_cst to relaxed; keep device scope (spec
permits broader than workgroup). LLVM IR for _Z8atom_decPU3AS1Vi in
amdgcn--amdhsa.bc:
Before:
%2 = atomicrmw volatile sub ptr subrspace(1) %0, i32 1
syncscope("agent") seq_cst
After:
%2 = atomicrmw volatile sub ptr subrspace(1) %0, i32 1
syncscope("agent") monotonic
* Also adds OpenCL 1.0 atom_* variants without volatile on the pointer.
They are added for backward compatibility.
Commit: 9dc4ebfff145dbf648e49dbfd5c907d2f8f9eefe
https://github.com/llvm/llvm-project/commit/9dc4ebfff145dbf648e49dbfd5c907d2f8f9eefe
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow create mem desc from 2d memref (#167767)
This PR relax the create_mem_desc's restriction on source memref,
allowing it to be a 2d memref.
Commit: be1a504228db4185a4ad5defe1b57d4df2bc8b2f
https://github.com/llvm/llvm-project/commit/be1a504228db4185a4ad5defe1b57d4df2bc8b2f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Simplify Session shutdown. (#168664)
Moves all Session member variables dedicated to shutdown into a new
ShutdownInfo struct, and uses the presence / absence of this struct as
the flag to indicate that we've entered the "shutting down" state. This
simplifies the implementation of the shutdown process.
Commit: 5bba4fd75dd513423ff8bb905f89b60558099578
https://github.com/llvm/llvm-project/commit/5bba4fd75dd513423ff8bb905f89b60558099578
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libc/test/src/stdio/fileop_test.cpp
Log Message:
-----------
[libc] Fix -Wshorten-64-to-32 in fileop_test. (#168451)
Explicitly cast 0 to size_t type to match fread() return type. This
follows the pattern used elsewhere in this file, and fixes
-Wshorten-64-to-32 warnings when building the test.
Commit: ed1c8d7a57808de7ac60f2d0ff3e2b03a765cb7f
https://github.com/llvm/llvm-project/commit/ed1c8d7a57808de7ac60f2d0ff3e2b03a765cb7f
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lld/test/ELF/dso-undef-extract-lazy.s
Log Message:
-----------
ELF,test: Test unversioned undefined symbols of index 0 and 1
My 2020 change that added versioned symbol recognition
(reviews.llvm.org/D80059) checks both VER_NDX_LOCAL and VER_NDX_GLOBAL,
though test coverage was missing. lld/test/ELF/dso-undef-extract-lazy.s
checks that the undefined symbol is indeed considered unversioned.
Commit: 5109f2a73395f076a292e55a35a129cbf125fd66
https://github.com/llvm/llvm-project/commit/5109f2a73395f076a292e55a35a129cbf125fd66
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Exclude from profcheck a vplan test under phase ordering (#168669)
Commit: ac68dd53ed035047fb68abb471d2e1eb8b31cbfd
https://github.com/llvm/llvm-project/commit/ac68dd53ed035047fb68abb471d2e1eb8b31cbfd
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
A llvm/lib/Target/RISCV/RISCVPassRegistry.def
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
Log Message:
-----------
[RISCV][NewPM] Port RISCVCodeGenPrepare to the new pass manager (#168381)
As suggested in the review for #160536 it would be good to follow up and
port the RISC-V passes to the new pass manager. This PR starts that
task. It provides the bare minimum necessary to run RISCVCodeGenPrepare
with opt -passes=riscv-codegenprepare. The approach used is modeled on
my observations of the AMDGPU backend and the recent work to port the
X86 passes.
The testing approach is to add a `-passes=riscv-foo` RUN line to at
least one test, if an appropriate test exists.
Commit: ec909123aee9088ad99c207b365ee7a20870f1c4
https://github.com/llvm/llvm-project/commit/ec909123aee9088ad99c207b365ee7a20870f1c4
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
[clang][NVPTX] Add remaining float to fp16 conversions (#167641)
This change adds intrinsics and clang builtins for the remaining float
to fp16 conversions. This includes the following conversions:
- float to bf16x2 - satfinite variants
- float to f16x2 - satfinite variants
- float to bf16 - satfinite variants
- float to f16 - all variants
Tests are added in `convert-sm80.ll` and `convert-sm80-sf.ll` for the
intrinsics and in `builtins-nvptx.c` for the clang builtins.
Commit: 669c30ce66eb08d028e7f90d36a2c2d8c3697f63
https://github.com/llvm/llvm-project/commit/669c30ce66eb08d028e7f90d36a2c2d8c3697f63
Author: Guray Ozen <gozen at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
R mlir/docs/Dialects/NVVM/_index.md
A mlir/docs/Dialects/NVVMDialect.md
Log Message:
-----------
[MLIR][NVVM] Move docs to correct folder
Commit: 58d9e476724ae347be4da1ecddc17fd133a1300b
https://github.com/llvm/llvm-project/commit/58d9e476724ae347be4da1ecddc17fd133a1300b
Author: Raul Tambre <raul at tambre.ee>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M bolt/test/lit.local.cfg
Log Message:
-----------
[NFCI][bolt][test] Use AT&T syntax explicitly (#167225)
This enables building LLVM with `-mllvm -x86-asm-syntax=intel` in one's
Clang config files (i.e. a global preference for Intel syntax).
`-masm=att` is insufficient as it doesn't override a specification of `-mllvm -x86-asm-syntax`.
Commit: 429e3156c8043ca30d5866755ad790314a26670f
https://github.com/llvm/llvm-project/commit/429e3156c8043ca30d5866755ad790314a26670f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
Log Message:
-----------
[RISCV] Convert -mtune=generic to generic-rv32/rv64 in RISCVSubtarget::initializeSubtargetDependencies. (#168612)
The "generic" entry in tablegen is really a dummy entry. We shouldn't
use it for anything. Remap "generic" to either generic-rv32 or
generic-rv64 based on the triple.
Commit: f8e83c428a8d85d18242d4bd57bec0d02c8253e8
https://github.com/llvm/llvm-project/commit/f8e83c428a8d85d18242d4bd57bec0d02c8253e8
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Transforms/Passes.h
Log Message:
-----------
[mlir] Use dictionary order to order the pass decl (NFC) (#168648)
Commit: de9c18269dee5a323dd254f5b3a18aabe144e918
https://github.com/llvm/llvm-project/commit/de9c18269dee5a323dd254f5b3a18aabe144e918
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A orc-rt/docs/Design.md
Log Message:
-----------
[orc-rt] Initial ORC Runtime design documentation. (#168681)
This document aims to lay out the high level design and goals of the ORC
runtime, and the relationships between key components.
Commit: fddfc705d03ec6e9c75441d66057c1219902c8c1
https://github.com/llvm/llvm-project/commit/fddfc705d03ec6e9c75441d66057c1219902c8c1
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/list.rst
Log Message:
-----------
[clang-tidy][NFC] Fix order in `list.rst` (#168683)
This issue was introduced in
https://github.com/llvm/llvm-project/pull/167689
Commit: 711a2954799e597c71b86aed8c93167765a5255f
https://github.com/llvm/llvm-project/commit/711a2954799e597c71b86aed8c93167765a5255f
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
Log Message:
-----------
[AMDGPU] Ignore wavefront barrier latency during scheduling DAG mutation (#168500)
Do not add latency for wavefront and singlethread scope fences during
barrier latency DAG mutation.
These scopes do not typically introduce any latency and adjusting
schedules based on them significantly impacts latency hiding.
Commit: 4ab1d06406ea425ac40072c3bb3fd96002ba2b0a
https://github.com/llvm/llvm-project/commit/4ab1d06406ea425ac40072c3bb3fd96002ba2b0a
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
Log Message:
-----------
Reland "[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)" (#168638)
Reland commit fb829bf11feeb53f815a3abf539e63ec3a23ed3d with additional fixes relating to post-merge CI failure
```
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp: In function ‘constexpr llvm::nvvm::CTAGroupKind getNVVMCtaGroupKind(mlir::NVVM::CTAGroupKind)’:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-constexpr function ‘void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)’
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp:73:3: note: in expansion of macro ‘llvm_unreachable’
llvm_unreachable("unsupported cta_group value");
^
```
Commit: a2af185b96071154b93f6c00319feee9b1f270f4
https://github.com/llvm/llvm-project/commit/a2af185b96071154b93f6c00319feee9b1f270f4
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][tosa] Fix linker failure in build bots introduced by #165581 (#168581)
This commit fixes linker failures evident on some failing build bots.
Commit: 907e8514b188abb0e4d4d16b1e0e847a163762cd
https://github.com/llvm/llvm-project/commit/907e8514b188abb0e4d4d16b1e0e847a163762cd
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[ORC] Remove now unused EPCDebugObjectRegistrar (NFC) (#167868)
EPCDebugObjectRegistrar is unused now that the ELF debugger support plugin uses AllocActions
https://github.com/llvm/llvm-project/pull/167866
Commit: 915e9adbe5d1c577a21ac8b495b7c54c465460fd
https://github.com/llvm/llvm-project/commit/915e9adbe5d1c577a21ac8b495b7c54c465460fd
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
Log Message:
-----------
[clang-tidy] Provide fix-its for casts to void* in google-readability-casting (#167655)
Commit: 07309135291e804945de3ec7068b787a45a3499f
https://github.com/llvm/llvm-project/commit/07309135291e804945de3ec7068b787a45a3499f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Print debug info for all recipes. (#168454)
Use the recently refactored VPRecipeBase::print to print debug location
for all recipes.
PR: https://github.com/llvm/llvm-project/pull/168454
Commit: e38529ddbb11918f854ee457b46a6dc190167029
https://github.com/llvm/llvm-project/commit/e38529ddbb11918f854ee457b46a6dc190167029
Author: 陈子昂 <121872494+Michael-Chen-NJU at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/X86/vector-compress-freeze.ll
Log Message:
-----------
[DAG] Update canCreateUndefOrPoison to handle ISD::VECTOR_COMPRESS (#168010)
Fixes #167710
Commit: 2f6a8a77db069228a0fb98f5a85ec85ed7f259fc
https://github.com/llvm/llvm-project/commit/2f6a8a77db069228a0fb98f5a85ec85ed7f259fc
Author: Guray Ozen <gozen at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/docs/Dialects/NVVMDialect.md
Log Message:
-----------
[MLIR][NVVM] Add operations and interfaces
Commit: 125af5686765f915abcdcca60ad255fda95667d2
https://github.com/llvm/llvm-project/commit/125af5686765f915abcdcca60ad255fda95667d2
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
Log Message:
-----------
[AMDGPU][SDAG] Only fold flat offsets if they are inbounds PTRADDs (#165427)
For flat memory instructions where the address is supplied as a base address
register with an immediate offset, the memory aperture test ignores the
immediate offset. Currently, SDISel does not respect that, which leads to
miscompilations where valid input programs crash when the address computation
relies on the immediate offset to get the base address in the proper memory
aperture. Global or scratch instructions are not affected.
This patch only selects flat instructions with immediate offsets from PTRADD
address computations with the inbounds flag: If the PTRADD does not leave the
bounds of the allocated object, it cannot leave the bounds of the memory
aperture and is therefore safe to handle with an immediate offset.
Affected tests:
- CodeGen/AMDGPU/fold-gep-offset.ll: Offsets are no longer wrongly folded, added
new positive tests where we still do fold them.
- CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll: Offset folding doesn't seem
integral to this test, so the test is not changed to make offset folding still
happen.
- CodeGen/AMDGPU/loop-prefetch-data.ll: loop-reduce transforms inbounds
addresses for accesses to be based on potentially OOB addresses used for
prefetching.
- I think the remaining ones suffer from the limited preservation of the
inbounds flag in PTRADD DAGCombines due to the provenance problems pointed out
in PR #165424 and the fact that
`AMDGPUTargetLowering::SplitVector{Load|Store}` legalizes too-wide accesses by
repeatedly splitting them in half. Legalizing a V32S32 memory accesses
therefore leads to inbounds ptradd chains like (ptradd inbounds (ptradd
inbounds (ptradd inbounds P, 64), 32), 16). The DAGCombines fold them into a
single ptradd, but the involved transformations generally cannot preserve the
inbounds flag (even though it would be valid in this case).
Similar previous PR that relied on `ISD::ADD inbounds` instead of `ISD::PTRADD inbounds` (closed): #132353
Analogous PR for GISel (merged): #153001
Fixes SWDEV-516125.
Commit: ed7f2a459afefe41a7fac1360d1d3b7bc33bec43
https://github.com/llvm/llvm-project/commit/ed7f2a459afefe41a7fac1360d1d3b7bc33bec43
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A clang/test/CodeGen/Sparc/sparc-arguments.c
A clang/test/CodeGen/Sparc/sparc-vaarg.c
A clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/Sparc/sparcv8-inline-asm.c
A clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/Sparc/sparcv9-class-return.cpp
A clang/test/CodeGen/Sparc/sparcv9-dwarf.c
A clang/test/CodeGen/Sparc/sparcv9-inline-asm.c
R clang/test/CodeGen/sparc-arguments.c
R clang/test/CodeGen/sparc-vaarg.c
R clang/test/CodeGen/sparcv8-abi.c
R clang/test/CodeGen/sparcv8-inline-asm.c
R clang/test/CodeGen/sparcv9-abi.c
R clang/test/CodeGen/sparcv9-class-return.cpp
R clang/test/CodeGen/sparcv9-dwarf.c
R clang/test/CodeGen/sparcv9-inline-asm.c
Log Message:
-----------
[SPARC][NFC] Move clang tests into own subdirectory (#168657)
Commit: 150053627d14679f3db52d78b640a3e8781de828
https://github.com/llvm/llvm-project/commit/150053627d14679f3db52d78b640a3e8781de828
Author: Marco Elver <elver at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/AllocToken.rst
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/alloc-token.cpp
M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
Log Message:
-----------
[AllocToken] Fix and clarify -falloc-token-max=0 (#168689)
The option -falloc-token-max=0 is supposed to be usable to override
previous settings back to the target default max tokens (SIZE_MAX).
This did not work for the builtin:
```
| executed command: clang -cc1 [..] -nostdsysteminc -triple x86_64-linux-gnu -std=c++23 -fsyntax-only -verify clang/test/SemaCXX/alloc-token.cpp -falloc-token-max=0
| clang: llvm/lib/Support/AllocToken.cpp:38: std::optional<uint64_t> llvm::getAllocToken(AllocTokenMode, const AllocTokenMetadata &, uint64_t): Assertion `MaxTokens && "Must provide non-zero max tokens"' failed.
```
Fix it by also picking the default if "0" is passed.
Improve the documentation to be clearer what the value of "0" means.
Commit: b42851b8dda8c85a277573610519e8c66e91322f
https://github.com/llvm/llvm-project/commit/b42851b8dda8c85a277573610519e8c66e91322f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] EltsFromConsecutiveLoads - add recursion depth limiter (#168694)
EltsFromConsecutiveLoads can be recursively called - ensure we limit the recursion depth.
Commit: 50791c3a708123ef75808e73a81d7d2e759f6f9b
https://github.com/llvm/llvm-project/commit/50791c3a708123ef75808e73a81d7d2e759f6f9b
Author: stomfaig <55883018+stomfaig at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
Log Message:
-----------
[Clang][X86] allow VPERMILPD/S imm intrinsics to be used in constexpr (#168044)
Resolves #166529
Commit: 5343dd92303657dc15f4038a3843ddb778760242
https://github.com/llvm/llvm-project/commit/5343dd92303657dc15f4038a3843ddb778760242
Author: Kashika Akhouri <77923634+kashika0112 at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Detect use-after-return (#165370)
Adding "use-after-return" in Lifetime Analysis.
Detecting when a function returns a reference to its own stack memory:
[UAR Design
Doc](https://docs.google.com/document/d/1Wxjn_rJD_tuRdejP81dlb9VOckTkCq5-aE1nGcerb_o/edit?usp=sharing)
Consider the following example:
```cpp
std::string_view foo() {
std::string_view a;
std::string str = "small scoped string";
a = str;
return a;
}
```
The code adds a new Fact "OriginEscape" in the end of the CFG to
determine any loan that is escaping the function as shown below:
```
Function: foo
Block B2:
End of Block
Block B1:
OriginFlow (Dest: 0 (Decl: a), Src: 1 (Expr: CXXConstructExpr))
OriginFlow (Dest: 2 (Expr: ImplicitCastExpr), Src: 3 (Expr: StringLiteral))
Issue (0 (Path: operator=), ToOrigin: 4 (Expr: DeclRefExpr))
OriginFlow (Dest: 5 (Expr: ImplicitCastExpr), Src: 4 (Expr: DeclRefExpr))
Use (0 (Decl: a), Write)
Issue (1 (Path: str), ToOrigin: 6 (Expr: DeclRefExpr))
OriginFlow (Dest: 7 (Expr: ImplicitCastExpr), Src: 6 (Expr: DeclRefExpr))
OriginFlow (Dest: 8 (Expr: CXXMemberCallExpr), Src: 7 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 9 (Expr: ImplicitCastExpr), Src: 8 (Expr: CXXMemberCallExpr))
OriginFlow (Dest: 10 (Expr: ImplicitCastExpr), Src: 9 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 11 (Expr: MaterializeTemporaryExpr), Src: 10 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 0 (Decl: a), Src: 11 (Expr: MaterializeTemporaryExpr))
Use (0 (Decl: a), Read)
OriginFlow (Dest: 12 (Expr: ImplicitCastExpr), Src: 0 (Decl: a))
OriginFlow (Dest: 13 (Expr: CXXConstructExpr), Src: 12 (Expr: ImplicitCastExpr))
Expire (1 (Path: str))
OriginEscapes (13 (Expr: CXXConstructExpr))
End of Block
Block B0:
End of Block
```
The confidence of the report is determined by checking if at least one
of the loans returned is not expired (strict). If all loans are expired
it is considered permissive.
More information [UAR Design
Doc](https://docs.google.com/document/d/1Wxjn_rJD_tuRdejP81dlb9VOckTkCq5-aE1nGcerb_o/edit?usp=sharing)
Commit: 58e6d02aa28ba48ee37f1b59ad006dfeb45d1dd3
https://github.com/llvm/llvm-project/commit/58e6d02aa28ba48ee37f1b59ad006dfeb45d1dd3
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
Log Message:
-----------
[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerge (#168692)
This aims to fix the crash in #168495, my combine rule was
missing a check that the source vector was in fact a vector. This then
caused the legality check to fail in this example as the concat was
trying to concat a non vector.
I have also gated the bitcast of the concat to only work on non-scalable
vectors as the mutation calls `getNumElements` which crashes when called
on a scalable vector.
Fixes #168495
Commit: 7b94dd336e25b18e05b3b1f20360df81e4900ffb
https://github.com/llvm/llvm-project/commit/7b94dd336e25b18e05b3b1f20360df81e4900ffb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPLan] Reduce duplication in VPHeaderPHIRecipe::classof. (NFCI)
Implement VPHeaderPHIRecipe::classof(const VPValue *V) in terms of the
variant taking VPRecipeBase.
Reduces some duplication, split off from
https://github.com/llvm/llvm-project/pull/141431.
Commit: c32c1d0d21cedb8017914eb6951bea4cf1fb10f9
https://github.com/llvm/llvm-project/commit/c32c1d0d21cedb8017914eb6951bea4cf1fb10f9
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/lib/sanitizer_common/symbolizer/CMakeLists.txt
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/test/lit.site.cfg.in
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
[Runtimes] Default build must use its own output dirs (#168266)
Post-commit fix of #164794 reported at
https://github.com/llvm/llvm-project/pull/164794#issuecomment-3536253493
`LLVM_LIBRARY_OUTPUT_INTDIR` and `LLVM_RUNTIME_OUTPUT_INTDIR` is used by
`AddLLVM.cmake` as output directories. Unless we are in a
bootstrapping-build, It must not point to directories found by
`find_package(LLVM)` which may be read-only directories. MLIR for
instance sets thesese variables to its own build output
directory, so should the runtimes.
Commit: bdcaa0001a5081737b12b9ec0c284fe06002a97c
https://github.com/llvm/llvm-project/commit/bdcaa0001a5081737b12b9ec0c284fe06002a97c
Author: Philip Ginsbach-Chen <ginsbach at github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/test/CodeGen/AArch64/arm64-trn.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
Log Message:
-----------
[AArch64] match TRN starting from undef elements (#167955)
When the first element of a trn mask is undef, the `isTRNMask` function
assumes `WhichResult = 1`. That has a 50% chance of being wrong, so we
fail to match some valid trn1/trn2.
This patch introduces a more precise test to determine the correct value
of `WhichResult`, based on corresponding code in the `isZIPMask` and
`isUZPMask` functions.
- This change is based on #89578. I'd like to follow it up with a
further change along the lines of #167235.
Commit: dce60025c1ae5c6c00885b49e496b29dffc03c8b
https://github.com/llvm/llvm-project/commit/dce60025c1ae5c6c00885b49e496b29dffc03c8b
Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.h
M clang/lib/Basic/Builtins.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang][Codegen] Move floating point math intrinsic check to separate function [NFC] (#168198)
This PR moves the code that checks whether an LLVM intrinsic should be
generated instead of a call to floating point math functions to a
separate function. This simplifies `EmitBuiltinExpr` in `CGBuiltin.cpp`
and will allow us to reuse the logic in ClangIR.
Commit: 655662e94e969ee1bb3c17ea036335d7865f0462
https://github.com/llvm/llvm-project/commit/655662e94e969ee1bb3c17ea036335d7865f0462
Author: BogdanDragosV <dragos-valentin.bogdan at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/IR/Properties.td
Log Message:
-----------
[MLIR][ODS] Fully qualify namespace for mlir::Attribute in ODS generated code (#168536)
ODS generate code can be included and used outside of the `mlir`
namespace and so references to symbols in the mlir namespace
must be fully qualified.
Commit: 6fc48de4ffe23508b3936c5480e46a5c0af02fec
https://github.com/llvm/llvm-project/commit/6fc48de4ffe23508b3936c5480e46a5c0af02fec
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
Log Message:
-----------
[AArch64] Update zero latency instructions in Neoverse scheduling tables (#165690)
NeoverseZeroMove was introduced for Neoverse-V2 and was added to V3 and
V3AE.
Use NeoverseZeroMove for Neoverse-V1, N2, N3 in the same way, including
these instructions:
MOV Xd|Wd, #0|XZR|WZR
For all the above Neoverse targets, the following instructions are also
decoded as not utilizing the scheduling and execution resources of the
machine:
MOV Wd,Wn
MOV Xd,Xn
For Neoverse-N3 only, these instructions also have zero latency
FMOV Dd, Dn
FMOV Sd, Sn
MOV Vd, Vn (vector)
MOV Zd.D, Zn.D
PTRUE
PFALSE
Commit: 68d2ce8e74cb2428d5c6299176f471753151d356
https://github.com/llvm/llvm-project/commit/68d2ce8e74cb2428d5c6299176f471753151d356
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Coupled.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/Invariant.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PR51512.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/Separability.ll
M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
M llvm/test/Transforms/LoopFusion/pr164082.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies_multidims.ll
Log Message:
-----------
[DA] Replace delinearization for fixed size array (#161822)
This patch replaces the delinearization function used in DA, switching
from one that depends on type information in GEPs to one that does not.
There are three types of changes in regression tests: improvements,
degradations, and degradations but the related features will be
removed. Since there were very few cases that are classified into the
second category, I believe the impact of this change should be
practically insignificant.
Commit: a2ddb020d76cdb1c5708cf3dadd2c46866202707
https://github.com/llvm/llvm-project/commit/a2ddb020d76cdb1c5708cf3dadd2c46866202707
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
A llvm/test/Transforms/LoopInterchange/zero-btc.ll
Log Message:
-----------
[LoopInterchange] Don't consider loops with BTC=0 (#167113)
Do not consider loops with a zero backedge taken count as candidates for
interchange. This seems like a sensible thing because it suggests the loop
doesn't execute and there is no point in interchanging. As a bonus, this
seems to avoid triggering an assert about phis and their uses from source
code, so this is a partial fix for #163954 but it needs more work to properly
fix that.
Commit: 7fe35641672b6431134e99af658bd79fd438da54
https://github.com/llvm/llvm-project/commit/7fe35641672b6431134e99af658bd79fd438da54
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Headers/llvm_libc_wrappers/assert.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/llvm_libc_wrappers/inttypes.h
R clang/lib/Headers/llvm_libc_wrappers/llvm-libc-decls/README.txt
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Headers/llvm_libc_wrappers/stdlib.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Headers/llvm_libc_wrappers/time.h
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/docs/dev/header_generation.rst
R libc/utils/hdrgen/hdrgen/gpu_headers.py
M libc/utils/hdrgen/hdrgen/yaml_to_classes.py
Log Message:
-----------
[Clang] Gut the libc wrapper headers and simplify (#168438)
Summary:
These were originally intended to represent the functions that are
present on the GPU as to be provided by the LLVM libc implementation.
The original plan was that LLVM libc would report which functions were
supported and then the offload interface would mark those as supported.
The problem is that these wrapper headers are very difficult to make
work given the various libc extensions everyone does so they were
extremely fragile.
OpenMP already declares all functions used inside of a target region as
implicitly host / device, while these headers weren't even used for CUDA
/ HIP yet anyway. The only things we need to define right now are the
stdio FILE types. If we want to make this work for CUDA we'd need to
define these manually, but we're a ways off and that's way easier
because they do proper overloading.
Commit: 9eee396c58d2e24beb93c460141170def328776d
https://github.com/llvm/llvm-project/commit/9eee396c58d2e24beb93c460141170def328776d
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
Log Message:
-----------
[flang] "Almost NFC" changes to fir::runtime::genCharCompare() (#168563)
As part of investigating a related issue, I made the following changes
to fir::runtime::genCharCompare():
- Renamed a variable
- Added an error check for the same kind of input args
- Updated another error check to use the same error found elsewhere in
this source file
Commit: 5da0445420015d859f71431a2c76f5b0cf78cbad
https://github.com/llvm/llvm-project/commit/5da0445420015d859f71431a2c76f5b0cf78cbad
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Consolidate shouldOptimizeForSize and remove unused BFI/PSI. NFC (#168697)
#158690 plans on passing BFI as a lazy lambda to avoid computing
BlockFrequencyInfo when not needed.
In preparation for that, this PR removes BFI and PSI from some
constructors that aren't used. It also consolidates the two calls to
llvm::shouldOptimizeForSize so that the result is computed once and
passed where needed.
This also renames OptForSize in LoopVectorizationLegality to clarify
that it's to prevent runtime SCEV checks, see
https://reviews.llvm.org/D68082
Commit: 7b8eee6b2b10ce88a24521aa0e91193cf7203c95
https://github.com/llvm/llvm-project/commit/7b8eee6b2b10ce88a24521aa0e91193cf7203c95
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/sincos-expansion.ll
Log Message:
-----------
[RISCV][test] Add sincos-expansion.ll test case
Commit: 2fc42c7163142d74e2e8ce5549f5d0142fccd89f
https://github.com/llvm/llvm-project/commit/2fc42c7163142d74e2e8ce5549f5d0142fccd89f
Author: Nathan Gauër <brioche at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-compute.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-mesh.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-lib.hlsl
A clang/test/SemaHLSL/Semantics/missing-vs.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
M clang/test/SemaHLSL/Semantics/position.vs.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
Log Message:
-----------
[HLSL] Add initial support for output semantics (#168095)
This commits adds the first part of the output semantics. It only
considers return values (and sret), but does not handle `inout` or `out`
parameters yet.
Those missing bits will reuse the same code, but will require additional
testing & some fixups, so planning on adding them separately.
Commit: 48dca1e929f5ef4ffbd4d291ce8bd9ab03c23fed
https://github.com/llvm/llvm-project/commit/48dca1e929f5ef4ffbd4d291ce8bd9ab03c23fed
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/AST/StmtOpenACC.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
Log Message:
-----------
[OpenACC][CIR] Implement 'atomic capture' lowering (#168422)
The 'atomic capture' variant of the `atomic` construct accepts either a
single statement, or a compound statement containing two statements.
Each of the statements it accepts meet a form of the previous
read/write/update forms, or is a combination of two.
The IR node for atomic capture takes two separate other acc.atomics,
plus a terminator.
This patch implements all of the lowering for these.
Note: This gets the postfix-increment/decrement wrong, but the effort
to do so is enough that I believe we can do that in a followup patch, so
I'll be doing so in the next patch.
Commit: ad31e11ab6d719d803708169a981a49b347c4d82
https://github.com/llvm/llvm-project/commit/ad31e11ab6d719d803708169a981a49b347c4d82
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__ranges/iota_view.h
M libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
Log Message:
-----------
[libc++] Make views::iota aware of __int128 (#167869)
Fixes #167991
Commit: a7ba8dcad76476478100c228a31d9c48391b1e03
https://github.com/llvm/llvm-project/commit/a7ba8dcad76476478100c228a31d9c48391b1e03
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/property-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/no-int-to-ptr.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-copy-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/std-allocator-const.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
Log Message:
-----------
[clang-tidy][docs][NFC] Enforce 80 characters limit (4/4) (#168049)
Fix documentation in `mpi`, `objc`, `openmp`, `performance`,
`portability`, `readability` and `zircon`.
This is part of the codebase cleanup described in
https://github.com/llvm/llvm-project/issues/167098
Commit: 93a1327deaef7abd5c2bf5caf4c4ef40d34460f6
https://github.com/llvm/llvm-project/commit/93a1327deaef7abd5c2bf5caf4c4ef40d34460f6
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
Log Message:
-----------
[lldb] Skip TestLibcxxInternalsRecognizer on asan + MacOS
Unfortunately, in this configuration, the bots are forced to use the
system libcxx, which is too old for what this test is verifying.
In the future, we should re-enable building libcxx with asan on MacOS.
Commit: 1723a5137cba77cc1aace84d392b2ecd501e1069
https://github.com/llvm/llvm-project/commit/1723a5137cba77cc1aace84d392b2ecd501e1069
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
Log Message:
-----------
[mlir][tensor] Drop unused AffineExpr variable (NFC) (#168651)
Commit: c62fc065b4c10370c1aa68cad6f5fa980b640136
https://github.com/llvm/llvm-project/commit/c62fc065b4c10370c1aa68cad6f5fa980b640136
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/lib/asan/CMakeLists.txt
A compiler-rt/lib/asan/asan_aix.cpp
M compiler-rt/lib/asan/asan_posix.cpp
M compiler-rt/lib/asan/scripts/asan_symbolize.py
Log Message:
-----------
[asan] Implement address sanitizer on AIX: platform support (#139587)
Adds some general changes for supporting asan on AIX.
Issue: #138916
Commit: 71e3de8a7f1c0fc71302ac84c826f34fa324ee1c
https://github.com/llvm/llvm-project/commit/71e3de8a7f1c0fc71302ac84c826f34fa324ee1c
Author: Simone Pellegrini <simone.pellegrini at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
Log Message:
-----------
[mlir][vector] Missing indices on vectorization of 1-d reduction to 1-ranked memref (#166959)
Vectorization of a 1-d reduction where the output variable is a 1-ranked
memref can generate an invalid `vector.transfer_write` with no indices
for the memref, e.g.:
vector.transfer_write"(%vec, %buff) <{...}> : (vector<f32>,
memref<1xf32>) -> ()
This patch solves the problem by providing the expected amount of
indices (i.e. matching the rank of the memref).
Commit: b11b7b333ddb90db42dfd2d5003e3a51c3a7c38a
https://github.com/llvm/llvm-project/commit/b11b7b333ddb90db42dfd2d5003e3a51c3a7c38a
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/test/Analysis/block-in-critical-section.cpp
Log Message:
-----------
[clang][analyzer] Add defer_lock_t modelling to BlockInCriticalSectionChecker (#168338)
Fixes #166573
---------
Co-authored-by: Donát Nagy <donat.nagy at ericsson.com>
Co-authored-by: Alan Li <me at alanli.org>
Commit: b79a665f7170fbb631b13175ec747ccfd779bf9e
https://github.com/llvm/llvm-project/commit/b79a665f7170fbb631b13175ec747ccfd779bf9e
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
[AMDGPU] Remove leftover implicit operands from SI_SPILL/SI_RESTORE. (#168546)
Remove leftover implicit operands from SI_SPILL/SI_RESTORE.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 86a82f27ee8cb7477c25561bc5697a6a6a8ff21d
https://github.com/llvm/llvm-project/commit/86a82f27ee8cb7477c25561bc5697a6a6a8ff21d
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/CMakeLists.txt
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/python/CMakeLists.txt
Log Message:
-----------
[MLIR][Python] make sure stubs get installed with LLVM_DISTRIBUTION_COMPONENTS (#168407)
Fixes https://github.com/llvm/llvm-project/issues/168393. Also adds
top-level `MLIR_PYTHON_STUBGEN_ENABLED` CMake option.
Commit: 9cd40da328ca4ee4018dae42f071e5a1540e359f
https://github.com/llvm/llvm-project/commit/9cd40da328ca4ee4018dae42f071e5a1540e359f
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/test/Lower/assignment.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/host-associated.f90
Log Message:
-----------
[flang][NFC] Strip trailing whitespace from tests (7 of N)
Only some fortran source files in flang/test/Lower have been modified.
The other files in the directory will be cleaned up in subsequent
commits
Commit: 7a3923676fecb0dc8d2d728310e84949dabb511a
https://github.com/llvm/llvm-project/commit/7a3923676fecb0dc8d2d728310e84949dabb511a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/interface_symbols_darwin.cpp
Log Message:
-----------
[ASan] Fix interface_symbols_darwin.cpp on internal shell
This test turned out to not actually be that interested. There was just a
subshell usage that needed replacing with readfile, and then the test just
works.
Reviewers: fmayer, DanBlackwell, ndrewh
Reviewed By: ndrewh
Pull Request: https://github.com/llvm/llvm-project/pull/168654
Commit: c2b4e481a0504cbb50e83098d2634b063be6b5c9
https://github.com/llvm/llvm-project/commit/c2b4e481a0504cbb50e83098d2634b063be6b5c9
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/tools/lto/lto.cpp
Log Message:
-----------
[libLTO] add thinlto caching flags to libLTO (#168567)
On AIX, the linker's release cadence is once per year and it doesn't
backport non-critical fixes to previous releases.
We would like to get thinLTO caching accessible for current customers,
so this PR adds the cache flags as cl::opt options.
Commit: 30e5f76d73fda77becb2010012b5cb090cc78c65
https://github.com/llvm/llvm-project/commit/30e5f76d73fda77becb2010012b5cb090cc78c65
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
M llvm/lib/Object/RecordStreamer.cpp
Log Message:
-----------
[llvm] Construct iterator_range with the conversion constructor (NFC) (#168674)
This patch simplifies iterator_range construction with the conversion
constructor.
Commit: 19129ea34388a923fcc9f5e7222ee238adfca0c6
https://github.com/llvm/llvm-project/commit/19129ea34388a923fcc9f5e7222ee238adfca0c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Bitcode/BitcodeConvenience.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h
M llvm/lib/CAS/OnDiskCAS.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/ObjectYAML/MinidumpEmitter.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/tools/llvm-xray/xray-extract.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[llvm] Use llvm::size (NFC) (#168675)
Note that llvm::size only works on types that allow std::distance in
O(1).
Commit: 139f726c84bc2c5144d10a79dd8f31e17ce7e03b
https://github.com/llvm/llvm-project/commit/139f726c84bc2c5144d10a79dd8f31e17ce7e03b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Add IfGuardEmitter and adopt it in InstrInfoEmitter (#168616)
Add a RAII `IfGuardEmitter` to insert simple #if guards and adopt it in
InstrInfoEmitter.
Commit: 4703195c8de047f102214495e39ae80aad152e15
https://github.com/llvm/llvm-project/commit/4703195c8de047f102214495e39ae80aad152e15
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[NFC][LLVM] Namespace cleanup in SLPVectorizer (#168623)
- Remove file local functions out of `llvm` or anonymous namespace and
make them static.
- Use namespace qualifier to define `BoUpSLP` class and several template
specializations.
Commit: 4f3d68a16e7ed8838b18b527192f515971209548
https://github.com/llvm/llvm-project/commit/4f3d68a16e7ed8838b18b527192f515971209548
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParserExtension.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinEH.h
M llvm/lib/MC/MCDisassembler/MCExternalSymbolizer.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/GOFFAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
M llvm/lib/MC/MCParser/XCOFFAsmParser.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinEH.cpp
Log Message:
-----------
[NFC][MC] Namespace cleanup in MC (#168627)
- Add declarations of various `MCAsmParserExtension` creation functions
to MCAsmParserExtension.h and use namespace qualifiers to define these
and some other functions.
- Add end of namespace comments.
- Fix indentation of `MCNullStreamer` class.
- Remove namespace surrounding code in MCWinEH.cpp and use "using
namespace" instead.
Commit: 93d759ce5a63cf74882087bad020825764043381
https://github.com/llvm/llvm-project/commit/93d759ce5a63cf74882087bad020825764043381
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaCXX/wmissing-noreturn-suggestion.cpp
Log Message:
-----------
[Clang] suppress -Wmissing-noreturn for virtual methods with throw-only bodies (#167523)
Fixes #167247
---
This PR addresses a case where Clang emitted `-Wmissing-noreturn` for
virtual methods whose body consists of a `throw` expression
```cpp
struct Base {
virtual void foo() {
throw std::runtime_error("error");
}
};
```
Commit: 435384583830ded8c3c9bc332a7f361de2d29346
https://github.com/llvm/llvm-project/commit/435384583830ded8c3c9bc332a7f361de2d29346
Author: Joshua Rodriguez <josh.rodriguez at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/trunc-avg-fold.ll
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/tools/llvm-ir2vec/output/reference_triplets.txt
M llvm/test/tools/llvm-ir2vec/output/reference_x86_entities.txt
Log Message:
-----------
[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)
GlobalISel now selects hadd family of intrinsics, without falling back
to SDAG.
Commit: 80d327e84606a99fd2c0b3f6ddb37f32ed89b997
https://github.com/llvm/llvm-project/commit/80d327e84606a99fd2c0b3f6ddb37f32ed89b997
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
A llvm/test/CodeGen/Hexagon/bfloat.ll
A llvm/test/CodeGen/Hexagon/bfloat_vec.ll
Log Message:
-----------
[Hexagon] Enable soft bf16 in hexagon (#167924)
This patch adds:
1. Support to recognize bf16 type in the frontend and isel/abi support
for scalar bf16 programs
Limitations: fp_to_bf16 is being generated with a tablegen pattern
instead of lowering via expansion. This is because we do not have
support for fcanonincalize instruction which should prevent an SNaN
being converted to an infinity due to truncation.
2. Vector codegen support for bf16
Patch By: Fateme Hosseini
Co-authored-by: Muntasir Mallick <quic_mallick at quicinc.com>
Co-authored-by: Muntasir Mallick <mallick at qti.qualcomm.com>
Co-authored-by: Kaushik Kulkarni <quic_kauskulk at quicinc.com>
Commit: f3d8a5cf5bc058328004bd0905ab4974f09fc131
https://github.com/llvm/llvm-project/commit/f3d8a5cf5bc058328004bd0905ab4974f09fc131
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Analysis/InstructionPrecedenceTracking.cpp
Log Message:
-----------
[IPT] Remove ipt.NumInstScanned statistic (#168515)
The NumInstScanned statistic is non-determinstic across multiple
identical invocations of LLVM, and leads to noise when trying to diff
LLVM statistics with e.g. ./utils/tdiff.py in llvm-test-suite.
My understanding is that it's non-deterministic because the users of
IPT's hasSpecialInstructions/isPreceededBySpecialInstruction API aren't
deterministic themselves.
This PR removes it and fixes #157598. This is just a small
quality-of-life improvement for the ./utils/tdiff.py workflow, but happy
to leave the statistic in if others are using it.
Commit: 9c2bbfe4a46e2d58294b6bb3e3a3584ade6a3304
https://github.com/llvm/llvm-project/commit/9c2bbfe4a46e2d58294b6bb3e3a3584ade6a3304
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/pr168594.ll
Log Message:
-----------
[X86] X86ISelDAGToDAG - don't let ADD/SUB(X,1) -> SUB/ADD(X,-1) constant fold (#168726)
This late into lowering we don't have a good way to handle constant build_vector lowering
Fixes #168594
Commit: c9e22d3751299fe31eeefbfb646bef7a78bcde8a
https://github.com/llvm/llvm-project/commit/c9e22d3751299fe31eeefbfb646bef7a78bcde8a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/tools/driver/Driver.cpp
Log Message:
-----------
[lldb][windows] add color to the Python.dll not found error (#168718)
Make the `Python.dll not found` error message stand out more by using
the `llvm::WithColor::error()` method.
---
### Example
#### Before
<img width="782" height="431" alt="Screenshot 2025-11-19 at 15 50 22"
src="https://github.com/user-attachments/assets/93960c50-cbf2-41f7-aba3-2f2a8af916cc"
/>
#### After
<img width="780" height="430" alt="Screenshot 2025-11-19 at 15 54 28"
src="https://github.com/user-attachments/assets/f7f4954b-0ce3-4a4b-b9af-5af876032573"
/>
rdar://165047059
Commit: c6775e2eb6b94fd60453d207902cf961195bf780
https://github.com/llvm/llvm-project/commit/c6775e2eb6b94fd60453d207902cf961195bf780
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/fuzzer/merge-posix.test
Log Message:
-----------
[compiler-rt] [libFuzzer] Fix merge-posix test (again) (#168639)
Commit: 5c73feddd1654624703102fdfd341df5046ba793
https://github.com/llvm/llvm-project/commit/5c73feddd1654624703102fdfd341df5046ba793
Author: nerix <nerixdev at outlook.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/inline-annotations.test
Log Message:
-----------
[ObjectYAML][CodeView] Include inline annotation data (#168211)
The annotation data for `S_INLINESITE` symbols was missing in YAML. This
caused PDBs with inline sites to have incorrect symbol offsets, because
`S_INLINESITE` wouldn't have the same size after creating a PDB from
YAML.
I kept the annotations as binary, because that's how they're represented
in LLVM.
Commit: 1d474e4b97208a5cdda76e4f18dddd16e62f8f6e
https://github.com/llvm/llvm-project/commit/1d474e4b97208a5cdda76e4f18dddd16e62f8f6e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
Log Message:
-----------
[llvm-cov] Use a range-based for loop (NFC) (#168671)
Identified with modernize-loop-convert.
Commit: b78824acef43066694978a701517d9f2d280a117
https://github.com/llvm/llvm-project/commit/b78824acef43066694978a701517d9f2d280a117
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Use a range-based for loop (NFC) (#168672)
Identified with modernize-loop-convert.
Commit: c2445d9c26c10eebfd6df603f2a9a0aa774e8d84
https://github.com/llvm/llvm-project/commit/c2445d9c26c10eebfd6df603f2a9a0aa774e8d84
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[Support] Use StringMap::contains (NFC) (#168673)
Identified with readability-container-contains.
Commit: d988991f9f6b50941ecbffc316890342147a9f75
https://github.com/llvm/llvm-project/commit/d988991f9f6b50941ecbffc316890342147a9f75
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Parser/preprocessor.cpp
A flang/test/Preprocessing/bug168077.F90
Log Message:
-----------
[flang] Tokenize all -D macro bodies, and do it better (#168116)
The compiler presently tokenizes the bodies of only function-like macro
definitions from the command line, and does so crudely. Tokenize
keyword-like macros too, get character literals right, and handle
numeric constants correctly. (Also delete two needless functions noticed
in characters.h.)
Fixes https://github.com/llvm/llvm-project/issues/168077.
Commit: f5f6ca659992ae6d26b2a96304ceb65a1fd63ad6
https://github.com/llvm/llvm-project/commit/f5f6ca659992ae6d26b2a96304ceb65a1fd63ad6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/bug168099.f90
Log Message:
-----------
[flang] Fix crash in UseErrorDetails construction case (#168126)
When a derived type has the same name as a generic function, and is
use-associated into a scope along with other distinct derived types of
the same name, we crash. Don't crash.
Fixes https://github.com/llvm/llvm-project/issues/168099.
Commit: a55e30b12cf90ba2e9c674c94ea3f2b5fa8f2c3b
https://github.com/llvm/llvm-project/commit/a55e30b12cf90ba2e9c674c94ea3f2b5fa8f2c3b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/unit.cpp
M flang/docs/Extensions.md
M flang/docs/RuntimeEnvironment.md
Log Message:
-----------
[flang][runtime] Control stream truncation via runtime environment (#168415)
The ISO Fortran standards don't say whether a WRITE to a formatted
stream unit should truncate the unit if there has been any repositioning
(via POS= control list specifiers) to an earlier point in the stream.
But units with sequential records do truncate on writes after BACKSPACE
and REWIND statements, and many compilers (including this one) truncate
stream units too. Since some compilers don't truncate streams, this
patch adds an environment variable FORT_TRUNCATE_STREAM that can be set
to 0 to disable truncation and ease porting to flang-new of codes that
depend on that behavior.
Fixes https://github.com/llvm/llvm-project/issues/167569.
Commit: 2f6f045ea8d9342a2c57ea93f6343622499dd87a
https://github.com/llvm/llvm-project/commit/2f6f045ea8d9342a2c57ea93f6343622499dd87a
Author: darkbuck <michael.hliao at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/call.c
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/test/Transforms/set-runtime-call-attributes.fir
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Resync memory effect attribute with LLVM IR (#168568)
- Add missing locations, namely 'ErrnoMem', 'TargetMem0', and
'TargetMem1'.
Commit: eb65517c76c131de7a3f772beea02347279ab6a3
https://github.com/llvm/llvm-project/commit/eb65517c76c131de7a3f772beea02347279ab6a3
Author: Aleksandr Nogikh <wp32pw at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/attr-malloc_span.c
A clang/test/SemaCXX/attr-malloc_span.cpp
Log Message:
-----------
[Clang] Introduce malloc_span attribute (#167010)
The "malloc" attribute restricts the possible function signatures to the
ones returning a pointer, which is not the case for some non-standard
allocation function variants. For example, P0901R11 proposed ::operator
new overloads that return a return_size_t result - a struct that
contains a pointer to the allocated memory as well as the actual size of
the allocated memory. Another example is __size_returning_new.
Introduce a new "malloc_span" attribute that exhibits similar semantics,
but applies to functions returning records where one member is a pointer
(assumed to point to the allocated memory) and another is an integer
(assumed to be the size of the allocated memory). This is the case for
return_size_t as well as std::span, should it be returned from such an
annotated function.
An alternative approach would be to relax the restrictions of the
existing "malloc" attribute to be applied to both functions returning
pointers and functions returning span-like structs. However, it would
complicate the user-space code by requiring specific Clang version
checks. In contrast, the presence of a new attribute can be
straightforwardly verified via the __has_attribute macro. Introducing a
new attribute also avoids concerns about the potential incompatibility
with GCC's "malloc" semantics.
In future commits, codegen can be improved to recognize the noalias-ness
of the pointer returned inside a span-like struct.
This change helps unlock the alloc token instrumentation for such
non-standard allocation functions:
https://clang.llvm.org/docs/AllocToken.html#instrumenting-non-standard-allocation-functions
Commit: c41f64239954b55468e44e6a6c92c1b4d2a1d8fe
https://github.com/llvm/llvm-project/commit/c41f64239954b55468e44e6a6c92c1b4d2a1d8fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/dyld_insert_libraries_reexec.cpp
M compiler-rt/test/asan/TestCases/Darwin/lit.local.cfg.py
Log Message:
-----------
[ASan] Make dyld_insert_libraries_reexec work with internal shell
This test was doing some feature checks within the test itself. This patch
rewrites the feature checks to be done in a fashion more idiomatic to lit,
as the internal shell does not support the features needed for the previous
feature checks.
Reviewers: ndrewh, DanBlackwell, fmayer
Reviewed By: ndrewh
Pull Request: https://github.com/llvm/llvm-project/pull/168655
Commit: e6fc654bfd632a23574e18b43631470285a2cdf8
https://github.com/llvm/llvm-project/commit/e6fc654bfd632a23574e18b43631470285a2cdf8
Author: Nathan Gauër <brioche at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
Log Message:
-----------
[HLSL] replace std::unordered_map with DenseMap (#168739)
Broke some builds because of a missing include. Changing to a DenseMap
and adding the missing include.
Commit: 8f91d9f0ace77a5856219190b5e51105c5133af9
https://github.com/llvm/llvm-project/commit/8f91d9f0ace77a5856219190b5e51105c5133af9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names-debug-types.test
R cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.test
Log Message:
-----------
[cross-project-tests][DebugInfo] Make simplified-template-names test runnable on Darwin (#168725)
The test was failing on Darwin for two reasons:
1. `-fdebug-type-sections` is not a recognized flag on Darwin
2. We fail to reconstitute a name if the template parameter has a type
that has a preferred_name. With LLDB tuning the type of such a parameter
is a typedef, i.e., the preferred name. Without tuning it would be the
canonical type that the typedef (possibly through a chain of typedefs)
points to.
This patch addresses (1) by splitting the `-fdebug-type-sections` tests
into a separate file (and only mark that one `UNSUPPORTED`). Which means
we can at least XFAIL the non-type-sections tests on Darwin.
To fix (2) we might need to make the `DWARFTypePrinter` aware of
non-canonical `DW_AT_type`s of template parameters.
Commit: e9b11ae83731bbca6adf9f9b39b6d3aa1869e445
https://github.com/llvm/llvm-project/commit/e9b11ae83731bbca6adf9f9b39b6d3aa1869e445
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A compiler-rt/test/asan/TestCases/Darwin/Inputs/check-syslog.sh
M compiler-rt/test/asan/TestCases/Darwin/duplicate_os_log_reports.cpp
Log Message:
-----------
[ASan] Make duplicate_os_log_reports.cpp work with the internal shell
This test used a for loop to implement retries and also did some trickery with PIDs.
For this test, just invoke bash for actually running the test given we need the PID,
and move the for loop into a separate shell script file that we can then invoke from
within the test. Normally it would make sense to rewrite such a script in Python, but
given this test does not have portability concerns only running on Darwin, it is fine
to use a shell script here given there is no other convenient alternative.
Reviewers: ndrewh, DanBlackwell, fmayer
Reviewed By: ndrewh
Pull Request: https://github.com/llvm/llvm-project/pull/168656
Commit: 0b921f52cc9313b89ca8fe2707d90cb1c2809387
https://github.com/llvm/llvm-project/commit/0b921f52cc9313b89ca8fe2707d90cb1c2809387
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
DAG: Use poison when splitting vector_shuffle results (#168176)
Commit: 1782e501f57ee5d3a1d2548f87ed4b82e7568b1d
https://github.com/llvm/llvm-project/commit/1782e501f57ee5d3a1d2548f87ed4b82e7568b1d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
DAG: Reorder SDPatternMatch combinators earlier (#168625)
Split out from #168288
Commit: ed0c36ca2885f4b0d6b36d7645248e24c2e8573c
https://github.com/llvm/llvm-project/commit/ed0c36ca2885f4b0d6b36d7645248e24c2e8573c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/fuzzer/big-file-copy.test
Log Message:
-----------
[Fuzzer] make big-file-copy.test work with the internal shell (#168658)
This patch uses several shell features not supported by the internal
shell, such as $? to get the exit code of a command, and exit. This
patch adjusts the test to work with the internal shell by using bash to
run the actual command with a zero exit code to ensure the file is
deleted, and python to propagate the exit code up to lit.
Commit: 36cbceca40b7e6a8b5809718bf1afdb2af8b039a
https://github.com/llvm/llvm-project/commit/36cbceca40b7e6a8b5809718bf1afdb2af8b039a
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
Log Message:
-----------
[CIR] Ternary with const cond and throw in the live part (#168432)
Ternary with a constant condition and throw in the live part
Commit: 009ec6fc64e23ee853485f2b97027a2dc1f040ab
https://github.com/llvm/llvm-project/commit/009ec6fc64e23ee853485f2b97027a2dc1f040ab
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/IR/eh-inflight.cir
A clang/test/CIR/Lowering/eh-inflight.cir
Log Message:
-----------
[CIR] Upstream Exception EhInflight op (#165621)
Upstream Exception EhInflight op as a prerequisite for full catch
handlers implementation
Issue https://github.com/llvm/llvm-project/issues/154992
Commit: f65294ed52cc8682924c5af17c262be267349f7d
https://github.com/llvm/llvm-project/commit/f65294ed52cc8682924c5af17c262be267349f7d
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.test.dat
Log Message:
-----------
Add test case for xsgetn in basic_filebuf (#167937)
This is the promised follow-up to #167779. It simply adds a test case
provided by philnik777
Commit: 87a1fd17e9be508e17fdeb37ad284b44c71795d5
https://github.com/llvm/llvm-project/commit/87a1fd17e9be508e17fdeb37ad284b44c71795d5
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] "port" 5efce7392f3f (arm 32-bit asm compiler-rt)
Commit: 6ad162393cf8ab2989e158576877e4570e091bbf
https://github.com/llvm/llvm-project/commit/6ad162393cf8ab2989e158576877e4570e091bbf
Author: Sayan Saha <sayans at mathworks.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
Log Message:
-----------
[tosa] : Enhance EqualizeRanks to handle dynamic dimensions. (#168564)
Legalizing following IR to `tosa` using `tf-tosa-opt` from `tensorflow`
repo:
```
func.func @main(%arg0: tensor<?x?x?x?xf32>) -> tensor<?x?x?x5xf32> {
%0 = "tfl.pseudo_const"() <{value = dense<0.000000e+00> : tensor<5xf32>}> : () -> tensor<5xf32>
%1 = tfl.add(%arg0, %0) <{fused_activation_function = "NONE"}> : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
return %1 : tensor<?x?x?x5xf32>
}
```
fails with
```
error: 'tosa.add' op operands don't have matching ranks
%1 = tfl.add(%arg0, %0) <{fused_activation_function = "NONE"}> : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
^
tfl.mlir:3:10: note: see current operation: %1 = "tosa.add"(%arg0, %0) : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
// -----// IR Dump After TosaLegalizeTFLPass Failed (tosa-legalize-tfl) //----- //
"func.func"() <{function_type = (tensor<?x?x?x?xf32>) -> tensor<?x?x?x5xf32>, sym_name = "main"}> ({
^bb0(%arg0: tensor<?x?x?x?xf32>):
%0 = "tosa.const"() <{values = dense<0.000000e+00> : tensor<5xf32>}> : () -> tensor<5xf32>
%1 = "tosa.add"(%arg0, %0) : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
"func.return"(%1) : (tensor<?x?x?x5xf32>) -> ()
}) : () -> ()
```
This is because of the following check in `computeReshapeOutput` called
from `EqualizeRanks` function:
```
if (lowerRankDim != 1 && higherRankDim != 1 &&
lowerRankDim != higherRankDim)
return failure();
```
Based on the broadcast semantics defined in
https://mlir.llvm.org/docs/Traits/Broadcastable/#dimension-inference I
think it's legal to allow `lowerRankDim != higherRankDim` if one of them
is dynamic. At runtime verifier should enforce that
1. if lowerRankDim is dynamic and higherRankDim is static then the
dynamic dim matches the static dim and vice-versa
2. if both are dynamic, they should match
It's not necessary to error out during the op construction time.
Commit: 8bfd29486e042af5b4e4a6e9ef5e6d04ce618651
https://github.com/llvm/llvm-project/commit/8bfd29486e042af5b4e4a6e9ef5e6d04ce618651
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libcxx/include/__charconv/from_chars_integral.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__locale_dir/num.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/limits
M libcxx/test/libcxx/numerics/clamp_to_integral.pass.cpp
M libcxx/test/std/numerics/c.math/isnormal.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.gps/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.tai/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_greater/cmp_greater.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less/cmp_less.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less_equal/cmp_less_equal.pass.cpp
Log Message:
-----------
[libc++] Remove is_signed<T> use from <limits> (#168334)
`numeric_limits` already has an `is_signed` member. We can use that
instead of using `std::is_signed`.
Commit: 449807a39867d98bbd0abbd597ff3388a4f86a2a
https://github.com/llvm/llvm-project/commit/449807a39867d98bbd0abbd597ff3388a4f86a2a
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn
Log Message:
-----------
[gn] port c62fc065b4c1
Commit: 0c7d826129209972741dda3bd8bc40e500d5cda8
https://github.com/llvm/llvm-project/commit/0c7d826129209972741dda3bd8bc40e500d5cda8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/include/lldb/Expression/DiagnosticManager.h
A lldb/include/lldb/Host/common/DiagnosticsRendering.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
R lldb/include/lldb/Utility/DiagnosticsRendering.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/DiagnosticsRendering.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Utility/CMakeLists.txt
R lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/unittests/Host/common/CMakeLists.txt
A lldb/unittests/Host/common/DiagnosticsRenderingTest.cpp
M lldb/unittests/Utility/CMakeLists.txt
R lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
Log Message:
-----------
[NFC][lldb] move DiagnosticsRendering to Host (#168696)
NFC patch which moves `DiagnosticsRendering` from `Utility` to `Host`.
This refactoring is needed for
https://github.com/llvm/llvm-project/pull/168603. It adds a method to
check whether the current terminal supports Unicode or not. This will be
OS dependent and a better fit for `Host`. Since `Utility` cannot depend
on `Host`, `DiagnosticsRendering` must live in `Host` instead.
Commit: 3890a4a9e5a8c128cf9b193c57841efbbaf36866
https://github.com/llvm/llvm-project/commit/3890a4a9e5a8c128cf9b193c57841efbbaf36866
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
Log Message:
-----------
[RISCV] Update X60 ReleaseAtCycles for Vector Integer Arithmetic Instructions (#152557)
This PR updates the ReleaseAtCycles for all instructions described in
Section 11 of the RVV Spec: Vector Integer Arithmetic Instructions. The
data used comes from camel-cdr.
Commit: 8ab7b60c27c3c61558b6e94f2b010a41842a7592
https://github.com/llvm/llvm-project/commit/8ab7b60c27c3c61558b6e94f2b010a41842a7592
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump Runner Version in CI Containers
To ensure we stay ahead of the ~6 month time horizon. This new version
seems to be mostly small version bumps and minor fixes that probably are
not too relevant to us.
Commit: 0f615dc6a6bc8b96fe85f23adef740a313537a0e
https://github.com/llvm/llvm-project/commit/0f615dc6a6bc8b96fe85f23adef740a313537a0e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/build-metrics-container.yml
Log Message:
-----------
[Github] Make metrics container build use common actions (#168667)
This patch makes the metrics container build/push job use the common
container build/push actions to simplify the workflow by quite a bit.
Commit: 6f8e87b9d097c5ef631f24d2eb2f34eb31b54d3b
https://github.com/llvm/llvm-project/commit/6f8e87b9d097c5ef631f24d2eb2f34eb31b54d3b
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn] port 22a2cae5d6735 (AttrIsTypeDependent.inc)
Commit: a4456a5ce3fd4a57343c0cc6dd46b2d024985bc4
https://github.com/llvm/llvm-project/commit/a4456a5ce3fd4a57343c0cc6dd46b2d024985bc4
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M utils/bazel/.bazelrc
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Flip --enable_bzlmod to true (#168555)
Switches to the config added in #164891
Fixes #55924
Commit: ddbdc9a86ec6aa2b449f94003bdaa1bf9e16b3b0
https://github.com/llvm/llvm-project/commit/ddbdc9a86ec6aa2b449f94003bdaa1bf9e16b3b0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
Log Message:
-----------
[AMDGPU] Add baseline test to show spilling of wmma scale. NFC (#168163)
This is to show the spilling of WMMA scale values which are limited
to low 256 VGPRs. We have free registers, just RA allocates low 256
first.
Commit: 98b170893e955659b9c678c4b8ede08bb11163b2
https://github.com/llvm/llvm-project/commit/98b170893e955659b9c678c4b8ede08bb11163b2
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/docs/Dialects/NVVMDialect.md
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
Log Message:
-----------
[MLIR][NVVM] Doc fixes (#168716)
Commit: 1f3455093c0e0849f52016fccc91b413f85a609a
https://github.com/llvm/llvm-project/commit/1f3455093c0e0849f52016fccc91b413f85a609a
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-server/BUILD.gn
Log Message:
-----------
[gn] port 2675dcd72d02ee1ac (lldb-server PlatformOptions.inc)
Commit: bc5f3d2063e740262a873f223b86ffda39dfa7a6
https://github.com/llvm/llvm-project/commit/bc5f3d2063e740262a873f223b86ffda39dfa7a6
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
Log Message:
-----------
[gn] port 0ae2bccde45 (arm SDNodeInfo)
Commit: 3adcfd22ecc2f2a8fbd32e0d1533fc22111ed7cb
https://github.com/llvm/llvm-project/commit/3adcfd22ecc2f2a8fbd32e0d1533fc22111ed7cb
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
Log Message:
-----------
[gn] port e47e9f3b7b136 (nvptx SDNodeInfo)
Commit: d2c7c6064259320def7a74e111079725958697d4
https://github.com/llvm/llvm-project/commit/d2c7c6064259320def7a74e111079725958697d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[InstSimplify] Add whitespace to struct declarations in vector-calls.ll. NFC
This matches how IR is printed.
Commit: 1233c4bf230bcc40f86b8684e4cc1e4d368a8b79
https://github.com/llvm/llvm-project/commit/1233c4bf230bcc40f86b8684e4cc1e4d368a8b79
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/test/Driver/crash-ir-repro.cpp
Log Message:
-----------
Minor fix of reproducer in #165572 (#168751)
Commit: a757c4e74e6a3130c708b26903d5117a9279bef8
https://github.com/llvm/llvm-project/commit/a757c4e74e6a3130c708b26903d5117a9279bef8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)
Currently LibcallLoweringInfo is defined inside of TargetLowering,
which is owned by the subtarget. Pass in the subtarget so we can
construct LibcallLoweringInfo with the subtarget. This is a temporary
step that should be revertable in the future, after LibcallLoweringInfo
is moved out of TargetLowering.
Commit: 36f9d5a41f0eff44e65f09240c7ca454c47b35cd
https://github.com/llvm/llvm-project/commit/36f9d5a41f0eff44e65f09240c7ca454c47b35cd
Author: Paddy McDonald <padriff at hotmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/AddressSanitizer.rst
M compiler-rt/include/sanitizer/common_interface_defs.h
M compiler-rt/lib/asan/asan_errors.cpp
A compiler-rt/test/asan/TestCases/disable_container_overflow_checks.cpp
A compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
[ASan] Document define to disable container overflow checks at compile time. (#163468)
Document a define to allow library developers to support disabling
AddressSanitizer's container overflow detection in template code at
compile time.
The primary motivation is to reduce false positives in environments
where
libraries and frameworks that cannot be recompiled with sanitizers
enabled
are called from application code. This supports disabling checks when
the
runtime environment cannot be reliably controlled to use ASAN_OPTIONS.
Key changes:
- Use the define `__SANITIZER_DISABLE_CONTAINER_OVERFLOW__` to disable
instrumentation at compile time
- Implemented redefining the container overflow APIs in
common_interface_defs.h
to use define to provide null implementation when define is present
- Update documentation in AddressSanitizer.rst to suggest and illustrate
use of the define
- Add details of the define in PrintContainerOverflowHint()
- Add test disable_container_overflow_checks to verify new hints on the
error and fill the testing gap that
ASAN_OPTIONS=detect_container_overflow=0
works
- Add tests demonstrating the issue around closed source libraries and
instrumented apps that both modify containers
This requires no compiler changes and should be supportable cross
compiler toolchains.
An RFC has been opened to discuss:
https://discourse.llvm.org/t/rfc-add-fsanitize-address-disable-container-overflow-flag-to-addresssanitizer/88349
Commit: fc95558f628de4243dc85e31eaaac795435ca031
https://github.com/llvm/llvm-project/commit/fc95558f628de4243dc85e31eaaac795435ca031
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[TableGen] Use size_t for SubRegIndicesSize (NFC) (#168728)
This patch changes the type of SubRegIndicesSize to size_t. The
original type deduced for "auto" is a signed type, but size_t, an
unsigned type, is safe here according to the usage.
Commit: 06f0d30e2887b98841a4d5d0915aebbc1ef7480e
https://github.com/llvm/llvm-project/commit/06f0d30e2887b98841a4d5d0915aebbc1ef7480e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/ARM/BUILD.gn
Log Message:
-----------
[gn] port 0ae2bccde45 more
Commit: fb8155c2b87f265c56a1668b3640a52afaaa55d2
https://github.com/llvm/llvm-project/commit/fb8155c2b87f265c56a1668b3640a52afaaa55d2
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn build] Port 8fce476c8122
Commit: 60a27953eabe3a0ded7c9b7b7786dfd1fe5d8c5f
https://github.com/llvm/llvm-project/commit/60a27953eabe3a0ded7c9b7b7786dfd1fe5d8c5f
Author: Benjamin Stott <Benjamin.Stott at sony.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprComplex.cpp
A clang/test/CodeGen/complex-compound-assign-bitfield.c
Log Message:
-----------
[Clang][CodeGen] Use EmitLoadOfLValue instead of EmitLoadOfScalar to get LHS for complex compound assignment (#166798)
- Fixes https://github.com/llvm/llvm-project/issues/166512
- `ComplexExprEmitter::EmitCompoundAssignLValue` is calling
`EmitLoadOfScalar(LValue, SourceLocation)` to load the LHS value in the
case that it's non-complex, however this function requires that the
value is a simple LValue - issue occurred because the LValue in question
was a bitfield LValue. I changed it to use this function which seems to
handle all of the different cases (deferring to the original
`EmitLoadOfScalar` if it's a simple LValue)
Commit: 13e09ebe2dc7699598ac6eeb5fcb8738db27743b
https://github.com/llvm/llvm-project/commit/13e09ebe2dc7699598ac6eeb5fcb8738db27743b
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
A lld/test/ELF/aarch64-funcinit64-invalid.s
A lld/test/ELF/aarch64-funcinit64.s
Log Message:
-----------
ELF: Add support for relocating R_AARCH64_FUNCINIT64.
R_AARCH64_FUNCINIT64 is a dynamic relocation type for relocating
word-sized data in the output file using the return value of
a function. An R_AARCH64_FUNCINIT64 shall be relocated as an
R_AARCH64_IRELATIVE with the target symbol address if the target
symbol is non-preemptible, and it shall be a usage error to relocate an
R_AARCH64_FUNCINIT64 with a preemptible or STT_GNU_IFUNC target symbol.
The initial use case for this relocation type shall be for emitting
global variable field initializers for structure protection. With
structure protection, the relocation value computation is tied to the
compiler implementation in such a way that it would not be reasonable to
define a relocation type for it (for example, it may involve computing
a hash using a compiler-determined algorithm), hence the need for the
computation to be implemented as code in the binary.
Part of the AArch64 psABI extension:
https://github.com/ARM-software/abi-aa/issues/340
Reviewers: smithp35, fmayer, MaskRay
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/156564
Commit: 56112685f7a25078868b8f09c72feaf4ceae50f9
https://github.com/llvm/llvm-project/commit/56112685f7a25078868b8f09c72feaf4ceae50f9
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
Log Message:
-----------
[CIR] Handle default arguments in ctors (#168649)
This adds the scalar expression visitor needed to handle default
arguments being passed to constructors.
Commit: afcb9537bb40143d45dd5aeb06009b6aaee1f6f6
https://github.com/llvm/llvm-project/commit/afcb9537bb40143d45dd5aeb06009b6aaee1f6f6
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
Log Message:
-----------
[bazel] Fix bzlmod reference to @vulkan_sdk (#168767)
vulkan_sdk_setup is the name of the method that configures it, but the
repo itself has the name vulkan_sdk
This was caught by enabling the bzlmod flag for CI. The GH action runs
`blaze test @llvm-project/...` but the target is tagged manual, so it's
excluded. The buildkite CI runs `bazel query | xargs bazel test` which
will include manual targets.
Commit: e148d2d422c4f310785e38942c8eb7243b065d7a
https://github.com/llvm/llvm-project/commit/e148d2d422c4f310785e38942c8eb7243b065d7a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll
Log Message:
-----------
[LV] Simplify existing load/store sink/hoisting tests, extend coverage.
Clean up some of the existing predicated load/store sink/hosting tests
and add additional test coverage for more complex cases.
Commit: 12131d5cd39025c1e9e521fde6ffbfffd51dff1c
https://github.com/llvm/llvm-project/commit/12131d5cd39025c1e9e521fde6ffbfffd51dff1c
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
Log Message:
-----------
[SLPVectorizer] Widen constant strided loads. (#162324)
Given a set of pointers, check if they can be rearranged as follows (%s is a constant):
%b + 0 * %s + 0
%b + 0 * %s + 1
%b + 0 * %s + 2
...
%b + 0 * %s + w
%b + 1 * %s + 0
%b + 1 * %s + 1
%b + 1 * %s + 2
...
%b + 1 * %s + w
...
If the pointers can be rearanged in the above pattern, it means that the
memory can be accessed with a strided loads of width `w` and stride `%s`.
Commit: df58c38b5a831da1cd96317297c9482402c60216
https://github.com/llvm/llvm-project/commit/df58c38b5a831da1cd96317297c9482402c60216
Author: Kai Lin <50469469+OMG-link at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/combine-vl-vw-macc.ll
Log Message:
-----------
[RISCV][DAGCombiner] Fix potential missed combine in VL->VW extension (#168026)
The previous implementation of `combineOp_VLToVWOp_VL` manually replaced
old
nodes with newly created widened nodes, but only added the new node
itself to
the `DAGCombiner` worklist. Since the users of the new node were not
added,
some combine opportunities could be missed when external `DAGCombiner`
passes
expected those users to be reconsidered.
This patch replaces the custom replacement logic with a call to
`DCI.CombineTo()`, which performs node replacement in a way consistent
with
`DAGCombiner::Run`:
- Replace all uses of the old node.
- Add the new node and its users to the worklist.
- Clean up unused nodes when appropriate.
Using `CombineTo` ensures that `combineOp_VLToVWOp_VL` behaves
consistently with
the standard `DAGCombiner` update model, avoiding discrepancies between
the
private worklist inside this routine and the global worklist managed by
the
combiner.
This resolves missed combine cases involving VL -> VW operator widening.
---------
Co-authored-by: Kai Lin <omg_link at qq.com>
Commit: e00314be1cf5e7ebba25339439d427174eb6f24b
https://github.com/llvm/llvm-project/commit/e00314be1cf5e7ebba25339439d427174eb6f24b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
Log Message:
-----------
workflows/libclang-abi-tests: Remove use of install-ninja action (#168642)
This is not needed now that we are using the container to run the
workflow.
Commit: 2f9f492b3d160dee8ae080e981dd6e92aadf56ce
https://github.com/llvm/llvm-project/commit/2f9f492b3d160dee8ae080e981dd6e92aadf56ce
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/hlsl-test-all.yaml
Log Message:
-----------
workflows/hlsl-test-all: Drop use of setup-windows action (#167437)
It doesn't look like these tests are actually run on Windows, so we
don't need it.
Commit: f85942728fe2edfc681831abf8ecd2f245e1aaaa
https://github.com/llvm/llvm-project/commit/f85942728fe2edfc681831abf8ecd2f245e1aaaa
Author: Thibault Monnier <97551402+Thibault-Monnier at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGen/X86/sse-builtins.c
Log Message:
-----------
[CIR] Upstream CIR codegen for mxcsr x86 builtins (#167948)
Commit: c34927ab5ac9f359616657c3f5e05f868db901f6
https://github.com/llvm/llvm-project/commit/c34927ab5ac9f359616657c3f5e05f868db901f6
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/commit-access-review.py
Log Message:
-----------
commit-access-review.py: Remove new contributor check (#168629)
We don't need this anymore since all new contributors in the last year
have applied for commit access using GitHub issues. There is already
code in the script that removes anyone who submitted a request, so we
don't need the old code any more (which was way too conservitave and
very slow).
Commit: 11dff3a0e06d6471863f4e997f6c4e5d05de3466
https://github.com/llvm/llvm-project/commit/11dff3a0e06d6471863f4e997f6c4e5d05de3466
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
Log Message:
-----------
[clang-doc][NFC] Lift Mustache template generation from HTML (#167815)
To prepare for more backends to use Mustache templates, this patch lifts
the Mustache utilities from `HTMLMustacheGenerator.cpp` to
`Generators.h`. A MustacheGenerator interface is created to share code for
template creation.
Commit: c9f573463ebd7b4e46da4877802f2364f700e54a
https://github.com/llvm/llvm-project/commit/c9f573463ebd7b4e46da4877802f2364f700e54a
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A llvm/include/llvm/Analysis/CMakeLists.txt
R llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
A llvm/include/llvm/Analysis/TargetLibraryInfo.td
A llvm/include/llvm/Analysis/TargetLibraryInfoImpl.td
M llvm/include/llvm/CMakeLists.txt
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/LTO/UpdateCompilerUsed.cpp
M llvm/lib/TableGen/StringToOffsetTable.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
A llvm/test/TableGen/TargetLibraryInfo.td
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
A llvm/utils/TableGen/Basic/TargetLibraryInfoEmitter.cpp
Log Message:
-----------
[Analysis] Move TargetLibraryInfo data to TableGen (#165009)
The collection of library function names in TargetLibraryInfo faces
similar challenges as RuntimeLibCalls in the IR component. The number of
function names is large, there are numerous customizations based on the
triple (including alternate names), and there is a lot of replicated
data in the signature table.
The ultimate goal would be to capture all lbrary function related
information in a .td file. This PR brings the current .def file to
TableGen, almost as a 1:1 replacement. However, there are some
improvements which are not possible in the current implementation:
- the function names are now stored as a long string together with an
offset table.
- the table of signatures is now deduplicated, using an offset table for
access.
The size of the object file decreases about 34kB with these changes. The
hash table of all function names is still constructed dynamically. A
static table like for RuntimeLibCalls is the next logical step.
The main motivation for this change is that I have to add a large number
of custom names for z/OS (like in RuntimeLibCalls.td), and the current
infrastructur does not support this very well.
Commit: 2b16ae0d42ebc5b9c42a9d14c8a40bef4c9a6683
https://github.com/llvm/llvm-project/commit/2b16ae0d42ebc5b9c42a9d14c8a40bef4c9a6683
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
Log Message:
-----------
[RISCV] Fix CFI Multiple Locations Test (#168772)
Commit: 609c88a1fd8bdfd67f86a1c129325e2ccd6b959c
https://github.com/llvm/llvm-project/commit/609c88a1fd8bdfd67f86a1c129325e2ccd6b959c
Author: Marco Elver <elver at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/alloc-token.cpp
Log Message:
-----------
[Clang][Sema] Fix __builtin_infer_alloc_token() return type (#168773)
Using the builtin failed on 32-bit architectures:
```
clang/lib/AST/ExprConstant.cpp:14299: [..]: Assertion `I.getBitWidth() == Info.Ctx.getIntWidth(E->getType()) && "Invalid evaluation result."' failed.
```
The return type is meant to be size_t. Fix it.
Commit: e0c265d1c0cb8650cbfcffa81c297f2cdacc85d9
https://github.com/llvm/llvm-project/commit/e0c265d1c0cb8650cbfcffa81c297f2cdacc85d9
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/comment-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
Log Message:
-----------
[clang-doc] Fix whitespace issues in Mustache basic test (#168491)
I found that the issues we've been seeing in the HTML
whitespace/alignment are due to partials inserting their own whitespace
and calling partials on indented lines or lines containing text already.
This patch gets rid of unnecessary whitespace in the comment and
function partials so that they are properly indented when inserted.
Commit: 12d72050e1255decb67d53125e86d348db2951d6
https://github.com/llvm/llvm-project/commit/12d72050e1255decb67d53125e86d348db2951d6
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/invalid-string/TestDataFormatterLibcxxInvalidString.py
Log Message:
-----------
[lldb][test] Correctly skip a test on a 32-bit target (#168631)
The test was added in #147252. On a 32-bit target, it fails with error:
```
File "...\TestDataFormatterLibcxxInvalidString.py", line 23, in test
self.skip()
^^^^^^^^^
AttributeError: 'LibcxxInvalidStringDataFormatterTestCase' object has no attribute 'skip'
```
Commit: 253ed524365e20309e0f615415c9433bd9bda44d
https://github.com/llvm/llvm-project/commit/253ed524365e20309e0f615415c9433bd9bda44d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
DAG: Use poison for some vector result widening (#168290)
Commit: eea62159e853b59a4e4e69da22175222ccd8c663
https://github.com/llvm/llvm-project/commit/eea62159e853b59a4e4e69da22175222ccd8c663
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[Offload] Make the RPC thread sleep briefly when idle (#168596)
Summary:
We start this thread if the RPC client symbol is detected in the loaded
binary. We should make this sleep if there's no work to avoid the thread
running at high priority when the (scarecely used) RPC call is actually
required. So, right now after 25 microseconds we will assume the server
is inactive and begin sleeping. This resets once we do find work.
AMD supports a more intelligent way to do this. HSA signals can wake a
sleeping thread from the kernel, and signals can be sent from the GPU
side. This would be nice to have and I'm planning on working with it in
the future to make this infrastructure more usable with existing AMD
workloads.
Commit: 5c43385319c3976edf6857487273af22eac3abae
https://github.com/llvm/llvm-project/commit/5c43385319c3976edf6857487273af22eac3abae
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGValue.h
M clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/IR/await.cir
M clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/invalid-await.cir
Log Message:
-----------
[CIR] Upstream CIR await op (#168133)
This PR upstreams `cir.await` and adds initial codegen for emitting a
skeleton of the ready, suspend, and resume branches. Codegen for these
branches is left for a future PR. It also adds a test for the invalid
case where a `cir.func` is marked as a coroutine but does not contain a
`cir.await` op in its body.
Commit: 040d9c94bebfc441f555de4617baf7da410ed959
https://github.com/llvm/llvm-project/commit/040d9c94bebfc441f555de4617baf7da410ed959
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Collect FMFs for in-loop reduction chain in VPlan. (NFC)
Replace retrieving FMFs for in-loop reduction via underlying instruction
+ legal by collecting the flags during reduction chain traversal in
VPlan.
Commit: 3b49c927427a6e818fee154725b3a05ead6c09de
https://github.com/llvm/llvm-project/commit/3b49c927427a6e818fee154725b3a05ead6c09de
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
Log Message:
-----------
Fix build breakage from: #167948 (#168781)
It appears that this broke the build by not using the 'correct' name for
the expression. This is probably something that crossed in review.
Commit: f2c9c7d654947cb1317f96547c15c256a1df4ce4
https://github.com/llvm/llvm-project/commit/f2c9c7d654947cb1317f96547c15c256a1df4ce4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/AST/StmtOpenACC.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
Log Message:
-----------
[OpenACC][CIR] Fix atomic-capture single-line-postfix (#168717)
In my last patch, it became clear during code review that the postfix
operation was actually a read THEN update, not update/read like other
single line versions. It wasn't clear at the time how much additional
work this would be to make postfix work correctly (and they are a bit of
a 'special' thing in codegen anyway), so this patch adds some
functionality to sense this and special-cases it when generating the
statement info for capture.
Commit: 90ea49a9d17b01cc51d69bdd0c79b959955e605f
https://github.com/llvm/llvm-project/commit/90ea49a9d17b01cc51d69bdd0c79b959955e605f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[ConstantFolding] Generalize constant folding for vector_deinterleave2 to deinterleave3-8. (#168640)
Commit: 3f55f8b4e5512e5d50a077800a190afb3aa65ffc
https://github.com/llvm/llvm-project/commit/3f55f8b4e5512e5d50a077800a190afb3aa65ffc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
M clang/test/CIR/CodeGen/ctor-null-init.cpp
Log Message:
-----------
[CIR] Handle non-empty null base class initialization (#168646)
This implements null base class initialization for non-empty bases.
Commit: 308185e61abb5a06af1786902f1b3768b5d46be5
https://github.com/llvm/llvm-project/commit/308185e61abb5a06af1786902f1b3768b5d46be5
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/TableGen/CallingConvEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Use `IfGuardEmitter` in CallingConvEmitter (#168763)
Use `IfGuardEmitter` in CallingConvEmitter. Additionally refactor the
code a bit to extract duplicated code to emit the CC function prototype
into a helper function.
Commit: 9b7fd0099e79b0f5b824027cbae8a25356486ac9
https://github.com/llvm/llvm-project/commit/9b7fd0099e79b0f5b824027cbae8a25356486ac9
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/declare-construct.cpp
Log Message:
-----------
[OpenACC] Fix crash when checking an section in a 'link' clause (#168783)
I saw this while doing lowering, we were not properly looking into the
array sections for the variable. Presumably we didn't do a good job of
making sure we did this right when making this extension, and missed
this spot.
Commit: 19fe9b477b570fd395a161638c59e66b35d1a9ac
https://github.com/llvm/llvm-project/commit/19fe9b477b570fd395a161638c59e66b35d1a9ac
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
Log Message:
-----------
[HLSL][TableGen] Add `__hlsl_resource_t` to known built-in function types (#163465)
This change adds resource handle type `__hlsl_resource_t` to the list of types recognized in the Clang's built-in functions prototype string.
HLSL has built-in resource classes and some of them have many methods, such as
[Texture2D](https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/sm5-object-texture2d).
Most of these methods will be implemented by built-in functions that will take resource handle as an argument. This change enables us to move from generic `void(...)` prototype string for these methods and explicit argument checking in `SemaHLSL.cpp` to a prototype string with explicit argument types. Argument checking in `SemaHLSL.cpp` can be reduced to handle just the rules that cannot be expressed in the prototype string (for example verifying that the offset value in `__builtin_hlsl_buffer_update_counter` is `1` or `-1`).
In order to make this work, we now allow conversions from attributed resource handle type such as `__hlsl_resource_t [[hlsl::resource_class(UAV)]] [[hlsl::contained_type(float)]]` to a plain non-attributed `__hlsl_resource_t` type.
Commit: e99c83ff38b006f12b78704c8e9b9751bf100659
https://github.com/llvm/llvm-project/commit/e99c83ff38b006f12b78704c8e9b9751bf100659
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
Log Message:
-----------
[llvm][DebugInfo] Add support for _BitInt in DWARFTypePrinter (#168382)
As of recent, LLVM includes the bit-size as a `DW_AT_bit_size` (and as
part of `DW_AT_name`) of `_BitInt`s in DWARF. This allows us to mark
`_BitInt`s as "reconstitutable" when compiling with
`-gsimple-template-names`. However, before doing so we need to make sure
the `DWARFTypePrinter` can reconstruct template parameter values that
have `_BitInt` type. This patch adds support for printing
`DW_TAG_template_value_parameter`s that have `_BitInt` type. Since
`-gsimple-template-names` only omits template parameters that are `<=
64` bit wide, we don't support `_BitInt`s larger than 64 bits.
Commit: 3f6cbdea4fecf11ffa4fa29151c69f53c7a59bf7
https://github.com/llvm/llvm-project/commit/3f6cbdea4fecf11ffa4fa29151c69f53c7a59bf7
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-current-testcase.txt
M llvm/utils/lit/tests/Inputs/shtest-env-positive/env-no-subcommand.txt
M llvm/utils/lit/tests/shtest-env-positive.py
Log Message:
-----------
[lit] Add LIT_CURRENT_TESTCASE environment variable when running tests (#168762)
I'm not aware of any way for `%run` wrapper scripts like
`iosssim_run.py`
([ref](https://github.com/llvm/llvm-project/blob/d2c7c6064259320def7a74e111079725958697d4/compiler-rt/test/sanitizer_common/ios_commands/iossim_run.py#L4))
to know what testcase they are currently running. This can be useful if
these wrappers need to create a (potentially remote) temporary directory
for each test case.
This adds the `LIT_CURRENT_TESTCASE` environment variable to both the
internal shell and the external shell, containing the full name of the
current test being run.
Commit: 7e85b790b02a770a003dbb13a7476590d045f58e
https://github.com/llvm/llvm-project/commit/7e85b790b02a770a003dbb13a7476590d045f58e
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
[SystemZ] Fix linux s390x main can't bootstrap itself on SanitizerSpecialCaseList.cpp #168088 (#168779)
This test has long call chain in recursion. Search tree can be pruned
early by swapping CC test and recursive simplifyAssumingCCVal.
Fixes: https://github.com/llvm/llvm-project/issues/168088
Co-authored-by: anoopkg6 <anoopkg6 at github.com>
Commit: be955e5ac9a0b0c979221efb28b0f52aad7bd3d6
https://github.com/llvm/llvm-project/commit/be955e5ac9a0b0c979221efb28b0f52aad7bd3d6
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/declare-construct-ast.cpp
Log Message:
-----------
[OpenACC] Make sure 'link' gets the right node in the AST with ASE
Another miss when working through 'link', we didn't properly handle
giving the whole array-section expression or array index expression,
instead allowed it to only get the decl-ref-expr. This patch makes
sure we don't add the wrong thing.
Commit: db1e73ea6d9390c811ab7d41d9ceefb2620be668
https://github.com/llvm/llvm-project/commit/db1e73ea6d9390c811ab7d41d9ceefb2620be668
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/DebugInfo/CXX/simple-template-names.cpp
Log Message:
-----------
[clang][DebugInfo] Mark _BitInt's as reconstitutable when emitting -gsimple-template-names (#168383)
Depends on:
* https://github.com/llvm/llvm-project/pull/168382
As of recent, LLVM includes the bit-size as a `DW_AT_bit_size` (and as
part of `DW_AT_name`) of `_BitInt`s in DWARF. This allows us to mark
`_BitInt`s as "reconstitutable" when compiling with
`-gsimple-template-names`. We still only omit template parameters that
are `<= 64` bit wide. So support `_BitInt`s larger than 64 bits is not
part of this patch.
Commit: 88305251fe809ba384ea4ff4893bf671757504fb
https://github.com/llvm/llvm-project/commit/88305251fe809ba384ea4ff4893bf671757504fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[ConstantFolding] Add constant folding for scalable vector interleave intrinsics. (#168668)
We can constant fold interleave of identical splat vectors to a larger
splat vector.
Commit: 2aa2290af51a033849878b30ee30aae5d11394f3
https://github.com/llvm/llvm-project/commit/2aa2290af51a033849878b30ee30aae5d11394f3
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.cpp
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_begin.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_end.h
A clang-tools-extra/test/clang-tidy/checkers/readability/duplicate-include-ignored-files.cpp
Log Message:
-----------
[clang-tidy] Add `IgnoredFilesList` option to `readability-duplicate-include` (#168196)
Closes [#166938](https://github.com/llvm/llvm-project/issues/166938)
Commit: 1278d47e9f9773972ff17deaf4d69db48dccdad8
https://github.com/llvm/llvm-project/commit/1278d47e9f9773972ff17deaf4d69db48dccdad8
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/builtin-isfpclass.c
Log Message:
-----------
[CIR] Upstream isfpclass op (#166037)
Ref commit in incubator: ee17ff67f3e567585db991cdad1159520c516bb4
There is a minor change in the assumption for emitting a direct callee.
In incubator, `bool hasAttributeNoBuiltin = false`
(`llvm-project/clang/lib/CIR/CodeGen/CIRGenExpr.cpp:1671`), while in
upstream, it's true, therefore, the call to finite(...) is not converted
to a builtin anymore.
Fixes #163892
Commit: 03f4d4d492b3f5e68645eac4e907f3f0fc7a4489
https://github.com/llvm/llvm-project/commit/03f4d4d492b3f5e68645eac4e907f3f0fc7a4489
Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
M clang/test/CIR/IR/func.cir
Log Message:
-----------
[CIR] Add CxxCTorAttr, CxxDTorAttr, CxxAssignAttr, CxxSpecialMemberAttr to cir::FuncOp (#167975)
This PR adds a special member attribute to `cir::FuncOp`. This attribute
is also present in the incubator repo. Additionally, I added a
"is_trivial" flag, to mark trivial members. I think that might be useful
when trying to replace calls to the copy constructor with memcpy for
example, but please let me know your thoughts on this. [Here in the
incubator
repo](https://github.com/llvm/clangir/blob/823e943d1b9aaba0fc46f880c5a6ac8c29fc761d/clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp#L1537-L1550)
this function is called `LowerTrivialConstructorCall`, but I don't see a
check that ensures the constructor is actually trivial.
Commit: 82380f33de0ef22e645cf53ba4bf859e38df6623
https://github.com/llvm/llvm-project/commit/82380f33de0ef22e645cf53ba4bf859e38df6623
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
Log Message:
-----------
[AMDGPU] Prioritize allocation of low 256 VGPR classes (#167978)
If we have 1024 VGPRs available we need to give priority to the
allocation of these registers where operands can only use low 256.
That is noteably scale operands of V_WMMA_SCALE instructions.
Otherwise large tuples will be allocated first and take all low
registers, so we would have to spill to get a room for these
scale registers.
Allocation priority itself does not eliminate spilling completely
in large kernels, although helps to some degree. Increasing spill
weight of a restricted class on top of it helps.
Commit: 80f862b6923f08b365d30c8480783aa91005e07a
https://github.com/llvm/llvm-project/commit/80f862b6923f08b365d30c8480783aa91005e07a
Author: Haocong Lu <haoconglu at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
A clang/test/CIR/CodeGen/X86/bmi-builtins.c
A clang/test/CIR/CodeGen/X86/lzcnt-builtins.c
Log Message:
-----------
[CIR] Upstream CIR codegen for `lzcnt` and `tzcnt` x86 builtins (#168479)
Support CIR codegen for x86 builtins `__builtin_ia32_lzcnt` and
`__builtin_ia32_tzcnt`.
Commit: 835951325ec7aaf3336b19b53c9978d986e260df
https://github.com/llvm/llvm-project/commit/835951325ec7aaf3336b19b53c9978d986e260df
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
Log Message:
-----------
[clang][deps] Enable calling `DepScanFile::getBuffer()` repeatedly (#168789)
This PR makes it possible to call `getBuffer()` on `DepScanFile` (a
`llvm::vfs::File`) repeatedly. Previously, this function would return a
moved-from `unique_ptr`. This doesn't fix any existing bugs, I
discovered this while experimenting with the VFSs in the scanner. Note
that the returned instances of `llvm::MemoryBuffer` are non-owning and
share the underlying buffer storage.
Commit: ff39d59000df23a88ee25e180ecc1edae42998e7
https://github.com/llvm/llvm-project/commit/ff39d59000df23a88ee25e180ecc1edae42998e7
Author: Paddy McDonald <padriff at hotmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
Disable test under GCC (#168792)
New test stack_container_dynamic_lib.cpp has errors under gcc.
Require clang while better fix is investigated
Commit: ef0cd1dae3a182fd721d18809ef38736cfd363c9
https://github.com/llvm/llvm-project/commit/ef0cd1dae3a182fd721d18809ef38736cfd363c9
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
Log Message:
-----------
[CIR][NFC] Fix warnings in release builds (#168791)
This fixes several warnings that occur in CIR release builds.
Commit: 7de59f0b247a481d81a3f2a4ce9f322c5a5c68ef
https://github.com/llvm/llvm-project/commit/7de59f0b247a481d81a3f2a4ce9f322c5a5c68ef
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_1d.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
Log Message:
-----------
[MLIR][Conversion] XeGPU to XeVM: Use adaptor for getting base address from memref. (#168610)
adaptor already lowers memref to base address.
Conversion patterns should use it instead of generating code to get base
address from memref.
Commit: af73aeaa19929127655d544b48a5145105e9e28c
https://github.com/llvm/llvm-project/commit/af73aeaa19929127655d544b48a5145105e9e28c
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[MLIR][Vector] Add unroll pattern for vector.shape_cast (#167738)
This PR adds pattern for unrolling shape_cast given a targetShape. This
PR is a follow up of #164010 which was very general and was using
inserts and extracts on each element (which is also
LowerVectorShapeCast.cpp is doing).
After doing some more research on use cases, we (me and @Jianhui-Li )
realized that the previous version in #164010 is unnecessarily generic
and doesn't fit our performance needs.
Our use case requires that targetShape is contiguous in both source and
result vector.
This pattern only applies when contiguous slices can be extracted from
the source vector and inserted into the result vector such that each
slice remains in vector form with targetShape (and not decompose to
scalars). In these cases, the unrolling proceeds as:
vector.extract_strided_slice -> vector.shape_cast (on the slice
unrolled) -> vector.insert_strided_slice
Commit: 94e4ee38aa3b7085409b72702437822b5cec9e4e
https://github.com/llvm/llvm-project/commit/94e4ee38aa3b7085409b72702437822b5cec9e4e
Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
Log Message:
-----------
[AMDGPU] Fixed crash in getLastMIForRegion when the region is empty. (#168653)
PreRARematStage builds region live-outs if GCN trackers are enabled. If
rematerialization leads to empty regions, this can cause a crash because
of dereference of an invalid iterator in getLastMIForRegion. The fix is
to skip calling getLastMIForRegion for empty regions.
This patch fixes another bug in the same code region. getLastMIForRegion
calls skipDebugInstructionsBackward which may immediately return the
RegionEnd if it is not the begin instruction and it is a non-debug
instruction. That would imply considering an instruction that is outside
the relevant region. The fix is to always pass the previous of RegionEnd
to skipDebugInstructionsBackward.
This bug was found while using GCN trackers on the existing LIT test
machine-scheduler-sink-trivial-remats.mir. Here's the assertion failure.
llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:168:
llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::reference
llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::operator*() const
[with OptionsT = llvm::ilist_detail::node_options<llvm::MachineInstr,
true, true, void, false, void>; bool IsReverse = false; bool IsConst =
false; llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::reference =
llvm::MachineInstr&]: Assertion `!NodePtr->isKnownSentinel()' failed.
Commit: b1c4b55118131cdf3d6d47ba31578b2e0cd78ec7
https://github.com/llvm/llvm-project/commit/b1c4b55118131cdf3d6d47ba31578b2e0cd78ec7
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
Log Message:
-----------
RenameIndependentSubregs: try to only implicit def used subregs (#167486)
Attempt to only define used subregisters when creating IMPLICIT_DEF fix
ups for live interval subranges. This avoids the appearance at the MIR
level of entire (wide) registers becoming live rather than relying only
on transient LiveIntervals dead definitions for unused subregisters.
Commit: 4e275f727439af9589ee54bc6ac2e95fac9f63ae
https://github.com/llvm/llvm-project/commit/4e275f727439af9589ee54bc6ac2e95fac9f63ae
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/X86.cpp
A clang/test/CodeGen/arm64ec-varargs.c
Log Message:
-----------
[Arm64EC][clang] Implement varargs support in clang. (#152411)
The clang side of the calling convention code for arm64 vs. arm64ec is
close enough that this isn't really noticeable in most cases, but the
rule for choosing whether to pass a struct directly or indirectly is
significantly different.
(Adapted from my old patch https://reviews.llvm.org/D125419 .)
Fixes #89615.
Commit: 2c3aa92089695713a1fd4264e80941fd9679150b
https://github.com/llvm/llvm-project/commit/2c3aa92089695713a1fd4264e80941fd9679150b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
A llvm/test/Transforms/SLPVectorizer/X86/matching-insert-point-for-nodes.ll
A llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
Log Message:
-----------
[SLP]Fix insertion point for setting for the nodes
The problem with the many def-use chain problems in SLP vectorizer are
related to the fact that some nodes reuse the same instruction as
insertion point. Insertion point is not the instruction, but the place
between instructions. To set it correctly, better to generate pseudo
instruction immediately after the last instruction, and use it as
insertion point. It resolves the issues in most cases.
Fixes #168512 #168576
Commit: def8ecbda9f146d5ba5bbc8c92f7d5ccd242ad2b
https://github.com/llvm/llvm-project/commit/def8ecbda9f146d5ba5bbc8c92f7d5ccd242ad2b
Author: Sayan Saha <sayans at mathworks.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
Log Message:
-----------
[tosa] : Relax dynamic dimension checks for batch for conv decompositions (#168764)
This PR relaxes the validation checks to allow input/output data to have
dynamic batch dimensions.
Commit: f9696949c3295c495e7337f4b1da9639610a15aa
https://github.com/llvm/llvm-project/commit/f9696949c3295c495e7337f4b1da9639610a15aa
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/TargetID.h
M clang/lib/Basic/TargetID.cpp
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/linker-wrapper-hip-no-rdc.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[ClangLinkerWrapper] Refactor target ID sanitization for Windows file… (#168744)
… names
Fix non-RDC mode HIP compilation for the new driver on Windows due to
invalid temporary file names when offload arch is a target ID containing
':', which is invalid in file names on Windows.
Refactor the existing handling of ':' in file names on Windows from
clang driver into a shared function sanitizeTargetIDInFileName in
clang/Basic/TargetID.h. This function replaces ':' with '@' on Windows
only, preserving the original behavior.
Update both clang/lib/Driver/Driver.cpp and
clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp to use this
shared function, ensuring consistent handling across both tools.
Commit: 9e9fe08b16ea2c4d9867fb4974edf2a3776d6ece
https://github.com/llvm/llvm-project/commit/9e9fe08b16ea2c4d9867fb4974edf2a3776d6ece
Author: Gang Chen <gangc at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vect-ptr-ptr-size-mismatch.ll
A llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/subchain-interleaved.ll
A llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-redund-loads.ll
Log Message:
-----------
Re-land [Transform][LoadStoreVectorizer] allow redundant in Chain (#168135)
This is the fixed version of
https://github.com/llvm/llvm-project/pull/163019
Commit: beac880da5d265510806a2db004370808b974f44
https://github.com/llvm/llvm-project/commit/beac880da5d265510806a2db004370808b974f44
Author: Paddy McDonald <padriff at hotmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
Better fix for the stack_container_dynamic_lib test (#168798)
Add the missing %libdl to the link command
Commit: 79fffed60a64ec548250d4d9bab236745c4987e4
https://github.com/llvm/llvm-project/commit/79fffed60a64ec548250d4d9bab236745c4987e4
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/DWP/DWP.cpp
A llvm/test/tools/llvm-dwp/X86/incompatible_dwarf_version.test
Log Message:
-----------
[llvm-dwp] Give more information when incompatible version found (#168511)
Provide more information when detecting a DWARF version mismatch in .dwo
files to help locate the issue and align with other similar errors.
Commit: fda20d99ae203d3c967072702f489ee993d1ffb9
https://github.com/llvm/llvm-project/commit/fda20d99ae203d3c967072702f489ee993d1ffb9
Author: Pranav Kant <prka at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix #165009 (#168804)
Commit: 3f151a3fa6ccb00523d8e0e36fa8d9046d5a936f
https://github.com/llvm/llvm-project/commit/3f151a3fa6ccb00523d8e0e36fa8d9046d5a936f
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.deprecated_in_cxx17.verify.cpp
Log Message:
-----------
[libc++][memory] Applied `[[nodiscard]]` to smart pointers (#168483)
Applied `[[nodiscard]]` where relevant to smart pointers and related
functions.
- [x] - `std::unique_ptr`
- [x] - `std::shared_ptr`
- [x] - `std::weak_ptr`
See guidelines:
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
- `[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue. For example a locking
constructor in unique_lock.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 47b756a5a6c91e2a73f3965a1cbabb1801f2cb0c
https://github.com/llvm/llvm-project/commit/47b756a5a6c91e2a73f3965a1cbabb1801f2cb0c
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV] Only reduce VLs of instructions with demanded VLs (#168693)
In RISCVVLOptimizer we first compute all the demanded VLs, then we walk
backwards through the function and try to reduce any VLs.
We don't actually need to walk backwards anymore since after #124530 the
order in which we modify the instructions doesn't matter.
This patch changes it to just iterate over the instructions with a
demanded VL computed, which means we don't iterate over scalar
instructions etc.
This also fixes #168665, where we triggered an assert on instructions
with a dead $vxsat implicit-def:
dead %x:vr = PseudoVSADDU_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */,
0 /* tu, mu */, implicit-def dead $vxsat
Because $vxsat is a reserved register, DeadMachineInstructionElim won't
remove it and the instruction makes it to RISCVVLOptimizer.
And because the def of %x is dead, we don't reach this instruction in
the dataflow analysis. This instruction returns true for isCandidate, so
we would try to lookup its demanded VL which doesn't exist and assert.
But with this patch we don't try to reduce instructions that aren't in
DemandedVLs, which fixes the crash.
Commit: 7198279707cb77b7a81b54184a6293a49af16f7c
https://github.com/llvm/llvm-project/commit/7198279707cb77b7a81b54184a6293a49af16f7c
Author: marius doerner <marius.doerner1 at icloud.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/switch.cpp
Log Message:
-----------
[clang][bytecode] Implement case ranges (#168418)
Fixes #165969
Implement GNU case ranges for constexpr bytecode interpreter.
Commit: 13ed14f47eb3995942b2e4bba4ab37851b2751f9
https://github.com/llvm/llvm-project/commit/13ed14f47eb3995942b2e4bba4ab37851b2751f9
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
Log Message:
-----------
AMDGPU: Autogenerate checks in a test (#168815)
Commit: b39a9db3abc7abfa033a728ef29b5e5d3beb1cb5
https://github.com/llvm/llvm-project/commit/b39a9db3abc7abfa033a728ef29b5e5d3beb1cb5
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/modules-current-modulemap-file-dep.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-header-sharing.m
M clang/test/ClangScanDeps/modules-implementation-module-map.c
M clang/test/ClangScanDeps/modules-implementation-private.m
Log Message:
-----------
[clang][deps] Add module map describing compiled module to file dependencies. (#160226)
When we add the module map describing the compiled module to the command
line, add it to the file dependencies as well.
Discovered while working on reproducers where a command line input was
missing in the captured files as it wasn't considered a dependency.
Commit: 765208b3131ce26dc5845babe86457e204f97c02
https://github.com/llvm/llvm-project/commit/765208b3131ce26dc5845babe86457e204f97c02
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[mlir] Make remove-dead-values remove block and successorOperands before delete ops (#166766)
Reland https://github.com/llvm/llvm-project/pull/165725, fix the Failed
test by removing successor operands before delete operations. Following
the deletion of cond.branch, its successor operands will subsequently be
removed.
Commit: 7f0dbf049ab88e43b28db1999d8b2d49f9bf793b
https://github.com/llvm/llvm-project/commit/7f0dbf049ab88e43b28db1999d8b2d49f9bf793b
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/tools/llvm-dwp/X86/incompatible_dwarf_version.test
Log Message:
-----------
[NFC] Reduce the size of test input in incompatible_dwarf_version.test (#168825)
Use smaller test inputs in in incompatible_dwarf_version.test to reduce
disk usage and execution time.
Commit: db20a7f2bcec85490e6ff5c998a948ccbe88ae46
https://github.com/llvm/llvm-project/commit/db20a7f2bcec85490e6ff5c998a948ccbe88ae46
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
DAG: Fix constructing a temporary TargetTransformInfo instance (#168480)
Commit: 86083447788f4d87eb61a1840a3f7374c24e46e0
https://github.com/llvm/llvm-project/commit/86083447788f4d87eb61a1840a3f7374c24e46e0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
M llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
Log Message:
-----------
[CFIInserter] Turn a reachable llvm_unreachable into a report_fatal_error. (#168777)
This prevents it from being optimized out in non-asserts builds.
Update X86 test to remove REQUIRES: asserts and check for LLVM ERROR.
Add FileCheck to RISC-V test and remove UNSUPPORTED.
This is the more complete fix for #168772 and #168525.
Commit: fde2aadb80020fe4a0fa887be5b6ca9d6df9564d
https://github.com/llvm/llvm-project/commit/fde2aadb80020fe4a0fa887be5b6ca9d6df9564d
Author: zhangtianhao6 <zhangtianhao6 at huawei.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/Support/CodeGen.h
Log Message:
-----------
[CodeGen] update code generation optimization level(nfc) (#168190)
Commit: 3e5fafdc223a937f371d22dc05d4ab8398b13f3f
https://github.com/llvm/llvm-project/commit/3e5fafdc223a937f371d22dc05d4ab8398b13f3f
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
Log Message:
-----------
[RISCV][llvm] Select splat_vector(constant) with PLI (#168204)
Default DAG combiner combine BUILD_VECTOR with same elements to
SPLAT_VECTOR, we can just map constant splat to PLI if possible.
Commit: dbf45253511616ee90bc39da8746caea4a9d3f10
https://github.com/llvm/llvm-project/commit/dbf45253511616ee90bc39da8746caea4a9d3f10
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
Log Message:
-----------
[AMDGPU] Add wave reduce intrinsics for float types - 1 (#161814)
Supported Ops: `fmin`, `fmax`
Commit: dcab4cb49bfb0aa17df3d3fabe582696100e0d35
https://github.com/llvm/llvm-project/commit/dcab4cb49bfb0aa17df3d3fabe582696100e0d35
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
Log Message:
-----------
[AMDGPU] Add wave reduce intrinsics for float types - 2 (#161815)
Supported Ops: `fadd`, `fsub`
Commit: e44646b79594006c9dc7deda6a9ae447243bd9e3
https://github.com/llvm/llvm-project/commit/e44646b79594006c9dc7deda6a9ae447243bd9e3
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/WebAssembly/simd-vecreduce-bool.ll
Log Message:
-----------
[WebAssembly] Lower ANY_EXTEND_VECTOR_INREG (#167529)
Treat it in the same manner of zero_extend_vector_inreg and generate an
extend_low_u if possible. This is to try an prevent expensive shuffles
from being generated instead. computeKnownBitsForTargetNode has also
been updated to specify known zeros on extend_low_u.
Commit: 07a31adf287ca4d338232c6d79fe108a191007b4
https://github.com/llvm/llvm-project/commit/07a31adf287ca4d338232c6d79fe108a191007b4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
M llvm/test/CodeGen/X86/build-vector-256.ll
M llvm/test/CodeGen/X86/chain_order.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
Log Message:
-----------
[X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (#168706)
See if we can create a vector load from the src elements in reverse and
then shuffle these back into place.
SLP will (usually) catch this in the middle-end, but there are a few
BUILD_VECTOR scalarizations etc. that appear during DAG legalization.
I did start looking at a more general permute fold, but I haven't found
any good test examples for this yet - happy to take another look if
somebody has examples.
Commit: bdf598f8ddce4dbbd103b0a16c2253b7d71081fa
https://github.com/llvm/llvm-project/commit/bdf598f8ddce4dbbd103b0a16c2253b7d71081fa
Author: Jim Lin <jim at andestech.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
Log Message:
-----------
CodeGen: Add missing subtarget to TargetLoweringBase constructor for ARC, CSKY and M68K (#168811)
Those were missing in https://github.com/llvm/llvm-project/pull/168620.
Commit: dc343d2f05ddffadae2b98760ff139622baa25f6
https://github.com/llvm/llvm-project/commit/dc343d2f05ddffadae2b98760ff139622baa25f6
Author: Kiran Kumar T P <50909805+kiranktp at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/test/Lower/Intrinsics/command_argument_count.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/OpenMP/Todo/omp-clause-indirect.f90
M flang/test/Lower/OpenMP/Todo/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-simd.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/cray-pointers02.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Semantics/indirect01.f90
M flang/test/Semantics/indirect02.f90
Log Message:
-----------
[NFC][flang] Replace use of flang -fc1 with %flang_fc1 in few test case (#168830)
Replace use of flang -fc1 with %flang_fc1 in few test case
Commit: 131cf7d5b2aa29b8018ac6422515ad2f522008c9
https://github.com/llvm/llvm-project/commit/131cf7d5b2aa29b8018ac6422515ad2f522008c9
Author: Aleksandr Nogikh <nogikh at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGenCXX/alloc-token.cpp
Log Message:
-----------
[AllocToken] Enable alloc token instrumentation for size-returning functions (#168840)
Consider a newly added "malloc_span" attribute in the allocation token
instrumentation to ensure that allocation functions with the
"malloc_span" attribute are processed similarly to other memory
allocation functions.
Update the tests to demonstrate applicability to __size_returning_new.
Commit: 54f69caf1f3e92ee147bac7e508ba65aff5ed1d5
https://github.com/llvm/llvm-project/commit/54f69caf1f3e92ee147bac7e508ba65aff5ed1d5
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/include/mlir/Pass/Pass.h
M mlir/lib/Pass/Pass.cpp
M mlir/test/Dialect/Transform/test-pass-application.mlir
A mlir/test/Pass/invalid-unsupported-operation.mlir
M mlir/test/Pass/pipeline-invalid.mlir
Log Message:
-----------
[mlir][Pass] Fix crash when applying a pass to an optional interface (#168499)
Interfaces can be optional: whether an op implements an interface or not
can depend on the state of the operation.
```
// An optional code block for adding additional "classof" logic. This can
// be used to better enable "optional" interfaces, where an entity only
// implements the interface if some dynamic characteristic holds.
// `$_attr`/`$_op`/`$_type` may be used to refer to an instance of the
// interface instance being checked.
code extraClassOf = "";
```
The current `Pass::canScheduleOn(RegisteredOperationName)` is
insufficient. This commit adds an additional overload to inspect
`Operation *`.
This commit fixes a crash when scheduling an `InterfacePass` for an
optional interface on an operation that does not actually implement the
interface.
Commit: 74cebce264bbfa335a411f08b647c05ce5a7eba3
https://github.com/llvm/llvm-project/commit/74cebce264bbfa335a411f08b647c05ce5a7eba3
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
Log Message:
-----------
Revert "[AMDGPU] Add wave reduce intrinsics for float types - 2 (#161… (#168845)
…815)"
This reverts commit dcab4cb49bfb0aa17df3d3fabe582696100e0d35.
Commit: 2cf550a040414aee51f7958812573723380b7a4b
https://github.com/llvm/llvm-project/commit/2cf550a040414aee51f7958812573723380b7a4b
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
A llvm/test/DebugInfo/X86/no-prologue-end-after-line0-calls.mir
Log Message:
-----------
[DebugInfo] Force early line-zero calls to have meaningful locations (#156850)
In functions that have been seriously deformed during optimisation,
there can be call instructions with line-zero immediately after frame
setup (see C reproducer in the test added). Our previous algorithms for
prologue_end ignored these, meaning someone entering a function at
prologue_end would break-in after a function call had completed. Prefer
instead to place prologue_end and the function scope-line on the line
zero call: this isn't false (it's the first meaningful instruction of the
function) and is approximately true. Given a less than ideal function,
this is an OK solution.
Commit: 3396b4654b119a943f04f24cc582627597d0ba28
https://github.com/llvm/llvm-project/commit/3396b4654b119a943f04f24cc582627597d0ba28
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
Log Message:
-----------
[LV] Allow partial reductions with an extended bin op (#165536)
A pattern of the form reduce.add(ext(mul)) is valid for a partial
reduction as long as the mul and its operands fulfill the requirements
of a normal partial reduction. The mul's extend operands will be
optimised to the wider extend, and we already have oneUse checks in
place to make sure the mul and operands can be modified safely.
1. -> https://github.com/llvm/llvm-project/pull/165536
2. https://github.com/llvm/llvm-project/pull/165543
Commit: 95d788c76151222b7a28bdea9bf7eadc4a89fd02
https://github.com/llvm/llvm-project/commit/95d788c76151222b7a28bdea9bf7eadc4a89fd02
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/include/mlir/Pass/Pass.h
M mlir/lib/Pass/Pass.cpp
M mlir/test/Dialect/Transform/test-pass-application.mlir
R mlir/test/Pass/invalid-unsupported-operation.mlir
M mlir/test/Pass/pipeline-invalid.mlir
Log Message:
-----------
Revert "[mlir][Pass] Fix crash when applying a pass to an optional interface" (#168847)
Reverts llvm/llvm-project#168499
Commit: 53dfdf7ffd31b47e0b67d541b8d3aabd3948ddae
https://github.com/llvm/llvm-project/commit/53dfdf7ffd31b47e0b67d541b8d3aabd3948ddae
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
Log Message:
-----------
[X86] BuiltinsX86.td - attempt to pack the builtins for each SSE level close together. NFC. (#168844)
Avoid some repeated feature blocks - we should have a single place in
each file that we can find most builtins for a particular ISA level.
Also, avoid some of the 80col wrapping that just makes it harder to find
anything at all.
There's a lot more we can do - but I don't want to completely refactor
this while we still have so much work to do for #30794
Commit: 0a88e9622891aa111d07928d144e042174a9d570
https://github.com/llvm/llvm-project/commit/0a88e9622891aa111d07928d144e042174a9d570
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
Log Message:
-----------
[MLIR][LLVM] Extend DIScopeForLLVMFuncOp to handle cross-file operatio… (#167844)
The current `DIScopeForLLVMFuncOp` pass handles debug information for
inlined code by processing `CallSiteLoc` attributes. However, some
compilation scenarios compose code from multiple source files directly
into a single function without generating `CallSiteLoc`.
**Scenario:**
```python
# a.py
def kernel_a(tensor):
print("a: {}", tensor) # a.py:3
jit_func_b(tensor) # Calls b.py code
# b.py
def func_b(tensor):
print("b: {}", tensor) # b.py:7
```
The scenario executes Python at compile-time and directly inserts
operations from `b.py` into the kernel function, resulting in MLIR like:
```mlir
@kernel_a(...) {
print("a: {}", %arg0) loc(#loc_a) // a.py:3
print("b: {}", %arg0) loc(#loc_b) // b.py:7 <- FileLineColLoc, not CallSiteLoc
} loc(#loc_kernel) // a.py:1
#loc1 = loc("a.py":3:.)
#loc2 = loc("b.py":7:.)
#loc_a = loc("print"(#loc1))
#loc_b = loc("print"(#loc2))
```
```llvm
!6 = !DIFile(filename: "a.py", directory: "...")
!9 = distinct !DISubprogram(name: "...", linkageName: "...", scope: !6, file: !6, line: 13, ...)
!10 = !DILocation(line: 7, column: ., scope: !9) // Points to kernel's DISubprogram, not correct
```
Commit: 02db2de905136f291d0ed23bb51c72e7159016a9
https://github.com/llvm/llvm-project/commit/02db2de905136f291d0ed23bb51c72e7159016a9
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/vscale-and-sve-cnt-demandedbits.ll
Log Message:
-----------
[AArch64][SVE] Implement demanded bits for @llvm.aarch64.sve.cntp (#168714)
This allows DemandedBits to see that the SVE CNTP intrinsic will only
ever produce small positive integers. The maximum value you could get
here is 256, which is CNTP on a nxv16i1 on a machine with a 2048bit
vector size (the maximum for SVE).
Using this various redundant operations (zexts, sexts, ands, ors, etc)
can be eliminated.
Commit: a2b4c0fbe03896ee5a9218e1ec6e4184de6ed4be
https://github.com/llvm/llvm-project/commit/a2b4c0fbe03896ee5a9218e1ec6e4184de6ed4be
Author: sskzakaria <ssskzakaria at proton.me>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/lib/Headers/avx512vldqintrin.h
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
Log Message:
-----------
[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX512 mask predicate intrinsics to be used in constexpr (#165054)
Enables constexpr evaluation for the following AVX512 Instrinsics:
```
_mm_movepi8_mask _mm256_movepi8_mask _mm512_movepi8_mask
_mm_movepi16_mask _mm256_movepi16_mask _mm512_movepi16_mask
_mm_movepi32_mask _mm256_movepi32_mask _mm512_movepi32_mask
_mm_movepi64_mask _mm256_movepi64_mask _mm512_movepi64_mask
```
Part of #162072
Commit: c6a79a55ff4cd79a6ebeb53109785abc5a010d06
https://github.com/llvm/llvm-project/commit/c6a79a55ff4cd79a6ebeb53109785abc5a010d06
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-identifier-naming in LLVMToLLVMIRTranslation.cpp (NFC)
Commit: 9e86c0d5daecf3a3095eb481764c4a5073cfcf2c
https://github.com/llvm/llvm-project/commit/9e86c0d5daecf3a3095eb481764c4a5073cfcf2c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-container-size-empty in LinalgOps.cpp (NFC)
Commit: 3da82af83f0fa95860dc7cb661a7c64616a9425c
https://github.com/llvm/llvm-project/commit/3da82af83f0fa95860dc7cb661a7c64616a9425c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for bugprone-argument-comment in SparseBufferRewriting.cpp (NFC)
Commit: 21c4c1502e3383988ba77eac75b13da7b9426957
https://github.com/llvm/llvm-project/commit/21c4c1502e3383988ba77eac75b13da7b9426957
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Only use unpredicated bfloat instructions when all lanes are in use. (#168387)
While SVE support for exception safe floating point code generation is
bare bones we try to ensure inactive lanes remiain inert. I mistakenly
broke this rule when adding support for SVE-B16B16 by lowering some
bfloat operations of unpacked vectors to unpredicated instructions.
Commit: 76f1949cfa0d8fed73c153af83a7054073686506
https://github.com/llvm/llvm-project/commit/76f1949cfa0d8fed73c153af83a7054073686506
Author: Alexander Johnston <alexander.javen.johnston at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRVVK.td
M clang/lib/CodeGen/TargetBuiltins/SPIR.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenHLSL/builtins/fwidth.hlsl
A clang/test/CodeGenSPIRV/Builtins/fwidth.c
A clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/DirectX/ddx_coarse-errors.ll
M llvm/test/CodeGen/DirectX/ddy_coarse-errors.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fwidth.ll
A llvm/test/CodeGen/SPIRV/opencl/fwidth-error.ll
Log Message:
-----------
[HLSL] Implement the `fwidth` intrinsic for DXIL and SPIR-V target (#161378)
Adds the fwidth intrinsic for HLSL.
The DXIL path only requires modification to the hlsl headers.
The SPIRV path implements the OpFwidth builtin in Clang and instruction
selection for the OpFwidth instruction in LLVM.
Also adds shader stage tests to the ddx_coarse and ddy_coarse
instructions used by fwidth.
Closes #99120
---------
Co-authored-by: Alexander Johnston <alexander.johnston at amd.com>
Commit: cfda27d0fbda65de4a7f482d46231933c9f2c678
https://github.com/llvm/llvm-project/commit/cfda27d0fbda65de4a7f482d46231933c9f2c678
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/test/Dialect/Vector/vector-scan-transforms.mlir
Log Message:
-----------
[mlir][Vector] Add support for scalable vectors to `ScanToArithOps` (#123117)
Note, scalable reductions dims are left as a TODO.
Commit: 150d9b7a779f405021b5a08718394772360a9ef8
https://github.com/llvm/llvm-project/commit/150d9b7a779f405021b5a08718394772360a9ef8
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[clang-tidy][NFC] Add clang-tidy formatting commit to `.git-blame-ignore-revs` (#167126)
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: aeba7a8adef9a8ea624aa5be3b95a8a9fb5a17dd
https://github.com/llvm/llvm-project/commit/aeba7a8adef9a8ea624aa5be3b95a8a9fb5a17dd
Author: GrumpyPigSkin <130710602+GrumpyPigSkin at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
A clang/test/Sema/warn-enum-compare-typo.c
Log Message:
-----------
[clang][diagnostics] added warning for possible enum compare typo (#168445)
Added diagnosis and fixit comment for possible accidental comparison
operator in an enum.
Closes: #168146
Commit: 4544ff68dc53ad427cfdbc9017d7328f09318484
https://github.com/llvm/llvm-project/commit/4544ff68dc53ad427cfdbc9017d7328f09318484
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[OpenMP][AIX] Not to create symbolic links to libomp.so in install step (NFC) (#168585)
Commit bb563b1 handles the links in the build directory but
misses the case in the install step. This patch is to link only
the libomp.a on AIX.
Commit: e0850825cce17ebab14df41afa6fe19582a65de3
https://github.com/llvm/llvm-project/commit/e0850825cce17ebab14df41afa6fe19582a65de3
Author: Simone Pellegrini <simone.pellegrini at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/test/Dialect/MemRef/transform-ops.mlir
Log Message:
-----------
[mlir][memref] Generalize dead store detection to all view-like ops (#168507)
The dead alloc elimination pass previously considered only subviews when
checking for dead stores. This change generalizes the logic to support
all view-like operations, ensuring broader coverage.
Commit: 4bb4ad477d80f66a267311afe9b656330caf3893
https://github.com/llvm/llvm-project/commit/4bb4ad477d80f66a267311afe9b656330caf3893
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
Log Message:
-----------
[AArch64][PAC] Use enum to describe LR signing condition (NFC) (#168548)
Express the condition of signing the return address in a function using
an `enum class` instead of a pair of `bool`s. Define `enum class
SignReturnAddress` with the values corresponding to the three possible
modes that can be requested via "sign-return-address" function
attribute.
Previously, there were two overloads of `shouldSignReturnAddress`
accepting either `const MachineFunction &` or `bool` argument. Due to
pointer-to-bool conversion, when `shouldSignReturnAddress` was
incorrectly called with `const MachineFunction *` argument, the latter
overload was used instead of reporting a compile-time error.
Commit: 5d0bfd1bf8ac6b1ceb37c7f30058d0f62e636036
https://github.com/llvm/llvm-project/commit/5d0bfd1bf8ac6b1ceb37c7f30058d0f62e636036
Author: Shashi Shankar <shashishankar1687 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
Log Message:
-----------
[MLIR][SCFToGPU] Guard operands before AffineApplyOp::create to avoid crash (#167959)
This fixes a crash in SCF→GPU when building the per‑dim index for mapped
scf.parallel.
**Change**:
- Map step/lb through cloningMap, then run ensureLaunchIndependent.
- If either is still unavailable at launch scope, emit a match‑failure;
otherwise build the affine.apply.
**Why this is correct:**
- Matches how the pass already handles launch bounds; avoids creating an
op with invalid operands and replaces a segfault with a clear
diagnostic.
**Tests**:
- Added two small regressions that lower to gpu.launch and exercise the
affine.apply path.
Fixes : #167654
Signed-off-by: Shashi Shankar <shashishankar1687 at gmail.com>
Commit: 0e8222b84b60c022b2cee308f79a185a943ff514
https://github.com/llvm/llvm-project/commit/0e8222b84b60c022b2cee308f79a185a943ff514
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/test/Fir/declare-codegen.fir
A flang/test/Integration/debug-module-equivalence.f90
M flang/test/Transforms/debug-common-block.fir
Log Message:
-----------
[flang][debug] Make common blocks data extraction more robust. (#168752)
Our current implementation for extracting information about common block
required traversal of FIR which was not ideal but previously there was
no other way to obtain that information. The `[hl]fir.declare` was
extended in commit https://github.com/llvm/llvm-project/pull/155325 to
include storage and storage_offset. This commit adds these operands in
`fircg.ext_declare` and then use them in `AddDebugInfoPass` to create
debug data for common blocks.
Commit: a9a14d64d20bfb28abdd7a63cac459b5f6b5ee91
https://github.com/llvm/llvm-project/commit/a9a14d64d20bfb28abdd7a63cac459b5f6b5ee91
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang-rt/lib/runtime/type-code.cpp
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/TypeCode.cpp
Log Message:
-----------
[flang-rt] Fix TypeCategory for quad-precision COMPLEX (#168090)
Modify the TypeCategory for quad-precision COMPLEX to
CFI_type_float128_Complex so it matches the TypeCode returned
by SELECT TYPE lowering.
Fixes #134565
Commit: 364fe55c42aaac63b2a28e54fa4e31cc6efcf4a8
https://github.com/llvm/llvm-project/commit/364fe55c42aaac63b2a28e54fa4e31cc6efcf4a8
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/issue80884.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-nopass.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
A flang/test/Lower/pointer-disassociate-character.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
Log Message:
-----------
[flang] simplify pointer assignments (#168732)
Pointer assignment lowering was done in different ways depending on
contexts and types, sometimes still using runtime calls when this is not
needed and the complexity of doing this inline is very limited (the
pointer and target descriptors were already prepared inline, the runtime
is just doing the descriptor assignment and ensuring the pointer
descriptor keep its pointer flag).
Slightly extent the inline version that was used for Forall and use it
for all cases.
When lowering without HLFIR is removed, this will allow removing more
code.
Commit: a74bfc06e83c30bc48e05caa2b27b012d57c5d36
https://github.com/llvm/llvm-project/commit/a74bfc06e83c30bc48e05caa2b27b012d57c5d36
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix select folder when operands are broadcast (#165481)
This commit addresses a crash in the dialects folder. The currently
folder assumes no broadcasting of the input operand happens and
therefore the folder can complain that the returned value was not the
same
shape as the result.
For now, this commit ensures no folding happens when broadcasting is
involved. In the future, folding with a broadcast could likely be
supported by inserting a `tosa.tile` operation before returning the
operand. This type of transformation is likely better suited for a
canonicalization pass. This commit only aims to avoid the crash.
Commit: aa3f930931e65b02bacac0c7dfa52a181a0fd5bb
https://github.com/llvm/llvm-project/commit/aa3f930931e65b02bacac0c7dfa52a181a0fd5bb
Author: lntue <lntue at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/atanf.h
A libc/src/__support/math/atanf_float.h
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/atanf_float_test.cpp
Log Message:
-----------
[libc][math] Add float-only implementation for atanf. (#167004)
Algorithm:
```
1) atan(x) = sign(x) * atan(|x|)
2) If |x| > 1 + 1/32, atan(|x|) = pi/2 - atan(1/|x|)
3) For 1/16 < |x| < 1 + 1/32, we find k such that: | |x| - k/16 | <= 1/32.
Let y = |x| - k/16, then using the angle summation formula, we have:
atan(|x|) = atan(k/16) + atan( (|x| - k/16) / (1 + |x| * k/16) )
= atan(k/16) + atan( y / (1 + (y + k/16) * k/16 )
= atan(k/16) + atan( y / ((1 + k^2/256) + y * k/16) )
4) Let u = y / (1 + k^2/256), then we can rewritten the above as:
atan(|x|) = atan(k/16) + atan( u / (1 + u * k/16) )
~ atan(k/16) + (u - k/16 * u^2 + (k^2/256 - 1/3) * u^3 +
+ (k/16 - (k/16)^3) * u^4) + O(u^5)
```
With all the computations are done in single precision (float), the
total of approximation errors and rounding errors is bounded by 4 ULPs.
Commit: 07e893205ae78da3d6b46a87e05b3af6d09c5abd
https://github.com/llvm/llvm-project/commit/07e893205ae78da3d6b46a87e05b3af6d09c5abd
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/shufflevector.ll
Log Message:
-----------
AMDGPU: Expand cost model shufflevector test (#168816)
Add a few corner cases of the "simplified" shuffle kinds.
Commit: 0b6a74ced013fcbcc7e3d072efa9af39d33b4520
https://github.com/llvm/llvm-project/commit/0b6a74ced013fcbcc7e3d072efa9af39d33b4520
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-chain-to-shuffles.ll
A llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
Log Message:
-----------
VectorCombine/AMDGPU: Cleanup a test and add a new one (#168817)
The existing, recently added test contains a whole lot of noise in the
form of dead instructions. Also, prefer named values.
The new test isolates a separate issue with concatenating i8 vectors.
Commit: 0e5466767268096bd7d03c50810f2d4c0b37a598
https://github.com/llvm/llvm-project/commit/0e5466767268096bd7d03c50810f2d4c0b37a598
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
Log Message:
-----------
[CodeGen] Use MCRegister in MachineBasicBlock::liveout_iterator. NFC (#168834)
MachineBasicBlock::liveout_begin() calls this constructor with
MCRegisters so this removes an implicit cast.
Commit: 891b3cf63e160c83309b90728034ab832184c964
https://github.com/llvm/llvm-project/commit/891b3cf63e160c83309b90728034ab832184c964
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/docs/Dialects/SPIR-V.md
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.h
M mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
M mlir/test/Target/SPIRV/selection.mlir
Log Message:
-----------
[mlir][spirv] Add support for SwitchOp (#168713)
The dialect implementation mostly copies the one of `cf.switch`, but
aligns naming to the SPIR-V spec.
Commit: bb0a95d5b16dabd8e64c6672ec381215a144d92d
https://github.com/llvm/llvm-project/commit/bb0a95d5b16dabd8e64c6672ec381215a144d92d
Author: David Tenty <daltenty at ibm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] handle the AIX form of the lto cache dir option (#168868)
This handles the AIX form of the thinLTO cache dir option, which get's
turned on when thinLTO is enabled.
Commit: b5812c0cf789aa4cb60d42681cb2e46a417e1bc7
https://github.com/llvm/llvm-project/commit/b5812c0cf789aa4cb60d42681cb2e46a417e1bc7
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/lib/Target/LoongArch/LoongArchSelectionDAGInfo.cpp
A llvm/lib/Target/LoongArch/LoongArchSelectionDAGInfo.h
M llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
M llvm/lib/Target/LoongArch/LoongArchSubtarget.h
Log Message:
-----------
[LoongArch] TableGen-erate SDNode descriptions (#168129)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
I had to split `VSHUF4I` into two variants (`VSHUF4I` and `VSHUF4I_D`)
since `loongarch_vshuf4i` and `loongarch_vshuf4i_d` have different
number of operands, and this prevented the node from being imported.
There is just one node that currently fails validation, see
`LoongArchSelectionDAGInfo::verifyTargetNode()`.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168129
Commit: 0c085c43a120c6a05107d208f002b97a29375cf2
https://github.com/llvm/llvm-project/commit/0c085c43a120c6a05107d208f002b97a29375cf2
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/module.modulemap
Log Message:
-----------
Fix build breakage when using modules (#168883)
Commit c9f573463ebd7b4e46da4877802f2364f700e54a removed the file
TargetLibraryInfo.def but did not remove it from the module map.
Commit: 21fedcbf89a27521c1c4822c51232605e2c3a33f
https://github.com/llvm/llvm-project/commit/21fedcbf89a27521c1c4822c51232605e2c3a33f
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/Support/BranchProbability.h
M llvm/lib/Support/BranchProbability.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration-no-guard.ll
Log Message:
-----------
[LoopPeel] Fix BFI when peeling last iteration without guard (#168250)
LoopPeel sometimes proves that, when reached, the original loop always
executes at least two iterations. LoopPeel then unconditionally executes
both the remaining loop's initial iteration and the peeled final
iteration. But that increases the latter's frequency above its frequency
in the original loop. To maintain the total frequency, this patch
compensates by decreasing the remaininng loop's latch probability.
This is another step in issue #135812 and was discussed at
<https://github.com/llvm/llvm-project/pull/166858#discussion_r2528968542>.
Commit: b725bdba1faf256c725f5fd12c581acb381bf0d3
https://github.com/llvm/llvm-project/commit/b725bdba1faf256c725f5fd12c581acb381bf0d3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
Reapply "[compiler-rt] Default to Lit's Internal Shell (#168232)" (#168760)
This reverts commit eb20b5392599996ce94e4c0392095cacaa33687c.
This relands the compiler-rt internal shell after XRay and Darwin tests
that were failing under the internal shell have been fixed.
Commit: 67e35bbebbed5e33a173751d019c22e4effa65fd
https://github.com/llvm/llvm-project/commit/67e35bbebbed5e33a173751d019c22e4effa65fd
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-incomplete-chains.ll
Log Message:
-----------
[LV] Check full partial reduction chains in order. (#168036)
https://github.com/llvm/llvm-project/pull/162822 added another
validation step to check if entries in a partial reduction chain have
the same scale factor. But the validation was still dependent on the
order of entries in PartialReductionChains, and would fail to reject
some cases (e.g. if the first first link matched the scale of the second
link, but the second link is invalidated later).
To fix that, group chains by their starting phi nodes, then perform the
validation for each chain, and if it fails, invalidate the whole chain
for the phi.
Fixes https://github.com/llvm/llvm-project/issues/167243.
Fixes https://github.com/llvm/llvm-project/issues/167867.
PR: https://github.com/llvm/llvm-project/pull/168036
Commit: 53b26971f5192713bd3cc01ed31e48b4ea0b4d2c
https://github.com/llvm/llvm-project/commit/53b26971f5192713bd3cc01ed31e48b4ea0b4d2c
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
Log Message:
-----------
[RISCV] Do not write .s file in a test (#168865)
Commit: d3c3c6bab5df051d9db12ea96add2211df9d81be
https://github.com/llvm/llvm-project/commit/d3c3c6bab5df051d9db12ea96add2211df9d81be
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
Log Message:
-----------
AMDGPU: Fix treating divergent loads as uniform (#168785)
Avoids regression which caused the revert 6d5f87fc42.
This is a hack on a hack. We currently have isUniformMMO,
which improperly treats unknown source value as known uniform.
This is hack from before we had divergence information in the
DAG, and should be removed. This is the minimum change to avoid
the regression; removing the aggressive handling of the unknown
case (or dropping isUniformMMO entirely) are more involved fixes.
Commit: 5b8656ccb12db34793a5a16a0a2c030763e00a07
https://github.com/llvm/llvm-project/commit/5b8656ccb12db34793a5a16a0a2c030763e00a07
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
Log Message:
-----------
[CIR] ExtVectorElementExpr with rvalue base (#168260)
Upstream ExtVectorElementExpr with rvalue base
Commit: b9d98110e198c864616593966d1dadc79a606309
https://github.com/llvm/llvm-project/commit/b9d98110e198c864616593966d1dadc79a606309
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ProfileVerify.cpp
A llvm/test/Transforms/PGOProfile/profcheck-exclusions.ll
Log Message:
-----------
[profcheck] Exclude `naked`, asm-only functions from profcheck (#168447)
We can't do anything meaningful to such functions: they aren't optimizable, and even if inlined, they would bring no code open to optimization.
Commit: 6c79cc7ff7901e9c8a3a4e924abd0e9dbfae039c
https://github.com/llvm/llvm-project/commit/6c79cc7ff7901e9c8a3a4e924abd0e9dbfae039c
Author: Kavin Gnanapandithan <kavin.balag at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/ldexp-avx512.ll
Log Message:
-----------
[X86] Lower mathlib call ldexp into scalef when avx512 is enabled (#166839)
Resolves #165694
Commit: 6ce4794c547600842eace9e01012f93850a22556
https://github.com/llvm/llvm-project/commit/6ce4794c547600842eace9e01012f93850a22556
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
Log Message:
-----------
[AMDGPU] Precommit tests for V_CVT_PK_[IU]16_F32 (#168893)
Commit: 602fa0c7ce4282be916613f5d056adaff11a3900
https://github.com/llvm/llvm-project/commit/602fa0c7ce4282be916613f5d056adaff11a3900
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
[SDAG] Fix whitespace errors (NFC) (#168897)
To make life easier for future contributors. Note that formatting
changes are due to git clang-format on the touched whitespace-error
lines.
Commit: 7ca737d632d387c9471b84b9ae916eae2a210640
https://github.com/llvm/llvm-project/commit/7ca737d632d387c9471b84b9ae916eae2a210640
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/test/Lower/select-case-statement.f90
Log Message:
-----------
[flang] Switch select-case-statement.f90 to new lowering (#168754)
test/Lower/select-case-statement.f90 was still using the old lowering.
Modified the test with FIR generated using the new lowering. Changed the
test to use flang_fc1 instead of bbc and added testing for -O0 and -O1,
since character comparison lowering is done differently at -O0 (uses
runtime function) and -O1 (inlines some cases). Use different FileCheck
prefixes for different optimization levels (CHECK-O0 for -O0, CHECK-O1
for -O1, CHECK for both).
Commit: 0e1cb2de90aafa1d5dbd46fc9e6c4e743700fa8b
https://github.com/llvm/llvm-project/commit/0e1cb2de90aafa1d5dbd46fc9e6c4e743700fa8b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/select-load-to-load-select-ptr-combine.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bug22246.ll
M llvm/test/CodeGen/NVPTX/fast-math.ll
M llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
Log Message:
-----------
Reapply "DAG: Allow select ptr combine for non-0 address spaces" (#168292) (#168786)
This reverts commit 6d5f87fc4284c4c22512778afaf7f2ba9326ba7b.
Previously this failed due to treating the unknown MachineMemOperand
value as known uniform.
Commit: 4aee501b0e6c4a0de6ab32dec1c8382847d56112
https://github.com/llvm/llvm-project/commit/4aee501b0e6c4a0de6ab32dec1c8382847d56112
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
A llvm/utils/gn/secondary/llvm/include/llvm/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
Log Message:
-----------
[gn] port c9f573463ebd (TargetLibraryInfo.inc)
Commit: a07024080aea99808f5436d038887e46604d1615
https://github.com/llvm/llvm-project/commit/a07024080aea99808f5436d038887e46604d1615
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][LoongArch] Port #168129: tablegen for sdnode (#168907)
Commit: 66ddc9b3e7e22a0c2464c54d96bc30c53ab9cbd1
https://github.com/llvm/llvm-project/commit/66ddc9b3e7e22a0c2464c54d96bc30c53ab9cbd1
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M offload/include/Shared/Debug.h
M offload/libomptarget/OffloadRTL.cpp
M offload/libomptarget/PluginManager.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[OFFLOAD] Add support for more fine grained debug messages control (#165416)
This PR introduces new debug macros that allow a more fined control of
which debug message to output and introduce C++ stream style for debug
messages.
Changing existing messages (except a few that I changed for testing)
will come in subsequent PRs.
I also think that we should make debug enabling OpenMP agnostic but, for
now, I prioritized maintaing the current libomptarget behavior for now,
and we might need more changes further down the line as we we decouple
libomptarget.
Commit: ccdb71932aa84a36f3d9689eca97b80bf643c500
https://github.com/llvm/llvm-project/commit/ccdb71932aa84a36f3d9689eca97b80bf643c500
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M lldb/test/API/functionalities/breakpoint/hardware_breakpoints/simple_hw_breakpoints/TestSimpleHWBreakpoints.py
Log Message:
-----------
[lldb] Fix a test if hardware breakpoints are not supported (#168813)
If `HardwareBreakpointTestBase.supports_hw_breakpoints()` returns False,
`SimpleHWBreakpointTest.does_not_support_hw_breakpoints()` returns None,
so the test runs and fails. However, it should be skipped instead.
The test was added in #146602, while `supports_hw_breakpoints()` was
changed in #146609, which was landed earlier despite having a bigger
number.
Commit: e96cc996875f58306aa7f28f2e47b51cadc180b7
https://github.com/llvm/llvm-project/commit/e96cc996875f58306aa7f28f2e47b51cadc180b7
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.test
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
Log Message:
-----------
[llvm][DebugInfo] Unwrap template parameters that are typedefs when reconstructing DIE names (#168734)
Depends on:
* https://github.com/llvm/llvm-project/pull/168725
When compiling with `-glldb`, we repoint the `DW_AT_type` of a DIE to be
a typedef that refers to the `preferred_name`. I.e.,:
```
template <typename T> structure t7;
using t7i = t7<int>;
template <typename T> struct __attribute__((__preferred_name__(t7i))) t7 {};
template <typename... Ts> void f1()
int main() { f1<t7i>(); }
```
would produce following (minified) DWARF:
```
DW_TAG_subprogram
DW_AT_name ("_STN|f1|<t7<int> >")
DW_TAG_template_type_parameter
DW_AT_type (0x0000299c "t7i")
...
DW_TAG_typedef
DW_AT_type (0x000029a7 "t7<int>")
DW_AT_name ("t7i")
```
Note how the `DW_AT_type` of the template parameter is a typedef itself
(instead of the canonical type). The `DWARFTypePrinter` would take the
`DW_AT_name` of this typedef when reconstructing the name of `f1`, so we
would end up with a verifier failure:
```
error: Simplified template DW_AT_name could not be reconstituted:
original: f1<t7<int> >
reconstituted: f1<t7i>
```
Fixing this allows us to un-XFAIL the `simplified-template-names.cpp`
test in `cross-project-tests`. Unfortunately this is only tested on
Darwin, where LLDB tuning is the default. AFAIK, there is no other case
where the template parameter type wouldn't be canonical.
Commit: f1630814ada4ce504f490440c3ae709d7bfa521a
https://github.com/llvm/llvm-project/commit/f1630814ada4ce504f490440c3ae709d7bfa521a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
A llvm/test/tools/dsymutil/AArch64/DWARFLinkerParallel/accel-imported-declarations.test
A llvm/test/tools/dsymutil/AArch64/accel-imported-declarations.test
A llvm/test/tools/dsymutil/AArch64/call-pc-reloc.test
A llvm/test/tools/dsymutil/AArch64/debug-names-accel-table-types.ll
A llvm/test/tools/dsymutil/AArch64/discriminator.test
A llvm/test/tools/dsymutil/AArch64/discriminator_repeated.test
A llvm/test/tools/dsymutil/AArch64/dummy-debug-map-arm64.map
A llvm/test/tools/dsymutil/AArch64/dwarf5-addr-base.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-addrx-0x0-last.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-dwarf4-combination-macho.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-macho.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-str-offsets-base-strx.test
A llvm/test/tools/dsymutil/AArch64/extern-alias.test
A llvm/test/tools/dsymutil/AArch64/fat-arch-name.test
A llvm/test/tools/dsymutil/AArch64/fat-threading.test
A llvm/test/tools/dsymutil/AArch64/firmware.test
A llvm/test/tools/dsymutil/AArch64/inline-source.test
A llvm/test/tools/dsymutil/AArch64/inlined-low_pc.c
A llvm/test/tools/dsymutil/AArch64/lit.local.cfg
A llvm/test/tools/dsymutil/AArch64/missing-object-warning.test
A llvm/test/tools/dsymutil/AArch64/missing-symbol-warning.test
A llvm/test/tools/dsymutil/AArch64/preload.test
A llvm/test/tools/dsymutil/AArch64/remarks-linking-bundle-empty.test
A llvm/test/tools/dsymutil/AArch64/remarks-linking-bundle.test
A llvm/test/tools/dsymutil/AArch64/static-archive-collision.test
A llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
A llvm/test/tools/dsymutil/AArch64/suppressions.txt
A llvm/test/tools/dsymutil/AArch64/swiftmodule-include-from-interface.test
A llvm/test/tools/dsymutil/AArch64/swiftmodule.test
A llvm/test/tools/dsymutil/AArch64/typedefs-with-same-name.test
R llvm/test/tools/dsymutil/ARM/DWARFLinkerParallel/accel-imported-declarations.test
R llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test
R llvm/test/tools/dsymutil/ARM/call-pc-reloc.test
R llvm/test/tools/dsymutil/ARM/debug-names-accel-table-types.ll
R llvm/test/tools/dsymutil/ARM/discriminator.test
R llvm/test/tools/dsymutil/ARM/discriminator_repeated.test
R llvm/test/tools/dsymutil/ARM/dummy-debug-map-amr64.map
R llvm/test/tools/dsymutil/ARM/dwarf5-addr-base.test
R llvm/test/tools/dsymutil/ARM/dwarf5-addrx-0x0-last.test
R llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
R llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
R llvm/test/tools/dsymutil/ARM/dwarf5-str-offsets-base-strx.test
R llvm/test/tools/dsymutil/ARM/extern-alias.test
R llvm/test/tools/dsymutil/ARM/fat-arch-name.test
R llvm/test/tools/dsymutil/ARM/fat-threading.test
R llvm/test/tools/dsymutil/ARM/firmware.test
R llvm/test/tools/dsymutil/ARM/inline-source.test
R llvm/test/tools/dsymutil/ARM/inlined-low_pc.c
M llvm/test/tools/dsymutil/ARM/lit.local.cfg
R llvm/test/tools/dsymutil/ARM/missing-object-warning.test
R llvm/test/tools/dsymutil/ARM/missing-symbol-warning.test
R llvm/test/tools/dsymutil/ARM/preload.test
R llvm/test/tools/dsymutil/ARM/remarks-linking-bundle-empty.test
R llvm/test/tools/dsymutil/ARM/remarks-linking-bundle.test
R llvm/test/tools/dsymutil/ARM/static-archive-collision.test
R llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
R llvm/test/tools/dsymutil/ARM/swiftmodule-include-from-interface.test
R llvm/test/tools/dsymutil/ARM/swiftmodule.test
R llvm/test/tools/dsymutil/ARM/typedefs-with-same-name.test
Log Message:
-----------
[llvm][dsymutil][test] Create dedicated AArch64 directory (#168895)
Currently the tests for LLVM targets `AArch64` and `ARM` were in the
same directory. But if you only configured LLVM for one target (e.g.,
just `AArch64`, which is how I ran into this), then all tests under the
ARM directory are marked `UNSUPPORTED`.
This patch moves all the tests that are capable of running on
`AArch64`-only targets into a dedicated `AArch64` directory. The tests
that expected a plain `ARM` target were kept in the `ARM` directory.
Drive-by:
* Rename the `dummy-debug-map-amr64.map` to `dummy-debug-map-arm64.map`
(note the typo in `amr64`)
Commit: 62deee41592d7522d7fc3c3686d657bc36d80638
https://github.com/llvm/llvm-project/commit/62deee41592d7522d7fc3c3686d657bc36d80638
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M lldb/bindings/interface/SBFrameExtensions.i
Log Message:
-----------
[LLDB] Add a child property to compliment the existing parent property (#168619)
I've been working on some scripts that evaluate the parent and child
frame. It's been very annoying that the parent frame has a property but
not the child. So I've added this to the extensions, I would've
preferred to return None, but because the existing impl returns an
invalid SBFrame, so I'm conforming to that API.
```
(lldb) script
Python Interactive Interpreter. To exit, type 'quit()', 'exit()' or Ctrl-D.
>>> lldb.frame
frame #0: 0x0000555555555200 fib.out`main
>>> lldb.frame.parent
frame #1: 0x00007ffff782a610 libc.so.6`__libc_start_call_main + 128
>>> lldb.frame.parent.child
frame #0: 0x0000555555555200 fib.out`main
```
Commit: e79c7c18d675a10e03c2942960d68f02f1a54f1f
https://github.com/llvm/llvm-project/commit/e79c7c18d675a10e03c2942960d68f02f1a54f1f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
Log Message:
-----------
AMDGPU: Handle invariant loads when considering if a load can be scalar (#168787)
Commit: 6d52efca67789f2e8d575b426d97b1ddf6c8d937
https://github.com/llvm/llvm-project/commit/6d52efca67789f2e8d575b426d97b1ddf6c8d937
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M .github/workflows/bazel-checks.yml
Log Message:
-----------
[Github] Error on HTTP 4xx Errors (#168919)
When downloading bazelisk/buildifier, we use curl, which still returns
exit code zero on HTTP 4xx errors unless we pass --fail. This patch adds
--fail flags so that error messages are more clear.
Commit: 01e5e4fd001c960e197ac377cd06ea177b320964
https://github.com/llvm/llvm-project/commit/01e5e4fd001c960e197ac377cd06ea177b320964
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Remove unneeded m_BitReverse from visitBITREVERSE. NFC (#168918)
We already know we're looking at BITREVERSE, we can match on the source
operand.
Commit: bfbd191f35352df2decde46d117bb940864889bf
https://github.com/llvm/llvm-project/commit/bfbd191f35352df2decde46d117bb940864889bf
Author: David Stone <davidfromonline at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/Rewrite/ByteCode.h
Log Message:
-----------
[mlir] Replace `llvm::OwningArrayRef` with `std::vector` (#168803)
There are several places where we use `llvm::OwningArrayRef`. The
interface to this requires us to first construct temporary storage, then
allocate space and set the allocated memory to 0, then copy the values
we actually want into that memory, then move the array into place.
Instead we can just do it all inline in a single pass by using
`std::vector`. In one case we actually allocate a completely separate
container and then allocate + copy the data over because
`llvm::OwningArrayRef` does not (and can't) support `push_back`.
Note that `llvm::SmallVector` is not a suitable replacement here because
we rely on reference stability on move construction: when the outer
container reallocates, we need the the contents of the inner containers
to be fixed in memory, and `llvm::SmallVector` does not give us that
guarantee.
Commit: 41008451260e4b95a901a5e073d7b14e55d6d303
https://github.com/llvm/llvm-project/commit/41008451260e4b95a901a5e073d7b14e55d6d303
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in ValueBoundsOpInterface.cpp (NFC)
Commit: 6ff15f4b7176df9f704e34cab8e1c88438f34e1a
https://github.com/llvm/llvm-project/commit/6ff15f4b7176df9f704e34cab8e1c88438f34e1a
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M pyproject.toml
Log Message:
-----------
[lldb] Configure pyright to the documented minimum python version (#162952)
Pyright is an MIT-licensed static type checker and can be found at
https://github.com/microsoft/pyright
there are also various integrations to use it as an LSP server in
various editors which is the main way I use it.
It's useful on our python scripts to detect issues such as where
functions are called with unexpected types or it's possible to access
obj.attr on an object that doesn't have that attribute. It can be used
without any configuration this config setting causes it to also report
issues with type hints that do not meet our python 3.8 minimum such as
this one from dap_server.py:
```
init_commands: list[str],
```
subscripting the builtin type like that requires python 3.9 while the
3.8 equivalent is:
```
from typing import List
...
init_commands: List[str],
```
In practice these scripts still work on 3.8 because type hints aren't
normally evaluated during normal execution but since we have a minimum,
we should fully comply with it.
Note: The error pyright reports for this particular issue isn't great:
```
error: Subscript for class "list" will generate runtime exception; enclose type expression in quotes
```
This is technically correct as it is possible to evaluate type hints at
runtime but I believe anything that would do so would also evaluate the
string form as well and still hit the runtime exception. A better
suggestion in this case would have been the 3.8 compatible `List[str]`.
However, it is better than silently passing code that doesn't confirm to
the minimum.
Commit: b5c0fcdadeed8803addf8d2aec6142fb9d8a5660
https://github.com/llvm/llvm-project/commit/b5c0fcdadeed8803addf8d2aec6142fb9d8a5660
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/posix_spawn.c
Log Message:
-----------
[sanitizer_common] posix_spawn test should forward DYLD_LIBRARY_PATH (#168795)
This test explicitly sets the environment for a spawned process. Without
DYLD_LIBRARY_PATH, the spawned process may use a ASAN runtime other than
the one that was used by the parent process That other runtime library
may not work at all, or may not be in the default search path. Either
case can cause the spawned process to die before it makes it to main,
thus failing the test. The compiler-rt lit config sets the library path
variable
[here](https://github.com/llvm/llvm-project/blob/main/compiler-rt/test/lit.common.cfg.py#L84)
(i.e. to ensure that just-built runtimes are used for tests, in the case
of a standalone compiler-rt build), and that is currently used by the
parent process but not the spawned ones.
My change only forwards the variable for Darwin (DYLD_LIBRARY_PATH), but
we **_ought_** to also forward the variable for other platforms.
However, it's not clear that there's any good way to plumb this into the
test, since some platforms actually have multiple library path variables
which would need to be forwarded (see: SunOS
[here](https://github.com/llvm/llvm-project/blob/main/compiler-rt/test/lit.common.cfg.py#L102)).
I considered adding a substitution variable for the library path
variable, but that doesn't really work if there's multiple such
variables.
Commit: c90fb56b41cfaaee448700f6b068c830d8d0b5bd
https://github.com/llvm/llvm-project/commit/c90fb56b41cfaaee448700f6b068c830d8d0b5bd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
Revert "[compiler-rt] Default to Lit's Internal Shell (#168232)"
This reverts commit b725bdba1faf256c725f5fd12c581acb381bf0d3.
This is still causing Darwin failures. There are six tests that are
still failing:
AddressSanitizer-x86_64-darwin.TestCases/Posix.deep_call_stack.cpp
AddressSanitizer-x86_64-darwin.TestCases.scariness_score_test.cpp
AddressSanitizer-x86_64h-darwin.TestCases/Posix.deep_call_stack.cpp
ORC-x86_64-darwin.TestCases/Darwin/x86-64.objc-imageinfo.S
UBSan-Minimal-x86_64-darwin.TestCases.test-darwin-interface.c
UBSan-Minimal-x86_64h-darwin.TestCases.test-darwin-interface.c
There are a couple failure modes:
1. deep_call_stack.cpp and scariness_score_test.cpp are failing due to
ulimit issues that we have observed previously.
2. objc-imageinfo.S is failing in the x86 variant because I only updated
the AArch64 variant.
3. test-darwin-interface.c is using subshells, so obviously fails with
the internal shell. Also looks like this one did not run on my system
due to it requiring x86_64 Darwin.
Commit: 827ff2c1ce11afa482ff2b113b9b2fe811372beb
https://github.com/llvm/llvm-project/commit/827ff2c1ce11afa482ff2b113b9b2fe811372beb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
A llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
[LV] Add tests for loops with low trip counts requiring tail-folding.
Add extra tests for over-eager tail-folding for tiny trip-count loops.
Reduced from https://github.com/llvm/llvm-project/issues/167858.
Commit: 777935c2edae160d20760278a1b462d8408c62f8
https://github.com/llvm/llvm-project/commit/777935c2edae160d20760278a1b462d8408c62f8
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
R utils/bazel/WORKSPACE
Log Message:
-----------
[bazel] Delete WORKSPACE file (#168926)
This has been replaced by the MODULE.bazel file. Users can still use
their own WORKSPACE files, but they didn't inherit this file anyways.
Users should migrate to bzlmod as with bazel 9.x that is required.
Commit: 54d9d4d8683221776928a8aaf3dca3b36f2b879b
https://github.com/llvm/llvm-project/commit/54d9d4d8683221776928a8aaf3dca3b36f2b879b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
Log Message:
-----------
[SLP]Check if the non-schedulable phi parent node has unique operands
Need to check if the non-schedulable phi parent node has unique
operands, if the incoming node has copyables, and the node is
commutative. Otherwise, there might be issues with the correct
calculation of the dependencies.
Fixes #168589
Commit: b3d1e921aa7aea7dfdb4dc40786570ba5ac2aba5
https://github.com/llvm/llvm-project/commit/b3d1e921aa7aea7dfdb4dc40786570ba5ac2aba5
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/disable_container_overflow_checks.cpp
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
[ASAN] Disable broken __SANITIZER_DISABLE_CONTAINER_OVERFLOW__ tests on iOS/Android (#168821)
The tests added by #163468 appear to be broken due to lack of libcxx support (?).
Marking unsupported everywhere for now since it passes on some platforms and fails on others, and
I don't know the full list.
Android fail: https://lab.llvm.org/buildbot/#/builders/186/builds/14106
Commit: 155a7d8e80fc268bdb99b9b31e6acaaccb94a3f8
https://github.com/llvm/llvm-project/commit/155a7d8e80fc268bdb99b9b31e6acaaccb94a3f8
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/Support/JSON.h
Log Message:
-----------
[Support] Add vector::erase to JSON::Array (#168835)
Commit: 7acfbc23a71cf66bbba89de55568064d732a61d1
https://github.com/llvm/llvm-project/commit/7acfbc23a71cf66bbba89de55568064d732a61d1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-opaque-pointers.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-index-width-smaller-than-iv-width.ll
Log Message:
-----------
[VPlan] Remove PtrIV::IsScalarAfterVectorization, use VPlan analysis. (#168289)
Remove `VPWidenPointerInductionRecipe::IsScalarAfterVectorization` and
replace it with `onlyScalarValuesUsed`. This removes the need to carry
state from the legacy cost model through VPlan, and the VPlan-based
analysis gives more accurate results, avoiding a number of extracts.
PR: https://github.com/llvm/llvm-project/pull/168289
Commit: 88055b3a56c6080f08dd83b954f61d84e8cdefe2
https://github.com/llvm/llvm-project/commit/88055b3a56c6080f08dd83b954f61d84e8cdefe2
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/ClangDoc.cpp
M clang-tools-extra/clang-doc/ClangDoc.h
M clang-tools-extra/clang-doc/Mapper.h
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/clang-doc/support/File.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
Log Message:
-----------
[clang-doc][NFC] Remove unused headers (#168806)
Removes unused headers or replaces them with headers that directly
provide the symbol instead. For example, `Serialize.h` included `AST.h`,
but it was actually `Serialize.cpp` that needed concept expressions, so
now it includes just `ExprConcepts.h`.
Commit: 930066f6e4e499a93d0f3799f275c5d37de48f6b
https://github.com/llvm/llvm-project/commit/930066f6e4e499a93d0f3799f275c5d37de48f6b
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add explicit dep on protobuf (#168928)
This is required for correctly loading the protobuf rules. It's
possible we could drop the version here to a lower version, as long as
that version supports the versions of bazel we support. I picked this
because it is the current version being used by bazel 8.0.0 (which is
defined in the .bazelversion). Users can override this in their project
anyways if they need an older one
Commit: 1552efe8873310625ceef840ad0d56d33311015b
https://github.com/llvm/llvm-project/commit/1552efe8873310625ceef840ad0d56d33311015b
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M utils/bazel/.bazelversion
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Bump to 8.4.2 (#168933)
Just staying up to date
Commit: 318e7df4091adad966634d10e99956b5e87e5051
https://github.com/llvm/llvm-project/commit/318e7df4091adad966634d10e99956b5e87e5051
Author: Julian Pokrovsky <raventid at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Docs: more detailed categories for Vector intrinsics (#168924)
Fixes: https://github.com/llvm/llvm-project/issues/167132
Commit: 91e777f26d9e4cd298f10c51aba76a6c452682be
https://github.com/llvm/llvm-project/commit/91e777f26d9e4cd298f10c51aba76a6c452682be
Author: Petr Hosek <phosek at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M libc/cmake/caches/armv6m-none-eabi.cmake
M libc/cmake/caches/armv7em-none-eabi.cmake
M libc/cmake/caches/armv7m-none-eabi.cmake
Log Message:
-----------
[libc] Removed unused flags from baremetal cache files (#168942)
These flags are not needed for building libc.
Commit: 7e43715477b2b8cc05c532c216c003ef9c4d57c1
https://github.com/llvm/llvm-project/commit/7e43715477b2b8cc05c532c216c003ef9c4d57c1
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_relocations.s
Log Message:
-----------
[JITLINK] Disable ELF_ppc64_relocations.s on SystemZ host (#168939)
Mark ELF_ppc64_relocations.s as unsupported on SystemZ because of cross
build issue related to using dlsym for host symbols.
Test fails to resolve __tls_get_aadr on SystemZ host.
Co-authored-by: anoopkg6 <anoopkg6 at github.com>
Commit: 1b8a4aa6a5cd92f06ef9c1d6705b3426107bc655
https://github.com/llvm/llvm-project/commit/1b8a4aa6a5cd92f06ef9c1d6705b3426107bc655
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
Log Message:
-----------
[flang][cuda] Extract element count computation into helper function (#168937)
This patch extracts the common logic for computing array element counts
from shape operands into a reusable helper function in CUFCommon.
Commit: 10565847467b9978f2c9a9e4540b324e39c69096
https://github.com/llvm/llvm-project/commit/10565847467b9978f2c9a9e4540b324e39c69096
Author: Thurston Dang <thurston at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
Log Message:
-----------
[msan] Fix handling of 256-bit hadd/hsub instructions (#168121)
These horizontal add/sub instructions are currently handled by
adding/subtracting tuples of the first operand, followed by tuples of
the second operand. This is not the correct semantics for the 256-bit
insructions: they process the first half of the first operand, then the
first half of the second operand, then the second half of the first
operand, and finally the second half of the second operand (trust me bro
[*]).
This patch fixes the issue by applying the "shards" functionality that
was added in https://github.com/llvm/llvm-project/pull/167954, to handle
the top and bottom 128-bit "shards" in turn.
[*] clang/test/CodeGen/X86/avx2-builtins.c:
```
TEST_CONSTEXPR(match_v8si(_mm256_hadd_epi32(
(__m256i)(__v8si){10, 20, 30, 40, 50, 60, 70, 80},
(__m256i)(__v8si){5, 15, 25, 35, 45, 55, 65, 75}),
30,70,20,60,110,150,100,140));
```
Commit: a3f6c4308ab4c36d2b58419d7f69744794fbb9ba
https://github.com/llvm/llvm-project/commit/a3f6c4308ab4c36d2b58419d7f69744794fbb9ba
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
[LV] Add test a low-trip count test without folding the tail.
Add a low trip count test that is currently vectorized but unprofitable,
for https://github.com/llvm/llvm-project/issues/167858.
Commit: 244b23046cf8b49167b69a221eb7516490278906
https://github.com/llvm/llvm-project/commit/244b23046cf8b49167b69a221eb7516490278906
Author: hjagasiaAMD <harsha.jagasia at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-scale-to-agpr.mir
Log Message:
-----------
[AMDGPU] Precommit test for issue in amdgpu-rewrite-agpr-copy-mfma, (#168609)
which reassigns scale operand in vgpr_32 register to agpr_32, not
permitted by instruction format. Reduced from ck.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Co-authored-by: theRonShark <ron.lieberman at amd.com>
Commit: 04acac2c90cfef84c25d89d4ead7363ed697ad68
https://github.com/llvm/llvm-project/commit/04acac2c90cfef84c25d89d4ead7363ed697ad68
Author: Martin Storsjö <martin at martin.st>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
[compiler-rt] [test] Generalize an UNSUPPORTED marking (#168858)
Don't specifically target windows-msvc - the same goes for any windows
target; mingw doesn't have dlfcn.h either.
Commit: 76d614b7c1222f459d42c6cfdf619da19ac3f739
https://github.com/llvm/llvm-project/commit/76d614b7c1222f459d42c6cfdf619da19ac3f739
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/compare.ll
Log Message:
-----------
[InstSimplify] Extend icmp-of-add simplification to sle/sgt/sge (#168900)
When comparing additions with the same base where one has `nsw`, the
following simplification can be performed:
```llvm
icmp slt/sgt/sle/sge (x + C1), (x +nsw C2)
=>
icmp slt/sgt/sle/sge C1, C2
```
Previously this was only done for `slt`. This patch extends it to the
`sgt`, `sle`, and `sge` predicates when either of the conditions hold:
- `C1 <= C2 && C1 >= 0`, or
- `C2 <= C1 && C1 <= 0`
This patch also handles the `C1 == C2` case, which was previously
excluded.
Proof: https://alive2.llvm.org/ce/z/LtmY4f
Commit: 5c8db7ab880472525a8f06538ee56d0e77808abd
https://github.com/llvm/llvm-project/commit/5c8db7ab880472525a8f06538ee56d0e77808abd
Author: Sebastian Pop <spop at nvidia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
R llvm/test/Analysis/DependenceAnalysis/Coupled.ll
R llvm/test/Analysis/DependenceAnalysis/Separability.ll
Log Message:
-----------
[DA] remove constraint propagation (#160924)
Remove all constraint propagation functions in Dependence Analysis.
Commit: 11362395615a6d728f98440e41bbebb3976d1941
https://github.com/llvm/llvm-project/commit/11362395615a6d728f98440e41bbebb3976d1941
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M libc/include/CMakeLists.txt
Log Message:
-----------
[libc] Add missing dependencies for arpa/inet.h header. (#168951)
Add dependency on headers with `in_addr` and `in_addr_t` type
definitions to ensure that these headers will be properly installed by
"install-libc" CMake target.
Commit: dbeda4f4199de87c7ecd8dabcc1c58944a7a37ad
https://github.com/llvm/llvm-project/commit/dbeda4f4199de87c7ecd8dabcc1c58944a7a37ad
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
A mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
Log Message:
-----------
[mlir][SCF] Add `scf::tileAndFuseConsumer` that tiles a consumer into a given tiled loop nest. (#167634)
The existing `scf::tileAndFuseConsumerOfSlices` takes a list of slices
(and loops they are part of), tries to find the consumer of these slices
(all slices are expected to be the same consumer), and then tiles the
consumer into the loop nest using the `TilingInterface`. A more natural
way of doing consumer fusion is to just start from the consumer, look
for operands that are produced by the loop nest passed in as `loops`
(presumably these loops are generated by tiling, but that is not a
requirement for consumer fusion). Using the consumer you can find the
slices of the operands that are accessed within the loop which you can
then use to tile and fuse the consumer (using `TilingInterface`). This
handles more naturally the case where multiple operands of the consumer
come from the loop nest.
The `scf::tileAndFuseConsumerOfSlices` was implemented as a mirror of
`scf::tileAndFuseProducerOfSlice`. For the latter, the slice has a
single producer for the source of the slice, which makes it a natural
way of specifying producer fusion. But for consumers, the result might
have multiple users, resulting in multiple candidates for fusion, as
well as a fusion candidate using multiple results from the tiled loop
nest. This means using slices
(`tensor.insert_slice`/`tensor.parallel_insert_slice`) as a hook for
consumer fusion turns out to be quite hard to navigate. The use of the
consumer directly avoids all those pain points. In time the
`scf::tileAndFuseConsumerOfSlices` should be deprecated in favor of
`scf::tileAndFuseConsumer`. There is a lot of tech-debt that has
accumulated in `scf::tileAndFuseConsumerOfSlices` that needs to be
cleanedup. So while that gets cleaned up, and required functionality is
moved to `scf::tileAndFuseConsumer`, the old path is still maintained.
The test for `scf::tileAndFuseConsumerUsingSlices` is copied to
`tile-and-fuse-consumer.mlir` to
`tile-and-fuse-consumer-using-slices.mlir`. All the tests that were
there in this file are now using the `tileAndFuseConsumer` method. The
test op `test.tile_and_fuse_consumer` is modified to call
`scf::tileAndFuseConsumer`, while a new op
`test.tile_and_fuse_consumer_of_slice` is used to keep the old path
tested while it is deprecated.
---------
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: 9e2ca0d7d49b34ff55361a0556bb59f8c593a4da
https://github.com/llvm/llvm-project/commit/9e2ca0d7d49b34ff55361a0556bb59f8c593a4da
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[mlir] Add kuhar to code owners for arith (#168945)
Commit: bf91a62269964398836544020def699e3f019b9b
https://github.com/llvm/llvm-project/commit/bf91a62269964398836544020def699e3f019b9b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/tools/bugpoint/BugDriver.h
M llvm/tools/bugpoint/CrashDebugger.cpp
M llvm/tools/bugpoint/ExecutionDriver.cpp
M llvm/tools/bugpoint/ExtractFunction.cpp
M llvm/tools/bugpoint/Miscompilation.cpp
M llvm/tools/bugpoint/OptimizerDriver.cpp
Log Message:
-----------
[NFC][bugpoint] Namespace cleanup in `bugpoint` (#168921)
Add declaration of command line options to BugDriver.h and remove extern
declarations in individual .cpp files.
Commit: b83e458fe5330227581e1e65f3866ddfcd597837
https://github.com/llvm/llvm-project/commit/b83e458fe5330227581e1e65f3866ddfcd597837
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/tools/bugpoint/BugDriver.h
M llvm/tools/bugpoint/CrashDebugger.cpp
M llvm/tools/bugpoint/ExecutionDriver.cpp
M llvm/tools/bugpoint/ExtractFunction.cpp
M llvm/tools/bugpoint/Miscompilation.cpp
M llvm/tools/bugpoint/OptimizerDriver.cpp
Log Message:
-----------
Revert "[NFC][bugpoint] Namespace cleanup in `bugpoint`" (#168961)
Reverts llvm/llvm-project#168921
Causes build failures.
Commit: 70311b453c73c8bc92362bb4035449f3a87210fc
https://github.com/llvm/llvm-project/commit/70311b453c73c8bc92362bb4035449f3a87210fc
Author: Sebastian Pop <spop at nvidia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopUnrollAndJam/dependencies.ll
Log Message:
-----------
[unroll-and-jam] Document dependency patterns in dependencies.ll (NFC) (#156577)
Add detailed comments explaining each function's memory access patterns
and why they should/shouldn't be unroll-and-jammed:
- fore_aft_*: Dependencies between fore block and aft block
- fore_sub_*: Dependencies between fore block and sub block
- sub_aft_*: Dependencies between sub block and aft block
- sub_sub_*: Dependencies within sub block
- *_less: Backward dependency (i-1) - safe for fore/aft, fore/sub,
sub/aft; unsafe for sub/sub due to jamming conflicts
- *_eq: Same iteration dependency (i+0) - safe due to preserved
execution order
- *_more: Forward dependency (i+1) - unsafe due to write-after-write
races between unrolled iterations, except sub/sub case creates conflicts
Commit: 0f12abe47c15c28949f9b609f2c90333176f17d1
https://github.com/llvm/llvm-project/commit/0f12abe47c15c28949f9b609f2c90333176f17d1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M lldb/docs/CMakeLists.txt
Log Message:
-----------
[lldb] Building the documentation should not depend on libLLDB (#168962)
The only thing the docs should depend on is on the SWIG wrapper
(lldb.py) which only requires parsing the API headers. It should not
depend on building libLLDB.
The dependency was (I believe accidentally) introduced by 59f4267.
Fixes #123316
Commit: fbc093588f654ba771dfc055687676edf4d76884
https://github.com/llvm/llvm-project/commit/fbc093588f654ba771dfc055687676edf4d76884
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Only add v2i32 to GPR regclass in the RV64 hardware mode. (#168930)
Removes about 200 bytes of unneeded patterns from RISCVGenDAGISel.inc
Commit: 310abe0e4b4ebb57976928cc0b520f9e878b54a7
https://github.com/llvm/llvm-project/commit/310abe0e4b4ebb57976928cc0b520f9e878b54a7
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR] [XeGPU] Add distribution pattern for vector.constant_mask from Wg To Sg (#168118)
Commit: a9435cb8924dc00d3a34570785284e73049662e4
https://github.com/llvm/llvm-project/commit/a9435cb8924dc00d3a34570785284e73049662e4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Use SDT_RISCVIntUnaryOpW for RISCVISD::ABSW type profile. NFC (#168932)
This removes an unnecessary isel pattern for the RV32 HwMode.
Commit: 925ce5adde46f8347d5d7e438f63203f2d003df7
https://github.com/llvm/llvm-project/commit/925ce5adde46f8347d5d7e438f63203f2d003df7
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][deps] NFC: Fix typo in function name (#168958)
Commit: 3723a8b0ac82e3c90d55cc086a3a3708949e44a7
https://github.com/llvm/llvm-project/commit/3723a8b0ac82e3c90d55cc086a3a3708949e44a7
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M utils/bazel/.bazelrc
Log Message:
-----------
[bazel] Replace --experimental_guard_against_concurrent_changes usage (#168957)
On startup, bazel prints: `WARNING: Option
'experimental_guard_against_concurrent_changes' is deprecated: Use
--guard_against_concurrent_changes instead`
Commit: 49e46a57cc1575271179c8c9c6fec5639781e9c6
https://github.com/llvm/llvm-project/commit/49e46a57cc1575271179c8c9c6fec5639781e9c6
Author: Florian Mayer <fmayer at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/TestCases/test-darwin-interface.c
Log Message:
-----------
[UBSan] [compiler-rt] add preservecc variants of handlers (#168643)
Commit: da1d82491dfa34c08534ea747f0ceedef0bd33be
https://github.com/llvm/llvm-project/commit/da1d82491dfa34c08534ea747f0ceedef0bd33be
Author: Florian Mayer <fmayer at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M .ci/metrics/metrics.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .ci/premerge_advisor_explain.py
M .ci/premerge_advisor_upload.py
M .ci/utils.sh
M .git-blame-ignore-revs
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
M .github/workflows/bazel-checks.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/commit-access-review.py
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries.yml
M .github/workflows/release-lit.yml
M .github/workflows/scorecard.yml
M .gitignore
M bolt/test/lit.local.cfg
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/ClangDoc.cpp
M clang-tools-extra/clang-doc/ClangDoc.h
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Mapper.h
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/comment-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/clang-doc/support/File.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
R clang-tools-extra/clang-tidy/cert/LimitedRandomnessCheck.cpp
R clang-tools-extra/clang-tidy/cert/LimitedRandomnessCheck.h
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/clang-tidy/misc/CMakeLists.txt
M clang-tools-extra/clang-tidy/misc/CoroutineHostileRAIICheck.cpp
M clang-tools-extra/clang-tidy/misc/MiscTidyModule.cpp
A clang-tools-extra/clang-tidy/misc/PredictableRandCheck.cpp
A clang-tools-extra/clang-tidy/misc/PredictableRandCheck.h
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.cpp
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unsafe-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/con36-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/con54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/ctr56-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl16-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl59-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err09-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err34-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err60-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err61-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/exp42-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp37-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/mem57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos44-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos47-c.rst
M clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/security.SetgidSetuidOrder.rst
M clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/security.insecureAPI.decodeValueOfObjCType.rst
M clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/unix.StdCLibraryFunctions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-c-arrays.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-capturing-lambda-coroutines.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-do-while.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-magic-numbers.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-reference-coroutine-parameters.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/c-copy-assignment-signature.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/explicit-virtual-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/macro-to-enum.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/narrowing-conversions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-malloc.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-move-operations.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/non-private-member-variables-in-classes.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/owning-memory.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/prefer-member-initializer.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-avoid-unchecked-container-access.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-const-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-cstyle-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-vararg.rst
M clang-tools-extra/docs/clang-tidy/checks/fuchsia/statically-constructed-objects.rst
M clang-tools-extra/docs/clang-tidy/checks/google/explicit-constructor.rst
M clang-tools-extra/docs/clang-tidy/checks/google/objc-avoid-throwing-exception.rst
M clang-tools-extra/docs/clang-tidy/checks/google/objc-global-variable-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-avoid-underscore-in-googletest-name.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-braces-around-statements.rst
M clang-tools-extra/docs/clang-tidy/checks/google/upgrade-googletest-case.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/braces-around-statements.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/explicit-conversions.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/function-size.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/invalid-access-moved.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/move-const-arg.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/multiway-paths-covered.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-array-decay.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/linuxkernel/must-check-errs.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/coroutine-hostile-raii.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/header-include-cycle.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/misleading-identifier.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/no-recursion.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/override-with-different-visibility.rst
A clang-tools-extra/docs/clang-tidy/checks/misc/predictable-rand.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/throw-by-value-catch-by-reference.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unused-parameters.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unused-using-decls.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-anonymous-namespace.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-setjmp-longjmp.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-variadic-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/concat-nested-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/loop-convert.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/replace-disallow-copy-and-assign-macro.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/replace-random-shuffle.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/type-traits.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/unary-static-assert.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-auto.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-constraints.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-designated-initializers.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-emplace.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-equals-delete.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-format.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-print.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-trailing-return-type.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-using.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/property-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/no-int-to-ptr.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-copy-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/std-allocator-const.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unsafe-functions-custom.c
R clang-tools-extra/test/clang-tidy/checkers/cert/limited-randomness.c
R clang-tools-extra/test/clang-tidy/checkers/cert/limited-randomness.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/coroutine-hostile-raii.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/predictable-rand.c
A clang-tools-extra/test/clang-tidy/checkers/misc/predictable-rand.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_begin.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_end.h
A clang-tools-extra/test/clang-tidy/checkers/readability/duplicate-include-ignored-files.cpp
M clang/Maintainers.rst
M clang/docs/AddressSanitizer.rst
M clang/docs/AllocToken.rst
M clang/docs/AutomaticReferenceCounting.rst
M clang/docs/Block-ABI-Apple.rst
M clang/docs/BoundsSafety.rst
M clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/CXXTypeAwareAllocators.rst
M clang/docs/ClangFormat.rst
M clang/docs/ClangTools.rst
M clang/docs/ClangTransformerTutorial.rst
M clang/docs/DataFlowSanitizerDesign.rst
M clang/docs/InternalsManual.rst
M clang/docs/JSONCompilationDatabase.rst
M clang/docs/LibASTImporter.rst
M clang/docs/MisExpect.rst
M clang/docs/PCHInternals.rst
M clang/docs/PointerAuthentication.rst
M clang/docs/RAVFrontendAction.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SafeStack.rst
M clang/docs/UsersManual.rst
M clang/docs/WarningSuppressionMappings.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/BuiltinsSPIRVVK.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/TargetID.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/CMakeLists.txt
M clang/include/clang/Sema/Sema.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/DynamicExtent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/Analysis/BodyFarm.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/GotoSolver.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CGValue.h
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
M clang/lib/CodeGen/TargetBuiltins/SPIR.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512fp16intrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/lib/Headers/avx512vldqintrin.h
M clang/lib/Headers/avx512vlintrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/cpuid.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/llvm_libc_wrappers/assert.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/llvm_libc_wrappers/inttypes.h
R clang/lib/Headers/llvm_libc_wrappers/llvm-libc-decls/README.txt
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Headers/llvm_libc_wrappers/stdlib.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Headers/llvm_libc_wrappers/time.h
M clang/lib/Headers/pmmintrin.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
M clang/lib/StaticAnalyzer/Core/DynamicExtent.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/switch.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/Analysis/ArrayBound/verbose-tests.c
M clang/test/Analysis/block-in-critical-section.cpp
M clang/test/Analysis/std-variant-checker.cpp
M clang/test/Analysis/z3-unarysymexpr.c
A clang/test/CIR/CodeGen/X86/bmi-builtins.c
A clang/test/CIR/CodeGen/X86/lzcnt-builtins.c
M clang/test/CIR/CodeGen/X86/sse-builtins.c
M clang/test/CIR/CodeGen/X86/sse2-builtins.c
A clang/test/CIR/CodeGen/asm-label-inline-builtins.c
A clang/test/CIR/CodeGen/base-to-derived.cpp
A clang/test/CIR/CodeGen/builtin-fcmp-sse.c
A clang/test/CIR/CodeGen/builtin-isfpclass.c
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/constant-inits.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
A clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
A clang/test/CIR/CodeGen/global-constant.c
A clang/test/CIR/CodeGen/label-values.c
A clang/test/CIR/CodeGen/no-common.c
A clang/test/CIR/CodeGen/offset-of.cpp
M clang/test/CIR/CodeGen/record-zero-init-padding.c
M clang/test/CIR/CodeGen/ternary-throw.cpp
A clang/test/CIR/CodeGen/try-catch-tmp.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
M clang/test/CIR/CodeGen/vtt.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
A clang/test/CIR/IR/await.cir
A clang/test/CIR/IR/block-adress.cir
A clang/test/CIR/IR/eh-inflight.cir
M clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/invalid-await.cir
A clang/test/CIR/IR/invalid-block-address.cir
A clang/test/CIR/Lowering/eh-inflight.cir
A clang/test/CIR/Transforms/goto_solver.cir
A clang/test/ClangScanDeps/module-in-stable-dir-by-name.c
A clang/test/ClangScanDeps/modules-current-modulemap-file-dep.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-header-sharing.m
M clang/test/ClangScanDeps/modules-implementation-module-map.c
M clang/test/ClangScanDeps/modules-implementation-private.m
A clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
A clang/test/CodeGen/Sparc/sparc-arguments.c
A clang/test/CodeGen/Sparc/sparc-vaarg.c
A clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/Sparc/sparcv8-inline-asm.c
A clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/Sparc/sparcv9-class-return.cpp
A clang/test/CodeGen/Sparc/sparcv9-dwarf.c
A clang/test/CodeGen/Sparc/sparcv9-inline-asm.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx512bf16-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512fp16-builtins-constrained.c
M clang/test/CodeGen/X86/avx512fp16-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbf16-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/sse3-builtins.c
A clang/test/CodeGen/arm64ec-varargs.c
M clang/test/CodeGen/attr-target-x86.c
A clang/test/CodeGen/builtin-os_log.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtins.c
A clang/test/CodeGen/complex-compound-assign-bitfield.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
R clang/test/CodeGen/sparc-arguments.c
R clang/test/CodeGen/sparc-vaarg.c
R clang/test/CodeGen/sparcv8-abi.c
R clang/test/CodeGen/sparcv8-inline-asm.c
R clang/test/CodeGen/sparcv9-abi.c
R clang/test/CodeGen/sparcv9-class-return.cpp
R clang/test/CodeGen/sparcv9-dwarf.c
R clang/test/CodeGen/sparcv9-inline-asm.c
M clang/test/CodeGen/strictfp-elementwise-builtins.cpp
M clang/test/CodeGenCXX/alloc-token.cpp
M clang/test/CodeGenCXX/builtins.cpp
M clang/test/CodeGenCXX/tmp-md-nodes1.cpp
M clang/test/CodeGenCXX/tmp-md-nodes2.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
A clang/test/CodeGenHLSL/builtins/ddx-coarse-builtin.hlsl
A clang/test/CodeGenHLSL/builtins/ddx-coarse.hlsl
A clang/test/CodeGenHLSL/builtins/ddy-coarse-builtin.hlsl
A clang/test/CodeGenHLSL/builtins/ddy-coarse.hlsl
M clang/test/CodeGenHLSL/builtins/exp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp.hlsl
M clang/test/CodeGenHLSL/builtins/exp2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp2.hlsl
A clang/test/CodeGenHLSL/builtins/fwidth.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/lit.hlsl
M clang/test/CodeGenHLSL/builtins/round-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/round.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
A clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/convergent.cl
A clang/test/CodeGenSPIRV/Builtins/fwidth.c
M clang/test/CodeGenSYCL/address-space-conversions.cpp
M clang/test/DebugInfo/CXX/simple-template-names.cpp
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
A clang/test/Driver/crash-ir-repro.cpp
M clang/test/Driver/fsanitize-alloc-token.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-spirv-translator-new-driver.c
M clang/test/Driver/hip-toolchain-no-rdc.hip
A clang/test/Driver/linker-wrapper-hip-amdgcnspirv.c
A clang/test/Driver/linker-wrapper-hip-no-rdc.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/OpenMP/amdgcn-attributes.cpp
R clang/test/OpenMP/parallel_default_variableCategory_codegen.cpp
M clang/test/Preprocessor/predefined-arch-macros.c
A clang/test/Sema/attr-malloc_span.c
M clang/test/Sema/constant-builtins-2.c
M clang/test/Sema/constant-builtins.c
A clang/test/Sema/type-dependent-attrs.c
A clang/test/Sema/warn-enum-compare-typo.c
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/alloc-token.cpp
M clang/test/SemaCXX/attr-cleanup.cpp
A clang/test/SemaCXX/attr-malloc_span.cpp
A clang/test/SemaCXX/builtin-bswapg.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-fold-conditional.cpp
M clang/test/SemaCXX/wmissing-noreturn-suggestion.cpp
M clang/test/SemaHLSL/Availability/attr-availability-compute.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-mesh.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-lib.hlsl
M clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ddx-coarse-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ddy-coarse-errors.hlsl
A clang/test/SemaHLSL/Semantics/missing-vs.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
M clang/test/SemaHLSL/Semantics/position.vs.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M clang/test/SemaOpenACC/declare-construct-ast.cpp
M clang/test/SemaOpenACC/declare-construct.cpp
A clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/git-clang-format
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
A compiler-rt/cmake/Modules/CheckAssemblerFlag.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/include/sanitizer/common_interface_defs.h
M compiler-rt/lib/asan/CMakeLists.txt
A compiler-rt/lib/asan/asan_aix.cpp
M compiler-rt/lib/asan/asan_errors.cpp
M compiler-rt/lib/asan/asan_posix.cpp
M compiler-rt/lib/asan/scripts/asan_symbolize.py
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/divsf3.S
A compiler-rt/lib/builtins/arm/fnan2.c
A compiler-rt/lib/builtins/arm/fnorm2.c
A compiler-rt/lib/builtins/arm/funder.c
A compiler-rt/lib/builtins/arm/mulsf3.S
A compiler-rt/lib/builtins/arm/thumb1/mulsf3.S
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/sanitizer_common/symbolizer/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/tests/map_test.cpp
A compiler-rt/test/asan/TestCases/Darwin/Inputs/check-syslog.sh
M compiler-rt/test/asan/TestCases/Darwin/atos-symbolizer-dyld-root-path.cpp
M compiler-rt/test/asan/TestCases/Darwin/atos-symbolizer.cpp
M compiler-rt/test/asan/TestCases/Darwin/duplicate_os_log_reports.cpp
M compiler-rt/test/asan/TestCases/Darwin/dyld_insert_libraries_reexec.cpp
M compiler-rt/test/asan/TestCases/Darwin/dyld_insert_libraries_remove.cpp
M compiler-rt/test/asan/TestCases/Darwin/init_for_dlopen.cpp
M compiler-rt/test/asan/TestCases/Darwin/interface_symbols_darwin.cpp
M compiler-rt/test/asan/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/asan/TestCases/Darwin/malloc_zone-protected.cpp
M compiler-rt/test/asan/TestCases/Linux/allocator_oom_test.cpp
A compiler-rt/test/asan/TestCases/disable_container_overflow_checks.cpp
A compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
M compiler-rt/test/asan_abi/TestCases/Darwin/llvm_interface_symbols.cpp
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/builtins/Unit/divsf3_test.c
A compiler-rt/test/builtins/Unit/mulsf3_test.c
M compiler-rt/test/fuzzer/big-file-copy.test
M compiler-rt/test/fuzzer/merge-posix.test
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-imageinfo.S
M compiler-rt/test/profile/Darwin/instrprof-debug-info-correlate.c
M compiler-rt/test/rtsan/Darwin/dlopen.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/posix_spawn.c
M compiler-rt/test/tsan/Darwin/dlopen.cpp
M compiler-rt/test/tsan/Darwin/external-ignore-noninstrumented.cpp
M compiler-rt/test/tsan/Darwin/external.cpp
M compiler-rt/test/tsan/Darwin/malloc-stack-logging.cpp
M compiler-rt/test/xray/TestCases/Posix/basic-filtering.cpp
M compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/c-test.cpp
M compiler-rt/test/xray/TestCases/Posix/common-trampoline-alignment.cpp
M compiler-rt/test/xray/TestCases/Posix/custom-event-handler-alignment.cpp
M compiler-rt/test/xray/TestCases/Posix/custom-event-logging.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-inmemory.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-multiple.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-thread-order.cpp
M compiler-rt/test/xray/TestCases/Posix/fork_basic_logging.cpp
M compiler-rt/test/xray/TestCases/Posix/profiling-multi-threaded.cpp
M compiler-rt/test/xray/TestCases/Posix/profiling-single-threaded.cpp
M compiler-rt/test/xray/TestCases/Posix/quiet-start.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names-debug-types.test
R cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.test
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
A cross-project-tests/dtlto/dtlto-cache.test
A cross-project-tests/dtlto/dtlto-thinlto-cache.test
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/type-code.cpp
M flang-rt/lib/runtime/unit.cpp
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/TypeCode.cpp
M flang/docs/Extensions.md
M flang/docs/RuntimeEnvironment.md
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
A flang/test/Analysis/AliasAnalysis/cuf-alloc-source-kind.mlir
M flang/test/Fir/declare-codegen.fir
A flang/test/Integration/debug-module-equivalence.f90
M flang/test/Integration/unroll-loops.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/issue80884.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-nopass.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/HLFIR/unroll-loops.fir
M flang/test/Lower/Intrinsics/command_argument_count.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenACC/acc-atomic-update.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-host-data.f90
M flang/test/Lower/OpenACC/acc-loop-exit.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-routine-named.f90
M flang/test/Lower/OpenACC/acc-routine.f90
M flang/test/Lower/OpenACC/acc-routine02.f90
M flang/test/Lower/OpenACC/acc-routine03.f90
M flang/test/Lower/OpenACC/acc-routine04.f90
M flang/test/Lower/OpenACC/acc-shutdown.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-use-device.f90
M flang/test/Lower/OpenACC/locations.f90
M flang/test/Lower/OpenMP/Todo/omp-clause-indirect.f90
M flang/test/Lower/OpenMP/Todo/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-simd.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/cray-pointers02.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/map-mapper.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/target_cpu_features.f90
M flang/test/Lower/PowerPC/ppc-vec-load-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-store.f90
M flang/test/Lower/allocatable-assignment.f90
M flang/test/Lower/allocatable-globals.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/allocated.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/array-elemental-calls.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/array-substring.f90
M flang/test/Lower/array-wide-char.f90
M flang/test/Lower/array.f90
M flang/test/Lower/assignment.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/forall-2.f90
M flang/test/Lower/forall/forall-ranked.f90
M flang/test/Lower/forall/forall-where-2.f90
M flang/test/Lower/forall/forall-where.f90
M flang/test/Lower/host-associated.f90
A flang/test/Lower/pointer-disassociate-character.f90
M flang/test/Lower/select-case-statement.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/declare-mapper-unparse.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
A flang/test/Parser/OpenMP/name-with-space.f
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
A flang/test/Preprocessing/bug168077.F90
M flang/test/Semantics/OpenMP/declare-mapper-symbols.f90
M flang/test/Semantics/OpenMP/simd-only.f90
A flang/test/Semantics/OpenMP/target-loop-still-there.f90
A flang/test/Semantics/bug168099.f90
M flang/test/Semantics/indirect01.f90
M flang/test/Semantics/indirect02.f90
M flang/test/Transforms/debug-common-block.fir
M flang/test/Transforms/set-runtime-call-attributes.fir
A libc/cmake/caches/armv6m-none-eabi.cmake
A libc/cmake/caches/armv7em-none-eabi.cmake
A libc/cmake/caches/armv7m-none-eabi.cmake
A libc/cmake/caches/armv8.1m.main-none-eabi.cmake
A libc/cmake/caches/armv8m.main-none-eabi.cmake
A libc/cmake/caches/baremetal_common.cmake
A libc/cmake/caches/riscv32-unknown-elf.cmake
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/header_generation.rst
M libc/include/CMakeLists.txt
M libc/include/arpa/inet.yaml
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/include/stdlib.yaml
M libc/include/sys/mman.yaml
M libc/include/wchar.yaml
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/atanf.h
A libc/src/__support/math/atanf_float.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_addr.cpp
A libc/src/arpa/inet/inet_addr.h
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/mbstowcs.cpp
A libc/src/stdlib/mbstowcs.h
A libc/src/stdlib/mbtowc.cpp
A libc/src/stdlib/mbtowc.h
A libc/src/stdlib/wcstombs.cpp
A libc/src/stdlib/wcstombs.h
A libc/src/stdlib/wctomb.cpp
A libc/src/stdlib/wctomb.h
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/generic/CMakeLists.txt
A libc/src/sys/mman/linux/generic/pkey_common.h
M libc/src/sys/mman/linux/mprotect.cpp
A libc/src/sys/mman/linux/mprotect_common.h
A libc/src/sys/mman/linux/pkey_alloc.cpp
A libc/src/sys/mman/linux/pkey_common.h
A libc/src/sys/mman/linux/pkey_free.cpp
A libc/src/sys/mman/linux/pkey_get.cpp
A libc/src/sys/mman/linux/pkey_mprotect.cpp
A libc/src/sys/mman/linux/pkey_set.cpp
A libc/src/sys/mman/linux/x86_64/CMakeLists.txt
A libc/src/sys/mman/linux/x86_64/pkey_common.h
A libc/src/sys/mman/pkey_alloc.h
A libc/src/sys/mman/pkey_free.h
A libc/src/sys/mman/pkey_get.h
A libc/src/sys/mman/pkey_mprotect.h
A libc/src/sys/mman/pkey_set.h
M libc/src/wchar/CMakeLists.txt
R libc/src/wchar/mbstowcs.cpp
R libc/src/wchar/mbstowcs.h
R libc/src/wchar/mbtowc.cpp
R libc/src/wchar/mbtowc.h
A libc/src/wchar/wcstod.cpp
A libc/src/wchar/wcstod.h
A libc/src/wchar/wcstold.cpp
A libc/src/wchar/wcstold.h
R libc/src/wchar/wcstombs.cpp
R libc/src/wchar/wcstombs.h
R libc/src/wchar/wctomb.cpp
R libc/src/wchar/wctomb.h
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_addr_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/atanf_float_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mbstowcs_test.cpp
A libc/test/src/stdlib/mbtowc_test.cpp
A libc/test/src/stdlib/wcstombs_test.cpp
A libc/test/src/stdlib/wctomb_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/pkey_test.cpp
M libc/test/src/wchar/CMakeLists.txt
R libc/test/src/wchar/mbstowcs_test.cpp
R libc/test/src/wchar/mbtowc_test.cpp
A libc/test/src/wchar/wcstod_test.cpp
A libc/test/src/wchar/wcstold_test.cpp
R libc/test/src/wchar/wcstombs_test.cpp
R libc/test/src/wchar/wctomb_test.cpp
R libc/utils/hdrgen/hdrgen/gpu_headers.py
M libc/utils/hdrgen/hdrgen/yaml_to_classes.py
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int32.inc
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int64.inc
M libclc/opencl/lib/amdgcn/SOURCES
R libclc/opencl/lib/amdgcn/cl_khr_int64_extended_atomics/minmax_helpers.ll
M libclc/opencl/lib/generic/atomic/atom_add.cl
M libclc/opencl/lib/generic/atomic/atom_and.cl
M libclc/opencl/lib/generic/atomic/atom_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atom_dec.cl
M libclc/opencl/lib/generic/atomic/atom_inc.cl
R libclc/opencl/lib/generic/atomic/atom_int32_binary.inc
M libclc/opencl/lib/generic/atomic/atom_max.cl
M libclc/opencl/lib/generic/atomic/atom_min.cl
M libclc/opencl/lib/generic/atomic/atom_or.cl
M libclc/opencl/lib/generic/atomic/atom_sub.cl
M libclc/opencl/lib/generic/atomic/atom_xchg.cl
M libclc/opencl/lib/generic/atomic/atom_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_add.cl
M libclc/opencl/lib/generic/atomic/atomic_and.cl
M libclc/opencl/lib/generic/atomic/atomic_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
M libclc/opencl/lib/generic/atomic/atomic_max.cl
M libclc/opencl/lib/generic/atomic/atomic_min.cl
M libclc/opencl/lib/generic/atomic/atomic_or.cl
M libclc/opencl/lib/generic/atomic/atomic_sub.cl
M libclc/opencl/lib/generic/atomic/atomic_xchg.cl
M libclc/opencl/lib/generic/atomic/atomic_xor.cl
M libclc/www/index.html
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/VendorDocumentation.rst
M libcxx/include/__charconv/from_chars_integral.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__config
M libcxx/include/__hash_table
M libcxx/include/__locale_dir/num.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__memory/inout_ptr.h
M libcxx/include/__memory/out_ptr.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/ccomplex
M libcxx/include/ciso646
M libcxx/include/cstdalign
M libcxx/include/cstdbool
M libcxx/include/ctgmath
M libcxx/include/limits
M libcxx/include/span
M libcxx/include/string
A libcxx/test/libcxx/containers/views/views.span/nodiscard.verify.cpp
M libcxx/test/libcxx/numerics/clamp_to_integral.pass.cpp
M libcxx/test/libcxx/transitive_includes.gen.py
A libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
M libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/erase_range.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.modifiers/erase_range.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/erase_range.pass.cpp
M libcxx/test/std/containers/unord/unord.set/erase_range.pass.cpp
M libcxx/test/std/depr/depr.cpp.headers/ccomplex.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/ciso646.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/cstdalign.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/cstdbool.verify.cpp
M libcxx/test/std/depr/depr.cpp.headers/ctgmath.verify.cpp
A libcxx/test/std/input.output/file.streams/c.files/gets-removed.verify.cpp
R libcxx/test/std/input.output/file.streams/c.files/gets.compile.fail.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.test.dat
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/traps.pass.cpp
M libcxx/test/std/numerics/c.math/isnormal.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/array.compile.fail.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/init.compile.fail.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/int.compile.fail.cpp
A libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/temporary-objects.verify.cpp
R libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.cnstr/vector.compile.fail.cpp
M libcxx/test/std/time/time.clock/time.clock.gps/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.tai/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.deprecated_in_cxx17.verify.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/make_from_tuple.verify.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_greater/cmp_greater.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less/cmp_less.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less_equal/cmp_less_equal.pass.cpp
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/format.py
M libunwind/src/UnwindCursor.hpp
M lld/COFF/Chunks.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/MachO/SectionPriorities.cpp
M lld/MachO/SectionPriorities.h
M lld/MachO/SyntheticSections.cpp
M lld/test/COFF/arm64ec-codemap.test
A lld/test/ELF/aarch64-funcinit64-invalid.s
A lld/test/ELF/aarch64-funcinit64.s
M lld/test/ELF/dso-undef-extract-lazy.s
M lld/test/MachO/order-file-cstring.s
M lldb/bindings/interface/SBFrameExtensions.i
M lldb/bindings/lua/lua-typemaps.swig
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-typemaps.swig
M lldb/bindings/python/python-wrapper.swig
M lldb/bindings/python/python.swig
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/CMakeLists.txt
M lldb/include/lldb/API/SBFile.h
M lldb/include/lldb/Core/EmulateInstruction.h
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Expression/DiagnosticManager.h
M lldb/include/lldb/Host/File.h
M lldb/include/lldb/Host/StreamFile.h
A lldb/include/lldb/Host/common/DiagnosticsRendering.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Target.h
R lldb/include/lldb/Utility/DiagnosticsRendering.h
M lldb/include/lldb/Utility/LLDBLog.h
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/API/SBCommandReturnObject.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBFile.cpp
M lldb/source/API/SBInstruction.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBStream.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/DiagnosticsRendering.cpp
M lldb/source/Host/common/File.cpp
M lldb/source/Host/common/StreamFile.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/CMakeLists.txt
M lldb/source/Utility/DataExtractor.cpp
R lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/LLDBLog.cpp
M lldb/source/Utility/RegisterValue.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/target/auto-install-main-executable/Makefile
M lldb/test/API/functionalities/breakpoint/hardware_breakpoints/simple_hw_breakpoints/TestSimpleHWBreakpoints.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/invalid-string/TestDataFormatterLibcxxInvalidString.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
A lldb/test/API/lang/rust/enum-variant-same-name/RustEnumValue.py
A lldb/test/API/lang/rust/enum-variant-same-name/TestRustEnumVariantSameName.py
A lldb/test/API/lang/rust/enum-variant-same-name/main.rs
A lldb/test/API/lang/rust/enum-variant-same-name/main.yaml
M lldb/test/API/macosx/find-dsym/bundle-with-dot-in-filename/Makefile
M lldb/test/API/macosx/find-dsym/deep-bundle/Makefile
M lldb/test/API/macosx/posix_spawn/Makefile
A lldb/test/API/python_api/command_script_output/TestCommandScriptOutput.py
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwp-str-offsets-dwarf64-dwp.yaml
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwp-str-offsets-dwarf64-exe.yaml
A lldb/test/Shell/SymbolFile/DWARF/dwp-str-offsets-dwarf64.test
R lldb/test/Shell/lldb-server/TestErrorMessages.test
A lldb/test/Shell/lldb-server/TestGdbserverErrorMessages.test
A lldb/test/Shell/lldb-server/TestPlatformErrorMessages.test
A lldb/test/Shell/lldb-server/TestPlatformHelp.test
M lldb/tools/driver/Driver.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-server/CMakeLists.txt
A lldb/tools/lldb-server/PlatformOptions.td
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/DAP/ProtocolRequestsTest.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Host/FileTest.cpp
M lldb/unittests/Host/common/CMakeLists.txt
A lldb/unittests/Host/common/DiagnosticsRenderingTest.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/Utility/CMakeLists.txt
R lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M lldb/unittests/Utility/RegisterValueTest.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/cmake/modules/TableGen.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CIBestPractices.rst
M llvm/docs/CMake.rst
M llvm/docs/CodeGenerator.rst
M llvm/docs/CommandLine.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/HowToBuildWindowsItaniumPrograms.rst
M llvm/docs/HowToUpdateDebugInfo.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/InstrProfileFormat.rst
M llvm/docs/KernelInfo.rst
M llvm/docs/LangRef.rst
M llvm/docs/Lexicon.rst
M llvm/docs/LinkTimeOptimization.rst
M llvm/docs/MLGO.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/PCSectionsMetadata.rst
M llvm/docs/QualGroup.rst
M llvm/docs/ReleaseProcess.rst
M llvm/docs/ResponseGuide.rst
M llvm/docs/SPIRVUsage.rst
M llvm/docs/Security.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/docs/XRayFDRFormat.rst
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/ConcurrentHashtable.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/ilist_node_base.h
A llvm/include/llvm/Analysis/CMakeLists.txt
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/ScopedNoAliasAA.h
R llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
A llvm/include/llvm/Analysis/TargetLibraryInfo.td
A llvm/include/llvm/Analysis/TargetLibraryInfoImpl.td
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/Bitcode/BitcodeConvenience.h
M llvm/include/llvm/CMakeLists.txt
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/LiveIntervalUnion.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/CodeGen/LiveRegUnits.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineTraceMetrics.h
M llvm/include/llvm/CodeGen/RDFGraph.h
M llvm/include/llvm/CodeGen/RDFRegisters.h
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/include/llvm/CodeGen/RegAllocPBQP.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/RegisterClassInfo.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/include/llvm/CodeGen/SDNodeInfo.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/DWP/DWP.h
M llvm/include/llvm/DWP/DWPStringPool.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
R llvm/include/llvm/ExecutionEngine/Orc/DebugObjectManagerPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
A llvm/include/llvm/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
R llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/include/llvm/Frontend/OpenMP/OMPConstants.h
M llvm/include/llvm/IR/Constant.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PredIteratorCache.h
M llvm/include/llvm/LTO/Config.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCParser/AsmLexer.h
M llvm/include/llvm/MC/MCParser/MCAsmParserExtension.h
M llvm/include/llvm/MC/MCRegister.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinEH.h
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/Support/BranchProbability.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Support/ModRef.h
M llvm/include/llvm/Support/SpecialCaseList.h
R llvm/include/llvm/Support/SystemZ/zOSSupport.h
A llvm/include/llvm/Support/SystemZ/zos_wrappers/string.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/include/llvm/TableGen/Main.h
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
M llvm/include/module.modulemap
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InstructionPrecedenceTracking.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/CAS/OnDiskCAS.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/InterferenceCache.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/LiveRegUnits.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RDFLiveness.cpp
M llvm/lib/CodeGen/RDFRegisters.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
M llvm/lib/DWP/DWP.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupport.cpp
A llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
R llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
R llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
M llvm/lib/ExecutionEngine/Orc/MachO.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/DefaultHostBootstrapValues.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/UpdateCompilerUsed.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCDisassembler/MCExternalSymbolizer.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCInst.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/GOFFAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
M llvm/lib/MC/MCParser/XCOFFAsmParser.cpp
M llvm/lib/MC/MCRegisterInfo.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinEH.cpp
M llvm/lib/ObjCopy/COFF/COFFObject.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/RecordStreamer.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpEmitter.cpp
M llvm/lib/Option/OptTable.cpp
M llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Support/BranchProbability.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/ModRef.cpp
M llvm/lib/Support/Mustache.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Support/Unix/Program.inc
A llvm/lib/Support/zOSLibFunctions.cpp
M llvm/lib/TableGen/Main.cpp
M llvm/lib/TableGen/StringToOffsetTable.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.td
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64MacroFusion.h
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
A llvm/lib/Target/AArch64/AArch64SMEAttributes.cpp
A llvm/lib/Target/AArch64/AArch64SMEAttributes.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
R llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
R llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/lib/Target/AArch64/Utils/CMakeLists.txt
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.h
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
A llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/CMakeLists.txt
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Hexagon/RDFCopy.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/lib/Target/LoongArch/LoongArchSelectionDAGInfo.cpp
A llvm/lib/Target/LoongArch/LoongArchSelectionDAGInfo.h
M llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
M llvm/lib/Target/LoongArch/LoongArchSubtarget.h
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kSelectionDAGInfo.cpp
M llvm/lib/Target/M68k/M68kSelectionDAGInfo.h
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.h
M llvm/lib/Target/PowerPC/CMakeLists.txt
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
A llvm/lib/Target/RISCV/RISCVPassRegistry.def
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/SystemZ/CMakeLists.txt
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/VE/CMakeLists.txt
M llvm/lib/Target/VE/VECustomDAG.cpp
M llvm/lib/Target/VE/VEISelDAGToDAG.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.h
A llvm/lib/Target/VE/VESelectionDAGInfo.cpp
A llvm/lib/Target/VE/VESelectionDAGInfo.h
M llvm/lib/Target/VE/VESubtarget.cpp
M llvm/lib/Target/VE/VESubtarget.h
M llvm/lib/Target/VE/VVPISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86.td
R llvm/lib/Target/X86/X86DiscriminateMemOps.cpp
M llvm/lib/Target/X86/X86FixupBWInsts.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
R llvm/lib/Target/X86/X86InsertPrefetch.cpp
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/PPCTargetParser.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/ProfileVerify.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll
M llvm/test/Analysis/CostModel/AMDGPU/shufflevector.ll
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
R llvm/test/Analysis/DependenceAnalysis/Coupled.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/Invariant.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PR51512.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
R llvm/test/Analysis/DependenceAnalysis/Separability.ll
M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
M llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll
M llvm/test/Assembler/aarch64-intrinsics-attributes.ll
M llvm/test/Assembler/memory-attribute.ll
M llvm/test/Bitcode/memory-attribute-upgrade.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-copy-vector-crash.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
M llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/alias_mask.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-trn.ll
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
A llvm/test/CodeGen/AArch64/arm64ec-indirect-call.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
A llvm/test/CodeGen/AArch64/ccmp-cse.ll
M llvm/test/CodeGen/AArch64/cmpbr-early-ifcvt.mir
M llvm/test/CodeGen/AArch64/cmpbr-reg-reg.ll
A llvm/test/CodeGen/AArch64/cmpbr-zext-sext.ll
M llvm/test/CodeGen/AArch64/ctlz.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/expand-sme-pseudos.mir
M llvm/test/CodeGen/AArch64/extbinopload.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
M llvm/test/CodeGen/AArch64/fpext.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/global-merge.ll
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/i128_with_overflow.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/itofp.ll
A llvm/test/CodeGen/AArch64/licm-regclass-copy.mir
M llvm/test/CodeGen/AArch64/llround-conv-fp16.ll
M llvm/test/CodeGen/AArch64/llround-conv.ll
M llvm/test/CodeGen/AArch64/load.ll
A llvm/test/CodeGen/AArch64/loop-dependence-mask-ccmp.ll
M llvm/test/CodeGen/AArch64/lround-conv-fp16.ll
M llvm/test/CodeGen/AArch64/lround-conv.ll
A llvm/test/CodeGen/AArch64/mul-i128-overflow.ll
M llvm/test/CodeGen/AArch64/mul.ll
A llvm/test/CodeGen/AArch64/partial-reduction-add-predicated.ll
M llvm/test/CodeGen/AArch64/pr166870.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/sitofp-to-tbl.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/store.ll
A llvm/test/CodeGen/AArch64/strictfp-inlineasm.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-ext-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-fp-combine.ll
M llvm/test/CodeGen/AArch64/sve-fp-reduce-fadda.ll
M llvm/test/CodeGen/AArch64/sve-fptosi-sat.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
M llvm/test/CodeGen/AArch64/trunc-avg-fold.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
A llvm/test/CodeGen/AArch64/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/v3f-to-int.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
M llvm/test/CodeGen/AArch64/vscale-and-sve-cnt-demandedbits.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsic-mmo-type.ll
A llvm/test/CodeGen/AMDGPU/bug-pk-f32-imm-fold.mir
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/lds-branch-vmem-hazard.mir
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
A llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
A llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-scale-to-agpr.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.ll
M llvm/test/CodeGen/AMDGPU/shrink-insts-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
M llvm/test/CodeGen/AMDGPU/vector_range_metadata.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250-t16.mir
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/ARM/global-merge-1.ll
A llvm/test/CodeGen/ARM/strictfp-inlineasm.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/unused.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
A llvm/test/CodeGen/DirectX/ddx_coarse-errors.ll
A llvm/test/CodeGen/DirectX/ddx_coarse.ll
A llvm/test/CodeGen/DirectX/ddy_coarse-errors.ll
A llvm/test/CodeGen/DirectX/ddy_coarse.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
A llvm/test/CodeGen/Hexagon/bfloat.ll
A llvm/test/CodeGen/Hexagon/bfloat_vec.ll
A llvm/test/CodeGen/Hexagon/swp-phi-cycle.ll
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
A llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/convert-sm89.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-tensormap-invalid.ll
A llvm/test/CodeGen/NVPTX/fence-proxy.ll
A llvm/test/CodeGen/NVPTX/op-fence.ll
A llvm/test/CodeGen/NVPTX/tcgen05-mma-tensor-formatted.ll
A llvm/test/CodeGen/NVPTX/thread-fence.ll
M llvm/test/CodeGen/PowerPC/recipest.ll
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
A llvm/test/CodeGen/RISCV/pipeline-options.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
A llvm/test/CodeGen/RISCV/rvv/combine-vl-vw-macc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-fp-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vl-opt-live-out.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
A llvm/test/CodeGen/RISCV/sincos-expansion.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ddx_coarse.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ddy_coarse.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fwidth.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWStructuredBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer_unused.ll
A llvm/test/CodeGen/SPIRV/opencl/ddx_coarse-error.ll
A llvm/test/CodeGen/SPIRV/opencl/ddy_coarse-error.ll
A llvm/test/CodeGen/SPIRV/opencl/fwidth-error.ll
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
A llvm/test/CodeGen/WebAssembly/simd-extadd.ll
M llvm/test/CodeGen/WebAssembly/simd-vecreduce-bool.ll
M llvm/test/CodeGen/X86/O0-pipeline.ll
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
M llvm/test/CodeGen/X86/bittest-big-integer.ll
M llvm/test/CodeGen/X86/build-vector-256.ll
M llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
M llvm/test/CodeGen/X86/chain_order.ll
M llvm/test/CodeGen/X86/combine-mul.ll
R llvm/test/CodeGen/X86/discriminate-mem-ops-missing-info.ll
R llvm/test/CodeGen/X86/discriminate-mem-ops-skip-pfetch.ll
R llvm/test/CodeGen/X86/discriminate-mem-ops.ll
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
R llvm/test/CodeGen/X86/insert-prefetch-inline.afdo
R llvm/test/CodeGen/X86/insert-prefetch-inline.ll
R llvm/test/CodeGen/X86/insert-prefetch-invalid-instr.afdo
R llvm/test/CodeGen/X86/insert-prefetch-invalid-instr.ll
R llvm/test/CodeGen/X86/insert-prefetch-other.afdo
R llvm/test/CodeGen/X86/insert-prefetch.afdo
R llvm/test/CodeGen/X86/insert-prefetch.ll
A llvm/test/CodeGen/X86/isel-arg-attrs.ll
M llvm/test/CodeGen/X86/ldexp-avx512.ll
A llvm/test/CodeGen/X86/llc-accept-avx10-512.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pmul.ll
A llvm/test/CodeGen/X86/pr168594.ll
M llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
A llvm/test/CodeGen/X86/strictfp-inlineasm.ll
A llvm/test/CodeGen/X86/umin-sub-to-usubo-select-combine.ll
A llvm/test/CodeGen/X86/vector-compress-freeze.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-mul.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-512.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/CodeGen/X86/vselect.ll
M llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
M llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
A llvm/test/DebugInfo/X86/no-prologue-end-after-line0-calls.mir
M llvm/test/DebugInfo/dwarfdump-dwp-str-offsets-64.yaml
R llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo.tbd
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo_arm64.tbd
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/MachO_Foo_arm64e.tbd
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth_noalloc_sections.yaml
R llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth_noolloc_sections.yaml
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_weak_link.test
M llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_relocations.s
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/MC/AArch64/armv9.7a-gcie-diagnostics.s
M llvm/test/MC/AArch64/armv9.7a-gcie.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
A llvm/test/MC/ARM/arm-movt-movw-absolute-pass.s
A llvm/test/MC/AsmParser/directive_base64.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
M llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
M llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
A llvm/test/TableGen/SDNodeInfoEmitter/hw-mode.td
M llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
M llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
M llvm/test/TableGen/SDNodeInfoEmitter/skipped-nodes.td
M llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
A llvm/test/TableGen/TargetLibraryInfo.td
M llvm/test/TableGen/get-named-operand-idx.td
A llvm/test/TableGen/intrinsic-arginfo.td
A llvm/test/TableGen/target-mem-intrinsic-attrs.td
A llvm/test/TableGen/target-specialized-pseudos.td
A llvm/test/ThinLTO/X86/dtlto/dtlto-cache.ll
A llvm/test/ThinLTO/X86/memprof-fixup.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/read-write-scc.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/InferFunctionAttrs/norecurse_debug.ll
M llvm/test/Transforms/InstCombine/canonicalize-const-to-bop.ll
M llvm/test/Transforms/InstCombine/icmp-shr.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
A llvm/test/Transforms/InstSimplify/AArch64/aarch64-sve-reductions.ll
A llvm/test/Transforms/InstSimplify/AArch64/lit.local.cfg
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
M llvm/test/Transforms/InstSimplify/compare.ll
A llvm/test/Transforms/LICM/AArch64/speculative-intrinsic-hoisting.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vect-ptr-ptr-size-mismatch.ll
A llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/subchain-interleaved.ll
A llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-redund-loads.ll
M llvm/test/Transforms/LoopFusion/pr164082.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
A llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
A llvm/test/Transforms/LoopInterchange/zero-btc.ll
A llvm/test/Transforms/LoopUnroll/AArch64/force-unroll-threshold.ll
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration-no-guard.ll
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
M llvm/test/Transforms/LoopUnroll/peel-last-iteration-expansion-cost.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies_multidims.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
A llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-incomplete-chains.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/streaming-compatible-sve-no-maximize-bandwidth.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-store-with-gap.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-opaque-pointers.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/cse-gep-source-element-type.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
A llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
A llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-no-wrap.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-index-width-smaller-than-iv-width.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr34681.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr36983-multiple-lcssa.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/reduction-align.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
M llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LowerTypeTests/cfi-nounwind-direct-call.ll
M llvm/test/Transforms/LowerTypeTests/function-weak.ll
A llvm/test/Transforms/MemProfContextDisambiguation/fixup.ll
A llvm/test/Transforms/PGOProfile/profcheck-exclusions.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
M llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll
M llvm/test/Transforms/SCCP/ipscp-drop-argmemonly.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
A llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
A llvm/test/Transforms/SLPVectorizer/X86/matching-insert-point-for-nodes.ll
A llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
A llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SimplifyCFG/switch-on-const.ll
A llvm/test/Transforms/VectorCombine/AArch64/identity-shuffle-sve.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-chain-to-shuffles.ll
A llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
A llvm/test/Verifier/diderivedtype-extradata-tuple.ll
M llvm/test/lit.cfg.py
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
A llvm/test/tools/dsymutil/AArch64/DWARFLinkerParallel/accel-imported-declarations.test
A llvm/test/tools/dsymutil/AArch64/accel-imported-declarations.test
A llvm/test/tools/dsymutil/AArch64/call-pc-reloc.test
A llvm/test/tools/dsymutil/AArch64/debug-names-accel-table-types.ll
A llvm/test/tools/dsymutil/AArch64/discriminator.test
A llvm/test/tools/dsymutil/AArch64/discriminator_repeated.test
A llvm/test/tools/dsymutil/AArch64/dummy-debug-map-arm64.map
A llvm/test/tools/dsymutil/AArch64/dwarf5-addr-base.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-addrx-0x0-last.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-dwarf4-combination-macho.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-macho.test
A llvm/test/tools/dsymutil/AArch64/dwarf5-str-offsets-base-strx.test
A llvm/test/tools/dsymutil/AArch64/extern-alias.test
A llvm/test/tools/dsymutil/AArch64/fat-arch-name.test
A llvm/test/tools/dsymutil/AArch64/fat-threading.test
A llvm/test/tools/dsymutil/AArch64/firmware.test
A llvm/test/tools/dsymutil/AArch64/inline-source.test
A llvm/test/tools/dsymutil/AArch64/inlined-low_pc.c
A llvm/test/tools/dsymutil/AArch64/lit.local.cfg
A llvm/test/tools/dsymutil/AArch64/missing-object-warning.test
A llvm/test/tools/dsymutil/AArch64/missing-symbol-warning.test
A llvm/test/tools/dsymutil/AArch64/preload.test
A llvm/test/tools/dsymutil/AArch64/remarks-linking-bundle-empty.test
A llvm/test/tools/dsymutil/AArch64/remarks-linking-bundle.test
A llvm/test/tools/dsymutil/AArch64/static-archive-collision.test
A llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
A llvm/test/tools/dsymutil/AArch64/suppressions.txt
A llvm/test/tools/dsymutil/AArch64/swiftmodule-include-from-interface.test
A llvm/test/tools/dsymutil/AArch64/swiftmodule.test
A llvm/test/tools/dsymutil/AArch64/typedefs-with-same-name.test
R llvm/test/tools/dsymutil/ARM/DWARFLinkerParallel/accel-imported-declarations.test
R llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test
R llvm/test/tools/dsymutil/ARM/call-pc-reloc.test
R llvm/test/tools/dsymutil/ARM/debug-names-accel-table-types.ll
R llvm/test/tools/dsymutil/ARM/discriminator.test
R llvm/test/tools/dsymutil/ARM/discriminator_repeated.test
R llvm/test/tools/dsymutil/ARM/dummy-debug-map-amr64.map
R llvm/test/tools/dsymutil/ARM/dwarf5-addr-base.test
R llvm/test/tools/dsymutil/ARM/dwarf5-addrx-0x0-last.test
R llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
R llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
R llvm/test/tools/dsymutil/ARM/dwarf5-str-offsets-base-strx.test
R llvm/test/tools/dsymutil/ARM/extern-alias.test
R llvm/test/tools/dsymutil/ARM/fat-arch-name.test
R llvm/test/tools/dsymutil/ARM/fat-threading.test
R llvm/test/tools/dsymutil/ARM/firmware.test
R llvm/test/tools/dsymutil/ARM/inline-source.test
R llvm/test/tools/dsymutil/ARM/inlined-low_pc.c
M llvm/test/tools/dsymutil/ARM/lit.local.cfg
R llvm/test/tools/dsymutil/ARM/missing-object-warning.test
R llvm/test/tools/dsymutil/ARM/missing-symbol-warning.test
R llvm/test/tools/dsymutil/ARM/preload.test
R llvm/test/tools/dsymutil/ARM/remarks-linking-bundle-empty.test
R llvm/test/tools/dsymutil/ARM/remarks-linking-bundle.test
R llvm/test/tools/dsymutil/ARM/static-archive-collision.test
R llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
R llvm/test/tools/dsymutil/ARM/swiftmodule-include-from-interface.test
R llvm/test/tools/dsymutil/ARM/swiftmodule.test
R llvm/test/tools/dsymutil/ARM/typedefs-with-same-name.test
M llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
A llvm/test/tools/llvm-dwp/X86/dwarf64-str-offsets.test
A llvm/test/tools/llvm-dwp/X86/incompatible_dwarf_version.test
M llvm/test/tools/llvm-ir2vec/output/reference_triplets.txt
M llvm/test/tools/llvm-ir2vec/output/reference_x86_entities.txt
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
A llvm/test/tools/llvm-pdbutil/dbi-section-headers.test
A llvm/test/tools/llvm-pdbutil/inline-annotations.test
M llvm/tools/dsymutil/Options.td
M llvm/tools/llc/llc.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-dwp/Opts.td
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/Error.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-objdump/OtoolOpts.td
M llvm/tools/llvm-pdbutil/PdbYaml.cpp
M llvm/tools/llvm-pdbutil/PdbYaml.h
M llvm/tools/llvm-pdbutil/YAMLOutputStyle.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.h
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readobj/COFFDumper.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.cpp
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
M llvm/tools/llvm-xray/xray-extract.cpp
M llvm/tools/lto/lto.cpp
M llvm/tools/obj2yaml/macho2yaml.cpp
M llvm/unittests/ADT/APIntTest.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
M llvm/unittests/CodeGen/MFCommon.inc
R llvm/unittests/CodeGen/MLRegAllocDevelopmentFeatures.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/unittests/Object/ELFTest.cpp
M llvm/unittests/Object/ELFTypesTest.cpp
M llvm/unittests/Support/JobserverTest.cpp
M llvm/unittests/Support/ModRefTest.cpp
M llvm/unittests/Support/Path.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
M llvm/unittests/Transforms/Utils/LocalTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
M llvm/utils/TableGen/Basic/SequenceToOffsetTable.h
M llvm/utils/TableGen/Basic/TableGen.cpp
A llvm/utils/TableGen/Basic/TargetLibraryInfoEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/Common/InfoByHwMode.h
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/SDNodeInfoEmitter.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/misc/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-server/BUILD.gn
A llvm/utils/gn/secondary/llvm/include/llvm/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Debugging/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/ARM/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/tablegen.gni
M llvm/utils/lit/lit/TestRunner.py
A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-current-testcase.txt
M llvm/utils/lit/tests/Inputs/shtest-env-positive/env-no-subcommand.txt
M llvm/utils/lit/tests/shtest-env-positive.py
M llvm/utils/profcheck-xfail.txt
M mlir/CMakeLists.txt
A mlir/docs/Dialects/NVVMDialect.md
M mlir/docs/Dialects/SPIR-V.md
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Conversion/LLVMCommon/VectorPattern.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefBase.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/include/mlir/IR/Properties.td
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/include/mlir/Transforms/Passes.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/VectorPattern.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationDialect.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/HoistPadding.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/MemRef/IR/CMakeLists.txt
M mlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
A mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitRoutine.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/IterationGraphSorter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.h
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
A mlir/lib/Dialect/Tosa/Transforms/TosaNarrowI64ToI32.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/IR/TypeUtilities.cpp
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/Rewrite/ByteCode.h
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.h
M mlir/lib/Tools/PDLL/AST/Nodes.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/CMakeLists.txt
M mlir/python/mlir/dialects/gpu/__init__.py
M mlir/python/mlir/dialects/transform/__init__.py
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
A mlir/test/Conversion/AMDGPUToROCDL/cvt_scale_pk-gfx1250.mlir
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/GPUToNVVM/memref.mlir
M mlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc-copy.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-copy.mlir
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_1d.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/Dialect/Bufferization/invalid.mlir
M mlir/test/Dialect/Bufferization/ops.mlir
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/convolution/roundtrip-convolution.mlir
M mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/MemRef/mem2reg.mlir
M mlir/test/Dialect/MemRef/transform-ops.mlir
M mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
A mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
A mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Dialect/Vector/vector-scan-transforms.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/IR/invalid-ops.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-maxsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-minsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/alloc-host-shared.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/command-line-arg.mlir
M mlir/test/Integration/GPU/CUDA/concurrent-kernels.mlir
M mlir/test/Integration/GPU/CUDA/dump-ptx.mlir
M mlir/test/Integration/GPU/CUDA/dump-sass.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
A mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
A mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy_invalid.mlir
M mlir/test/Target/SPIRV/selection.mlir
M mlir/test/Transforms/loop-invariant-code-motion.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestTypes.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
M mlir/test/python/dialects/gpu/dialect.py
M mlir/test/python/dialects/nvvm.py
M mlir/test/python/dialects/transform_interpreter.py
M mlir/tools/mlir-tblgen/EnumsGen.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/include/Shared/Debug.h
M offload/libomptarget/OffloadRTL.cpp
M offload/libomptarget/PluginManager.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/test/lit.site.cfg.in
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M openmp/runtime/src/CMakeLists.txt
M openmp/tools/omptest/test/CMakeLists.txt
A orc-rt/docs/Design.md
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt/Session.h
A orc-rt/include/orc-rt/TaskDispatcher.h
A orc-rt/include/orc-rt/ThreadPoolTaskDispatcher.h
M orc-rt/lib/executor/CMakeLists.txt
M orc-rt/lib/executor/Session.cpp
A orc-rt/lib/executor/TaskDispatcher.cpp
A orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
M orc-rt/unittests/CMakeLists.txt
M orc-rt/unittests/SessionTest.cpp
A orc-rt/unittests/ThreadPoolTaskDispatcherTest.cpp
M polly/docs/ReleaseNotes.rst
M polly/include/polly/CodeGen/CodeGeneration.h
M polly/include/polly/CodeGen/IslAst.h
M polly/include/polly/CodePreparation.h
M polly/include/polly/DeLICM.h
M polly/include/polly/DeadCodeElimination.h
M polly/include/polly/DependenceInfo.h
M polly/include/polly/ForwardOpTree.h
M polly/include/polly/JSONExporter.h
M polly/include/polly/MaximalStaticExpansion.h
M polly/include/polly/Pass/PhaseManager.h
M polly/include/polly/PruneUnprofitable.h
M polly/include/polly/ScheduleOptimizer.h
M polly/include/polly/ScopGraphPrinter.h
M polly/include/polly/ScopInfo.h
R polly/include/polly/ScopPass.h
M polly/include/polly/Simplify.h
M polly/lib/Analysis/DependenceInfo.cpp
M polly/lib/Analysis/PruneUnprofitable.cpp
M polly/lib/Analysis/ScopDetection.cpp
M polly/lib/Analysis/ScopInfo.cpp
R polly/lib/Analysis/ScopPass.cpp
M polly/lib/CMakeLists.txt
M polly/lib/CodeGen/CodeGeneration.cpp
M polly/lib/CodeGen/IslAst.cpp
M polly/lib/Exchange/JSONExporter.cpp
M polly/lib/Pass/PhaseManager.cpp
M polly/lib/Support/PollyPasses.def
M polly/lib/Support/RegisterPasses.cpp
M polly/lib/Transform/CodePreparation.cpp
M polly/lib/Transform/DeLICM.cpp
M polly/lib/Transform/DeadCodeElimination.cpp
M polly/lib/Transform/FlattenSchedule.cpp
M polly/lib/Transform/ForwardOpTree.cpp
M polly/lib/Transform/MatmulOptimizer.cpp
M polly/lib/Transform/MaximalStaticExpansion.cpp
M polly/lib/Transform/ScheduleOptimizer.cpp
M polly/lib/Transform/ScopInliner.cpp
M polly/lib/Transform/Simplify.cpp
M polly/test/CodeGen/invariant_load_base_pointer_conditional.ll
M polly/unittests/CMakeLists.txt
R polly/unittests/ScopPassManager/CMakeLists.txt
R polly/unittests/ScopPassManager/PassManagerTest.cpp
M pyproject.toml
M runtimes/CMakeLists.txt
M utils/bazel/.bazelrc
M utils/bazel/.bazelversion
A utils/bazel/MODULE.bazel
A utils/bazel/MODULE.bazel.lock
R utils/bazel/WORKSPACE
A utils/bazel/extensions.bzl
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/mman/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/a5fb057dd9a7...da1d82491dfa
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list