[all-commits] [llvm/llvm-project] 35c1bf: [mlir][llvm] Handle debug record import edge cases

[Tobias Gysi via All-commits]

  Branch: refs/heads/users/gysit/fix-debug-rec-import
  Home:   https://github.com/llvm/llvm-project
  Commit: 35c1bfd8404c02917262b1ac4c350b1260ddceee
      https://github.com/llvm/llvm-project/commit/35c1bfd8404c02917262b1ac4c350b1260ddceee
  Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
  Date:   2025-11-20 (Thu, 20 Nov 2025)

  Changed paths:
    M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
    M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/test/Target/LLVMIR/Import/import-failure.ll

  Log Message:
  -----------
  [mlir][llvm] Handle debug record import edge cases

This commit enables the direct import of debug records by default and
fixes issues with two edge cases:
- Detect early on if the address operand is an argument list
  (calling getAddress() for argument lists asserts)
- Use getAddress() to check if the address operand is null, which
  means the address operand is an empty metadata node, which currently
  is not supported.
- Add support for debug label records.

This is a follow-up to:
https://github.com/llvm/llvm-project/pull/167812



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