[all-commits] [llvm/llvm-project] bd8c94: Reapply "[Github] Update PR labeller to v6.0.1 (#1...
Krzysztof Parzyszek via All-commits
all-commits at lists.llvm.org
Thu Nov 20 06:46:51 PST 2025
Branch: refs/heads/users/kparzysz/flang-test-fix
Home: https://github.com/llvm/llvm-project
Commit: bd8c94177537ba30c6a160afa6dd1b8b8fc1e813
https://github.com/llvm/llvm-project/commit/bd8c94177537ba30c6a160afa6dd1b8b8fc1e813
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
Log Message:
-----------
Reapply "[Github] Update PR labeller to v6.0.1 (#167246)"
This reverts commit b3d62645158cd6f463f2e1c878f6d63b9dc4b164.
This broke the workflow because the sync-labels flag was set to a
zero-length string to work around an issue. The underlying issue has
been fixed and the value is now required to be a boolean. We can just
drop the value because we want the default behavior anyways. This should
be the last remaining breaking change from v5 that we need to migrate.
Commit: d772663a9f003a08ee76414397963c58e80b27d7
https://github.com/llvm/llvm-project/commit/d772663a9f003a08ee76414397963c58e80b27d7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
Log Message:
-----------
Revert "[Github] Update PR labeller to v6.0.1 (#167246)"
This reverts commit bd8c94177537ba30c6a160afa6dd1b8b8fc1e813.
This still broke things and evidently needs more testing on a fork
before relanding.
https://github.com/llvm/llvm-project/actions/runs/19475911086
Commit: 5af03989cc01e7bf9a45240d86411e9eee5b0e8b
https://github.com/llvm/llvm-project/commit/5af03989cc01e7bf9a45240d86411e9eee5b0e8b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
Log Message:
-----------
[X86] Add test examples of build vectors of reversed scalar loads that could be converted to vector loads plus shuffles (#168571)
This is turning up in some legalisation code when shuffling vectors bitcast from illegal loads.
Ideally we'd handle more complex shuffles, but reverse is a start.
Commit: 5407e62611abfbb359f595d89d9f29adf647be02
https://github.com/llvm/llvm-project/commit/5407e62611abfbb359f595d89d9f29adf647be02
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
R mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
Log Message:
-----------
Revert "[MLIR][NVVM] Add tcgen05.mma MLIR Ops" (#168583)
Reverts llvm/llvm-project#164356
The bots are broken.
Commit: 8bdd82ce1dd9c7da647b270b3a58eb36641e8e34
https://github.com/llvm/llvm-project/commit/8bdd82ce1dd9c7da647b270b3a58eb36641e8e34
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .ci/premerge_advisor_explain.py
M .ci/premerge_advisor_upload.py
Log Message:
-----------
[CI] Skip Running Premerge Advisor on AArch64 (#168404)
They were still running because the conditional was not correct. This
patch fixes that so they do not interefere with the results of the job.
Commit: 40ed57c5054615d172f266dddb7b1ef5abf9b402
https://github.com/llvm/llvm-project/commit/40ed57c5054615d172f266dddb7b1ef5abf9b402
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .ci/utils.sh
Log Message:
-----------
[CI] Prefer Bash Tests over Empty String Comparisons (#168575)
These are more idiomatic in bash.
Commit: 0ae2bccde4593b456bb7a13264a885e7dda0e80a
https://github.com/llvm/llvm-project/commit/0ae2bccde4593b456bb7a13264a885e7dda0e80a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/ARM/CMakeLists.txt
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
Log Message:
-----------
[ARM] TableGen-erate node descriptions (#168212)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
Some nodes fail validation, those are enumerated in
`ARMSelectionDAGInfo::verifyTargetNode()`. Some of the bugs are easy to
fix, but probably they should be fixed separately, this patch is already big.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168212
Commit: 523bd2df6d1542e92ed70d7c6baec74dbe181699
https://github.com/llvm/llvm-project/commit/523bd2df6d1542e92ed70d7c6baec74dbe181699
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
Log Message:
-----------
[GISel][RISCV] Compute CTPOP of small odd-sized integer correctly (#168559)
Fixes the assertion in #168523
This patch lifts the small, odd-sized integer to 8 bits, ensuring that
the following lowering code behaves correctly.
Commit: 46565f32d8d70f5eb9aa3aa4fba15fbd19912ccb
https://github.com/llvm/llvm-project/commit/46565f32d8d70f5eb9aa3aa4fba15fbd19912ccb
Author: Dan Liew <dan at su-root.co.uk>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lldb/include/lldb/Utility/LLDBLog.h
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Utility/LLDBLog.cpp
Log Message:
-----------
[LLDB] Add log channel for InstrumentationRuntime plugins (#168508)
This patch adds `LLDBLog::InstrumentationRuntime` as a log channel to
provide an appropriate channel for instrumentation runtime plugins as
previously one did not exist.
A small use of the channel is added to illustrate its use. The logging
added is not intended to be comprehensive.
This is primarily motivated by an `-fbounds-safety` instrumentation
plugin (https://github.com/swiftlang/llvm-project/pull/11835).
rdar://164920875
Commit: 3f614026f9a5af9409acac225516c868e927ac7a
https://github.com/llvm/llvm-project/commit/3f614026f9a5af9409acac225516c868e927ac7a
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A clang/test/ClangScanDeps/module-in-stable-dir-by-name.c
Log Message:
-----------
[clang][DependencyScanning] Add Test Coverage of `StabeDirs` during By-Name Lookups (#168143)
This PR adds some test coverage for `StableDirs` during by-name lookups.
Commit: 8f67759585f7bd25cfebf2224680b131ffe5425b
https://github.com/llvm/llvm-project/commit/8f67759585f7bd25cfebf2224680b131ffe5425b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
Log Message:
-----------
[NFC][TableGen] Remove `close` member from various CodeGenHelpers (#167904)
Always rely on local scopes to enforce the lifetime of these helper
objects and by extension where the "closing" of various C++ code
constructs happens.
Commit: 4ab24235cbebee68a9cba4a5caba3325542b64b9
https://github.com/llvm/llvm-project/commit/4ab24235cbebee68a9cba4a5caba3325542b64b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[ConstantFolding] Generalize constant folding for vector_interleave2 to interleave3-8. (#168473)
Commit: 96e58b83a3aa681cbf5b8288c3012d5d5d20398c
https://github.com/llvm/llvm-project/commit/96e58b83a3aa681cbf5b8288c3012d5d5d20398c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
Log Message:
-----------
[RISCV] Legalize misaligned unmasked vp.load/vp.store to vle8/vse8. (#167745)
If vector-unaligned-mem support is not enabled, we should not generate
loads/stores that are not aligned to their element size.
We already do this for non-VP vector loads/stores.
This code has been in our downstream for about a year and a half after
finding the vectorizer generating misaligned loads/stores. I don't think
that is unique to our downstream.
Doing this for masked vp.load/store requires widening the mask as well
which is harder to do.
NOTE: Because we have to scale the VL, this will introduce additional
vsetvli and the VL optimizer will not be effective at optimizing any
arithmetic that is consumed by the store.
Commit: 0dd3cb55e2bc93586d15920d5ccd0437c0c6f3ee
https://github.com/llvm/llvm-project/commit/0dd3cb55e2bc93586d15920d5ccd0437c0c6f3ee
Author: Shubham Sandeep Rastogi <Shubham.Rastogi at sony.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
A llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
Log Message:
-----------
Reland instr-ref-target-hooks-sp-clobber.mir (#168136)
This test was failing on chromium builds with error:
```
/Volumes/Work/s/w/ir/x/w/llvm_build/bin/llc -o - /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir -run-pass=livedebugvalues | /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir # RUN: at line 8
+ /Volumes/Work/s/w/ir/x/w/llvm_build/bin/llc -o - /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir -run-pass=livedebugvalues
+ /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
error: YAML:121:3: unknown key 'stackSizePPR'
stackSizePPR: 0
^~~~~~~~~~~~
FileCheck error: '<stdin>' is empty.
FileCheck command line: /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
```
This is an attempt to reland the failing test
Commit: b630721d543091821fec1c631285573763370e83
https://github.com/llvm/llvm-project/commit/b630721d543091821fec1c631285573763370e83
Author: Pranav Kant <prka at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Fix #164904 (#168593)
Commit: e93763e7909b746136c88caf77572d937b8f2af8
https://github.com/llvm/llvm-project/commit/e93763e7909b746136c88caf77572d937b8f2af8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/tools/dsymutil/Options.td
Log Message:
-----------
[dsymutil] Specify that -flat is for testing in the help output (#168590)
Gently discourage users from relying on -flat by specifying in the help
output that it's meant for testing.
Commit: 2ad93b4775cf8524bc775e871f2224f30ef92947
https://github.com/llvm/llvm-project/commit/2ad93b4775cf8524bc775e871f2224f30ef92947
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] getRoundingModeX86 - add missing "clang-format on" toggle comment (#168588)
This was preventing later code to be formatted
Commit: ac6e48de40ec8be78d407072479cdbf7aa35535d
https://github.com/llvm/llvm-project/commit/ac6e48de40ec8be78d407072479cdbf7aa35535d
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/include/llvm/DWP/DWP.h
M llvm/include/llvm/DWP/DWPStringPool.h
M llvm/lib/DWP/DWP.cpp
A llvm/test/tools/llvm-dwp/X86/dwarf64-str-offsets.test
M llvm/tools/llvm-dwp/Opts.td
M llvm/tools/llvm-dwp/llvm-dwp.cpp
Log Message:
-----------
Modify llvm-dwp to be able to emit string tables over 4GB without losing data (#167457)
We can change llvm-dwp to emit DWARF64 version of the .debug_str_offsets
tables for .dwo files in a .dwp file. This allows the string table to
exceed 4GB without truncating string offsets into the .debug_str section
and losing data. llvm-dwp will append all strings to the .debug_str
section for a .dwo file, and if any of the new string offsets exceed
UINT32_MAX, it will upgrade the .debug_str_offsets table to a DWARF64
header and then each string offset in that table can now have a 64 bit
offset.
Fixed LLDB to be able to successfully load the 64 bit string tables in
.dwp files.
Fixed llvm-dwarfdump and LLVM DWARF parsing code to do the right thing
with DWARF64 string table headers.
Commit: 58b8e6e4241ba71c8ffeef4578f1bebb9cec9db9
https://github.com/llvm/llvm-project/commit/58b8e6e4241ba71c8ffeef4578f1bebb9cec9db9
Author: Laxman Sole <lsole at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/diderivedtype-extradata-tuple.ll
Log Message:
-----------
[DebugInfo][IR] Verifier checks for the extraData (#167971)
LLVM IR verifier checks for `extraData` in debug info metadata.
This is a follow-up PR based on discussions in #165023
Commit: 04a1fd5c5434d47cac7488d777d9a1b472cb71f8
https://github.com/llvm/llvm-project/commit/04a1fd5c5434d47cac7488d777d9a1b472cb71f8
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
Log Message:
-----------
[RISCV] Make XFAIL test UNSUPPORTED. (#168525)
Currently the test cfi-multiple-location.mir is marked as XFAIL. This
causes failures on some build bots because the test unexpectedly passes.
Mark this test as UNSUPPORTED for now. Later I plan to merge an MR which
fixes an issue in CFIInstrInserter and this test will be enabled.
Commit: 576e1affab35cff50a7b3beded51c752f1ea2940
https://github.com/llvm/llvm-project/commit/576e1affab35cff50a7b3beded51c752f1ea2940
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[NFC][AMDGPU] IGLP: Fixes for unsigned int handling (#135090)
Fixes unsigned int underflows in
`MFMASmallGemmSingleWaveOpt::applyIGLPStrategy`.
Commit: 124fa5ce5f211dff6dbdc5f433a445386ac2c26b
https://github.com/llvm/llvm-project/commit/124fa5ce5f211dff6dbdc5f433a445386ac2c26b
Author: Pawan Nirpal <pnirpal at qti.qualcomm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
A llvm/test/Transforms/VectorCombine/AArch64/identity-shuffle-sve.ll
Log Message:
-----------
[AArch64] - Improve costing for Identity shuffles for SVE targets. (#165375)
Identity masks can be treated as free when scalable vectorization is
possible making the check agnostic of the vectorization policy
fixed/scalable, This allows for aggressive vector combines for identity
shuffle masks.
Commit: 4155cdc0f1bac39bad35ac390da4170c0482812f
https://github.com/llvm/llvm-project/commit/4155cdc0f1bac39bad35ac390da4170c0482812f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
Log Message:
-----------
Mips: Remove manual libcall name search and table (#168595)
This should really check if the libcall is known supported.
For now mips doesn't configure its RuntimeLibcallsInfo
correctly, and does not have any of the mips16 calls in it.
For now there isn't a way to add them without triggering conflicting
cases in tablegen, so keep parsing the raw name as it was before.
Commit: 8aca6c39e2b4ccf4d739c6450ca012d920de8e45
https://github.com/llvm/llvm-project/commit/8aca6c39e2b4ccf4d739c6450ca012d920de8e45
Author: Marco Elver <elver at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/test/Driver/fsanitize-alloc-token.c
Log Message:
-----------
[AllocToken] Test compatibility with -fsanitize=kcfi,memtag (#168600)
Test that -fsanitize=alloc-token is compatible with kcfi and memtag, as
these should also be possible to combine.
NFC.
Commit: e1bb50b2845379ef696b26e78aba0f62a3e61fb1
https://github.com/llvm/llvm-project/commit/e1bb50b2845379ef696b26e78aba0f62a3e61fb1
Author: Pranav Kant <prka at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] fix #168212 (#168598)
Commit: 56b1d42a65653b23ec9fb96d3cac13d54b4b32ba
https://github.com/llvm/llvm-project/commit/56b1d42a65653b23ec9fb96d3cac13d54b4b32ba
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/constant-inits.cpp
A clang/test/CIR/CodeGen/global-constant.c
M clang/test/CIR/CodeGen/record-zero-init-padding.c
M clang/test/CIR/CodeGen/vtt.cpp
Log Message:
-----------
[CIR] Mark globals as constants (#168463)
We previously added support for marking GlobalOp operations as constant,
but the handling to actually do so was left mostly unimplemented. This
fills in the missing pieces.
Commit: 1157a2213445199169f1f5bbe6edf8839f440498
https://github.com/llvm/llvm-project/commit/1157a2213445199169f1f5bbe6edf8839f440498
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Log Message:
-----------
[GISel] Use getScalarSizeInBits in LegalizerHelper::lowerBitCount (#168584)
For vectors, CTLZ, CTTZ, CTPOP all operate on individual elements. The
lowering should be based on the element width.
I noticed this by inspection. No tests in tree are currently affected,
but I thought it would be good to fix so someone doesn't have to debug
it in the future.
Commit: 3e8dc4dc4d04fe4c42f139423a61802b1ba719fc
https://github.com/llvm/llvm-project/commit/3e8dc4dc4d04fe4c42f139423a61802b1ba719fc
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
Log Message:
-----------
[clang][deps] NFC: Use qualified names for function definitions (#168586)
The compiler doesn't emit a diagnostics when the signature of a function
defined in a namespace gets out-of-sync with its declaration. Let's use
qualified names for function definitions instead of nesting them in a
namespace so that mismatches are diagnosed by the compiler rather than
by the (less understandable) linker.
Commit: d3c2973da0466408aa9cfe1081cd08125a3491a1
https://github.com/llvm/llvm-project/commit/d3c2973da0466408aa9cfe1081cd08125a3491a1
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
Log Message:
-----------
[lldb/aarch64] Add STR/LDR instructions for FP registers to Emulator (#168187)
A function prologue can begin with a pre-index STR instruction for a
floating-point register. To construct an unwind plan from assembly
correctly, the instruction emulator must support such instructions.
Commit: 507f236f5ee5d153300d303fbb74389c1a2eebf4
https://github.com/llvm/llvm-project/commit/507f236f5ee5d153300d303fbb74389c1a2eebf4
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
A llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
Log Message:
-----------
[VPlan] Fix OpType-mismatch in getFlagsFromIndDesc (#168560)
Follow up on a cse OpType-mismatch crash reported due to ef023cae388d
(Reland [VPlan] Expand WidenInt inductions with nuw/nsw), setting the
OpType correctly when returning from getFlagsFromIndDesc.
Commit: 8fce476c81225c5e74866020eff5cba81a272b33
https://github.com/llvm/llvm-project/commit/8fce476c81225c5e74866020eff5cba81a272b33
Author: Sean Perry <perry at ca.ibm.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M llvm/CMakeLists.txt
R llvm/include/llvm/Support/SystemZ/zOSSupport.h
A llvm/include/llvm/Support/SystemZ/zos_wrappers/string.h
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Unix/Program.inc
A llvm/lib/Support/zOSLibFunctions.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/Error.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.cpp
M llvm/tools/obj2yaml/macho2yaml.cpp
Log Message:
-----------
Implement a more seamless way to provide missing functions on z/OS (#167703)
In this PR I'm changing the way we provide the missing functions like
strnlen() on z/OS from the separate header file to a wrapper around the
system headers that declare these functions. This will be less
intrusive.
---------
Co-authored-by: Zibi Sarbinowski <zibi at ca.ibm.com>
Commit: 31ec633a0edaeca4d68f7f04269223a4c29396c5
https://github.com/llvm/llvm-project/commit/31ec633a0edaeca4d68f7f04269223a4c29396c5
Author: higher-performance <higher.performance.github at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/CoroutineHostileRAIICheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/coroutine-hostile-raii.cpp
Log Message:
-----------
[clang-tidy] Fix bugs in misc-coroutine-hostile-raii check (#167947)
1. Handle transformed awaitables for `AllowedCallees`, which generate
temporaries and weren't being handled by #167778.
1. Fix name mismatches in `storeOptions`.
Commit: c4898f3f229027e6cbdf8f9db77b8c14d70f6599
https://github.com/llvm/llvm-project/commit/c4898f3f229027e6cbdf8f9db77b8c14d70f6599
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
A clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
M llvm/docs/DirectX/DXILResources.rst
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/unused.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWStructuredBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer_unused.ll
Log Message:
-----------
[HLSL][DirectX] Use a padding type for HLSL buffers. (#167404)
This change drops the use of the "Layout" type and instead uses explicit
padding throughout the compiler to represent types in HLSL buffers.
There are a few parts to this, though it's difficult to split them up as
they're very interdependent:
1. Refactor HLSLBufferLayoutBuilder to allow us to calculate the padding
of arbitrary types.
2. Teach Clang CodeGen to use HLSL specific paths for cbuffers when
generating aggregate copies, array accesses, and structure accesses.
3. Simplify DXILCBufferAccesses such that it directly replaces accesses
with dx.resource.getpointer rather than recalculating the layout.
4. Basic infrastructure for SPIR-V handling, but the implementation
itself will need work in follow ups.
Fixes several issues, including #138996, #144573, and #156084.
Resolves #147352.
Commit: 5cde345d51aaf7f29cef2bad6a3c6db288b89b76
https://github.com/llvm/llvm-project/commit/5cde345d51aaf7f29cef2bad6a3c6db288b89b76
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Remove pstl from the list of supported runtimes (#168414)
The pstl top-level directory was removed, but we forgot to remove pstl
from the list of valid subdirectories.
Commit: 1e3ea03293229c4b5ca65427076fce154988675f
https://github.com/llvm/llvm-project/commit/1e3ea03293229c4b5ca65427076fce154988675f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] VPIRFlags kind for FCmp with predicate + fast-math flags (NFCI).
FCmp instructions have both a predicate and fast-math flags. Introduce a
new FCmp kind, that combines both to model this correctly in the current
system.
This should be NFC modulo VPlan printing which now includes the correct
fast-math flags.
Commit: 6665642ce40c70b65624a5aa67566725c5a87da5
https://github.com/llvm/llvm-project/commit/6665642ce40c70b65624a5aa67566725c5a87da5
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/bug-pk-f32-imm-fold.mir
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
Log Message:
-----------
[AMDGPU] Don't fold an i64 immediate value if it can't be replicated from its lower 32-bit (#168458)
On some targets, a packed f32 instruction can only read 32 bits from a
scalar operand (SGPR or literal) and replicates the bits to both
channels. In this case, we should not fold an immediate value if it
can't be replicated from its lower 32-bit.
Fixes SWDEV-567139.
Commit: db71cc58ec9471c67c6b80996930a19222dd9f03
https://github.com/llvm/llvm-project/commit/db71cc58ec9471c67c6b80996930a19222dd9f03
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/mman.yaml
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/generic/CMakeLists.txt
A libc/src/sys/mman/linux/generic/pkey_common.h
M libc/src/sys/mman/linux/mprotect.cpp
A libc/src/sys/mman/linux/mprotect_common.h
A libc/src/sys/mman/linux/pkey_alloc.cpp
A libc/src/sys/mman/linux/pkey_common.h
A libc/src/sys/mman/linux/pkey_free.cpp
A libc/src/sys/mman/linux/pkey_get.cpp
A libc/src/sys/mman/linux/pkey_mprotect.cpp
A libc/src/sys/mman/linux/pkey_set.cpp
A libc/src/sys/mman/linux/x86_64/CMakeLists.txt
A libc/src/sys/mman/linux/x86_64/pkey_common.h
A libc/src/sys/mman/pkey_alloc.h
A libc/src/sys/mman/pkey_free.h
A libc/src/sys/mman/pkey_get.h
A libc/src/sys/mman/pkey_mprotect.h
A libc/src/sys/mman/pkey_set.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/pkey_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/mman/BUILD.bazel
Log Message:
-----------
[libc] Implement pkey_alloc/free/get/set/mprotect for x86_64 linux (#162362)
This patch provides definitions for `pkey_*` functions for linux x86_64.
`pkey_alloc`, `pkey_free`, and `pkey_mprotect` are simple syscall
wrappers. `pkey_set` and `pkey_get` modify architecture-specific
registers. The logic for these live in architecture specific
directories:
* `libc/src/sys/mman/linux/x86_64/pkey_common.h` has a real
implementation
* `libc/src/sys/mman/linux/generic/pkey_common.h` contains stubs that
just return `ENOSYS`.
Commit: e47e9f3b7b136f0af549e785896b0584088d0d2c
https://github.com/llvm/llvm-project/commit/e47e9f3b7b136f0af549e785896b0584088d0d2c
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.h
Log Message:
-----------
[NVPTX] TableGen-erate SDNode descriptions (#168367)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
The verification functionality detected a few issues, two of them were
fixed (missing `SDNPMemOperand` property on `TCGEN05_MMA` nodes and
extra glue operand/result on `CallPrototype`), the one remaining is with
`ProxyReg` node, see `NVPTXSelectionDAGInfo::verifyTargetNode()`.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168367
Commit: ed78ab7ca0c217c7a4905b559d23aef44c3db13d
https://github.com/llvm/llvm-project/commit/ed78ab7ca0c217c7a4905b559d23aef44c3db13d
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt/Session.h
A orc-rt/include/orc-rt/TaskDispatcher.h
A orc-rt/include/orc-rt/ThreadPoolTaskDispatcher.h
M orc-rt/lib/executor/CMakeLists.txt
M orc-rt/lib/executor/Session.cpp
A orc-rt/lib/executor/TaskDispatcher.cpp
A orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
M orc-rt/unittests/CMakeLists.txt
M orc-rt/unittests/SessionTest.cpp
A orc-rt/unittests/ThreadPoolTaskDispatcherTest.cpp
Log Message:
-----------
[orc-rt] Introduce Task and TaskDispatcher APIs and implementations. (#168514)
Introduces the Task and TaskDispatcher interfaces (TaskDispatcher.h),
ThreadPoolTaskDispatcher implementation (ThreadPoolTaskDispatch.h), and
updates Session to include a TaskDispatcher instance that can be used to
run tasks.
TaskDispatcher's introduction is motivated by the need to handle calls
to JIT'd code initiated from the controller process: Incoming calls will
be wrapped in Tasks and dispatched. Session shutdown will wait on
TaskDispatcher shutdown, ensuring that all Tasks are run or destroyed
prior to the Session being destroyed.
Commit: 3e499e9427e006a4204d1cb5b6eebe957844e06e
https://github.com/llvm/llvm-project/commit/3e499e9427e006a4204d1cb5b6eebe957844e06e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGen/no-common.c
Log Message:
-----------
[CIR] Add support for common linkage (#168613)
Add support for marking global variables with common linkage.
Commit: 5e803587eee01e860a58cd4a211018f9a5e3a859
https://github.com/llvm/llvm-project/commit/5e803587eee01e860a58cd4a211018f9a5e3a859
Author: Loïc Yhuel <loic.yhuel at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
A llvm/test/MC/ARM/arm-movt-movw-absolute-pass.s
Log Message:
-----------
[llvm][ARM] Allow MOVT and MOVW on the offset between two labels (#168072)
In this case, the value is a constant, not an addend to a relocation.
So the "Relocation Not In Range" error must not be triggered.
Regression from PR #112877
Fixes #132322
Commit: 1262acf4ecc9f55d0699705c7810bbf84d3da09e
https://github.com/llvm/llvm-project/commit/1262acf4ecc9f55d0699705c7810bbf84d3da09e
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
Log Message:
-----------
Introduce DwarfUnit::addBlock helper method (#168446)
This patch is just a small cleanup that unifies the various spots that
add a DWARF expression to the output.
Commit: 0a96b240fcb715c082ab9b4cab6fddae02065602
https://github.com/llvm/llvm-project/commit/0a96b240fcb715c082ab9b4cab6fddae02065602
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp
Log Message:
-----------
[mlir][acc][flang] Introduce OpenACC interfaces for globals (#168614)
Introduce two new OpenACC operation interfaces for identifying global
variables and their address computations:
- `GlobalVariableOpInterface`: Identifies operations that define global
variables. Provides an `isConstant()` method to query whether the global
is constant.
- `AddressOfGlobalOpInterface`: Identifies operations that compute the
address of a global variable. Provides a `getSymbol()` method to
retrieve the symbol reference.
This is being done in preparation for `ACCImplicitDeclare` pass which
will automatically ensure that `acc declare` is applied to globals when
needed.
The following operations now implement these interfaces:
- `memref::GlobalOp` implements `GlobalVariableOpInterface`
- `memref::GetGlobalOp` implements `AddressOfGlobalOpInterface`
- `fir::GlobalOp` implements `GlobalVariableOpInterface`
- `fir::AddrOfOp` implements `AddressOfGlobalOpInterface`
Commit: 411c75210e2326f7d6926ae4a303e05c1d0eab9d
https://github.com/llvm/llvm-project/commit/411c75210e2326f7d6926ae4a303e05c1d0eab9d
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M orc-rt/lib/executor/TaskDispatcher.cpp
M orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
Log Message:
-----------
[orc-rt] Fix typos in file comments.
Commit: 651785a5bacb9bba2c9dbcbb6e21e28135937129
https://github.com/llvm/llvm-project/commit/651785a5bacb9bba2c9dbcbb6e21e28135937129
Author: Pranav Kant <prka at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix #168367 (#168635)
Commit: 7819071c41273e603d1fe1f3e8ab0b11c356a899
https://github.com/llvm/llvm-project/commit/7819071c41273e603d1fe1f3e8ab0b11c356a899
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Drop install-ninja action (#167070)
ninja is already installed by default on Linux and macOS.
Commit: c32d2ee4659170d281d0d89a1d396267e36fc7da
https://github.com/llvm/llvm-project/commit/c32d2ee4659170d281d0d89a1d396267e36fc7da
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/TableGen/CodeGenMapTable.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in CodeGenMapTable (#168592)
Adopt `IfDefEmitter` and `NamespaceEmitter` in CodeGenMapTable.cpp
Commit: 88efd0e88b8dafe9dd5bc118895750dd7413f811
https://github.com/llvm/llvm-project/commit/88efd0e88b8dafe9dd5bc118895750dd7413f811
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Transforms/LowerTypeTests/function-weak.ll
Log Message:
-----------
[LTT] Mark as unkown weak function tests. (#167399)
We don't have enough information to infer the probability of a weak function pointer being nullptr or not (open question if we could propagate this from the linker)
Issue #147390
Commit: 9a15556d6d6b207084bea8f02381b0459624a006
https://github.com/llvm/llvm-project/commit/9a15556d6d6b207084bea8f02381b0459624a006
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
Log Message:
-----------
[OpenACC] add cl::values to ACCImplicitRoutineOptions (#168601)
Add the cl::values to the pass options so an assert is not reached when
trying to generate a reproducer e.g. "unknown data value for option"
Commit: 522177c959ed7ec99a237387ef41aa1e250410e8
https://github.com/llvm/llvm-project/commit/522177c959ed7ec99a237387ef41aa1e250410e8
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-tensormap-invalid.ll
A llvm/test/CodeGen/NVPTX/fence-proxy.ll
A llvm/test/CodeGen/NVPTX/op-fence.ll
A llvm/test/CodeGen/NVPTX/thread-fence.ll
Log Message:
-----------
[NVPTX] Add a few more missing fence intrinsics (#166352)
This commit adds the below fence intrinsics:
- llvm.nvvm.fence.acquire.sync_restrict.space.cluster.scope.cluster
- llvm.nvvm.fence.release.sync_restrict.space.cta.scope.cluster
- llvm.nvvm.fence.mbarrier_init.release.cluster
-
llvm.nvvm.fence.proxy.async.generic.acquire.sync_restrict.space.cluster.scope.cluster
-
llvm.nvvm.fence.proxy.async.generic.release.sync_restrict.space.cta.scope.cluster
llvm.nvvm.fence.proxy.alias
- llvm.nvvm.fence.proxy.async
- llvm.nvvm.fence.proxy.async.global
- llvm.nvvm.fence.proxy.async.shared_cluster
- llvm.nvvm.fence.proxy.async.shared_cta
For more information, please refere the [PTX
ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-membar)
Commit: bfb953926c3d5021e3ac6ddbf22fd98f002da208
https://github.com/llvm/llvm-project/commit/bfb953926c3d5021e3ac6ddbf22fd98f002da208
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Target/Target.td
A llvm/test/TableGen/target-specialized-pseudos.td
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
TableGen: Support target specialized pseudoinstructions (#159880)
Allow a target to steal the definition of a generic pseudoinstruction
and remap the operands. This works by defining a new instruction, which
will simply swap out the emitted entry in the InstrInfo table.
This is intended to eliminate the C++ half of the implementation
of PointerLikeRegClass. With RegClassByHwMode, the remaining usecase
for PointerLikeRegClass are the common codegen pseudoinstructions.
Every target maintains its own copy of the generic pseudo operand
definitions anyway, so we can stub out the register operands with
an appropriate class instead of waiting for runtime resolution.
In the future we could probably take this a bit further. For example,
there is a similar problem for ADJCALLSTACKUP/DOWN since they depend
on target register definitions for the stack pointer register.
Commit: 961940e1a7c9b4bbe0ae54c2ea4bdc69308947d6
https://github.com/llvm/llvm-project/commit/961940e1a7c9b4bbe0ae54c2ea4bdc69308947d6
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[TTI] Use MemIntrinsicCostAttributes for getMaskedMemoryOpCost (#168029)
- Split from #165532. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.
API change:
```
- InstructionCost getMaskedMemoryOpCost(Opcode, Src, Alignment,
- AddressSpace, CostKind);
+ InstructionCost getMaskedMemoryOpCost(MemIntrinsicCostAttributes,
+ CostKind);
```
Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with the
same information as before.
- Follow-up: migrate gather/scatter, strided, and expand/compress cost
queries to the same attributes-based entry point.
Commit: a3ab11007ba277fb8a126d8199925f4ce184e195
https://github.com/llvm/llvm-project/commit/a3ab11007ba277fb8a126d8199925f4ce184e195
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
Log Message:
-----------
[TableGen] Silence a warning (NFC)
/llvm-project/llvm/utils/TableGen/Common/CodeGenTarget.cpp:286:12:
error: variable 'SkippedInsts' set but not used [-Werror,-Wunused-but-set-variable]
unsigned SkippedInsts = 0;
^
1 error generated.
Commit: b4aa3d3ae334fea392f62df9693fab07142443ae
https://github.com/llvm/llvm-project/commit/b4aa3d3ae334fea392f62df9693fab07142443ae
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[NFC] Check operand type instead of opcode (#168641)
A folow-up of #168458.
Commit: 52a58a4193935f60df70eb45f8ec7c61f142ac3b
https://github.com/llvm/llvm-project/commit/52a58a4193935f60df70eb45f8ec7c61f142ac3b
Author: Shoreshen <372660931 at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/OpenMP/amdgcn-attributes.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
Log Message:
-----------
[AMDGPU] Adding instruction specific features (#167809)
Commit: 5ee95f48b84308dbbad46df313c2bd44e2613ac5
https://github.com/llvm/llvm-project/commit/5ee95f48b84308dbbad46df313c2bd44e2613ac5
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add regbankselect rules for G_FSHR (#159818)
Commit: 52ed0f215faedf3ceb26368ccd180fe3e27760e4
https://github.com/llvm/llvm-project/commit/52ed0f215faedf3ceb26368ccd180fe3e27760e4
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Basic/Targets/Sparc.cpp
A clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
Log Message:
-----------
[SPARC][clang] Add condition code register names for inline asm (#168498)
This follows the list of names used by GCC.
Commit: fa50a684c5ad91ef9eb6c5e8070b9363eea12f5e
https://github.com/llvm/llvm-project/commit/fa50a684c5ad91ef9eb6c5e8070b9363eea12f5e
Author: Aditi Medhane <aditimedhane73 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
Log Message:
-----------
[PowerPC] Add custom lowering for SADD overflow for i32 and i64 (#159255)
This patch improves the codegen for saddo on i32 and i64 in both 32-bit
and 64-bit modes by custom lowering. It implements signed-add overflow
detection using the `(x eqv y) & (sum xor x)`bit-level sequence.
Commit: c942ebdb66bfdfae5f3665e0dc674c68c70a18f9
https://github.com/llvm/llvm-project/commit/c942ebdb66bfdfae5f3665e0dc674c68c70a18f9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
Log Message:
-----------
Reapply "[Github] Update PR labeller to v6.0.1 (#167246)"
This reverts commit d772663a9f003a08ee76414397963c58e80b27d7.
This fixes the final issue with the labeller landing. There were
two remaining issues:
1. There was an extra quote on one of the globs
2. Some of the yaml keys were named incorrectly (should have been
plural)
Commit: f7f41350b4eb6cfb036242ae0427b6b4c76dce6e
https://github.com/llvm/llvm-project/commit/f7f41350b4eb6cfb036242ae0427b6b4c76dce6e
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
Log Message:
-----------
[LV]: Skip Epilogue scalable VF greater than RemainingIterations. (#156724)
Consider skipping epilogue scalable VF when they are greater than
RemainingIterations same as fixed VF.
And skip scalable RemainingIterations from that comparison because
SCEV ATM can't evaluate non-canonical vscale-based expressions.
Commit: f38cf01fc888850900c22a9c84ce3bcb85112f24
https://github.com/llvm/llvm-project/commit/f38cf01fc888850900c22a9c84ce3bcb85112f24
Author: Wenju He <wenju.he at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int32.inc
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int64.inc
M libclc/opencl/lib/amdgcn/SOURCES
R libclc/opencl/lib/amdgcn/cl_khr_int64_extended_atomics/minmax_helpers.ll
M libclc/opencl/lib/generic/atomic/atom_add.cl
M libclc/opencl/lib/generic/atomic/atom_and.cl
M libclc/opencl/lib/generic/atomic/atom_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atom_dec.cl
M libclc/opencl/lib/generic/atomic/atom_inc.cl
R libclc/opencl/lib/generic/atomic/atom_int32_binary.inc
M libclc/opencl/lib/generic/atomic/atom_max.cl
M libclc/opencl/lib/generic/atomic/atom_min.cl
M libclc/opencl/lib/generic/atomic/atom_or.cl
M libclc/opencl/lib/generic/atomic/atom_sub.cl
M libclc/opencl/lib/generic/atomic/atom_xchg.cl
M libclc/opencl/lib/generic/atomic/atom_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_add.cl
M libclc/opencl/lib/generic/atomic/atomic_and.cl
M libclc/opencl/lib/generic/atomic/atomic_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
M libclc/opencl/lib/generic/atomic/atomic_max.cl
M libclc/opencl/lib/generic/atomic/atomic_min.cl
M libclc/opencl/lib/generic/atomic/atomic_or.cl
M libclc/opencl/lib/generic/atomic/atomic_sub.cl
M libclc/opencl/lib/generic/atomic/atomic_xchg.cl
M libclc/opencl/lib/generic/atomic/atomic_xor.cl
Log Message:
-----------
[libclc] Use CLC atomic functions for legacy OpenCL atom/atomic builtins (#168325)
Main changes:
* OpenCL legacy atom/atomic builtins now call CLC atomic functions
(which use Clang __scoped_atomic_*), replacing previous Clang __sync_*
functions.
* Change memory order from seq_cst to relaxed; keep device scope (spec
permits broader than workgroup). LLVM IR for _Z8atom_decPU3AS1Vi in
amdgcn--amdhsa.bc:
Before:
%2 = atomicrmw volatile sub ptr subrspace(1) %0, i32 1
syncscope("agent") seq_cst
After:
%2 = atomicrmw volatile sub ptr subrspace(1) %0, i32 1
syncscope("agent") monotonic
* Also adds OpenCL 1.0 atom_* variants without volatile on the pointer.
They are added for backward compatibility.
Commit: 9dc4ebfff145dbf648e49dbfd5c907d2f8f9eefe
https://github.com/llvm/llvm-project/commit/9dc4ebfff145dbf648e49dbfd5c907d2f8f9eefe
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow create mem desc from 2d memref (#167767)
This PR relax the create_mem_desc's restriction on source memref,
allowing it to be a 2d memref.
Commit: be1a504228db4185a4ad5defe1b57d4df2bc8b2f
https://github.com/llvm/llvm-project/commit/be1a504228db4185a4ad5defe1b57d4df2bc8b2f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Simplify Session shutdown. (#168664)
Moves all Session member variables dedicated to shutdown into a new
ShutdownInfo struct, and uses the presence / absence of this struct as
the flag to indicate that we've entered the "shutting down" state. This
simplifies the implementation of the shutdown process.
Commit: 5bba4fd75dd513423ff8bb905f89b60558099578
https://github.com/llvm/llvm-project/commit/5bba4fd75dd513423ff8bb905f89b60558099578
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libc/test/src/stdio/fileop_test.cpp
Log Message:
-----------
[libc] Fix -Wshorten-64-to-32 in fileop_test. (#168451)
Explicitly cast 0 to size_t type to match fread() return type. This
follows the pattern used elsewhere in this file, and fixes
-Wshorten-64-to-32 warnings when building the test.
Commit: ed1c8d7a57808de7ac60f2d0ff3e2b03a765cb7f
https://github.com/llvm/llvm-project/commit/ed1c8d7a57808de7ac60f2d0ff3e2b03a765cb7f
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lld/test/ELF/dso-undef-extract-lazy.s
Log Message:
-----------
ELF,test: Test unversioned undefined symbols of index 0 and 1
My 2020 change that added versioned symbol recognition
(reviews.llvm.org/D80059) checks both VER_NDX_LOCAL and VER_NDX_GLOBAL,
though test coverage was missing. lld/test/ELF/dso-undef-extract-lazy.s
checks that the undefined symbol is indeed considered unversioned.
Commit: 5109f2a73395f076a292e55a35a129cbf125fd66
https://github.com/llvm/llvm-project/commit/5109f2a73395f076a292e55a35a129cbf125fd66
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Exclude from profcheck a vplan test under phase ordering (#168669)
Commit: ac68dd53ed035047fb68abb471d2e1eb8b31cbfd
https://github.com/llvm/llvm-project/commit/ac68dd53ed035047fb68abb471d2e1eb8b31cbfd
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
A llvm/lib/Target/RISCV/RISCVPassRegistry.def
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
Log Message:
-----------
[RISCV][NewPM] Port RISCVCodeGenPrepare to the new pass manager (#168381)
As suggested in the review for #160536 it would be good to follow up and
port the RISC-V passes to the new pass manager. This PR starts that
task. It provides the bare minimum necessary to run RISCVCodeGenPrepare
with opt -passes=riscv-codegenprepare. The approach used is modeled on
my observations of the AMDGPU backend and the recent work to port the
X86 passes.
The testing approach is to add a `-passes=riscv-foo` RUN line to at
least one test, if an appropriate test exists.
Commit: ec909123aee9088ad99c207b365ee7a20870f1c4
https://github.com/llvm/llvm-project/commit/ec909123aee9088ad99c207b365ee7a20870f1c4
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
[clang][NVPTX] Add remaining float to fp16 conversions (#167641)
This change adds intrinsics and clang builtins for the remaining float
to fp16 conversions. This includes the following conversions:
- float to bf16x2 - satfinite variants
- float to f16x2 - satfinite variants
- float to bf16 - satfinite variants
- float to f16 - all variants
Tests are added in `convert-sm80.ll` and `convert-sm80-sf.ll` for the
intrinsics and in `builtins-nvptx.c` for the clang builtins.
Commit: 669c30ce66eb08d028e7f90d36a2c2d8c3697f63
https://github.com/llvm/llvm-project/commit/669c30ce66eb08d028e7f90d36a2c2d8c3697f63
Author: Guray Ozen <gozen at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
R mlir/docs/Dialects/NVVM/_index.md
A mlir/docs/Dialects/NVVMDialect.md
Log Message:
-----------
[MLIR][NVVM] Move docs to correct folder
Commit: 58d9e476724ae347be4da1ecddc17fd133a1300b
https://github.com/llvm/llvm-project/commit/58d9e476724ae347be4da1ecddc17fd133a1300b
Author: Raul Tambre <raul at tambre.ee>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M bolt/test/lit.local.cfg
Log Message:
-----------
[NFCI][bolt][test] Use AT&T syntax explicitly (#167225)
This enables building LLVM with `-mllvm -x86-asm-syntax=intel` in one's
Clang config files (i.e. a global preference for Intel syntax).
`-masm=att` is insufficient as it doesn't override a specification of `-mllvm -x86-asm-syntax`.
Commit: 429e3156c8043ca30d5866755ad790314a26670f
https://github.com/llvm/llvm-project/commit/429e3156c8043ca30d5866755ad790314a26670f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
Log Message:
-----------
[RISCV] Convert -mtune=generic to generic-rv32/rv64 in RISCVSubtarget::initializeSubtargetDependencies. (#168612)
The "generic" entry in tablegen is really a dummy entry. We shouldn't
use it for anything. Remap "generic" to either generic-rv32 or
generic-rv64 based on the triple.
Commit: f8e83c428a8d85d18242d4bd57bec0d02c8253e8
https://github.com/llvm/llvm-project/commit/f8e83c428a8d85d18242d4bd57bec0d02c8253e8
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Transforms/Passes.h
Log Message:
-----------
[mlir] Use dictionary order to order the pass decl (NFC) (#168648)
Commit: de9c18269dee5a323dd254f5b3a18aabe144e918
https://github.com/llvm/llvm-project/commit/de9c18269dee5a323dd254f5b3a18aabe144e918
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A orc-rt/docs/Design.md
Log Message:
-----------
[orc-rt] Initial ORC Runtime design documentation. (#168681)
This document aims to lay out the high level design and goals of the ORC
runtime, and the relationships between key components.
Commit: fddfc705d03ec6e9c75441d66057c1219902c8c1
https://github.com/llvm/llvm-project/commit/fddfc705d03ec6e9c75441d66057c1219902c8c1
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/list.rst
Log Message:
-----------
[clang-tidy][NFC] Fix order in `list.rst` (#168683)
This issue was introduced in
https://github.com/llvm/llvm-project/pull/167689
Commit: 711a2954799e597c71b86aed8c93167765a5255f
https://github.com/llvm/llvm-project/commit/711a2954799e597c71b86aed8c93167765a5255f
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
Log Message:
-----------
[AMDGPU] Ignore wavefront barrier latency during scheduling DAG mutation (#168500)
Do not add latency for wavefront and singlethread scope fences during
barrier latency DAG mutation.
These scopes do not typically introduce any latency and adjusting
schedules based on them significantly impacts latency hiding.
Commit: 4ab1d06406ea425ac40072c3bb3fd96002ba2b0a
https://github.com/llvm/llvm-project/commit/4ab1d06406ea425ac40072c3bb3fd96002ba2b0a
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
Log Message:
-----------
Reland "[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)" (#168638)
Reland commit fb829bf11feeb53f815a3abf539e63ec3a23ed3d with additional fixes relating to post-merge CI failure
```
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp: In function ‘constexpr llvm::nvvm::CTAGroupKind getNVVMCtaGroupKind(mlir::NVVM::CTAGroupKind)’:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-constexpr function ‘void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)’
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp:73:3: note: in expansion of macro ‘llvm_unreachable’
llvm_unreachable("unsupported cta_group value");
^
```
Commit: a2af185b96071154b93f6c00319feee9b1f270f4
https://github.com/llvm/llvm-project/commit/a2af185b96071154b93f6c00319feee9b1f270f4
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][tosa] Fix linker failure in build bots introduced by #165581 (#168581)
This commit fixes linker failures evident on some failing build bots.
Commit: 907e8514b188abb0e4d4d16b1e0e847a163762cd
https://github.com/llvm/llvm-project/commit/907e8514b188abb0e4d4d16b1e0e847a163762cd
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[ORC] Remove now unused EPCDebugObjectRegistrar (NFC) (#167868)
EPCDebugObjectRegistrar is unused now that the ELF debugger support plugin uses AllocActions
https://github.com/llvm/llvm-project/pull/167866
Commit: 915e9adbe5d1c577a21ac8b495b7c54c465460fd
https://github.com/llvm/llvm-project/commit/915e9adbe5d1c577a21ac8b495b7c54c465460fd
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
Log Message:
-----------
[clang-tidy] Provide fix-its for casts to void* in google-readability-casting (#167655)
Commit: 07309135291e804945de3ec7068b787a45a3499f
https://github.com/llvm/llvm-project/commit/07309135291e804945de3ec7068b787a45a3499f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Print debug info for all recipes. (#168454)
Use the recently refactored VPRecipeBase::print to print debug location
for all recipes.
PR: https://github.com/llvm/llvm-project/pull/168454
Commit: e38529ddbb11918f854ee457b46a6dc190167029
https://github.com/llvm/llvm-project/commit/e38529ddbb11918f854ee457b46a6dc190167029
Author: 陈子昂 <121872494+Michael-Chen-NJU at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/X86/vector-compress-freeze.ll
Log Message:
-----------
[DAG] Update canCreateUndefOrPoison to handle ISD::VECTOR_COMPRESS (#168010)
Fixes #167710
Commit: 2f6a8a77db069228a0fb98f5a85ec85ed7f259fc
https://github.com/llvm/llvm-project/commit/2f6a8a77db069228a0fb98f5a85ec85ed7f259fc
Author: Guray Ozen <gozen at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/docs/Dialects/NVVMDialect.md
Log Message:
-----------
[MLIR][NVVM] Add operations and interfaces
Commit: 125af5686765f915abcdcca60ad255fda95667d2
https://github.com/llvm/llvm-project/commit/125af5686765f915abcdcca60ad255fda95667d2
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
Log Message:
-----------
[AMDGPU][SDAG] Only fold flat offsets if they are inbounds PTRADDs (#165427)
For flat memory instructions where the address is supplied as a base address
register with an immediate offset, the memory aperture test ignores the
immediate offset. Currently, SDISel does not respect that, which leads to
miscompilations where valid input programs crash when the address computation
relies on the immediate offset to get the base address in the proper memory
aperture. Global or scratch instructions are not affected.
This patch only selects flat instructions with immediate offsets from PTRADD
address computations with the inbounds flag: If the PTRADD does not leave the
bounds of the allocated object, it cannot leave the bounds of the memory
aperture and is therefore safe to handle with an immediate offset.
Affected tests:
- CodeGen/AMDGPU/fold-gep-offset.ll: Offsets are no longer wrongly folded, added
new positive tests where we still do fold them.
- CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll: Offset folding doesn't seem
integral to this test, so the test is not changed to make offset folding still
happen.
- CodeGen/AMDGPU/loop-prefetch-data.ll: loop-reduce transforms inbounds
addresses for accesses to be based on potentially OOB addresses used for
prefetching.
- I think the remaining ones suffer from the limited preservation of the
inbounds flag in PTRADD DAGCombines due to the provenance problems pointed out
in PR #165424 and the fact that
`AMDGPUTargetLowering::SplitVector{Load|Store}` legalizes too-wide accesses by
repeatedly splitting them in half. Legalizing a V32S32 memory accesses
therefore leads to inbounds ptradd chains like (ptradd inbounds (ptradd
inbounds (ptradd inbounds P, 64), 32), 16). The DAGCombines fold them into a
single ptradd, but the involved transformations generally cannot preserve the
inbounds flag (even though it would be valid in this case).
Similar previous PR that relied on `ISD::ADD inbounds` instead of `ISD::PTRADD inbounds` (closed): #132353
Analogous PR for GISel (merged): #153001
Fixes SWDEV-516125.
Commit: ed7f2a459afefe41a7fac1360d1d3b7bc33bec43
https://github.com/llvm/llvm-project/commit/ed7f2a459afefe41a7fac1360d1d3b7bc33bec43
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A clang/test/CodeGen/Sparc/sparc-arguments.c
A clang/test/CodeGen/Sparc/sparc-vaarg.c
A clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/Sparc/sparcv8-inline-asm.c
A clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/Sparc/sparcv9-class-return.cpp
A clang/test/CodeGen/Sparc/sparcv9-dwarf.c
A clang/test/CodeGen/Sparc/sparcv9-inline-asm.c
R clang/test/CodeGen/sparc-arguments.c
R clang/test/CodeGen/sparc-vaarg.c
R clang/test/CodeGen/sparcv8-abi.c
R clang/test/CodeGen/sparcv8-inline-asm.c
R clang/test/CodeGen/sparcv9-abi.c
R clang/test/CodeGen/sparcv9-class-return.cpp
R clang/test/CodeGen/sparcv9-dwarf.c
R clang/test/CodeGen/sparcv9-inline-asm.c
Log Message:
-----------
[SPARC][NFC] Move clang tests into own subdirectory (#168657)
Commit: 150053627d14679f3db52d78b640a3e8781de828
https://github.com/llvm/llvm-project/commit/150053627d14679f3db52d78b640a3e8781de828
Author: Marco Elver <elver at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/AllocToken.rst
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/alloc-token.cpp
M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
Log Message:
-----------
[AllocToken] Fix and clarify -falloc-token-max=0 (#168689)
The option -falloc-token-max=0 is supposed to be usable to override
previous settings back to the target default max tokens (SIZE_MAX).
This did not work for the builtin:
```
| executed command: clang -cc1 [..] -nostdsysteminc -triple x86_64-linux-gnu -std=c++23 -fsyntax-only -verify clang/test/SemaCXX/alloc-token.cpp -falloc-token-max=0
| clang: llvm/lib/Support/AllocToken.cpp:38: std::optional<uint64_t> llvm::getAllocToken(AllocTokenMode, const AllocTokenMetadata &, uint64_t): Assertion `MaxTokens && "Must provide non-zero max tokens"' failed.
```
Fix it by also picking the default if "0" is passed.
Improve the documentation to be clearer what the value of "0" means.
Commit: b42851b8dda8c85a277573610519e8c66e91322f
https://github.com/llvm/llvm-project/commit/b42851b8dda8c85a277573610519e8c66e91322f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] EltsFromConsecutiveLoads - add recursion depth limiter (#168694)
EltsFromConsecutiveLoads can be recursively called - ensure we limit the recursion depth.
Commit: 50791c3a708123ef75808e73a81d7d2e759f6f9b
https://github.com/llvm/llvm-project/commit/50791c3a708123ef75808e73a81d7d2e759f6f9b
Author: stomfaig <55883018+stomfaig at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
Log Message:
-----------
[Clang][X86] allow VPERMILPD/S imm intrinsics to be used in constexpr (#168044)
Resolves #166529
Commit: 5343dd92303657dc15f4038a3843ddb778760242
https://github.com/llvm/llvm-project/commit/5343dd92303657dc15f4038a3843ddb778760242
Author: Kashika Akhouri <77923634+kashika0112 at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Detect use-after-return (#165370)
Adding "use-after-return" in Lifetime Analysis.
Detecting when a function returns a reference to its own stack memory:
[UAR Design
Doc](https://docs.google.com/document/d/1Wxjn_rJD_tuRdejP81dlb9VOckTkCq5-aE1nGcerb_o/edit?usp=sharing)
Consider the following example:
```cpp
std::string_view foo() {
std::string_view a;
std::string str = "small scoped string";
a = str;
return a;
}
```
The code adds a new Fact "OriginEscape" in the end of the CFG to
determine any loan that is escaping the function as shown below:
```
Function: foo
Block B2:
End of Block
Block B1:
OriginFlow (Dest: 0 (Decl: a), Src: 1 (Expr: CXXConstructExpr))
OriginFlow (Dest: 2 (Expr: ImplicitCastExpr), Src: 3 (Expr: StringLiteral))
Issue (0 (Path: operator=), ToOrigin: 4 (Expr: DeclRefExpr))
OriginFlow (Dest: 5 (Expr: ImplicitCastExpr), Src: 4 (Expr: DeclRefExpr))
Use (0 (Decl: a), Write)
Issue (1 (Path: str), ToOrigin: 6 (Expr: DeclRefExpr))
OriginFlow (Dest: 7 (Expr: ImplicitCastExpr), Src: 6 (Expr: DeclRefExpr))
OriginFlow (Dest: 8 (Expr: CXXMemberCallExpr), Src: 7 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 9 (Expr: ImplicitCastExpr), Src: 8 (Expr: CXXMemberCallExpr))
OriginFlow (Dest: 10 (Expr: ImplicitCastExpr), Src: 9 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 11 (Expr: MaterializeTemporaryExpr), Src: 10 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 0 (Decl: a), Src: 11 (Expr: MaterializeTemporaryExpr))
Use (0 (Decl: a), Read)
OriginFlow (Dest: 12 (Expr: ImplicitCastExpr), Src: 0 (Decl: a))
OriginFlow (Dest: 13 (Expr: CXXConstructExpr), Src: 12 (Expr: ImplicitCastExpr))
Expire (1 (Path: str))
OriginEscapes (13 (Expr: CXXConstructExpr))
End of Block
Block B0:
End of Block
```
The confidence of the report is determined by checking if at least one
of the loans returned is not expired (strict). If all loans are expired
it is considered permissive.
More information [UAR Design
Doc](https://docs.google.com/document/d/1Wxjn_rJD_tuRdejP81dlb9VOckTkCq5-aE1nGcerb_o/edit?usp=sharing)
Commit: 58e6d02aa28ba48ee37f1b59ad006dfeb45d1dd3
https://github.com/llvm/llvm-project/commit/58e6d02aa28ba48ee37f1b59ad006dfeb45d1dd3
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
Log Message:
-----------
[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerge (#168692)
This aims to fix the crash in #168495, my combine rule was
missing a check that the source vector was in fact a vector. This then
caused the legality check to fail in this example as the concat was
trying to concat a non vector.
I have also gated the bitcast of the concat to only work on non-scalable
vectors as the mutation calls `getNumElements` which crashes when called
on a scalable vector.
Fixes #168495
Commit: 7b94dd336e25b18e05b3b1f20360df81e4900ffb
https://github.com/llvm/llvm-project/commit/7b94dd336e25b18e05b3b1f20360df81e4900ffb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPLan] Reduce duplication in VPHeaderPHIRecipe::classof. (NFCI)
Implement VPHeaderPHIRecipe::classof(const VPValue *V) in terms of the
variant taking VPRecipeBase.
Reduces some duplication, split off from
https://github.com/llvm/llvm-project/pull/141431.
Commit: c32c1d0d21cedb8017914eb6951bea4cf1fb10f9
https://github.com/llvm/llvm-project/commit/c32c1d0d21cedb8017914eb6951bea4cf1fb10f9
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/lib/sanitizer_common/symbolizer/CMakeLists.txt
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/test/lit.site.cfg.in
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
[Runtimes] Default build must use its own output dirs (#168266)
Post-commit fix of #164794 reported at
https://github.com/llvm/llvm-project/pull/164794#issuecomment-3536253493
`LLVM_LIBRARY_OUTPUT_INTDIR` and `LLVM_RUNTIME_OUTPUT_INTDIR` is used by
`AddLLVM.cmake` as output directories. Unless we are in a
bootstrapping-build, It must not point to directories found by
`find_package(LLVM)` which may be read-only directories. MLIR for
instance sets thesese variables to its own build output
directory, so should the runtimes.
Commit: bdcaa0001a5081737b12b9ec0c284fe06002a97c
https://github.com/llvm/llvm-project/commit/bdcaa0001a5081737b12b9ec0c284fe06002a97c
Author: Philip Ginsbach-Chen <ginsbach at github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/test/CodeGen/AArch64/arm64-trn.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
Log Message:
-----------
[AArch64] match TRN starting from undef elements (#167955)
When the first element of a trn mask is undef, the `isTRNMask` function
assumes `WhichResult = 1`. That has a 50% chance of being wrong, so we
fail to match some valid trn1/trn2.
This patch introduces a more precise test to determine the correct value
of `WhichResult`, based on corresponding code in the `isZIPMask` and
`isUZPMask` functions.
- This change is based on #89578. I'd like to follow it up with a
further change along the lines of #167235.
Commit: dce60025c1ae5c6c00885b49e496b29dffc03c8b
https://github.com/llvm/llvm-project/commit/dce60025c1ae5c6c00885b49e496b29dffc03c8b
Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.h
M clang/lib/Basic/Builtins.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang][Codegen] Move floating point math intrinsic check to separate function [NFC] (#168198)
This PR moves the code that checks whether an LLVM intrinsic should be
generated instead of a call to floating point math functions to a
separate function. This simplifies `EmitBuiltinExpr` in `CGBuiltin.cpp`
and will allow us to reuse the logic in ClangIR.
Commit: 655662e94e969ee1bb3c17ea036335d7865f0462
https://github.com/llvm/llvm-project/commit/655662e94e969ee1bb3c17ea036335d7865f0462
Author: BogdanDragosV <dragos-valentin.bogdan at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/IR/Properties.td
Log Message:
-----------
[MLIR][ODS] Fully qualify namespace for mlir::Attribute in ODS generated code (#168536)
ODS generate code can be included and used outside of the `mlir`
namespace and so references to symbols in the mlir namespace
must be fully qualified.
Commit: 6fc48de4ffe23508b3936c5480e46a5c0af02fec
https://github.com/llvm/llvm-project/commit/6fc48de4ffe23508b3936c5480e46a5c0af02fec
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
Log Message:
-----------
[AArch64] Update zero latency instructions in Neoverse scheduling tables (#165690)
NeoverseZeroMove was introduced for Neoverse-V2 and was added to V3 and
V3AE.
Use NeoverseZeroMove for Neoverse-V1, N2, N3 in the same way, including
these instructions:
MOV Xd|Wd, #0|XZR|WZR
For all the above Neoverse targets, the following instructions are also
decoded as not utilizing the scheduling and execution resources of the
machine:
MOV Wd,Wn
MOV Xd,Xn
For Neoverse-N3 only, these instructions also have zero latency
FMOV Dd, Dn
FMOV Sd, Sn
MOV Vd, Vn (vector)
MOV Zd.D, Zn.D
PTRUE
PFALSE
Commit: 68d2ce8e74cb2428d5c6299176f471753151d356
https://github.com/llvm/llvm-project/commit/68d2ce8e74cb2428d5c6299176f471753151d356
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Coupled.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/Invariant.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PR51512.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/Separability.ll
M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
M llvm/test/Transforms/LoopFusion/pr164082.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies_multidims.ll
Log Message:
-----------
[DA] Replace delinearization for fixed size array (#161822)
This patch replaces the delinearization function used in DA, switching
from one that depends on type information in GEPs to one that does not.
There are three types of changes in regression tests: improvements,
degradations, and degradations but the related features will be
removed. Since there were very few cases that are classified into the
second category, I believe the impact of this change should be
practically insignificant.
Commit: a2ddb020d76cdb1c5708cf3dadd2c46866202707
https://github.com/llvm/llvm-project/commit/a2ddb020d76cdb1c5708cf3dadd2c46866202707
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
A llvm/test/Transforms/LoopInterchange/zero-btc.ll
Log Message:
-----------
[LoopInterchange] Don't consider loops with BTC=0 (#167113)
Do not consider loops with a zero backedge taken count as candidates for
interchange. This seems like a sensible thing because it suggests the loop
doesn't execute and there is no point in interchanging. As a bonus, this
seems to avoid triggering an assert about phis and their uses from source
code, so this is a partial fix for #163954 but it needs more work to properly
fix that.
Commit: 7fe35641672b6431134e99af658bd79fd438da54
https://github.com/llvm/llvm-project/commit/7fe35641672b6431134e99af658bd79fd438da54
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Headers/llvm_libc_wrappers/assert.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/llvm_libc_wrappers/inttypes.h
R clang/lib/Headers/llvm_libc_wrappers/llvm-libc-decls/README.txt
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Headers/llvm_libc_wrappers/stdlib.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Headers/llvm_libc_wrappers/time.h
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/docs/dev/header_generation.rst
R libc/utils/hdrgen/hdrgen/gpu_headers.py
M libc/utils/hdrgen/hdrgen/yaml_to_classes.py
Log Message:
-----------
[Clang] Gut the libc wrapper headers and simplify (#168438)
Summary:
These were originally intended to represent the functions that are
present on the GPU as to be provided by the LLVM libc implementation.
The original plan was that LLVM libc would report which functions were
supported and then the offload interface would mark those as supported.
The problem is that these wrapper headers are very difficult to make
work given the various libc extensions everyone does so they were
extremely fragile.
OpenMP already declares all functions used inside of a target region as
implicitly host / device, while these headers weren't even used for CUDA
/ HIP yet anyway. The only things we need to define right now are the
stdio FILE types. If we want to make this work for CUDA we'd need to
define these manually, but we're a ways off and that's way easier
because they do proper overloading.
Commit: 9eee396c58d2e24beb93c460141170def328776d
https://github.com/llvm/llvm-project/commit/9eee396c58d2e24beb93c460141170def328776d
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
Log Message:
-----------
[flang] "Almost NFC" changes to fir::runtime::genCharCompare() (#168563)
As part of investigating a related issue, I made the following changes
to fir::runtime::genCharCompare():
- Renamed a variable
- Added an error check for the same kind of input args
- Updated another error check to use the same error found elsewhere in
this source file
Commit: 5da0445420015d859f71431a2c76f5b0cf78cbad
https://github.com/llvm/llvm-project/commit/5da0445420015d859f71431a2c76f5b0cf78cbad
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Consolidate shouldOptimizeForSize and remove unused BFI/PSI. NFC (#168697)
#158690 plans on passing BFI as a lazy lambda to avoid computing
BlockFrequencyInfo when not needed.
In preparation for that, this PR removes BFI and PSI from some
constructors that aren't used. It also consolidates the two calls to
llvm::shouldOptimizeForSize so that the result is computed once and
passed where needed.
This also renames OptForSize in LoopVectorizationLegality to clarify
that it's to prevent runtime SCEV checks, see
https://reviews.llvm.org/D68082
Commit: 7b8eee6b2b10ce88a24521aa0e91193cf7203c95
https://github.com/llvm/llvm-project/commit/7b8eee6b2b10ce88a24521aa0e91193cf7203c95
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/sincos-expansion.ll
Log Message:
-----------
[RISCV][test] Add sincos-expansion.ll test case
Commit: 2fc42c7163142d74e2e8ce5549f5d0142fccd89f
https://github.com/llvm/llvm-project/commit/2fc42c7163142d74e2e8ce5549f5d0142fccd89f
Author: Nathan Gauër <brioche at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-compute.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-mesh.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-lib.hlsl
A clang/test/SemaHLSL/Semantics/missing-vs.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
M clang/test/SemaHLSL/Semantics/position.vs.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
Log Message:
-----------
[HLSL] Add initial support for output semantics (#168095)
This commits adds the first part of the output semantics. It only
considers return values (and sret), but does not handle `inout` or `out`
parameters yet.
Those missing bits will reuse the same code, but will require additional
testing & some fixups, so planning on adding them separately.
Commit: 48dca1e929f5ef4ffbd4d291ce8bd9ab03c23fed
https://github.com/llvm/llvm-project/commit/48dca1e929f5ef4ffbd4d291ce8bd9ab03c23fed
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/AST/StmtOpenACC.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
Log Message:
-----------
[OpenACC][CIR] Implement 'atomic capture' lowering (#168422)
The 'atomic capture' variant of the `atomic` construct accepts either a
single statement, or a compound statement containing two statements.
Each of the statements it accepts meet a form of the previous
read/write/update forms, or is a combination of two.
The IR node for atomic capture takes two separate other acc.atomics,
plus a terminator.
This patch implements all of the lowering for these.
Note: This gets the postfix-increment/decrement wrong, but the effort
to do so is enough that I believe we can do that in a followup patch, so
I'll be doing so in the next patch.
Commit: ad31e11ab6d719d803708169a981a49b347c4d82
https://github.com/llvm/llvm-project/commit/ad31e11ab6d719d803708169a981a49b347c4d82
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__ranges/iota_view.h
M libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
Log Message:
-----------
[libc++] Make views::iota aware of __int128 (#167869)
Fixes #167991
Commit: a7ba8dcad76476478100c228a31d9c48391b1e03
https://github.com/llvm/llvm-project/commit/a7ba8dcad76476478100c228a31d9c48391b1e03
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/property-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/no-int-to-ptr.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-copy-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/std-allocator-const.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
Log Message:
-----------
[clang-tidy][docs][NFC] Enforce 80 characters limit (4/4) (#168049)
Fix documentation in `mpi`, `objc`, `openmp`, `performance`,
`portability`, `readability` and `zircon`.
This is part of the codebase cleanup described in
https://github.com/llvm/llvm-project/issues/167098
Commit: 93a1327deaef7abd5c2bf5caf4c4ef40d34460f6
https://github.com/llvm/llvm-project/commit/93a1327deaef7abd5c2bf5caf4c4ef40d34460f6
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
Log Message:
-----------
[lldb] Skip TestLibcxxInternalsRecognizer on asan + MacOS
Unfortunately, in this configuration, the bots are forced to use the
system libcxx, which is too old for what this test is verifying.
In the future, we should re-enable building libcxx with asan on MacOS.
Commit: 1723a5137cba77cc1aace84d392b2ecd501e1069
https://github.com/llvm/llvm-project/commit/1723a5137cba77cc1aace84d392b2ecd501e1069
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
Log Message:
-----------
[mlir][tensor] Drop unused AffineExpr variable (NFC) (#168651)
Commit: c62fc065b4c10370c1aa68cad6f5fa980b640136
https://github.com/llvm/llvm-project/commit/c62fc065b4c10370c1aa68cad6f5fa980b640136
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/lib/asan/CMakeLists.txt
A compiler-rt/lib/asan/asan_aix.cpp
M compiler-rt/lib/asan/asan_posix.cpp
M compiler-rt/lib/asan/scripts/asan_symbolize.py
Log Message:
-----------
[asan] Implement address sanitizer on AIX: platform support (#139587)
Adds some general changes for supporting asan on AIX.
Issue: #138916
Commit: 71e3de8a7f1c0fc71302ac84c826f34fa324ee1c
https://github.com/llvm/llvm-project/commit/71e3de8a7f1c0fc71302ac84c826f34fa324ee1c
Author: Simone Pellegrini <simone.pellegrini at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
Log Message:
-----------
[mlir][vector] Missing indices on vectorization of 1-d reduction to 1-ranked memref (#166959)
Vectorization of a 1-d reduction where the output variable is a 1-ranked
memref can generate an invalid `vector.transfer_write` with no indices
for the memref, e.g.:
vector.transfer_write"(%vec, %buff) <{...}> : (vector<f32>,
memref<1xf32>) -> ()
This patch solves the problem by providing the expected amount of
indices (i.e. matching the rank of the memref).
Commit: b11b7b333ddb90db42dfd2d5003e3a51c3a7c38a
https://github.com/llvm/llvm-project/commit/b11b7b333ddb90db42dfd2d5003e3a51c3a7c38a
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/test/Analysis/block-in-critical-section.cpp
Log Message:
-----------
[clang][analyzer] Add defer_lock_t modelling to BlockInCriticalSectionChecker (#168338)
Fixes #166573
---------
Co-authored-by: Donát Nagy <donat.nagy at ericsson.com>
Co-authored-by: Alan Li <me at alanli.org>
Commit: b79a665f7170fbb631b13175ec747ccfd779bf9e
https://github.com/llvm/llvm-project/commit/b79a665f7170fbb631b13175ec747ccfd779bf9e
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
[AMDGPU] Remove leftover implicit operands from SI_SPILL/SI_RESTORE. (#168546)
Remove leftover implicit operands from SI_SPILL/SI_RESTORE.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 86a82f27ee8cb7477c25561bc5697a6a6a8ff21d
https://github.com/llvm/llvm-project/commit/86a82f27ee8cb7477c25561bc5697a6a6a8ff21d
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/CMakeLists.txt
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/python/CMakeLists.txt
Log Message:
-----------
[MLIR][Python] make sure stubs get installed with LLVM_DISTRIBUTION_COMPONENTS (#168407)
Fixes https://github.com/llvm/llvm-project/issues/168393. Also adds
top-level `MLIR_PYTHON_STUBGEN_ENABLED` CMake option.
Commit: 9cd40da328ca4ee4018dae42f071e5a1540e359f
https://github.com/llvm/llvm-project/commit/9cd40da328ca4ee4018dae42f071e5a1540e359f
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/test/Lower/assignment.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/host-associated.f90
Log Message:
-----------
[flang][NFC] Strip trailing whitespace from tests (7 of N)
Only some fortran source files in flang/test/Lower have been modified.
The other files in the directory will be cleaned up in subsequent
commits
Commit: 7a3923676fecb0dc8d2d728310e84949dabb511a
https://github.com/llvm/llvm-project/commit/7a3923676fecb0dc8d2d728310e84949dabb511a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/interface_symbols_darwin.cpp
Log Message:
-----------
[ASan] Fix interface_symbols_darwin.cpp on internal shell
This test turned out to not actually be that interested. There was just a
subshell usage that needed replacing with readfile, and then the test just
works.
Reviewers: fmayer, DanBlackwell, ndrewh
Reviewed By: ndrewh
Pull Request: https://github.com/llvm/llvm-project/pull/168654
Commit: c2b4e481a0504cbb50e83098d2634b063be6b5c9
https://github.com/llvm/llvm-project/commit/c2b4e481a0504cbb50e83098d2634b063be6b5c9
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/tools/lto/lto.cpp
Log Message:
-----------
[libLTO] add thinlto caching flags to libLTO (#168567)
On AIX, the linker's release cadence is once per year and it doesn't
backport non-critical fixes to previous releases.
We would like to get thinLTO caching accessible for current customers,
so this PR adds the cache flags as cl::opt options.
Commit: 30e5f76d73fda77becb2010012b5cb090cc78c65
https://github.com/llvm/llvm-project/commit/30e5f76d73fda77becb2010012b5cb090cc78c65
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
M llvm/lib/Object/RecordStreamer.cpp
Log Message:
-----------
[llvm] Construct iterator_range with the conversion constructor (NFC) (#168674)
This patch simplifies iterator_range construction with the conversion
constructor.
Commit: 19129ea34388a923fcc9f5e7222ee238adfca0c6
https://github.com/llvm/llvm-project/commit/19129ea34388a923fcc9f5e7222ee238adfca0c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Bitcode/BitcodeConvenience.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h
M llvm/lib/CAS/OnDiskCAS.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/ObjectYAML/MinidumpEmitter.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/tools/llvm-xray/xray-extract.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[llvm] Use llvm::size (NFC) (#168675)
Note that llvm::size only works on types that allow std::distance in
O(1).
Commit: 139f726c84bc2c5144d10a79dd8f31e17ce7e03b
https://github.com/llvm/llvm-project/commit/139f726c84bc2c5144d10a79dd8f31e17ce7e03b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Add IfGuardEmitter and adopt it in InstrInfoEmitter (#168616)
Add a RAII `IfGuardEmitter` to insert simple #if guards and adopt it in
InstrInfoEmitter.
Commit: 4703195c8de047f102214495e39ae80aad152e15
https://github.com/llvm/llvm-project/commit/4703195c8de047f102214495e39ae80aad152e15
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[NFC][LLVM] Namespace cleanup in SLPVectorizer (#168623)
- Remove file local functions out of `llvm` or anonymous namespace and
make them static.
- Use namespace qualifier to define `BoUpSLP` class and several template
specializations.
Commit: 4f3d68a16e7ed8838b18b527192f515971209548
https://github.com/llvm/llvm-project/commit/4f3d68a16e7ed8838b18b527192f515971209548
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParserExtension.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinEH.h
M llvm/lib/MC/MCDisassembler/MCExternalSymbolizer.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/GOFFAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
M llvm/lib/MC/MCParser/XCOFFAsmParser.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinEH.cpp
Log Message:
-----------
[NFC][MC] Namespace cleanup in MC (#168627)
- Add declarations of various `MCAsmParserExtension` creation functions
to MCAsmParserExtension.h and use namespace qualifiers to define these
and some other functions.
- Add end of namespace comments.
- Fix indentation of `MCNullStreamer` class.
- Remove namespace surrounding code in MCWinEH.cpp and use "using
namespace" instead.
Commit: 93d759ce5a63cf74882087bad020825764043381
https://github.com/llvm/llvm-project/commit/93d759ce5a63cf74882087bad020825764043381
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaCXX/wmissing-noreturn-suggestion.cpp
Log Message:
-----------
[Clang] suppress -Wmissing-noreturn for virtual methods with throw-only bodies (#167523)
Fixes #167247
---
This PR addresses a case where Clang emitted `-Wmissing-noreturn` for
virtual methods whose body consists of a `throw` expression
```cpp
struct Base {
virtual void foo() {
throw std::runtime_error("error");
}
};
```
Commit: 435384583830ded8c3c9bc332a7f361de2d29346
https://github.com/llvm/llvm-project/commit/435384583830ded8c3c9bc332a7f361de2d29346
Author: Joshua Rodriguez <josh.rodriguez at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/trunc-avg-fold.ll
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/tools/llvm-ir2vec/output/reference_triplets.txt
M llvm/test/tools/llvm-ir2vec/output/reference_x86_entities.txt
Log Message:
-----------
[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)
GlobalISel now selects hadd family of intrinsics, without falling back
to SDAG.
Commit: 80d327e84606a99fd2c0b3f6ddb37f32ed89b997
https://github.com/llvm/llvm-project/commit/80d327e84606a99fd2c0b3f6ddb37f32ed89b997
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
A llvm/test/CodeGen/Hexagon/bfloat.ll
A llvm/test/CodeGen/Hexagon/bfloat_vec.ll
Log Message:
-----------
[Hexagon] Enable soft bf16 in hexagon (#167924)
This patch adds:
1. Support to recognize bf16 type in the frontend and isel/abi support
for scalar bf16 programs
Limitations: fp_to_bf16 is being generated with a tablegen pattern
instead of lowering via expansion. This is because we do not have
support for fcanonincalize instruction which should prevent an SNaN
being converted to an infinity due to truncation.
2. Vector codegen support for bf16
Patch By: Fateme Hosseini
Co-authored-by: Muntasir Mallick <quic_mallick at quicinc.com>
Co-authored-by: Muntasir Mallick <mallick at qti.qualcomm.com>
Co-authored-by: Kaushik Kulkarni <quic_kauskulk at quicinc.com>
Commit: f3d8a5cf5bc058328004bd0905ab4974f09fc131
https://github.com/llvm/llvm-project/commit/f3d8a5cf5bc058328004bd0905ab4974f09fc131
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Analysis/InstructionPrecedenceTracking.cpp
Log Message:
-----------
[IPT] Remove ipt.NumInstScanned statistic (#168515)
The NumInstScanned statistic is non-determinstic across multiple
identical invocations of LLVM, and leads to noise when trying to diff
LLVM statistics with e.g. ./utils/tdiff.py in llvm-test-suite.
My understanding is that it's non-deterministic because the users of
IPT's hasSpecialInstructions/isPreceededBySpecialInstruction API aren't
deterministic themselves.
This PR removes it and fixes #157598. This is just a small
quality-of-life improvement for the ./utils/tdiff.py workflow, but happy
to leave the statistic in if others are using it.
Commit: 9c2bbfe4a46e2d58294b6bb3e3a3584ade6a3304
https://github.com/llvm/llvm-project/commit/9c2bbfe4a46e2d58294b6bb3e3a3584ade6a3304
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/pr168594.ll
Log Message:
-----------
[X86] X86ISelDAGToDAG - don't let ADD/SUB(X,1) -> SUB/ADD(X,-1) constant fold (#168726)
This late into lowering we don't have a good way to handle constant build_vector lowering
Fixes #168594
Commit: c9e22d3751299fe31eeefbfb646bef7a78bcde8a
https://github.com/llvm/llvm-project/commit/c9e22d3751299fe31eeefbfb646bef7a78bcde8a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/tools/driver/Driver.cpp
Log Message:
-----------
[lldb][windows] add color to the Python.dll not found error (#168718)
Make the `Python.dll not found` error message stand out more by using
the `llvm::WithColor::error()` method.
---
### Example
#### Before
<img width="782" height="431" alt="Screenshot 2025-11-19 at 15 50 22"
src="https://github.com/user-attachments/assets/93960c50-cbf2-41f7-aba3-2f2a8af916cc"
/>
#### After
<img width="780" height="430" alt="Screenshot 2025-11-19 at 15 54 28"
src="https://github.com/user-attachments/assets/f7f4954b-0ce3-4a4b-b9af-5af876032573"
/>
rdar://165047059
Commit: c6775e2eb6b94fd60453d207902cf961195bf780
https://github.com/llvm/llvm-project/commit/c6775e2eb6b94fd60453d207902cf961195bf780
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/fuzzer/merge-posix.test
Log Message:
-----------
[compiler-rt] [libFuzzer] Fix merge-posix test (again) (#168639)
Commit: 5c73feddd1654624703102fdfd341df5046ba793
https://github.com/llvm/llvm-project/commit/5c73feddd1654624703102fdfd341df5046ba793
Author: nerix <nerixdev at outlook.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/inline-annotations.test
Log Message:
-----------
[ObjectYAML][CodeView] Include inline annotation data (#168211)
The annotation data for `S_INLINESITE` symbols was missing in YAML. This
caused PDBs with inline sites to have incorrect symbol offsets, because
`S_INLINESITE` wouldn't have the same size after creating a PDB from
YAML.
I kept the annotations as binary, because that's how they're represented
in LLVM.
Commit: 1d474e4b97208a5cdda76e4f18dddd16e62f8f6e
https://github.com/llvm/llvm-project/commit/1d474e4b97208a5cdda76e4f18dddd16e62f8f6e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
Log Message:
-----------
[llvm-cov] Use a range-based for loop (NFC) (#168671)
Identified with modernize-loop-convert.
Commit: b78824acef43066694978a701517d9f2d280a117
https://github.com/llvm/llvm-project/commit/b78824acef43066694978a701517d9f2d280a117
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Use a range-based for loop (NFC) (#168672)
Identified with modernize-loop-convert.
Commit: c2445d9c26c10eebfd6df603f2a9a0aa774e8d84
https://github.com/llvm/llvm-project/commit/c2445d9c26c10eebfd6df603f2a9a0aa774e8d84
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[Support] Use StringMap::contains (NFC) (#168673)
Identified with readability-container-contains.
Commit: d988991f9f6b50941ecbffc316890342147a9f75
https://github.com/llvm/llvm-project/commit/d988991f9f6b50941ecbffc316890342147a9f75
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Parser/preprocessor.cpp
A flang/test/Preprocessing/bug168077.F90
Log Message:
-----------
[flang] Tokenize all -D macro bodies, and do it better (#168116)
The compiler presently tokenizes the bodies of only function-like macro
definitions from the command line, and does so crudely. Tokenize
keyword-like macros too, get character literals right, and handle
numeric constants correctly. (Also delete two needless functions noticed
in characters.h.)
Fixes https://github.com/llvm/llvm-project/issues/168077.
Commit: f5f6ca659992ae6d26b2a96304ceb65a1fd63ad6
https://github.com/llvm/llvm-project/commit/f5f6ca659992ae6d26b2a96304ceb65a1fd63ad6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/bug168099.f90
Log Message:
-----------
[flang] Fix crash in UseErrorDetails construction case (#168126)
When a derived type has the same name as a generic function, and is
use-associated into a scope along with other distinct derived types of
the same name, we crash. Don't crash.
Fixes https://github.com/llvm/llvm-project/issues/168099.
Commit: a55e30b12cf90ba2e9c674c94ea3f2b5fa8f2c3b
https://github.com/llvm/llvm-project/commit/a55e30b12cf90ba2e9c674c94ea3f2b5fa8f2c3b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/unit.cpp
M flang/docs/Extensions.md
M flang/docs/RuntimeEnvironment.md
Log Message:
-----------
[flang][runtime] Control stream truncation via runtime environment (#168415)
The ISO Fortran standards don't say whether a WRITE to a formatted
stream unit should truncate the unit if there has been any repositioning
(via POS= control list specifiers) to an earlier point in the stream.
But units with sequential records do truncate on writes after BACKSPACE
and REWIND statements, and many compilers (including this one) truncate
stream units too. Since some compilers don't truncate streams, this
patch adds an environment variable FORT_TRUNCATE_STREAM that can be set
to 0 to disable truncation and ease porting to flang-new of codes that
depend on that behavior.
Fixes https://github.com/llvm/llvm-project/issues/167569.
Commit: 2f6f045ea8d9342a2c57ea93f6343622499dd87a
https://github.com/llvm/llvm-project/commit/2f6f045ea8d9342a2c57ea93f6343622499dd87a
Author: darkbuck <michael.hliao at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/call.c
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/test/Transforms/set-runtime-call-attributes.fir
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Resync memory effect attribute with LLVM IR (#168568)
- Add missing locations, namely 'ErrnoMem', 'TargetMem0', and
'TargetMem1'.
Commit: eb65517c76c131de7a3f772beea02347279ab6a3
https://github.com/llvm/llvm-project/commit/eb65517c76c131de7a3f772beea02347279ab6a3
Author: Aleksandr Nogikh <wp32pw at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/attr-malloc_span.c
A clang/test/SemaCXX/attr-malloc_span.cpp
Log Message:
-----------
[Clang] Introduce malloc_span attribute (#167010)
The "malloc" attribute restricts the possible function signatures to the
ones returning a pointer, which is not the case for some non-standard
allocation function variants. For example, P0901R11 proposed ::operator
new overloads that return a return_size_t result - a struct that
contains a pointer to the allocated memory as well as the actual size of
the allocated memory. Another example is __size_returning_new.
Introduce a new "malloc_span" attribute that exhibits similar semantics,
but applies to functions returning records where one member is a pointer
(assumed to point to the allocated memory) and another is an integer
(assumed to be the size of the allocated memory). This is the case for
return_size_t as well as std::span, should it be returned from such an
annotated function.
An alternative approach would be to relax the restrictions of the
existing "malloc" attribute to be applied to both functions returning
pointers and functions returning span-like structs. However, it would
complicate the user-space code by requiring specific Clang version
checks. In contrast, the presence of a new attribute can be
straightforwardly verified via the __has_attribute macro. Introducing a
new attribute also avoids concerns about the potential incompatibility
with GCC's "malloc" semantics.
In future commits, codegen can be improved to recognize the noalias-ness
of the pointer returned inside a span-like struct.
This change helps unlock the alloc token instrumentation for such
non-standard allocation functions:
https://clang.llvm.org/docs/AllocToken.html#instrumenting-non-standard-allocation-functions
Commit: c41f64239954b55468e44e6a6c92c1b4d2a1d8fe
https://github.com/llvm/llvm-project/commit/c41f64239954b55468e44e6a6c92c1b4d2a1d8fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/dyld_insert_libraries_reexec.cpp
M compiler-rt/test/asan/TestCases/Darwin/lit.local.cfg.py
Log Message:
-----------
[ASan] Make dyld_insert_libraries_reexec work with internal shell
This test was doing some feature checks within the test itself. This patch
rewrites the feature checks to be done in a fashion more idiomatic to lit,
as the internal shell does not support the features needed for the previous
feature checks.
Reviewers: ndrewh, DanBlackwell, fmayer
Reviewed By: ndrewh
Pull Request: https://github.com/llvm/llvm-project/pull/168655
Commit: e6fc654bfd632a23574e18b43631470285a2cdf8
https://github.com/llvm/llvm-project/commit/e6fc654bfd632a23574e18b43631470285a2cdf8
Author: Nathan Gauër <brioche at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
Log Message:
-----------
[HLSL] replace std::unordered_map with DenseMap (#168739)
Broke some builds because of a missing include. Changing to a DenseMap
and adding the missing include.
Commit: 8f91d9f0ace77a5856219190b5e51105c5133af9
https://github.com/llvm/llvm-project/commit/8f91d9f0ace77a5856219190b5e51105c5133af9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names-debug-types.test
R cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.test
Log Message:
-----------
[cross-project-tests][DebugInfo] Make simplified-template-names test runnable on Darwin (#168725)
The test was failing on Darwin for two reasons:
1. `-fdebug-type-sections` is not a recognized flag on Darwin
2. We fail to reconstitute a name if the template parameter has a type
that has a preferred_name. With LLDB tuning the type of such a parameter
is a typedef, i.e., the preferred name. Without tuning it would be the
canonical type that the typedef (possibly through a chain of typedefs)
points to.
This patch addresses (1) by splitting the `-fdebug-type-sections` tests
into a separate file (and only mark that one `UNSUPPORTED`). Which means
we can at least XFAIL the non-type-sections tests on Darwin.
To fix (2) we might need to make the `DWARFTypePrinter` aware of
non-canonical `DW_AT_type`s of template parameters.
Commit: e9b11ae83731bbca6adf9f9b39b6d3aa1869e445
https://github.com/llvm/llvm-project/commit/e9b11ae83731bbca6adf9f9b39b6d3aa1869e445
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A compiler-rt/test/asan/TestCases/Darwin/Inputs/check-syslog.sh
M compiler-rt/test/asan/TestCases/Darwin/duplicate_os_log_reports.cpp
Log Message:
-----------
[ASan] Make duplicate_os_log_reports.cpp work with the internal shell
This test used a for loop to implement retries and also did some trickery with PIDs.
For this test, just invoke bash for actually running the test given we need the PID,
and move the for loop into a separate shell script file that we can then invoke from
within the test. Normally it would make sense to rewrite such a script in Python, but
given this test does not have portability concerns only running on Darwin, it is fine
to use a shell script here given there is no other convenient alternative.
Reviewers: ndrewh, DanBlackwell, fmayer
Reviewed By: ndrewh
Pull Request: https://github.com/llvm/llvm-project/pull/168656
Commit: 0b921f52cc9313b89ca8fe2707d90cb1c2809387
https://github.com/llvm/llvm-project/commit/0b921f52cc9313b89ca8fe2707d90cb1c2809387
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
DAG: Use poison when splitting vector_shuffle results (#168176)
Commit: 1782e501f57ee5d3a1d2548f87ed4b82e7568b1d
https://github.com/llvm/llvm-project/commit/1782e501f57ee5d3a1d2548f87ed4b82e7568b1d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
DAG: Reorder SDPatternMatch combinators earlier (#168625)
Split out from #168288
Commit: ed0c36ca2885f4b0d6b36d7645248e24c2e8573c
https://github.com/llvm/llvm-project/commit/ed0c36ca2885f4b0d6b36d7645248e24c2e8573c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/fuzzer/big-file-copy.test
Log Message:
-----------
[Fuzzer] make big-file-copy.test work with the internal shell (#168658)
This patch uses several shell features not supported by the internal
shell, such as $? to get the exit code of a command, and exit. This
patch adjusts the test to work with the internal shell by using bash to
run the actual command with a zero exit code to ensure the file is
deleted, and python to propagate the exit code up to lit.
Commit: 36cbceca40b7e6a8b5809718bf1afdb2af8b039a
https://github.com/llvm/llvm-project/commit/36cbceca40b7e6a8b5809718bf1afdb2af8b039a
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
Log Message:
-----------
[CIR] Ternary with const cond and throw in the live part (#168432)
Ternary with a constant condition and throw in the live part
Commit: 009ec6fc64e23ee853485f2b97027a2dc1f040ab
https://github.com/llvm/llvm-project/commit/009ec6fc64e23ee853485f2b97027a2dc1f040ab
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/IR/eh-inflight.cir
A clang/test/CIR/Lowering/eh-inflight.cir
Log Message:
-----------
[CIR] Upstream Exception EhInflight op (#165621)
Upstream Exception EhInflight op as a prerequisite for full catch
handlers implementation
Issue https://github.com/llvm/llvm-project/issues/154992
Commit: f65294ed52cc8682924c5af17c262be267349f7d
https://github.com/llvm/llvm-project/commit/f65294ed52cc8682924c5af17c262be267349f7d
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.test.dat
Log Message:
-----------
Add test case for xsgetn in basic_filebuf (#167937)
This is the promised follow-up to #167779. It simply adds a test case
provided by philnik777
Commit: 87a1fd17e9be508e17fdeb37ad284b44c71795d5
https://github.com/llvm/llvm-project/commit/87a1fd17e9be508e17fdeb37ad284b44c71795d5
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] "port" 5efce7392f3f (arm 32-bit asm compiler-rt)
Commit: 6ad162393cf8ab2989e158576877e4570e091bbf
https://github.com/llvm/llvm-project/commit/6ad162393cf8ab2989e158576877e4570e091bbf
Author: Sayan Saha <sayans at mathworks.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
Log Message:
-----------
[tosa] : Enhance EqualizeRanks to handle dynamic dimensions. (#168564)
Legalizing following IR to `tosa` using `tf-tosa-opt` from `tensorflow`
repo:
```
func.func @main(%arg0: tensor<?x?x?x?xf32>) -> tensor<?x?x?x5xf32> {
%0 = "tfl.pseudo_const"() <{value = dense<0.000000e+00> : tensor<5xf32>}> : () -> tensor<5xf32>
%1 = tfl.add(%arg0, %0) <{fused_activation_function = "NONE"}> : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
return %1 : tensor<?x?x?x5xf32>
}
```
fails with
```
error: 'tosa.add' op operands don't have matching ranks
%1 = tfl.add(%arg0, %0) <{fused_activation_function = "NONE"}> : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
^
tfl.mlir:3:10: note: see current operation: %1 = "tosa.add"(%arg0, %0) : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
// -----// IR Dump After TosaLegalizeTFLPass Failed (tosa-legalize-tfl) //----- //
"func.func"() <{function_type = (tensor<?x?x?x?xf32>) -> tensor<?x?x?x5xf32>, sym_name = "main"}> ({
^bb0(%arg0: tensor<?x?x?x?xf32>):
%0 = "tosa.const"() <{values = dense<0.000000e+00> : tensor<5xf32>}> : () -> tensor<5xf32>
%1 = "tosa.add"(%arg0, %0) : (tensor<?x?x?x?xf32>, tensor<5xf32>) -> tensor<?x?x?x5xf32>
"func.return"(%1) : (tensor<?x?x?x5xf32>) -> ()
}) : () -> ()
```
This is because of the following check in `computeReshapeOutput` called
from `EqualizeRanks` function:
```
if (lowerRankDim != 1 && higherRankDim != 1 &&
lowerRankDim != higherRankDim)
return failure();
```
Based on the broadcast semantics defined in
https://mlir.llvm.org/docs/Traits/Broadcastable/#dimension-inference I
think it's legal to allow `lowerRankDim != higherRankDim` if one of them
is dynamic. At runtime verifier should enforce that
1. if lowerRankDim is dynamic and higherRankDim is static then the
dynamic dim matches the static dim and vice-versa
2. if both are dynamic, they should match
It's not necessary to error out during the op construction time.
Commit: 8bfd29486e042af5b4e4a6e9ef5e6d04ce618651
https://github.com/llvm/llvm-project/commit/8bfd29486e042af5b4e4a6e9ef5e6d04ce618651
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libcxx/include/__charconv/from_chars_integral.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__locale_dir/num.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/limits
M libcxx/test/libcxx/numerics/clamp_to_integral.pass.cpp
M libcxx/test/std/numerics/c.math/isnormal.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.gps/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.tai/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_greater/cmp_greater.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less/cmp_less.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less_equal/cmp_less_equal.pass.cpp
Log Message:
-----------
[libc++] Remove is_signed<T> use from <limits> (#168334)
`numeric_limits` already has an `is_signed` member. We can use that
instead of using `std::is_signed`.
Commit: 449807a39867d98bbd0abbd597ff3388a4f86a2a
https://github.com/llvm/llvm-project/commit/449807a39867d98bbd0abbd597ff3388a4f86a2a
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn
Log Message:
-----------
[gn] port c62fc065b4c1
Commit: 0c7d826129209972741dda3bd8bc40e500d5cda8
https://github.com/llvm/llvm-project/commit/0c7d826129209972741dda3bd8bc40e500d5cda8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/include/lldb/Expression/DiagnosticManager.h
A lldb/include/lldb/Host/common/DiagnosticsRendering.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
R lldb/include/lldb/Utility/DiagnosticsRendering.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/DiagnosticsRendering.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Utility/CMakeLists.txt
R lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/unittests/Host/common/CMakeLists.txt
A lldb/unittests/Host/common/DiagnosticsRenderingTest.cpp
M lldb/unittests/Utility/CMakeLists.txt
R lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
Log Message:
-----------
[NFC][lldb] move DiagnosticsRendering to Host (#168696)
NFC patch which moves `DiagnosticsRendering` from `Utility` to `Host`.
This refactoring is needed for
https://github.com/llvm/llvm-project/pull/168603. It adds a method to
check whether the current terminal supports Unicode or not. This will be
OS dependent and a better fit for `Host`. Since `Utility` cannot depend
on `Host`, `DiagnosticsRendering` must live in `Host` instead.
Commit: 3890a4a9e5a8c128cf9b193c57841efbbaf36866
https://github.com/llvm/llvm-project/commit/3890a4a9e5a8c128cf9b193c57841efbbaf36866
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
Log Message:
-----------
[RISCV] Update X60 ReleaseAtCycles for Vector Integer Arithmetic Instructions (#152557)
This PR updates the ReleaseAtCycles for all instructions described in
Section 11 of the RVV Spec: Vector Integer Arithmetic Instructions. The
data used comes from camel-cdr.
Commit: 8ab7b60c27c3c61558b6e94f2b010a41842a7592
https://github.com/llvm/llvm-project/commit/8ab7b60c27c3c61558b6e94f2b010a41842a7592
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump Runner Version in CI Containers
To ensure we stay ahead of the ~6 month time horizon. This new version
seems to be mostly small version bumps and minor fixes that probably are
not too relevant to us.
Commit: 0f615dc6a6bc8b96fe85f23adef740a313537a0e
https://github.com/llvm/llvm-project/commit/0f615dc6a6bc8b96fe85f23adef740a313537a0e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/build-metrics-container.yml
Log Message:
-----------
[Github] Make metrics container build use common actions (#168667)
This patch makes the metrics container build/push job use the common
container build/push actions to simplify the workflow by quite a bit.
Commit: 6f8e87b9d097c5ef631f24d2eb2f34eb31b54d3b
https://github.com/llvm/llvm-project/commit/6f8e87b9d097c5ef631f24d2eb2f34eb31b54d3b
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn] port 22a2cae5d6735 (AttrIsTypeDependent.inc)
Commit: a4456a5ce3fd4a57343c0cc6dd46b2d024985bc4
https://github.com/llvm/llvm-project/commit/a4456a5ce3fd4a57343c0cc6dd46b2d024985bc4
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M utils/bazel/.bazelrc
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Flip --enable_bzlmod to true (#168555)
Switches to the config added in #164891
Fixes #55924
Commit: ddbdc9a86ec6aa2b449f94003bdaa1bf9e16b3b0
https://github.com/llvm/llvm-project/commit/ddbdc9a86ec6aa2b449f94003bdaa1bf9e16b3b0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
Log Message:
-----------
[AMDGPU] Add baseline test to show spilling of wmma scale. NFC (#168163)
This is to show the spilling of WMMA scale values which are limited
to low 256 VGPRs. We have free registers, just RA allocates low 256
first.
Commit: 98b170893e955659b9c678c4b8ede08bb11163b2
https://github.com/llvm/llvm-project/commit/98b170893e955659b9c678c4b8ede08bb11163b2
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/docs/Dialects/NVVMDialect.md
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
Log Message:
-----------
[MLIR][NVVM] Doc fixes (#168716)
Commit: 1f3455093c0e0849f52016fccc91b413f85a609a
https://github.com/llvm/llvm-project/commit/1f3455093c0e0849f52016fccc91b413f85a609a
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-server/BUILD.gn
Log Message:
-----------
[gn] port 2675dcd72d02ee1ac (lldb-server PlatformOptions.inc)
Commit: bc5f3d2063e740262a873f223b86ffda39dfa7a6
https://github.com/llvm/llvm-project/commit/bc5f3d2063e740262a873f223b86ffda39dfa7a6
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
Log Message:
-----------
[gn] port 0ae2bccde45 (arm SDNodeInfo)
Commit: 3adcfd22ecc2f2a8fbd32e0d1533fc22111ed7cb
https://github.com/llvm/llvm-project/commit/3adcfd22ecc2f2a8fbd32e0d1533fc22111ed7cb
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
Log Message:
-----------
[gn] port e47e9f3b7b136 (nvptx SDNodeInfo)
Commit: d2c7c6064259320def7a74e111079725958697d4
https://github.com/llvm/llvm-project/commit/d2c7c6064259320def7a74e111079725958697d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[InstSimplify] Add whitespace to struct declarations in vector-calls.ll. NFC
This matches how IR is printed.
Commit: 1233c4bf230bcc40f86b8684e4cc1e4d368a8b79
https://github.com/llvm/llvm-project/commit/1233c4bf230bcc40f86b8684e4cc1e4d368a8b79
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/test/Driver/crash-ir-repro.cpp
Log Message:
-----------
Minor fix of reproducer in #165572 (#168751)
Commit: a757c4e74e6a3130c708b26903d5117a9279bef8
https://github.com/llvm/llvm-project/commit/a757c4e74e6a3130c708b26903d5117a9279bef8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)
Currently LibcallLoweringInfo is defined inside of TargetLowering,
which is owned by the subtarget. Pass in the subtarget so we can
construct LibcallLoweringInfo with the subtarget. This is a temporary
step that should be revertable in the future, after LibcallLoweringInfo
is moved out of TargetLowering.
Commit: 36f9d5a41f0eff44e65f09240c7ca454c47b35cd
https://github.com/llvm/llvm-project/commit/36f9d5a41f0eff44e65f09240c7ca454c47b35cd
Author: Paddy McDonald <padriff at hotmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/AddressSanitizer.rst
M compiler-rt/include/sanitizer/common_interface_defs.h
M compiler-rt/lib/asan/asan_errors.cpp
A compiler-rt/test/asan/TestCases/disable_container_overflow_checks.cpp
A compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
[ASan] Document define to disable container overflow checks at compile time. (#163468)
Document a define to allow library developers to support disabling
AddressSanitizer's container overflow detection in template code at
compile time.
The primary motivation is to reduce false positives in environments
where
libraries and frameworks that cannot be recompiled with sanitizers
enabled
are called from application code. This supports disabling checks when
the
runtime environment cannot be reliably controlled to use ASAN_OPTIONS.
Key changes:
- Use the define `__SANITIZER_DISABLE_CONTAINER_OVERFLOW__` to disable
instrumentation at compile time
- Implemented redefining the container overflow APIs in
common_interface_defs.h
to use define to provide null implementation when define is present
- Update documentation in AddressSanitizer.rst to suggest and illustrate
use of the define
- Add details of the define in PrintContainerOverflowHint()
- Add test disable_container_overflow_checks to verify new hints on the
error and fill the testing gap that
ASAN_OPTIONS=detect_container_overflow=0
works
- Add tests demonstrating the issue around closed source libraries and
instrumented apps that both modify containers
This requires no compiler changes and should be supportable cross
compiler toolchains.
An RFC has been opened to discuss:
https://discourse.llvm.org/t/rfc-add-fsanitize-address-disable-container-overflow-flag-to-addresssanitizer/88349
Commit: fc95558f628de4243dc85e31eaaac795435ca031
https://github.com/llvm/llvm-project/commit/fc95558f628de4243dc85e31eaaac795435ca031
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[TableGen] Use size_t for SubRegIndicesSize (NFC) (#168728)
This patch changes the type of SubRegIndicesSize to size_t. The
original type deduced for "auto" is a signed type, but size_t, an
unsigned type, is safe here according to the usage.
Commit: 06f0d30e2887b98841a4d5d0915aebbc1ef7480e
https://github.com/llvm/llvm-project/commit/06f0d30e2887b98841a4d5d0915aebbc1ef7480e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/ARM/BUILD.gn
Log Message:
-----------
[gn] port 0ae2bccde45 more
Commit: fb8155c2b87f265c56a1668b3640a52afaaa55d2
https://github.com/llvm/llvm-project/commit/fb8155c2b87f265c56a1668b3640a52afaaa55d2
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn build] Port 8fce476c8122
Commit: 60a27953eabe3a0ded7c9b7b7786dfd1fe5d8c5f
https://github.com/llvm/llvm-project/commit/60a27953eabe3a0ded7c9b7b7786dfd1fe5d8c5f
Author: Benjamin Stott <Benjamin.Stott at sony.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprComplex.cpp
A clang/test/CodeGen/complex-compound-assign-bitfield.c
Log Message:
-----------
[Clang][CodeGen] Use EmitLoadOfLValue instead of EmitLoadOfScalar to get LHS for complex compound assignment (#166798)
- Fixes https://github.com/llvm/llvm-project/issues/166512
- `ComplexExprEmitter::EmitCompoundAssignLValue` is calling
`EmitLoadOfScalar(LValue, SourceLocation)` to load the LHS value in the
case that it's non-complex, however this function requires that the
value is a simple LValue - issue occurred because the LValue in question
was a bitfield LValue. I changed it to use this function which seems to
handle all of the different cases (deferring to the original
`EmitLoadOfScalar` if it's a simple LValue)
Commit: 13e09ebe2dc7699598ac6eeb5fcb8738db27743b
https://github.com/llvm/llvm-project/commit/13e09ebe2dc7699598ac6eeb5fcb8738db27743b
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
A lld/test/ELF/aarch64-funcinit64-invalid.s
A lld/test/ELF/aarch64-funcinit64.s
Log Message:
-----------
ELF: Add support for relocating R_AARCH64_FUNCINIT64.
R_AARCH64_FUNCINIT64 is a dynamic relocation type for relocating
word-sized data in the output file using the return value of
a function. An R_AARCH64_FUNCINIT64 shall be relocated as an
R_AARCH64_IRELATIVE with the target symbol address if the target
symbol is non-preemptible, and it shall be a usage error to relocate an
R_AARCH64_FUNCINIT64 with a preemptible or STT_GNU_IFUNC target symbol.
The initial use case for this relocation type shall be for emitting
global variable field initializers for structure protection. With
structure protection, the relocation value computation is tied to the
compiler implementation in such a way that it would not be reasonable to
define a relocation type for it (for example, it may involve computing
a hash using a compiler-determined algorithm), hence the need for the
computation to be implemented as code in the binary.
Part of the AArch64 psABI extension:
https://github.com/ARM-software/abi-aa/issues/340
Reviewers: smithp35, fmayer, MaskRay
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/156564
Commit: 56112685f7a25078868b8f09c72feaf4ceae50f9
https://github.com/llvm/llvm-project/commit/56112685f7a25078868b8f09c72feaf4ceae50f9
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
Log Message:
-----------
[CIR] Handle default arguments in ctors (#168649)
This adds the scalar expression visitor needed to handle default
arguments being passed to constructors.
Commit: afcb9537bb40143d45dd5aeb06009b6aaee1f6f6
https://github.com/llvm/llvm-project/commit/afcb9537bb40143d45dd5aeb06009b6aaee1f6f6
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
Log Message:
-----------
[bazel] Fix bzlmod reference to @vulkan_sdk (#168767)
vulkan_sdk_setup is the name of the method that configures it, but the
repo itself has the name vulkan_sdk
This was caught by enabling the bzlmod flag for CI. The GH action runs
`blaze test @llvm-project/...` but the target is tagged manual, so it's
excluded. The buildkite CI runs `bazel query | xargs bazel test` which
will include manual targets.
Commit: e148d2d422c4f310785e38942c8eb7243b065d7a
https://github.com/llvm/llvm-project/commit/e148d2d422c4f310785e38942c8eb7243b065d7a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll
Log Message:
-----------
[LV] Simplify existing load/store sink/hoisting tests, extend coverage.
Clean up some of the existing predicated load/store sink/hosting tests
and add additional test coverage for more complex cases.
Commit: 12131d5cd39025c1e9e521fde6ffbfffd51dff1c
https://github.com/llvm/llvm-project/commit/12131d5cd39025c1e9e521fde6ffbfffd51dff1c
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
Log Message:
-----------
[SLPVectorizer] Widen constant strided loads. (#162324)
Given a set of pointers, check if they can be rearranged as follows (%s is a constant):
%b + 0 * %s + 0
%b + 0 * %s + 1
%b + 0 * %s + 2
...
%b + 0 * %s + w
%b + 1 * %s + 0
%b + 1 * %s + 1
%b + 1 * %s + 2
...
%b + 1 * %s + w
...
If the pointers can be rearanged in the above pattern, it means that the
memory can be accessed with a strided loads of width `w` and stride `%s`.
Commit: df58c38b5a831da1cd96317297c9482402c60216
https://github.com/llvm/llvm-project/commit/df58c38b5a831da1cd96317297c9482402c60216
Author: Kai Lin <50469469+OMG-link at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/combine-vl-vw-macc.ll
Log Message:
-----------
[RISCV][DAGCombiner] Fix potential missed combine in VL->VW extension (#168026)
The previous implementation of `combineOp_VLToVWOp_VL` manually replaced
old
nodes with newly created widened nodes, but only added the new node
itself to
the `DAGCombiner` worklist. Since the users of the new node were not
added,
some combine opportunities could be missed when external `DAGCombiner`
passes
expected those users to be reconsidered.
This patch replaces the custom replacement logic with a call to
`DCI.CombineTo()`, which performs node replacement in a way consistent
with
`DAGCombiner::Run`:
- Replace all uses of the old node.
- Add the new node and its users to the worklist.
- Clean up unused nodes when appropriate.
Using `CombineTo` ensures that `combineOp_VLToVWOp_VL` behaves
consistently with
the standard `DAGCombiner` update model, avoiding discrepancies between
the
private worklist inside this routine and the global worklist managed by
the
combiner.
This resolves missed combine cases involving VL -> VW operator widening.
---------
Co-authored-by: Kai Lin <omg_link at qq.com>
Commit: e00314be1cf5e7ebba25339439d427174eb6f24b
https://github.com/llvm/llvm-project/commit/e00314be1cf5e7ebba25339439d427174eb6f24b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
Log Message:
-----------
workflows/libclang-abi-tests: Remove use of install-ninja action (#168642)
This is not needed now that we are using the container to run the
workflow.
Commit: 2f9f492b3d160dee8ae080e981dd6e92aadf56ce
https://github.com/llvm/llvm-project/commit/2f9f492b3d160dee8ae080e981dd6e92aadf56ce
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/hlsl-test-all.yaml
Log Message:
-----------
workflows/hlsl-test-all: Drop use of setup-windows action (#167437)
It doesn't look like these tests are actually run on Windows, so we
don't need it.
Commit: f85942728fe2edfc681831abf8ecd2f245e1aaaa
https://github.com/llvm/llvm-project/commit/f85942728fe2edfc681831abf8ecd2f245e1aaaa
Author: Thibault Monnier <97551402+Thibault-Monnier at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGen/X86/sse-builtins.c
Log Message:
-----------
[CIR] Upstream CIR codegen for mxcsr x86 builtins (#167948)
Commit: c34927ab5ac9f359616657c3f5e05f868db901f6
https://github.com/llvm/llvm-project/commit/c34927ab5ac9f359616657c3f5e05f868db901f6
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/workflows/commit-access-review.py
Log Message:
-----------
commit-access-review.py: Remove new contributor check (#168629)
We don't need this anymore since all new contributors in the last year
have applied for commit access using GitHub issues. There is already
code in the script that removes anyone who submitted a request, so we
don't need the old code any more (which was way too conservitave and
very slow).
Commit: 11dff3a0e06d6471863f4e997f6c4e5d05de3466
https://github.com/llvm/llvm-project/commit/11dff3a0e06d6471863f4e997f6c4e5d05de3466
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
Log Message:
-----------
[clang-doc][NFC] Lift Mustache template generation from HTML (#167815)
To prepare for more backends to use Mustache templates, this patch lifts
the Mustache utilities from `HTMLMustacheGenerator.cpp` to
`Generators.h`. A MustacheGenerator interface is created to share code for
template creation.
Commit: c9f573463ebd7b4e46da4877802f2364f700e54a
https://github.com/llvm/llvm-project/commit/c9f573463ebd7b4e46da4877802f2364f700e54a
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A llvm/include/llvm/Analysis/CMakeLists.txt
R llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
A llvm/include/llvm/Analysis/TargetLibraryInfo.td
A llvm/include/llvm/Analysis/TargetLibraryInfoImpl.td
M llvm/include/llvm/CMakeLists.txt
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/LTO/UpdateCompilerUsed.cpp
M llvm/lib/TableGen/StringToOffsetTable.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
A llvm/test/TableGen/TargetLibraryInfo.td
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
A llvm/utils/TableGen/Basic/TargetLibraryInfoEmitter.cpp
Log Message:
-----------
[Analysis] Move TargetLibraryInfo data to TableGen (#165009)
The collection of library function names in TargetLibraryInfo faces
similar challenges as RuntimeLibCalls in the IR component. The number of
function names is large, there are numerous customizations based on the
triple (including alternate names), and there is a lot of replicated
data in the signature table.
The ultimate goal would be to capture all lbrary function related
information in a .td file. This PR brings the current .def file to
TableGen, almost as a 1:1 replacement. However, there are some
improvements which are not possible in the current implementation:
- the function names are now stored as a long string together with an
offset table.
- the table of signatures is now deduplicated, using an offset table for
access.
The size of the object file decreases about 34kB with these changes. The
hash table of all function names is still constructed dynamically. A
static table like for RuntimeLibCalls is the next logical step.
The main motivation for this change is that I have to add a large number
of custom names for z/OS (like in RuntimeLibCalls.td), and the current
infrastructur does not support this very well.
Commit: 2b16ae0d42ebc5b9c42a9d14c8a40bef4c9a6683
https://github.com/llvm/llvm-project/commit/2b16ae0d42ebc5b9c42a9d14c8a40bef4c9a6683
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
Log Message:
-----------
[RISCV] Fix CFI Multiple Locations Test (#168772)
Commit: 609c88a1fd8bdfd67f86a1c129325e2ccd6b959c
https://github.com/llvm/llvm-project/commit/609c88a1fd8bdfd67f86a1c129325e2ccd6b959c
Author: Marco Elver <elver at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/alloc-token.cpp
Log Message:
-----------
[Clang][Sema] Fix __builtin_infer_alloc_token() return type (#168773)
Using the builtin failed on 32-bit architectures:
```
clang/lib/AST/ExprConstant.cpp:14299: [..]: Assertion `I.getBitWidth() == Info.Ctx.getIntWidth(E->getType()) && "Invalid evaluation result."' failed.
```
The return type is meant to be size_t. Fix it.
Commit: e0c265d1c0cb8650cbfcffa81c297f2cdacc85d9
https://github.com/llvm/llvm-project/commit/e0c265d1c0cb8650cbfcffa81c297f2cdacc85d9
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/comment-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
Log Message:
-----------
[clang-doc] Fix whitespace issues in Mustache basic test (#168491)
I found that the issues we've been seeing in the HTML
whitespace/alignment are due to partials inserting their own whitespace
and calling partials on indented lines or lines containing text already.
This patch gets rid of unnecessary whitespace in the comment and
function partials so that they are properly indented when inserted.
Commit: 12d72050e1255decb67d53125e86d348db2951d6
https://github.com/llvm/llvm-project/commit/12d72050e1255decb67d53125e86d348db2951d6
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/invalid-string/TestDataFormatterLibcxxInvalidString.py
Log Message:
-----------
[lldb][test] Correctly skip a test on a 32-bit target (#168631)
The test was added in #147252. On a 32-bit target, it fails with error:
```
File "...\TestDataFormatterLibcxxInvalidString.py", line 23, in test
self.skip()
^^^^^^^^^
AttributeError: 'LibcxxInvalidStringDataFormatterTestCase' object has no attribute 'skip'
```
Commit: 253ed524365e20309e0f615415c9433bd9bda44d
https://github.com/llvm/llvm-project/commit/253ed524365e20309e0f615415c9433bd9bda44d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
DAG: Use poison for some vector result widening (#168290)
Commit: eea62159e853b59a4e4e69da22175222ccd8c663
https://github.com/llvm/llvm-project/commit/eea62159e853b59a4e4e69da22175222ccd8c663
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[Offload] Make the RPC thread sleep briefly when idle (#168596)
Summary:
We start this thread if the RPC client symbol is detected in the loaded
binary. We should make this sleep if there's no work to avoid the thread
running at high priority when the (scarecely used) RPC call is actually
required. So, right now after 25 microseconds we will assume the server
is inactive and begin sleeping. This resets once we do find work.
AMD supports a more intelligent way to do this. HSA signals can wake a
sleeping thread from the kernel, and signals can be sent from the GPU
side. This would be nice to have and I'm planning on working with it in
the future to make this infrastructure more usable with existing AMD
workloads.
Commit: 5c43385319c3976edf6857487273af22eac3abae
https://github.com/llvm/llvm-project/commit/5c43385319c3976edf6857487273af22eac3abae
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGValue.h
M clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/IR/await.cir
M clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/invalid-await.cir
Log Message:
-----------
[CIR] Upstream CIR await op (#168133)
This PR upstreams `cir.await` and adds initial codegen for emitting a
skeleton of the ready, suspend, and resume branches. Codegen for these
branches is left for a future PR. It also adds a test for the invalid
case where a `cir.func` is marked as a coroutine but does not contain a
`cir.await` op in its body.
Commit: 040d9c94bebfc441f555de4617baf7da410ed959
https://github.com/llvm/llvm-project/commit/040d9c94bebfc441f555de4617baf7da410ed959
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Collect FMFs for in-loop reduction chain in VPlan. (NFC)
Replace retrieving FMFs for in-loop reduction via underlying instruction
+ legal by collecting the flags during reduction chain traversal in
VPlan.
Commit: 3b49c927427a6e818fee154725b3a05ead6c09de
https://github.com/llvm/llvm-project/commit/3b49c927427a6e818fee154725b3a05ead6c09de
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
Log Message:
-----------
Fix build breakage from: #167948 (#168781)
It appears that this broke the build by not using the 'correct' name for
the expression. This is probably something that crossed in review.
Commit: f2c9c7d654947cb1317f96547c15c256a1df4ce4
https://github.com/llvm/llvm-project/commit/f2c9c7d654947cb1317f96547c15c256a1df4ce4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/AST/StmtOpenACC.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
Log Message:
-----------
[OpenACC][CIR] Fix atomic-capture single-line-postfix (#168717)
In my last patch, it became clear during code review that the postfix
operation was actually a read THEN update, not update/read like other
single line versions. It wasn't clear at the time how much additional
work this would be to make postfix work correctly (and they are a bit of
a 'special' thing in codegen anyway), so this patch adds some
functionality to sense this and special-cases it when generating the
statement info for capture.
Commit: 90ea49a9d17b01cc51d69bdd0c79b959955e605f
https://github.com/llvm/llvm-project/commit/90ea49a9d17b01cc51d69bdd0c79b959955e605f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[ConstantFolding] Generalize constant folding for vector_deinterleave2 to deinterleave3-8. (#168640)
Commit: 3f55f8b4e5512e5d50a077800a190afb3aa65ffc
https://github.com/llvm/llvm-project/commit/3f55f8b4e5512e5d50a077800a190afb3aa65ffc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
M clang/test/CIR/CodeGen/ctor-null-init.cpp
Log Message:
-----------
[CIR] Handle non-empty null base class initialization (#168646)
This implements null base class initialization for non-empty bases.
Commit: 308185e61abb5a06af1786902f1b3768b5d46be5
https://github.com/llvm/llvm-project/commit/308185e61abb5a06af1786902f1b3768b5d46be5
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/TableGen/CallingConvEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Use `IfGuardEmitter` in CallingConvEmitter (#168763)
Use `IfGuardEmitter` in CallingConvEmitter. Additionally refactor the
code a bit to extract duplicated code to emit the CC function prototype
into a helper function.
Commit: 9b7fd0099e79b0f5b824027cbae8a25356486ac9
https://github.com/llvm/llvm-project/commit/9b7fd0099e79b0f5b824027cbae8a25356486ac9
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/declare-construct.cpp
Log Message:
-----------
[OpenACC] Fix crash when checking an section in a 'link' clause (#168783)
I saw this while doing lowering, we were not properly looking into the
array sections for the variable. Presumably we didn't do a good job of
making sure we did this right when making this extension, and missed
this spot.
Commit: 19fe9b477b570fd395a161638c59e66b35d1a9ac
https://github.com/llvm/llvm-project/commit/19fe9b477b570fd395a161638c59e66b35d1a9ac
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
Log Message:
-----------
[HLSL][TableGen] Add `__hlsl_resource_t` to known built-in function types (#163465)
This change adds resource handle type `__hlsl_resource_t` to the list of types recognized in the Clang's built-in functions prototype string.
HLSL has built-in resource classes and some of them have many methods, such as
[Texture2D](https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/sm5-object-texture2d).
Most of these methods will be implemented by built-in functions that will take resource handle as an argument. This change enables us to move from generic `void(...)` prototype string for these methods and explicit argument checking in `SemaHLSL.cpp` to a prototype string with explicit argument types. Argument checking in `SemaHLSL.cpp` can be reduced to handle just the rules that cannot be expressed in the prototype string (for example verifying that the offset value in `__builtin_hlsl_buffer_update_counter` is `1` or `-1`).
In order to make this work, we now allow conversions from attributed resource handle type such as `__hlsl_resource_t [[hlsl::resource_class(UAV)]] [[hlsl::contained_type(float)]]` to a plain non-attributed `__hlsl_resource_t` type.
Commit: e99c83ff38b006f12b78704c8e9b9751bf100659
https://github.com/llvm/llvm-project/commit/e99c83ff38b006f12b78704c8e9b9751bf100659
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
Log Message:
-----------
[llvm][DebugInfo] Add support for _BitInt in DWARFTypePrinter (#168382)
As of recent, LLVM includes the bit-size as a `DW_AT_bit_size` (and as
part of `DW_AT_name`) of `_BitInt`s in DWARF. This allows us to mark
`_BitInt`s as "reconstitutable" when compiling with
`-gsimple-template-names`. However, before doing so we need to make sure
the `DWARFTypePrinter` can reconstruct template parameter values that
have `_BitInt` type. This patch adds support for printing
`DW_TAG_template_value_parameter`s that have `_BitInt` type. Since
`-gsimple-template-names` only omits template parameters that are `<=
64` bit wide, we don't support `_BitInt`s larger than 64 bits.
Commit: 3f6cbdea4fecf11ffa4fa29151c69f53c7a59bf7
https://github.com/llvm/llvm-project/commit/3f6cbdea4fecf11ffa4fa29151c69f53c7a59bf7
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-current-testcase.txt
M llvm/utils/lit/tests/Inputs/shtest-env-positive/env-no-subcommand.txt
M llvm/utils/lit/tests/shtest-env-positive.py
Log Message:
-----------
[lit] Add LIT_CURRENT_TESTCASE environment variable when running tests (#168762)
I'm not aware of any way for `%run` wrapper scripts like
`iosssim_run.py`
([ref](https://github.com/llvm/llvm-project/blob/d2c7c6064259320def7a74e111079725958697d4/compiler-rt/test/sanitizer_common/ios_commands/iossim_run.py#L4))
to know what testcase they are currently running. This can be useful if
these wrappers need to create a (potentially remote) temporary directory
for each test case.
This adds the `LIT_CURRENT_TESTCASE` environment variable to both the
internal shell and the external shell, containing the full name of the
current test being run.
Commit: 7e85b790b02a770a003dbb13a7476590d045f58e
https://github.com/llvm/llvm-project/commit/7e85b790b02a770a003dbb13a7476590d045f58e
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
[SystemZ] Fix linux s390x main can't bootstrap itself on SanitizerSpecialCaseList.cpp #168088 (#168779)
This test has long call chain in recursion. Search tree can be pruned
early by swapping CC test and recursive simplifyAssumingCCVal.
Fixes: https://github.com/llvm/llvm-project/issues/168088
Co-authored-by: anoopkg6 <anoopkg6 at github.com>
Commit: be955e5ac9a0b0c979221efb28b0f52aad7bd3d6
https://github.com/llvm/llvm-project/commit/be955e5ac9a0b0c979221efb28b0f52aad7bd3d6
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/declare-construct-ast.cpp
Log Message:
-----------
[OpenACC] Make sure 'link' gets the right node in the AST with ASE
Another miss when working through 'link', we didn't properly handle
giving the whole array-section expression or array index expression,
instead allowed it to only get the decl-ref-expr. This patch makes
sure we don't add the wrong thing.
Commit: db1e73ea6d9390c811ab7d41d9ceefb2620be668
https://github.com/llvm/llvm-project/commit/db1e73ea6d9390c811ab7d41d9ceefb2620be668
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/DebugInfo/CXX/simple-template-names.cpp
Log Message:
-----------
[clang][DebugInfo] Mark _BitInt's as reconstitutable when emitting -gsimple-template-names (#168383)
Depends on:
* https://github.com/llvm/llvm-project/pull/168382
As of recent, LLVM includes the bit-size as a `DW_AT_bit_size` (and as
part of `DW_AT_name`) of `_BitInt`s in DWARF. This allows us to mark
`_BitInt`s as "reconstitutable" when compiling with
`-gsimple-template-names`. We still only omit template parameters that
are `<= 64` bit wide. So support `_BitInt`s larger than 64 bits is not
part of this patch.
Commit: 88305251fe809ba384ea4ff4893bf671757504fb
https://github.com/llvm/llvm-project/commit/88305251fe809ba384ea4ff4893bf671757504fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
Log Message:
-----------
[ConstantFolding] Add constant folding for scalable vector interleave intrinsics. (#168668)
We can constant fold interleave of identical splat vectors to a larger
splat vector.
Commit: 2aa2290af51a033849878b30ee30aae5d11394f3
https://github.com/llvm/llvm-project/commit/2aa2290af51a033849878b30ee30aae5d11394f3
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.cpp
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_begin.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_end.h
A clang-tools-extra/test/clang-tidy/checkers/readability/duplicate-include-ignored-files.cpp
Log Message:
-----------
[clang-tidy] Add `IgnoredFilesList` option to `readability-duplicate-include` (#168196)
Closes [#166938](https://github.com/llvm/llvm-project/issues/166938)
Commit: 1278d47e9f9773972ff17deaf4d69db48dccdad8
https://github.com/llvm/llvm-project/commit/1278d47e9f9773972ff17deaf4d69db48dccdad8
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/builtin-isfpclass.c
Log Message:
-----------
[CIR] Upstream isfpclass op (#166037)
Ref commit in incubator: ee17ff67f3e567585db991cdad1159520c516bb4
There is a minor change in the assumption for emitting a direct callee.
In incubator, `bool hasAttributeNoBuiltin = false`
(`llvm-project/clang/lib/CIR/CodeGen/CIRGenExpr.cpp:1671`), while in
upstream, it's true, therefore, the call to finite(...) is not converted
to a builtin anymore.
Fixes #163892
Commit: 03f4d4d492b3f5e68645eac4e907f3f0fc7a4489
https://github.com/llvm/llvm-project/commit/03f4d4d492b3f5e68645eac4e907f3f0fc7a4489
Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
M clang/test/CIR/IR/func.cir
Log Message:
-----------
[CIR] Add CxxCTorAttr, CxxDTorAttr, CxxAssignAttr, CxxSpecialMemberAttr to cir::FuncOp (#167975)
This PR adds a special member attribute to `cir::FuncOp`. This attribute
is also present in the incubator repo. Additionally, I added a
"is_trivial" flag, to mark trivial members. I think that might be useful
when trying to replace calls to the copy constructor with memcpy for
example, but please let me know your thoughts on this. [Here in the
incubator
repo](https://github.com/llvm/clangir/blob/823e943d1b9aaba0fc46f880c5a6ac8c29fc761d/clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp#L1537-L1550)
this function is called `LowerTrivialConstructorCall`, but I don't see a
check that ensures the constructor is actually trivial.
Commit: 82380f33de0ef22e645cf53ba4bf859e38df6623
https://github.com/llvm/llvm-project/commit/82380f33de0ef22e645cf53ba4bf859e38df6623
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
Log Message:
-----------
[AMDGPU] Prioritize allocation of low 256 VGPR classes (#167978)
If we have 1024 VGPRs available we need to give priority to the
allocation of these registers where operands can only use low 256.
That is noteably scale operands of V_WMMA_SCALE instructions.
Otherwise large tuples will be allocated first and take all low
registers, so we would have to spill to get a room for these
scale registers.
Allocation priority itself does not eliminate spilling completely
in large kernels, although helps to some degree. Increasing spill
weight of a restricted class on top of it helps.
Commit: 80f862b6923f08b365d30c8480783aa91005e07a
https://github.com/llvm/llvm-project/commit/80f862b6923f08b365d30c8480783aa91005e07a
Author: Haocong Lu <haoconglu at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
A clang/test/CIR/CodeGen/X86/bmi-builtins.c
A clang/test/CIR/CodeGen/X86/lzcnt-builtins.c
Log Message:
-----------
[CIR] Upstream CIR codegen for `lzcnt` and `tzcnt` x86 builtins (#168479)
Support CIR codegen for x86 builtins `__builtin_ia32_lzcnt` and
`__builtin_ia32_tzcnt`.
Commit: 835951325ec7aaf3336b19b53c9978d986e260df
https://github.com/llvm/llvm-project/commit/835951325ec7aaf3336b19b53c9978d986e260df
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
Log Message:
-----------
[clang][deps] Enable calling `DepScanFile::getBuffer()` repeatedly (#168789)
This PR makes it possible to call `getBuffer()` on `DepScanFile` (a
`llvm::vfs::File`) repeatedly. Previously, this function would return a
moved-from `unique_ptr`. This doesn't fix any existing bugs, I
discovered this while experimenting with the VFSs in the scanner. Note
that the returned instances of `llvm::MemoryBuffer` are non-owning and
share the underlying buffer storage.
Commit: ff39d59000df23a88ee25e180ecc1edae42998e7
https://github.com/llvm/llvm-project/commit/ff39d59000df23a88ee25e180ecc1edae42998e7
Author: Paddy McDonald <padriff at hotmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
Disable test under GCC (#168792)
New test stack_container_dynamic_lib.cpp has errors under gcc.
Require clang while better fix is investigated
Commit: ef0cd1dae3a182fd721d18809ef38736cfd363c9
https://github.com/llvm/llvm-project/commit/ef0cd1dae3a182fd721d18809ef38736cfd363c9
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
Log Message:
-----------
[CIR][NFC] Fix warnings in release builds (#168791)
This fixes several warnings that occur in CIR release builds.
Commit: 7de59f0b247a481d81a3f2a4ce9f322c5a5c68ef
https://github.com/llvm/llvm-project/commit/7de59f0b247a481d81a3f2a4ce9f322c5a5c68ef
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_1d.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
Log Message:
-----------
[MLIR][Conversion] XeGPU to XeVM: Use adaptor for getting base address from memref. (#168610)
adaptor already lowers memref to base address.
Conversion patterns should use it instead of generating code to get base
address from memref.
Commit: af73aeaa19929127655d544b48a5145105e9e28c
https://github.com/llvm/llvm-project/commit/af73aeaa19929127655d544b48a5145105e9e28c
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[MLIR][Vector] Add unroll pattern for vector.shape_cast (#167738)
This PR adds pattern for unrolling shape_cast given a targetShape. This
PR is a follow up of #164010 which was very general and was using
inserts and extracts on each element (which is also
LowerVectorShapeCast.cpp is doing).
After doing some more research on use cases, we (me and @Jianhui-Li )
realized that the previous version in #164010 is unnecessarily generic
and doesn't fit our performance needs.
Our use case requires that targetShape is contiguous in both source and
result vector.
This pattern only applies when contiguous slices can be extracted from
the source vector and inserted into the result vector such that each
slice remains in vector form with targetShape (and not decompose to
scalars). In these cases, the unrolling proceeds as:
vector.extract_strided_slice -> vector.shape_cast (on the slice
unrolled) -> vector.insert_strided_slice
Commit: 94e4ee38aa3b7085409b72702437822b5cec9e4e
https://github.com/llvm/llvm-project/commit/94e4ee38aa3b7085409b72702437822b5cec9e4e
Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
Log Message:
-----------
[AMDGPU] Fixed crash in getLastMIForRegion when the region is empty. (#168653)
PreRARematStage builds region live-outs if GCN trackers are enabled. If
rematerialization leads to empty regions, this can cause a crash because
of dereference of an invalid iterator in getLastMIForRegion. The fix is
to skip calling getLastMIForRegion for empty regions.
This patch fixes another bug in the same code region. getLastMIForRegion
calls skipDebugInstructionsBackward which may immediately return the
RegionEnd if it is not the begin instruction and it is a non-debug
instruction. That would imply considering an instruction that is outside
the relevant region. The fix is to always pass the previous of RegionEnd
to skipDebugInstructionsBackward.
This bug was found while using GCN trackers on the existing LIT test
machine-scheduler-sink-trivial-remats.mir. Here's the assertion failure.
llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:168:
llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::reference
llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::operator*() const
[with OptionsT = llvm::ilist_detail::node_options<llvm::MachineInstr,
true, true, void, false, void>; bool IsReverse = false; bool IsConst =
false; llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::reference =
llvm::MachineInstr&]: Assertion `!NodePtr->isKnownSentinel()' failed.
Commit: b1c4b55118131cdf3d6d47ba31578b2e0cd78ec7
https://github.com/llvm/llvm-project/commit/b1c4b55118131cdf3d6d47ba31578b2e0cd78ec7
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
Log Message:
-----------
RenameIndependentSubregs: try to only implicit def used subregs (#167486)
Attempt to only define used subregisters when creating IMPLICIT_DEF fix
ups for live interval subranges. This avoids the appearance at the MIR
level of entire (wide) registers becoming live rather than relying only
on transient LiveIntervals dead definitions for unused subregisters.
Commit: 4e275f727439af9589ee54bc6ac2e95fac9f63ae
https://github.com/llvm/llvm-project/commit/4e275f727439af9589ee54bc6ac2e95fac9f63ae
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/X86.cpp
A clang/test/CodeGen/arm64ec-varargs.c
Log Message:
-----------
[Arm64EC][clang] Implement varargs support in clang. (#152411)
The clang side of the calling convention code for arm64 vs. arm64ec is
close enough that this isn't really noticeable in most cases, but the
rule for choosing whether to pass a struct directly or indirectly is
significantly different.
(Adapted from my old patch https://reviews.llvm.org/D125419 .)
Fixes #89615.
Commit: 2c3aa92089695713a1fd4264e80941fd9679150b
https://github.com/llvm/llvm-project/commit/2c3aa92089695713a1fd4264e80941fd9679150b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
A llvm/test/Transforms/SLPVectorizer/X86/matching-insert-point-for-nodes.ll
A llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
Log Message:
-----------
[SLP]Fix insertion point for setting for the nodes
The problem with the many def-use chain problems in SLP vectorizer are
related to the fact that some nodes reuse the same instruction as
insertion point. Insertion point is not the instruction, but the place
between instructions. To set it correctly, better to generate pseudo
instruction immediately after the last instruction, and use it as
insertion point. It resolves the issues in most cases.
Fixes #168512 #168576
Commit: def8ecbda9f146d5ba5bbc8c92f7d5ccd242ad2b
https://github.com/llvm/llvm-project/commit/def8ecbda9f146d5ba5bbc8c92f7d5ccd242ad2b
Author: Sayan Saha <sayans at mathworks.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
Log Message:
-----------
[tosa] : Relax dynamic dimension checks for batch for conv decompositions (#168764)
This PR relaxes the validation checks to allow input/output data to have
dynamic batch dimensions.
Commit: f9696949c3295c495e7337f4b1da9639610a15aa
https://github.com/llvm/llvm-project/commit/f9696949c3295c495e7337f4b1da9639610a15aa
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/TargetID.h
M clang/lib/Basic/TargetID.cpp
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/linker-wrapper-hip-no-rdc.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[ClangLinkerWrapper] Refactor target ID sanitization for Windows file… (#168744)
… names
Fix non-RDC mode HIP compilation for the new driver on Windows due to
invalid temporary file names when offload arch is a target ID containing
':', which is invalid in file names on Windows.
Refactor the existing handling of ':' in file names on Windows from
clang driver into a shared function sanitizeTargetIDInFileName in
clang/Basic/TargetID.h. This function replaces ':' with '@' on Windows
only, preserving the original behavior.
Update both clang/lib/Driver/Driver.cpp and
clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp to use this
shared function, ensuring consistent handling across both tools.
Commit: 9e9fe08b16ea2c4d9867fb4974edf2a3776d6ece
https://github.com/llvm/llvm-project/commit/9e9fe08b16ea2c4d9867fb4974edf2a3776d6ece
Author: Gang Chen <gangc at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vect-ptr-ptr-size-mismatch.ll
A llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/subchain-interleaved.ll
A llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-redund-loads.ll
Log Message:
-----------
Re-land [Transform][LoadStoreVectorizer] allow redundant in Chain (#168135)
This is the fixed version of
https://github.com/llvm/llvm-project/pull/163019
Commit: beac880da5d265510806a2db004370808b974f44
https://github.com/llvm/llvm-project/commit/beac880da5d265510806a2db004370808b974f44
Author: Paddy McDonald <padriff at hotmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
Better fix for the stack_container_dynamic_lib test (#168798)
Add the missing %libdl to the link command
Commit: 79fffed60a64ec548250d4d9bab236745c4987e4
https://github.com/llvm/llvm-project/commit/79fffed60a64ec548250d4d9bab236745c4987e4
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/DWP/DWP.cpp
A llvm/test/tools/llvm-dwp/X86/incompatible_dwarf_version.test
Log Message:
-----------
[llvm-dwp] Give more information when incompatible version found (#168511)
Provide more information when detecting a DWARF version mismatch in .dwo
files to help locate the issue and align with other similar errors.
Commit: fda20d99ae203d3c967072702f489ee993d1ffb9
https://github.com/llvm/llvm-project/commit/fda20d99ae203d3c967072702f489ee993d1ffb9
Author: Pranav Kant <prka at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix #165009 (#168804)
Commit: 3f151a3fa6ccb00523d8e0e36fa8d9046d5a936f
https://github.com/llvm/llvm-project/commit/3f151a3fa6ccb00523d8e0e36fa8d9046d5a936f
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.deprecated_in_cxx17.verify.cpp
Log Message:
-----------
[libc++][memory] Applied `[[nodiscard]]` to smart pointers (#168483)
Applied `[[nodiscard]]` where relevant to smart pointers and related
functions.
- [x] - `std::unique_ptr`
- [x] - `std::shared_ptr`
- [x] - `std::weak_ptr`
See guidelines:
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
- `[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue. For example a locking
constructor in unique_lock.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 47b756a5a6c91e2a73f3965a1cbabb1801f2cb0c
https://github.com/llvm/llvm-project/commit/47b756a5a6c91e2a73f3965a1cbabb1801f2cb0c
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV] Only reduce VLs of instructions with demanded VLs (#168693)
In RISCVVLOptimizer we first compute all the demanded VLs, then we walk
backwards through the function and try to reduce any VLs.
We don't actually need to walk backwards anymore since after #124530 the
order in which we modify the instructions doesn't matter.
This patch changes it to just iterate over the instructions with a
demanded VL computed, which means we don't iterate over scalar
instructions etc.
This also fixes #168665, where we triggered an assert on instructions
with a dead $vxsat implicit-def:
dead %x:vr = PseudoVSADDU_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */,
0 /* tu, mu */, implicit-def dead $vxsat
Because $vxsat is a reserved register, DeadMachineInstructionElim won't
remove it and the instruction makes it to RISCVVLOptimizer.
And because the def of %x is dead, we don't reach this instruction in
the dataflow analysis. This instruction returns true for isCandidate, so
we would try to lookup its demanded VL which doesn't exist and assert.
But with this patch we don't try to reduce instructions that aren't in
DemandedVLs, which fixes the crash.
Commit: 7198279707cb77b7a81b54184a6293a49af16f7c
https://github.com/llvm/llvm-project/commit/7198279707cb77b7a81b54184a6293a49af16f7c
Author: marius doerner <marius.doerner1 at icloud.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/switch.cpp
Log Message:
-----------
[clang][bytecode] Implement case ranges (#168418)
Fixes #165969
Implement GNU case ranges for constexpr bytecode interpreter.
Commit: 13ed14f47eb3995942b2e4bba4ab37851b2751f9
https://github.com/llvm/llvm-project/commit/13ed14f47eb3995942b2e4bba4ab37851b2751f9
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
Log Message:
-----------
AMDGPU: Autogenerate checks in a test (#168815)
Commit: b39a9db3abc7abfa033a728ef29b5e5d3beb1cb5
https://github.com/llvm/llvm-project/commit/b39a9db3abc7abfa033a728ef29b5e5d3beb1cb5
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/modules-current-modulemap-file-dep.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-header-sharing.m
M clang/test/ClangScanDeps/modules-implementation-module-map.c
M clang/test/ClangScanDeps/modules-implementation-private.m
Log Message:
-----------
[clang][deps] Add module map describing compiled module to file dependencies. (#160226)
When we add the module map describing the compiled module to the command
line, add it to the file dependencies as well.
Discovered while working on reproducers where a command line input was
missing in the captured files as it wasn't considered a dependency.
Commit: 765208b3131ce26dc5845babe86457e204f97c02
https://github.com/llvm/llvm-project/commit/765208b3131ce26dc5845babe86457e204f97c02
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[mlir] Make remove-dead-values remove block and successorOperands before delete ops (#166766)
Reland https://github.com/llvm/llvm-project/pull/165725, fix the Failed
test by removing successor operands before delete operations. Following
the deletion of cond.branch, its successor operands will subsequently be
removed.
Commit: 7f0dbf049ab88e43b28db1999d8b2d49f9bf793b
https://github.com/llvm/llvm-project/commit/7f0dbf049ab88e43b28db1999d8b2d49f9bf793b
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/test/tools/llvm-dwp/X86/incompatible_dwarf_version.test
Log Message:
-----------
[NFC] Reduce the size of test input in incompatible_dwarf_version.test (#168825)
Use smaller test inputs in in incompatible_dwarf_version.test to reduce
disk usage and execution time.
Commit: db20a7f2bcec85490e6ff5c998a948ccbe88ae46
https://github.com/llvm/llvm-project/commit/db20a7f2bcec85490e6ff5c998a948ccbe88ae46
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
DAG: Fix constructing a temporary TargetTransformInfo instance (#168480)
Commit: 86083447788f4d87eb61a1840a3f7374c24e46e0
https://github.com/llvm/llvm-project/commit/86083447788f4d87eb61a1840a3f7374c24e46e0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
M llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
Log Message:
-----------
[CFIInserter] Turn a reachable llvm_unreachable into a report_fatal_error. (#168777)
This prevents it from being optimized out in non-asserts builds.
Update X86 test to remove REQUIRES: asserts and check for LLVM ERROR.
Add FileCheck to RISC-V test and remove UNSUPPORTED.
This is the more complete fix for #168772 and #168525.
Commit: fde2aadb80020fe4a0fa887be5b6ca9d6df9564d
https://github.com/llvm/llvm-project/commit/fde2aadb80020fe4a0fa887be5b6ca9d6df9564d
Author: zhangtianhao6 <zhangtianhao6 at huawei.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/Support/CodeGen.h
Log Message:
-----------
[CodeGen] update code generation optimization level(nfc) (#168190)
Commit: 3e5fafdc223a937f371d22dc05d4ab8398b13f3f
https://github.com/llvm/llvm-project/commit/3e5fafdc223a937f371d22dc05d4ab8398b13f3f
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
Log Message:
-----------
[RISCV][llvm] Select splat_vector(constant) with PLI (#168204)
Default DAG combiner combine BUILD_VECTOR with same elements to
SPLAT_VECTOR, we can just map constant splat to PLI if possible.
Commit: dbf45253511616ee90bc39da8746caea4a9d3f10
https://github.com/llvm/llvm-project/commit/dbf45253511616ee90bc39da8746caea4a9d3f10
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
Log Message:
-----------
[AMDGPU] Add wave reduce intrinsics for float types - 1 (#161814)
Supported Ops: `fmin`, `fmax`
Commit: dcab4cb49bfb0aa17df3d3fabe582696100e0d35
https://github.com/llvm/llvm-project/commit/dcab4cb49bfb0aa17df3d3fabe582696100e0d35
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
Log Message:
-----------
[AMDGPU] Add wave reduce intrinsics for float types - 2 (#161815)
Supported Ops: `fadd`, `fsub`
Commit: e44646b79594006c9dc7deda6a9ae447243bd9e3
https://github.com/llvm/llvm-project/commit/e44646b79594006c9dc7deda6a9ae447243bd9e3
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/WebAssembly/simd-vecreduce-bool.ll
Log Message:
-----------
[WebAssembly] Lower ANY_EXTEND_VECTOR_INREG (#167529)
Treat it in the same manner of zero_extend_vector_inreg and generate an
extend_low_u if possible. This is to try an prevent expensive shuffles
from being generated instead. computeKnownBitsForTargetNode has also
been updated to specify known zeros on extend_low_u.
Commit: 07a31adf287ca4d338232c6d79fe108a191007b4
https://github.com/llvm/llvm-project/commit/07a31adf287ca4d338232c6d79fe108a191007b4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
M llvm/test/CodeGen/X86/build-vector-256.ll
M llvm/test/CodeGen/X86/chain_order.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
Log Message:
-----------
[X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (#168706)
See if we can create a vector load from the src elements in reverse and
then shuffle these back into place.
SLP will (usually) catch this in the middle-end, but there are a few
BUILD_VECTOR scalarizations etc. that appear during DAG legalization.
I did start looking at a more general permute fold, but I haven't found
any good test examples for this yet - happy to take another look if
somebody has examples.
Commit: bdf598f8ddce4dbbd103b0a16c2253b7d71081fa
https://github.com/llvm/llvm-project/commit/bdf598f8ddce4dbbd103b0a16c2253b7d71081fa
Author: Jim Lin <jim at andestech.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
Log Message:
-----------
CodeGen: Add missing subtarget to TargetLoweringBase constructor for ARC, CSKY and M68K (#168811)
Those were missing in https://github.com/llvm/llvm-project/pull/168620.
Commit: dc343d2f05ddffadae2b98760ff139622baa25f6
https://github.com/llvm/llvm-project/commit/dc343d2f05ddffadae2b98760ff139622baa25f6
Author: Kiran Kumar T P <50909805+kiranktp at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/test/Lower/Intrinsics/command_argument_count.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/OpenMP/Todo/omp-clause-indirect.f90
M flang/test/Lower/OpenMP/Todo/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-simd.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/cray-pointers02.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Semantics/indirect01.f90
M flang/test/Semantics/indirect02.f90
Log Message:
-----------
[NFC][flang] Replace use of flang -fc1 with %flang_fc1 in few test case (#168830)
Replace use of flang -fc1 with %flang_fc1 in few test case
Commit: 131cf7d5b2aa29b8018ac6422515ad2f522008c9
https://github.com/llvm/llvm-project/commit/131cf7d5b2aa29b8018ac6422515ad2f522008c9
Author: Aleksandr Nogikh <nogikh at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGenCXX/alloc-token.cpp
Log Message:
-----------
[AllocToken] Enable alloc token instrumentation for size-returning functions (#168840)
Consider a newly added "malloc_span" attribute in the allocation token
instrumentation to ensure that allocation functions with the
"malloc_span" attribute are processed similarly to other memory
allocation functions.
Update the tests to demonstrate applicability to __size_returning_new.
Commit: 54f69caf1f3e92ee147bac7e508ba65aff5ed1d5
https://github.com/llvm/llvm-project/commit/54f69caf1f3e92ee147bac7e508ba65aff5ed1d5
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/include/mlir/Pass/Pass.h
M mlir/lib/Pass/Pass.cpp
M mlir/test/Dialect/Transform/test-pass-application.mlir
A mlir/test/Pass/invalid-unsupported-operation.mlir
M mlir/test/Pass/pipeline-invalid.mlir
Log Message:
-----------
[mlir][Pass] Fix crash when applying a pass to an optional interface (#168499)
Interfaces can be optional: whether an op implements an interface or not
can depend on the state of the operation.
```
// An optional code block for adding additional "classof" logic. This can
// be used to better enable "optional" interfaces, where an entity only
// implements the interface if some dynamic characteristic holds.
// `$_attr`/`$_op`/`$_type` may be used to refer to an instance of the
// interface instance being checked.
code extraClassOf = "";
```
The current `Pass::canScheduleOn(RegisteredOperationName)` is
insufficient. This commit adds an additional overload to inspect
`Operation *`.
This commit fixes a crash when scheduling an `InterfacePass` for an
optional interface on an operation that does not actually implement the
interface.
Commit: 74cebce264bbfa335a411f08b647c05ce5a7eba3
https://github.com/llvm/llvm-project/commit/74cebce264bbfa335a411f08b647c05ce5a7eba3
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
Log Message:
-----------
Revert "[AMDGPU] Add wave reduce intrinsics for float types - 2 (#161… (#168845)
…815)"
This reverts commit dcab4cb49bfb0aa17df3d3fabe582696100e0d35.
Commit: 2cf550a040414aee51f7958812573723380b7a4b
https://github.com/llvm/llvm-project/commit/2cf550a040414aee51f7958812573723380b7a4b
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
A llvm/test/DebugInfo/X86/no-prologue-end-after-line0-calls.mir
Log Message:
-----------
[DebugInfo] Force early line-zero calls to have meaningful locations (#156850)
In functions that have been seriously deformed during optimisation,
there can be call instructions with line-zero immediately after frame
setup (see C reproducer in the test added). Our previous algorithms for
prologue_end ignored these, meaning someone entering a function at
prologue_end would break-in after a function call had completed. Prefer
instead to place prologue_end and the function scope-line on the line
zero call: this isn't false (it's the first meaningful instruction of the
function) and is approximately true. Given a less than ideal function,
this is an OK solution.
Commit: 3396b4654b119a943f04f24cc582627597d0ba28
https://github.com/llvm/llvm-project/commit/3396b4654b119a943f04f24cc582627597d0ba28
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
Log Message:
-----------
[LV] Allow partial reductions with an extended bin op (#165536)
A pattern of the form reduce.add(ext(mul)) is valid for a partial
reduction as long as the mul and its operands fulfill the requirements
of a normal partial reduction. The mul's extend operands will be
optimised to the wider extend, and we already have oneUse checks in
place to make sure the mul and operands can be modified safely.
1. -> https://github.com/llvm/llvm-project/pull/165536
2. https://github.com/llvm/llvm-project/pull/165543
Commit: 95d788c76151222b7a28bdea9bf7eadc4a89fd02
https://github.com/llvm/llvm-project/commit/95d788c76151222b7a28bdea9bf7eadc4a89fd02
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/include/mlir/Pass/Pass.h
M mlir/lib/Pass/Pass.cpp
M mlir/test/Dialect/Transform/test-pass-application.mlir
R mlir/test/Pass/invalid-unsupported-operation.mlir
M mlir/test/Pass/pipeline-invalid.mlir
Log Message:
-----------
Revert "[mlir][Pass] Fix crash when applying a pass to an optional interface" (#168847)
Reverts llvm/llvm-project#168499
Commit: 53dfdf7ffd31b47e0b67d541b8d3aabd3948ddae
https://github.com/llvm/llvm-project/commit/53dfdf7ffd31b47e0b67d541b8d3aabd3948ddae
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
Log Message:
-----------
[X86] BuiltinsX86.td - attempt to pack the builtins for each SSE level close together. NFC. (#168844)
Avoid some repeated feature blocks - we should have a single place in
each file that we can find most builtins for a particular ISA level.
Also, avoid some of the 80col wrapping that just makes it harder to find
anything at all.
There's a lot more we can do - but I don't want to completely refactor
this while we still have so much work to do for #30794
Commit: 0a88e9622891aa111d07928d144e042174a9d570
https://github.com/llvm/llvm-project/commit/0a88e9622891aa111d07928d144e042174a9d570
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
Log Message:
-----------
[MLIR][LLVM] Extend DIScopeForLLVMFuncOp to handle cross-file operatio… (#167844)
The current `DIScopeForLLVMFuncOp` pass handles debug information for
inlined code by processing `CallSiteLoc` attributes. However, some
compilation scenarios compose code from multiple source files directly
into a single function without generating `CallSiteLoc`.
**Scenario:**
```python
# a.py
def kernel_a(tensor):
print("a: {}", tensor) # a.py:3
jit_func_b(tensor) # Calls b.py code
# b.py
def func_b(tensor):
print("b: {}", tensor) # b.py:7
```
The scenario executes Python at compile-time and directly inserts
operations from `b.py` into the kernel function, resulting in MLIR like:
```mlir
@kernel_a(...) {
print("a: {}", %arg0) loc(#loc_a) // a.py:3
print("b: {}", %arg0) loc(#loc_b) // b.py:7 <- FileLineColLoc, not CallSiteLoc
} loc(#loc_kernel) // a.py:1
#loc1 = loc("a.py":3:.)
#loc2 = loc("b.py":7:.)
#loc_a = loc("print"(#loc1))
#loc_b = loc("print"(#loc2))
```
```llvm
!6 = !DIFile(filename: "a.py", directory: "...")
!9 = distinct !DISubprogram(name: "...", linkageName: "...", scope: !6, file: !6, line: 13, ...)
!10 = !DILocation(line: 7, column: ., scope: !9) // Points to kernel's DISubprogram, not correct
```
Commit: 02db2de905136f291d0ed23bb51c72e7159016a9
https://github.com/llvm/llvm-project/commit/02db2de905136f291d0ed23bb51c72e7159016a9
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/vscale-and-sve-cnt-demandedbits.ll
Log Message:
-----------
[AArch64][SVE] Implement demanded bits for @llvm.aarch64.sve.cntp (#168714)
This allows DemandedBits to see that the SVE CNTP intrinsic will only
ever produce small positive integers. The maximum value you could get
here is 256, which is CNTP on a nxv16i1 on a machine with a 2048bit
vector size (the maximum for SVE).
Using this various redundant operations (zexts, sexts, ands, ors, etc)
can be eliminated.
Commit: a2b4c0fbe03896ee5a9218e1ec6e4184de6ed4be
https://github.com/llvm/llvm-project/commit/a2b4c0fbe03896ee5a9218e1ec6e4184de6ed4be
Author: sskzakaria <ssskzakaria at proton.me>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/lib/Headers/avx512vldqintrin.h
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
Log Message:
-----------
[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX512 mask predicate intrinsics to be used in constexpr (#165054)
Enables constexpr evaluation for the following AVX512 Instrinsics:
```
_mm_movepi8_mask _mm256_movepi8_mask _mm512_movepi8_mask
_mm_movepi16_mask _mm256_movepi16_mask _mm512_movepi16_mask
_mm_movepi32_mask _mm256_movepi32_mask _mm512_movepi32_mask
_mm_movepi64_mask _mm256_movepi64_mask _mm512_movepi64_mask
```
Part of #162072
Commit: c6a79a55ff4cd79a6ebeb53109785abc5a010d06
https://github.com/llvm/llvm-project/commit/c6a79a55ff4cd79a6ebeb53109785abc5a010d06
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-identifier-naming in LLVMToLLVMIRTranslation.cpp (NFC)
Commit: 9e86c0d5daecf3a3095eb481764c4a5073cfcf2c
https://github.com/llvm/llvm-project/commit/9e86c0d5daecf3a3095eb481764c4a5073cfcf2c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-container-size-empty in LinalgOps.cpp (NFC)
Commit: 3da82af83f0fa95860dc7cb661a7c64616a9425c
https://github.com/llvm/llvm-project/commit/3da82af83f0fa95860dc7cb661a7c64616a9425c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for bugprone-argument-comment in SparseBufferRewriting.cpp (NFC)
Commit: 21c4c1502e3383988ba77eac75b13da7b9426957
https://github.com/llvm/llvm-project/commit/21c4c1502e3383988ba77eac75b13da7b9426957
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Only use unpredicated bfloat instructions when all lanes are in use. (#168387)
While SVE support for exception safe floating point code generation is
bare bones we try to ensure inactive lanes remiain inert. I mistakenly
broke this rule when adding support for SVE-B16B16 by lowering some
bfloat operations of unpacked vectors to unpredicated instructions.
Commit: 76f1949cfa0d8fed73c153af83a7054073686506
https://github.com/llvm/llvm-project/commit/76f1949cfa0d8fed73c153af83a7054073686506
Author: Alexander Johnston <alexander.javen.johnston at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRVVK.td
M clang/lib/CodeGen/TargetBuiltins/SPIR.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenHLSL/builtins/fwidth.hlsl
A clang/test/CodeGenSPIRV/Builtins/fwidth.c
A clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/DirectX/ddx_coarse-errors.ll
M llvm/test/CodeGen/DirectX/ddy_coarse-errors.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fwidth.ll
A llvm/test/CodeGen/SPIRV/opencl/fwidth-error.ll
Log Message:
-----------
[HLSL] Implement the `fwidth` intrinsic for DXIL and SPIR-V target (#161378)
Adds the fwidth intrinsic for HLSL.
The DXIL path only requires modification to the hlsl headers.
The SPIRV path implements the OpFwidth builtin in Clang and instruction
selection for the OpFwidth instruction in LLVM.
Also adds shader stage tests to the ddx_coarse and ddy_coarse
instructions used by fwidth.
Closes #99120
---------
Co-authored-by: Alexander Johnston <alexander.johnston at amd.com>
Commit: cfda27d0fbda65de4a7f482d46231933c9f2c678
https://github.com/llvm/llvm-project/commit/cfda27d0fbda65de4a7f482d46231933c9f2c678
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/test/Dialect/Vector/vector-scan-transforms.mlir
Log Message:
-----------
[mlir][Vector] Add support for scalable vectors to `ScanToArithOps` (#123117)
Note, scalable reductions dims are left as a TODO.
Commit: 150d9b7a779f405021b5a08718394772360a9ef8
https://github.com/llvm/llvm-project/commit/150d9b7a779f405021b5a08718394772360a9ef8
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[clang-tidy][NFC] Add clang-tidy formatting commit to `.git-blame-ignore-revs` (#167126)
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: aeba7a8adef9a8ea624aa5be3b95a8a9fb5a17dd
https://github.com/llvm/llvm-project/commit/aeba7a8adef9a8ea624aa5be3b95a8a9fb5a17dd
Author: GrumpyPigSkin <130710602+GrumpyPigSkin at users.noreply.github.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
A clang/test/Sema/warn-enum-compare-typo.c
Log Message:
-----------
[clang][diagnostics] added warning for possible enum compare typo (#168445)
Added diagnosis and fixit comment for possible accidental comparison
operator in an enum.
Closes: #168146
Commit: 4544ff68dc53ad427cfdbc9017d7328f09318484
https://github.com/llvm/llvm-project/commit/4544ff68dc53ad427cfdbc9017d7328f09318484
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[OpenMP][AIX] Not to create symbolic links to libomp.so in install step (NFC) (#168585)
Commit bb563b1 handles the links in the build directory but
misses the case in the install step. This patch is to link only
the libomp.a on AIX.
Commit: e0850825cce17ebab14df41afa6fe19582a65de3
https://github.com/llvm/llvm-project/commit/e0850825cce17ebab14df41afa6fe19582a65de3
Author: Simone Pellegrini <simone.pellegrini at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/test/Dialect/MemRef/transform-ops.mlir
Log Message:
-----------
[mlir][memref] Generalize dead store detection to all view-like ops (#168507)
The dead alloc elimination pass previously considered only subviews when
checking for dead stores. This change generalizes the logic to support
all view-like operations, ensuring broader coverage.
Commit: 4bb4ad477d80f66a267311afe9b656330caf3893
https://github.com/llvm/llvm-project/commit/4bb4ad477d80f66a267311afe9b656330caf3893
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
Log Message:
-----------
[AArch64][PAC] Use enum to describe LR signing condition (NFC) (#168548)
Express the condition of signing the return address in a function using
an `enum class` instead of a pair of `bool`s. Define `enum class
SignReturnAddress` with the values corresponding to the three possible
modes that can be requested via "sign-return-address" function
attribute.
Previously, there were two overloads of `shouldSignReturnAddress`
accepting either `const MachineFunction &` or `bool` argument. Due to
pointer-to-bool conversion, when `shouldSignReturnAddress` was
incorrectly called with `const MachineFunction *` argument, the latter
overload was used instead of reporting a compile-time error.
Commit: 5d0bfd1bf8ac6b1ceb37c7f30058d0f62e636036
https://github.com/llvm/llvm-project/commit/5d0bfd1bf8ac6b1ceb37c7f30058d0f62e636036
Author: Shashi Shankar <shashishankar1687 at gmail.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
Log Message:
-----------
[MLIR][SCFToGPU] Guard operands before AffineApplyOp::create to avoid crash (#167959)
This fixes a crash in SCF→GPU when building the per‑dim index for mapped
scf.parallel.
**Change**:
- Map step/lb through cloningMap, then run ensureLaunchIndependent.
- If either is still unavailable at launch scope, emit a match‑failure;
otherwise build the affine.apply.
**Why this is correct:**
- Matches how the pass already handles launch bounds; avoids creating an
op with invalid operands and replaces a segfault with a clear
diagnostic.
**Tests**:
- Added two small regressions that lower to gpu.launch and exercise the
affine.apply path.
Fixes : #167654
Signed-off-by: Shashi Shankar <shashishankar1687 at gmail.com>
Commit: 0e8222b84b60c022b2cee308f79a185a943ff514
https://github.com/llvm/llvm-project/commit/0e8222b84b60c022b2cee308f79a185a943ff514
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/test/Fir/declare-codegen.fir
A flang/test/Integration/debug-module-equivalence.f90
M flang/test/Transforms/debug-common-block.fir
Log Message:
-----------
[flang][debug] Make common blocks data extraction more robust. (#168752)
Our current implementation for extracting information about common block
required traversal of FIR which was not ideal but previously there was
no other way to obtain that information. The `[hl]fir.declare` was
extended in commit https://github.com/llvm/llvm-project/pull/155325 to
include storage and storage_offset. This commit adds these operands in
`fircg.ext_declare` and then use them in `AddDebugInfoPass` to create
debug data for common blocks.
Commit: a9a14d64d20bfb28abdd7a63cac459b5f6b5ee91
https://github.com/llvm/llvm-project/commit/a9a14d64d20bfb28abdd7a63cac459b5f6b5ee91
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang-rt/lib/runtime/type-code.cpp
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/TypeCode.cpp
Log Message:
-----------
[flang-rt] Fix TypeCategory for quad-precision COMPLEX (#168090)
Modify the TypeCategory for quad-precision COMPLEX to
CFI_type_float128_Complex so it matches the TypeCode returned
by SELECT TYPE lowering.
Fixes #134565
Commit: 364fe55c42aaac63b2a28e54fa4e31cc6efcf4a8
https://github.com/llvm/llvm-project/commit/364fe55c42aaac63b2a28e54fa4e31cc6efcf4a8
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/issue80884.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-nopass.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
A flang/test/Lower/pointer-disassociate-character.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
Log Message:
-----------
[flang] simplify pointer assignments (#168732)
Pointer assignment lowering was done in different ways depending on
contexts and types, sometimes still using runtime calls when this is not
needed and the complexity of doing this inline is very limited (the
pointer and target descriptors were already prepared inline, the runtime
is just doing the descriptor assignment and ensuring the pointer
descriptor keep its pointer flag).
Slightly extent the inline version that was used for Forall and use it
for all cases.
When lowering without HLFIR is removed, this will allow removing more
code.
Commit: a74bfc06e83c30bc48e05caa2b27b012d57c5d36
https://github.com/llvm/llvm-project/commit/a74bfc06e83c30bc48e05caa2b27b012d57c5d36
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix select folder when operands are broadcast (#165481)
This commit addresses a crash in the dialects folder. The currently
folder assumes no broadcasting of the input operand happens and
therefore the folder can complain that the returned value was not the
same
shape as the result.
For now, this commit ensures no folding happens when broadcasting is
involved. In the future, folding with a broadcast could likely be
supported by inserting a `tosa.tile` operation before returning the
operand. This type of transformation is likely better suited for a
canonicalization pass. This commit only aims to avoid the crash.
Commit: aa3f930931e65b02bacac0c7dfa52a181a0fd5bb
https://github.com/llvm/llvm-project/commit/aa3f930931e65b02bacac0c7dfa52a181a0fd5bb
Author: lntue <lntue at google.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/atanf.h
A libc/src/__support/math/atanf_float.h
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/atanf_float_test.cpp
Log Message:
-----------
[libc][math] Add float-only implementation for atanf. (#167004)
Algorithm:
```
1) atan(x) = sign(x) * atan(|x|)
2) If |x| > 1 + 1/32, atan(|x|) = pi/2 - atan(1/|x|)
3) For 1/16 < |x| < 1 + 1/32, we find k such that: | |x| - k/16 | <= 1/32.
Let y = |x| - k/16, then using the angle summation formula, we have:
atan(|x|) = atan(k/16) + atan( (|x| - k/16) / (1 + |x| * k/16) )
= atan(k/16) + atan( y / (1 + (y + k/16) * k/16 )
= atan(k/16) + atan( y / ((1 + k^2/256) + y * k/16) )
4) Let u = y / (1 + k^2/256), then we can rewritten the above as:
atan(|x|) = atan(k/16) + atan( u / (1 + u * k/16) )
~ atan(k/16) + (u - k/16 * u^2 + (k^2/256 - 1/3) * u^3 +
+ (k/16 - (k/16)^3) * u^4) + O(u^5)
```
With all the computations are done in single precision (float), the
total of approximation errors and rounding errors is bounded by 4 ULPs.
Commit: e1ad6463948faec4f978bd7124ac35ebf6219085
https://github.com/llvm/llvm-project/commit/e1ad6463948faec4f978bd7124ac35ebf6219085
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-11-20 (Thu, 20 Nov 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .ci/premerge_advisor_explain.py
M .ci/premerge_advisor_upload.py
M .ci/utils.sh
M .git-blame-ignore-revs
M .github/new-prs-labeler.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/commit-access-review.py
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/new-prs.yml
M .github/workflows/release-binaries.yml
M bolt/test/lit.local.cfg
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/comment-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/clang-tidy/misc/CoroutineHostileRAIICheck.cpp
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.cpp
M clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/property-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/no-int-to-ptr.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-copy-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/std-allocator-const.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/coroutine-hostile-raii.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_begin.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/duplicate-include/pack_end.h
A clang-tools-extra/test/clang-tidy/checkers/readability/duplicate-include-ignored-files.cpp
M clang/docs/AddressSanitizer.rst
M clang/docs/AllocToken.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/BuiltinsSPIRVVK.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/TargetID.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGValue.h
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
M clang/lib/CodeGen/TargetBuiltins/SPIR.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/lib/Headers/avx512vldqintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/llvm_libc_wrappers/assert.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/llvm_libc_wrappers/inttypes.h
R clang/lib/Headers/llvm_libc_wrappers/llvm-libc-decls/README.txt
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Headers/llvm_libc_wrappers/stdlib.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Headers/llvm_libc_wrappers/time.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/switch.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/Analysis/block-in-critical-section.cpp
A clang/test/CIR/CodeGen/X86/bmi-builtins.c
A clang/test/CIR/CodeGen/X86/lzcnt-builtins.c
M clang/test/CIR/CodeGen/X86/sse-builtins.c
A clang/test/CIR/CodeGen/builtin-isfpclass.c
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/constant-inits.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
A clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
A clang/test/CIR/CodeGen/global-constant.c
A clang/test/CIR/CodeGen/no-common.c
M clang/test/CIR/CodeGen/record-zero-init-padding.c
M clang/test/CIR/CodeGen/ternary-throw.cpp
M clang/test/CIR/CodeGen/vtt.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
A clang/test/CIR/IR/await.cir
A clang/test/CIR/IR/eh-inflight.cir
M clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/invalid-await.cir
A clang/test/CIR/Lowering/eh-inflight.cir
A clang/test/ClangScanDeps/module-in-stable-dir-by-name.c
A clang/test/ClangScanDeps/modules-current-modulemap-file-dep.c
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-header-sharing.m
M clang/test/ClangScanDeps/modules-implementation-module-map.c
M clang/test/ClangScanDeps/modules-implementation-private.m
A clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
A clang/test/CodeGen/Sparc/sparc-arguments.c
A clang/test/CodeGen/Sparc/sparc-vaarg.c
A clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/Sparc/sparcv8-inline-asm.c
A clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/Sparc/sparcv9-class-return.cpp
A clang/test/CodeGen/Sparc/sparcv9-dwarf.c
A clang/test/CodeGen/Sparc/sparcv9-inline-asm.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
A clang/test/CodeGen/arm64ec-varargs.c
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/complex-compound-assign-bitfield.c
M clang/test/CodeGen/link-builtin-bitcode.c
R clang/test/CodeGen/sparc-arguments.c
R clang/test/CodeGen/sparc-vaarg.c
R clang/test/CodeGen/sparcv8-abi.c
R clang/test/CodeGen/sparcv8-inline-asm.c
R clang/test/CodeGen/sparcv9-abi.c
R clang/test/CodeGen/sparcv9-class-return.cpp
R clang/test/CodeGen/sparcv9-dwarf.c
R clang/test/CodeGen/sparcv9-inline-asm.c
M clang/test/CodeGenCXX/alloc-token.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
A clang/test/CodeGenHLSL/builtins/fwidth.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
A clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
A clang/test/CodeGenSPIRV/Builtins/fwidth.c
M clang/test/DebugInfo/CXX/simple-template-names.cpp
M clang/test/Driver/crash-ir-repro.cpp
M clang/test/Driver/fsanitize-alloc-token.c
M clang/test/Driver/linker-wrapper-hip-no-rdc.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/OpenMP/amdgcn-attributes.cpp
A clang/test/Sema/attr-malloc_span.c
A clang/test/Sema/warn-enum-compare-typo.c
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/alloc-token.cpp
A clang/test/SemaCXX/attr-malloc_span.cpp
M clang/test/SemaCXX/wmissing-noreturn-suggestion.cpp
M clang/test/SemaHLSL/Availability/attr-availability-compute.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-mesh.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-lib.hlsl
M clang/test/SemaHLSL/BuiltIns/buffer_update_counter-errors.hlsl
A clang/test/SemaHLSL/Semantics/missing-vs.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
M clang/test/SemaHLSL/Semantics/position.vs.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M clang/test/SemaOpenACC/declare-construct-ast.cpp
M clang/test/SemaOpenACC/declare-construct.cpp
A clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/include/sanitizer/common_interface_defs.h
M compiler-rt/lib/asan/CMakeLists.txt
A compiler-rt/lib/asan/asan_aix.cpp
M compiler-rt/lib/asan/asan_errors.cpp
M compiler-rt/lib/asan/asan_posix.cpp
M compiler-rt/lib/asan/scripts/asan_symbolize.py
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/sanitizer_common/symbolizer/CMakeLists.txt
A compiler-rt/test/asan/TestCases/Darwin/Inputs/check-syslog.sh
M compiler-rt/test/asan/TestCases/Darwin/duplicate_os_log_reports.cpp
M compiler-rt/test/asan/TestCases/Darwin/dyld_insert_libraries_reexec.cpp
M compiler-rt/test/asan/TestCases/Darwin/interface_symbols_darwin.cpp
M compiler-rt/test/asan/TestCases/Darwin/lit.local.cfg.py
A compiler-rt/test/asan/TestCases/disable_container_overflow_checks.cpp
A compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
M compiler-rt/test/fuzzer/big-file-copy.test
M compiler-rt/test/fuzzer/merge-posix.test
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names-debug-types.test
R cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.cpp
A cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.test
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/type-code.cpp
M flang-rt/lib/runtime/unit.cpp
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/TypeCode.cpp
M flang/docs/Extensions.md
M flang/docs/RuntimeEnvironment.md
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Fir/declare-codegen.fir
A flang/test/Integration/debug-module-equivalence.f90
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/issue80884.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-nopass.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/Intrinsics/command_argument_count.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/OpenMP/Todo/omp-clause-indirect.f90
M flang/test/Lower/OpenMP/Todo/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/Todo/omp-declare-simd.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/cray-pointers02.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Lower/OpenMP/target_cpu_features.f90
M flang/test/Lower/assignment.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/host-associated.f90
A flang/test/Lower/pointer-disassociate-character.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
A flang/test/Preprocessing/bug168077.F90
A flang/test/Semantics/bug168099.f90
M flang/test/Semantics/indirect01.f90
M flang/test/Semantics/indirect02.f90
M flang/test/Transforms/debug-common-block.fir
M flang/test/Transforms/set-runtime-call-attributes.fir
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/header_generation.rst
M libc/include/sys/mman.yaml
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/atanf.h
A libc/src/__support/math/atanf_float.h
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/generic/CMakeLists.txt
A libc/src/sys/mman/linux/generic/pkey_common.h
M libc/src/sys/mman/linux/mprotect.cpp
A libc/src/sys/mman/linux/mprotect_common.h
A libc/src/sys/mman/linux/pkey_alloc.cpp
A libc/src/sys/mman/linux/pkey_common.h
A libc/src/sys/mman/linux/pkey_free.cpp
A libc/src/sys/mman/linux/pkey_get.cpp
A libc/src/sys/mman/linux/pkey_mprotect.cpp
A libc/src/sys/mman/linux/pkey_set.cpp
A libc/src/sys/mman/linux/x86_64/CMakeLists.txt
A libc/src/sys/mman/linux/x86_64/pkey_common.h
A libc/src/sys/mman/pkey_alloc.h
A libc/src/sys/mman/pkey_free.h
A libc/src/sys/mman/pkey_get.h
A libc/src/sys/mman/pkey_mprotect.h
A libc/src/sys/mman/pkey_set.h
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/atanf_float_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/pkey_test.cpp
R libc/utils/hdrgen/hdrgen/gpu_headers.py
M libc/utils/hdrgen/hdrgen/yaml_to_classes.py
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int32.inc
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int64.inc
M libclc/opencl/lib/amdgcn/SOURCES
R libclc/opencl/lib/amdgcn/cl_khr_int64_extended_atomics/minmax_helpers.ll
M libclc/opencl/lib/generic/atomic/atom_add.cl
M libclc/opencl/lib/generic/atomic/atom_and.cl
M libclc/opencl/lib/generic/atomic/atom_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atom_dec.cl
M libclc/opencl/lib/generic/atomic/atom_inc.cl
R libclc/opencl/lib/generic/atomic/atom_int32_binary.inc
M libclc/opencl/lib/generic/atomic/atom_max.cl
M libclc/opencl/lib/generic/atomic/atom_min.cl
M libclc/opencl/lib/generic/atomic/atom_or.cl
M libclc/opencl/lib/generic/atomic/atom_sub.cl
M libclc/opencl/lib/generic/atomic/atom_xchg.cl
M libclc/opencl/lib/generic/atomic/atom_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_add.cl
M libclc/opencl/lib/generic/atomic/atomic_and.cl
M libclc/opencl/lib/generic/atomic/atomic_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
M libclc/opencl/lib/generic/atomic/atomic_max.cl
M libclc/opencl/lib/generic/atomic/atomic_min.cl
M libclc/opencl/lib/generic/atomic/atomic_or.cl
M libclc/opencl/lib/generic/atomic/atomic_sub.cl
M libclc/opencl/lib/generic/atomic/atomic_xchg.cl
M libclc/opencl/lib/generic/atomic/atomic_xor.cl
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__charconv/from_chars_integral.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__locale_dir/num.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/limits
M libcxx/test/libcxx/numerics/clamp_to_integral.pass.cpp
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.test.dat
M libcxx/test/std/numerics/c.math/isnormal.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.gps/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.tai/types.compile.pass.cpp
M libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.deprecated_in_cxx17.verify.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_greater/cmp_greater.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less/cmp_less.pass.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.cmp_less_equal/cmp_less_equal.pass.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
A lld/test/ELF/aarch64-funcinit64-invalid.s
A lld/test/ELF/aarch64-funcinit64.s
M lld/test/ELF/dso-undef-extract-lazy.s
M lldb/include/lldb/Expression/DiagnosticManager.h
A lldb/include/lldb/Host/common/DiagnosticsRendering.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
R lldb/include/lldb/Utility/DiagnosticsRendering.h
M lldb/include/lldb/Utility/LLDBLog.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/DiagnosticsRendering.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Utility/CMakeLists.txt
R lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/LLDBLog.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/invalid-string/TestDataFormatterLibcxxInvalidString.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M lldb/tools/driver/Driver.cpp
M lldb/unittests/Host/common/CMakeLists.txt
A lldb/unittests/Host/common/DiagnosticsRenderingTest.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/Utility/CMakeLists.txt
R lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M llvm/CMakeLists.txt
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm-c/LLJITUtils.h
A llvm/include/llvm/Analysis/CMakeLists.txt
R llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
A llvm/include/llvm/Analysis/TargetLibraryInfo.td
A llvm/include/llvm/Analysis/TargetLibraryInfoImpl.td
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Bitcode/BitcodeConvenience.h
M llvm/include/llvm/CMakeLists.txt
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/DWP/DWP.h
M llvm/include/llvm/DWP/DWPStringPool.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/MC/MCParser/MCAsmParserExtension.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinEH.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/Support/CodeGen.h
R llvm/include/llvm/Support/SystemZ/zOSSupport.h
A llvm/include/llvm/Support/SystemZ/zos_wrappers/string.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InstructionPrecedenceTracking.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CAS/OnDiskCAS.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DWP/DWP.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/UpdateCompilerUsed.cpp
M llvm/lib/MC/MCDisassembler/MCExternalSymbolizer.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/GOFFAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
M llvm/lib/MC/MCParser/XCOFFAsmParser.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinEH.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.cpp
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/Object/RecordStreamer.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/ObjectYAML/MinidumpEmitter.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Support/Unix/Program.inc
A llvm/lib/Support/zOSLibFunctions.cpp
M llvm/lib/TableGen/StringToOffsetTable.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.h
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/CMakeLists.txt
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/lib/Target/RISCV/RISCVPassRegistry.def
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Coupled.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/Invariant.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PR51512.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/Separability.ll
M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
M llvm/test/CodeGen/AArch64/arm64-trn.ll
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/trunc-avg-fold.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
M llvm/test/CodeGen/AArch64/vscale-and-sve-cnt-demandedbits.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
A llvm/test/CodeGen/AMDGPU/bug-pk-f32-imm-fold.mir
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
A llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/float.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/unused.ll
R llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
M llvm/test/CodeGen/DirectX/ddx_coarse-errors.ll
M llvm/test/CodeGen/DirectX/ddy_coarse-errors.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
A llvm/test/CodeGen/Hexagon/bfloat.ll
A llvm/test/CodeGen/Hexagon/bfloat_vec.ll
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
M llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
A llvm/test/CodeGen/NVPTX/fence-proxy-tensormap-invalid.ll
A llvm/test/CodeGen/NVPTX/fence-proxy.ll
A llvm/test/CodeGen/NVPTX/op-fence.ll
A llvm/test/CodeGen/NVPTX/thread-fence.ll
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
A llvm/test/CodeGen/RISCV/rvv/combine-vl-vw-macc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
A llvm/test/CodeGen/RISCV/sincos-expansion.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fwidth.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/DynamicIdx/RWStructuredBufferDynamicIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer_unused.ll
A llvm/test/CodeGen/SPIRV/opencl/fwidth-error.ll
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/WebAssembly/simd-vecreduce-bool.ll
M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
M llvm/test/CodeGen/X86/build-vector-256.ll
M llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
M llvm/test/CodeGen/X86/chain_order.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
M llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
A llvm/test/CodeGen/X86/pr168594.ll
A llvm/test/CodeGen/X86/vector-compress-freeze.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
A llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
M llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
A llvm/test/DebugInfo/X86/no-prologue-end-after-line0-calls.mir
A llvm/test/MC/ARM/arm-movt-movw-absolute-pass.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
A llvm/test/TableGen/TargetLibraryInfo.td
M llvm/test/TableGen/get-named-operand-idx.td
A llvm/test/TableGen/target-specialized-pseudos.td
M llvm/test/Transforms/InstSimplify/ConstProp/vector-calls.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vect-ptr-ptr-size-mismatch.ll
A llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/subchain-interleaved.ll
A llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-redund-loads.ll
M llvm/test/Transforms/LoopFusion/pr164082.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
A llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
A llvm/test/Transforms/LoopInterchange/zero-btc.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies_multidims.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll
A llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LowerTypeTests/function-weak.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
A llvm/test/Transforms/SLPVectorizer/X86/matching-insert-point-for-nodes.ll
A llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
A llvm/test/Transforms/VectorCombine/AArch64/identity-shuffle-sve.ll
A llvm/test/Verifier/diderivedtype-extradata-tuple.ll
M llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
A llvm/test/tools/llvm-dwp/X86/dwarf64-str-offsets.test
A llvm/test/tools/llvm-dwp/X86/incompatible_dwarf_version.test
M llvm/test/tools/llvm-ir2vec/output/reference_triplets.txt
M llvm/test/tools/llvm-ir2vec/output/reference_x86_entities.txt
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
A llvm/test/tools/llvm-pdbutil/inline-annotations.test
M llvm/tools/dsymutil/Options.td
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-dwp/Opts.td
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/Error.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.cpp
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
M llvm/tools/llvm-xray/xray-extract.cpp
M llvm/tools/lto/lto.cpp
M llvm/tools/obj2yaml/macho2yaml.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
A llvm/utils/TableGen/Basic/TargetLibraryInfoEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-server/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/ARM/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
A llvm/utils/lit/tests/Inputs/shtest-env-positive/env-current-testcase.txt
M llvm/utils/lit/tests/Inputs/shtest-env-positive/env-no-subcommand.txt
M llvm/utils/lit/tests/shtest-env-positive.py
M llvm/utils/profcheck-xfail.txt
M mlir/CMakeLists.txt
R mlir/docs/Dialects/NVVM/_index.md
A mlir/docs/Dialects/NVVMDialect.md
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/Properties.td
M mlir/include/mlir/Transforms/Passes.h
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/python/CMakeLists.txt
M mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_1d.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/MemRef/transform-ops.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Vector/vector-scan-transforms.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/test/lit.site.cfg.in
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M openmp/runtime/src/CMakeLists.txt
A orc-rt/docs/Design.md
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt/Session.h
A orc-rt/include/orc-rt/TaskDispatcher.h
A orc-rt/include/orc-rt/ThreadPoolTaskDispatcher.h
M orc-rt/lib/executor/CMakeLists.txt
M orc-rt/lib/executor/Session.cpp
A orc-rt/lib/executor/TaskDispatcher.cpp
A orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
M orc-rt/unittests/CMakeLists.txt
M orc-rt/unittests/SessionTest.cpp
A orc-rt/unittests/ThreadPoolTaskDispatcherTest.cpp
M runtimes/CMakeLists.txt
M utils/bazel/.bazelrc
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/mman/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/kparzysz/flang-test-fix
Compare: https://github.com/llvm/llvm-project/compare/1e13a5c75fb6...e1ad6463948f
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