[all-commits] [llvm/llvm-project] 961940: [TTI] Use MemIntrinsicCostAttributes for getMasked...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Wed Nov 19 07:17:44 PST 2025
Branch: refs/heads/users/boomanaiden154/asan-make-duplicate_os_log_reportscpp-work-with-the-internal-shell
Home: https://github.com/llvm/llvm-project
Commit: 961940e1a7c9b4bbe0ae54c2ea4bdc69308947d6
https://github.com/llvm/llvm-project/commit/961940e1a7c9b4bbe0ae54c2ea4bdc69308947d6
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[TTI] Use MemIntrinsicCostAttributes for getMaskedMemoryOpCost (#168029)
- Split from #165532. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.
API change:
```
- InstructionCost getMaskedMemoryOpCost(Opcode, Src, Alignment,
- AddressSpace, CostKind);
+ InstructionCost getMaskedMemoryOpCost(MemIntrinsicCostAttributes,
+ CostKind);
```
Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with the
same information as before.
- Follow-up: migrate gather/scatter, strided, and expand/compress cost
queries to the same attributes-based entry point.
Commit: a3ab11007ba277fb8a126d8199925f4ce184e195
https://github.com/llvm/llvm-project/commit/a3ab11007ba277fb8a126d8199925f4ce184e195
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
Log Message:
-----------
[TableGen] Silence a warning (NFC)
/llvm-project/llvm/utils/TableGen/Common/CodeGenTarget.cpp:286:12:
error: variable 'SkippedInsts' set but not used [-Werror,-Wunused-but-set-variable]
unsigned SkippedInsts = 0;
^
1 error generated.
Commit: b4aa3d3ae334fea392f62df9693fab07142443ae
https://github.com/llvm/llvm-project/commit/b4aa3d3ae334fea392f62df9693fab07142443ae
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[NFC] Check operand type instead of opcode (#168641)
A folow-up of #168458.
Commit: 52a58a4193935f60df70eb45f8ec7c61f142ac3b
https://github.com/llvm/llvm-project/commit/52a58a4193935f60df70eb45f8ec7c61f142ac3b
Author: Shoreshen <372660931 at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/OpenMP/amdgcn-attributes.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
Log Message:
-----------
[AMDGPU] Adding instruction specific features (#167809)
Commit: 5ee95f48b84308dbbad46df313c2bd44e2613ac5
https://github.com/llvm/llvm-project/commit/5ee95f48b84308dbbad46df313c2bd44e2613ac5
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add regbankselect rules for G_FSHR (#159818)
Commit: 52ed0f215faedf3ceb26368ccd180fe3e27760e4
https://github.com/llvm/llvm-project/commit/52ed0f215faedf3ceb26368ccd180fe3e27760e4
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Basic/Targets/Sparc.cpp
A clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
Log Message:
-----------
[SPARC][clang] Add condition code register names for inline asm (#168498)
This follows the list of names used by GCC.
Commit: fa50a684c5ad91ef9eb6c5e8070b9363eea12f5e
https://github.com/llvm/llvm-project/commit/fa50a684c5ad91ef9eb6c5e8070b9363eea12f5e
Author: Aditi Medhane <aditimedhane73 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
Log Message:
-----------
[PowerPC] Add custom lowering for SADD overflow for i32 and i64 (#159255)
This patch improves the codegen for saddo on i32 and i64 in both 32-bit
and 64-bit modes by custom lowering. It implements signed-add overflow
detection using the `(x eqv y) & (sum xor x)`bit-level sequence.
Commit: c942ebdb66bfdfae5f3665e0dc674c68c70a18f9
https://github.com/llvm/llvm-project/commit/c942ebdb66bfdfae5f3665e0dc674c68c70a18f9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
Log Message:
-----------
Reapply "[Github] Update PR labeller to v6.0.1 (#167246)"
This reverts commit d772663a9f003a08ee76414397963c58e80b27d7.
This fixes the final issue with the labeller landing. There were
two remaining issues:
1. There was an extra quote on one of the globs
2. Some of the yaml keys were named incorrectly (should have been
plural)
Commit: f7f41350b4eb6cfb036242ae0427b6b4c76dce6e
https://github.com/llvm/llvm-project/commit/f7f41350b4eb6cfb036242ae0427b6b4c76dce6e
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
Log Message:
-----------
[LV]: Skip Epilogue scalable VF greater than RemainingIterations. (#156724)
Consider skipping epilogue scalable VF when they are greater than
RemainingIterations same as fixed VF.
And skip scalable RemainingIterations from that comparison because
SCEV ATM can't evaluate non-canonical vscale-based expressions.
Commit: f38cf01fc888850900c22a9c84ce3bcb85112f24
https://github.com/llvm/llvm-project/commit/f38cf01fc888850900c22a9c84ce3bcb85112f24
Author: Wenju He <wenju.he at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int32.inc
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int64.inc
M libclc/opencl/lib/amdgcn/SOURCES
R libclc/opencl/lib/amdgcn/cl_khr_int64_extended_atomics/minmax_helpers.ll
M libclc/opencl/lib/generic/atomic/atom_add.cl
M libclc/opencl/lib/generic/atomic/atom_and.cl
M libclc/opencl/lib/generic/atomic/atom_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atom_dec.cl
M libclc/opencl/lib/generic/atomic/atom_inc.cl
R libclc/opencl/lib/generic/atomic/atom_int32_binary.inc
M libclc/opencl/lib/generic/atomic/atom_max.cl
M libclc/opencl/lib/generic/atomic/atom_min.cl
M libclc/opencl/lib/generic/atomic/atom_or.cl
M libclc/opencl/lib/generic/atomic/atom_sub.cl
M libclc/opencl/lib/generic/atomic/atom_xchg.cl
M libclc/opencl/lib/generic/atomic/atom_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_add.cl
M libclc/opencl/lib/generic/atomic/atomic_and.cl
M libclc/opencl/lib/generic/atomic/atomic_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
M libclc/opencl/lib/generic/atomic/atomic_max.cl
M libclc/opencl/lib/generic/atomic/atomic_min.cl
M libclc/opencl/lib/generic/atomic/atomic_or.cl
M libclc/opencl/lib/generic/atomic/atomic_sub.cl
M libclc/opencl/lib/generic/atomic/atomic_xchg.cl
M libclc/opencl/lib/generic/atomic/atomic_xor.cl
Log Message:
-----------
[libclc] Use CLC atomic functions for legacy OpenCL atom/atomic builtins (#168325)
Main changes:
* OpenCL legacy atom/atomic builtins now call CLC atomic functions
(which use Clang __scoped_atomic_*), replacing previous Clang __sync_*
functions.
* Change memory order from seq_cst to relaxed; keep device scope (spec
permits broader than workgroup). LLVM IR for _Z8atom_decPU3AS1Vi in
amdgcn--amdhsa.bc:
Before:
%2 = atomicrmw volatile sub ptr subrspace(1) %0, i32 1
syncscope("agent") seq_cst
After:
%2 = atomicrmw volatile sub ptr subrspace(1) %0, i32 1
syncscope("agent") monotonic
* Also adds OpenCL 1.0 atom_* variants without volatile on the pointer.
They are added for backward compatibility.
Commit: 9dc4ebfff145dbf648e49dbfd5c907d2f8f9eefe
https://github.com/llvm/llvm-project/commit/9dc4ebfff145dbf648e49dbfd5c907d2f8f9eefe
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow create mem desc from 2d memref (#167767)
This PR relax the create_mem_desc's restriction on source memref,
allowing it to be a 2d memref.
Commit: be1a504228db4185a4ad5defe1b57d4df2bc8b2f
https://github.com/llvm/llvm-project/commit/be1a504228db4185a4ad5defe1b57d4df2bc8b2f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Simplify Session shutdown. (#168664)
Moves all Session member variables dedicated to shutdown into a new
ShutdownInfo struct, and uses the presence / absence of this struct as
the flag to indicate that we've entered the "shutting down" state. This
simplifies the implementation of the shutdown process.
Commit: 5bba4fd75dd513423ff8bb905f89b60558099578
https://github.com/llvm/llvm-project/commit/5bba4fd75dd513423ff8bb905f89b60558099578
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M libc/test/src/stdio/fileop_test.cpp
Log Message:
-----------
[libc] Fix -Wshorten-64-to-32 in fileop_test. (#168451)
Explicitly cast 0 to size_t type to match fread() return type. This
follows the pattern used elsewhere in this file, and fixes
-Wshorten-64-to-32 warnings when building the test.
Commit: ed1c8d7a57808de7ac60f2d0ff3e2b03a765cb7f
https://github.com/llvm/llvm-project/commit/ed1c8d7a57808de7ac60f2d0ff3e2b03a765cb7f
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M lld/test/ELF/dso-undef-extract-lazy.s
Log Message:
-----------
ELF,test: Test unversioned undefined symbols of index 0 and 1
My 2020 change that added versioned symbol recognition
(reviews.llvm.org/D80059) checks both VER_NDX_LOCAL and VER_NDX_GLOBAL,
though test coverage was missing. lld/test/ELF/dso-undef-extract-lazy.s
checks that the undefined symbol is indeed considered unversioned.
Commit: 5109f2a73395f076a292e55a35a129cbf125fd66
https://github.com/llvm/llvm-project/commit/5109f2a73395f076a292e55a35a129cbf125fd66
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-18 (Tue, 18 Nov 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Exclude from profcheck a vplan test under phase ordering (#168669)
Commit: ac68dd53ed035047fb68abb471d2e1eb8b31cbfd
https://github.com/llvm/llvm-project/commit/ac68dd53ed035047fb68abb471d2e1eb8b31cbfd
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
A llvm/lib/Target/RISCV/RISCVPassRegistry.def
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
Log Message:
-----------
[RISCV][NewPM] Port RISCVCodeGenPrepare to the new pass manager (#168381)
As suggested in the review for #160536 it would be good to follow up and
port the RISC-V passes to the new pass manager. This PR starts that
task. It provides the bare minimum necessary to run RISCVCodeGenPrepare
with opt -passes=riscv-codegenprepare. The approach used is modeled on
my observations of the AMDGPU backend and the recent work to port the
X86 passes.
The testing approach is to add a `-passes=riscv-foo` RUN line to at
least one test, if an appropriate test exists.
Commit: ec909123aee9088ad99c207b365ee7a20870f1c4
https://github.com/llvm/llvm-project/commit/ec909123aee9088ad99c207b365ee7a20870f1c4
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
Log Message:
-----------
[clang][NVPTX] Add remaining float to fp16 conversions (#167641)
This change adds intrinsics and clang builtins for the remaining float
to fp16 conversions. This includes the following conversions:
- float to bf16x2 - satfinite variants
- float to f16x2 - satfinite variants
- float to bf16 - satfinite variants
- float to f16 - all variants
Tests are added in `convert-sm80.ll` and `convert-sm80-sf.ll` for the
intrinsics and in `builtins-nvptx.c` for the clang builtins.
Commit: 669c30ce66eb08d028e7f90d36a2c2d8c3697f63
https://github.com/llvm/llvm-project/commit/669c30ce66eb08d028e7f90d36a2c2d8c3697f63
Author: Guray Ozen <gozen at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
R mlir/docs/Dialects/NVVM/_index.md
A mlir/docs/Dialects/NVVMDialect.md
Log Message:
-----------
[MLIR][NVVM] Move docs to correct folder
Commit: 58d9e476724ae347be4da1ecddc17fd133a1300b
https://github.com/llvm/llvm-project/commit/58d9e476724ae347be4da1ecddc17fd133a1300b
Author: Raul Tambre <raul at tambre.ee>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M bolt/test/lit.local.cfg
Log Message:
-----------
[NFCI][bolt][test] Use AT&T syntax explicitly (#167225)
This enables building LLVM with `-mllvm -x86-asm-syntax=intel` in one's
Clang config files (i.e. a global preference for Intel syntax).
`-masm=att` is insufficient as it doesn't override a specification of `-mllvm -x86-asm-syntax`.
Commit: 429e3156c8043ca30d5866755ad790314a26670f
https://github.com/llvm/llvm-project/commit/429e3156c8043ca30d5866755ad790314a26670f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
Log Message:
-----------
[RISCV] Convert -mtune=generic to generic-rv32/rv64 in RISCVSubtarget::initializeSubtargetDependencies. (#168612)
The "generic" entry in tablegen is really a dummy entry. We shouldn't
use it for anything. Remap "generic" to either generic-rv32 or
generic-rv64 based on the triple.
Commit: f8e83c428a8d85d18242d4bd57bec0d02c8253e8
https://github.com/llvm/llvm-project/commit/f8e83c428a8d85d18242d4bd57bec0d02c8253e8
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Transforms/Passes.h
Log Message:
-----------
[mlir] Use dictionary order to order the pass decl (NFC) (#168648)
Commit: de9c18269dee5a323dd254f5b3a18aabe144e918
https://github.com/llvm/llvm-project/commit/de9c18269dee5a323dd254f5b3a18aabe144e918
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A orc-rt/docs/Design.md
Log Message:
-----------
[orc-rt] Initial ORC Runtime design documentation. (#168681)
This document aims to lay out the high level design and goals of the ORC
runtime, and the relationships between key components.
Commit: fddfc705d03ec6e9c75441d66057c1219902c8c1
https://github.com/llvm/llvm-project/commit/fddfc705d03ec6e9c75441d66057c1219902c8c1
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/list.rst
Log Message:
-----------
[clang-tidy][NFC] Fix order in `list.rst` (#168683)
This issue was introduced in
https://github.com/llvm/llvm-project/pull/167689
Commit: 711a2954799e597c71b86aed8c93167765a5255f
https://github.com/llvm/llvm-project/commit/711a2954799e597c71b86aed8c93167765a5255f
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
Log Message:
-----------
[AMDGPU] Ignore wavefront barrier latency during scheduling DAG mutation (#168500)
Do not add latency for wavefront and singlethread scope fences during
barrier latency DAG mutation.
These scopes do not typically introduce any latency and adjusting
schedules based on them significantly impacts latency hiding.
Commit: 4ab1d06406ea425ac40072c3bb3fd96002ba2b0a
https://github.com/llvm/llvm-project/commit/4ab1d06406ea425ac40072c3bb3fd96002ba2b0a
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
Log Message:
-----------
Reland "[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)" (#168638)
Reland commit fb829bf11feeb53f815a3abf539e63ec3a23ed3d with additional fixes relating to post-merge CI failure
```
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp: In function ‘constexpr llvm::nvvm::CTAGroupKind getNVVMCtaGroupKind(mlir::NVVM::CTAGroupKind)’:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-constexpr function ‘void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)’
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp:73:3: note: in expansion of macro ‘llvm_unreachable’
llvm_unreachable("unsupported cta_group value");
^
```
Commit: a2af185b96071154b93f6c00319feee9b1f270f4
https://github.com/llvm/llvm-project/commit/a2af185b96071154b93f6c00319feee9b1f270f4
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][tosa] Fix linker failure in build bots introduced by #165581 (#168581)
This commit fixes linker failures evident on some failing build bots.
Commit: 907e8514b188abb0e4d4d16b1e0e847a163762cd
https://github.com/llvm/llvm-project/commit/907e8514b188abb0e4d4d16b1e0e847a163762cd
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[ORC] Remove now unused EPCDebugObjectRegistrar (NFC) (#167868)
EPCDebugObjectRegistrar is unused now that the ELF debugger support plugin uses AllocActions
https://github.com/llvm/llvm-project/pull/167866
Commit: 915e9adbe5d1c577a21ac8b495b7c54c465460fd
https://github.com/llvm/llvm-project/commit/915e9adbe5d1c577a21ac8b495b7c54c465460fd
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
Log Message:
-----------
[clang-tidy] Provide fix-its for casts to void* in google-readability-casting (#167655)
Commit: 07309135291e804945de3ec7068b787a45a3499f
https://github.com/llvm/llvm-project/commit/07309135291e804945de3ec7068b787a45a3499f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Print debug info for all recipes. (#168454)
Use the recently refactored VPRecipeBase::print to print debug location
for all recipes.
PR: https://github.com/llvm/llvm-project/pull/168454
Commit: e38529ddbb11918f854ee457b46a6dc190167029
https://github.com/llvm/llvm-project/commit/e38529ddbb11918f854ee457b46a6dc190167029
Author: 陈子昂 <121872494+Michael-Chen-NJU at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/X86/vector-compress-freeze.ll
Log Message:
-----------
[DAG] Update canCreateUndefOrPoison to handle ISD::VECTOR_COMPRESS (#168010)
Fixes #167710
Commit: 2f6a8a77db069228a0fb98f5a85ec85ed7f259fc
https://github.com/llvm/llvm-project/commit/2f6a8a77db069228a0fb98f5a85ec85ed7f259fc
Author: Guray Ozen <gozen at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/docs/Dialects/NVVMDialect.md
Log Message:
-----------
[MLIR][NVVM] Add operations and interfaces
Commit: 125af5686765f915abcdcca60ad255fda95667d2
https://github.com/llvm/llvm-project/commit/125af5686765f915abcdcca60ad255fda95667d2
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
Log Message:
-----------
[AMDGPU][SDAG] Only fold flat offsets if they are inbounds PTRADDs (#165427)
For flat memory instructions where the address is supplied as a base address
register with an immediate offset, the memory aperture test ignores the
immediate offset. Currently, SDISel does not respect that, which leads to
miscompilations where valid input programs crash when the address computation
relies on the immediate offset to get the base address in the proper memory
aperture. Global or scratch instructions are not affected.
This patch only selects flat instructions with immediate offsets from PTRADD
address computations with the inbounds flag: If the PTRADD does not leave the
bounds of the allocated object, it cannot leave the bounds of the memory
aperture and is therefore safe to handle with an immediate offset.
Affected tests:
- CodeGen/AMDGPU/fold-gep-offset.ll: Offsets are no longer wrongly folded, added
new positive tests where we still do fold them.
- CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll: Offset folding doesn't seem
integral to this test, so the test is not changed to make offset folding still
happen.
- CodeGen/AMDGPU/loop-prefetch-data.ll: loop-reduce transforms inbounds
addresses for accesses to be based on potentially OOB addresses used for
prefetching.
- I think the remaining ones suffer from the limited preservation of the
inbounds flag in PTRADD DAGCombines due to the provenance problems pointed out
in PR #165424 and the fact that
`AMDGPUTargetLowering::SplitVector{Load|Store}` legalizes too-wide accesses by
repeatedly splitting them in half. Legalizing a V32S32 memory accesses
therefore leads to inbounds ptradd chains like (ptradd inbounds (ptradd
inbounds (ptradd inbounds P, 64), 32), 16). The DAGCombines fold them into a
single ptradd, but the involved transformations generally cannot preserve the
inbounds flag (even though it would be valid in this case).
Similar previous PR that relied on `ISD::ADD inbounds` instead of `ISD::PTRADD inbounds` (closed): #132353
Analogous PR for GISel (merged): #153001
Fixes SWDEV-516125.
Commit: ed7f2a459afefe41a7fac1360d1d3b7bc33bec43
https://github.com/llvm/llvm-project/commit/ed7f2a459afefe41a7fac1360d1d3b7bc33bec43
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A clang/test/CodeGen/Sparc/sparc-arguments.c
A clang/test/CodeGen/Sparc/sparc-vaarg.c
A clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/Sparc/sparcv8-inline-asm.c
A clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/Sparc/sparcv9-class-return.cpp
A clang/test/CodeGen/Sparc/sparcv9-dwarf.c
A clang/test/CodeGen/Sparc/sparcv9-inline-asm.c
R clang/test/CodeGen/sparc-arguments.c
R clang/test/CodeGen/sparc-vaarg.c
R clang/test/CodeGen/sparcv8-abi.c
R clang/test/CodeGen/sparcv8-inline-asm.c
R clang/test/CodeGen/sparcv9-abi.c
R clang/test/CodeGen/sparcv9-class-return.cpp
R clang/test/CodeGen/sparcv9-dwarf.c
R clang/test/CodeGen/sparcv9-inline-asm.c
Log Message:
-----------
[SPARC][NFC] Move clang tests into own subdirectory (#168657)
Commit: 150053627d14679f3db52d78b640a3e8781de828
https://github.com/llvm/llvm-project/commit/150053627d14679f3db52d78b640a3e8781de828
Author: Marco Elver <elver at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/docs/AllocToken.rst
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/alloc-token.cpp
M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
Log Message:
-----------
[AllocToken] Fix and clarify -falloc-token-max=0 (#168689)
The option -falloc-token-max=0 is supposed to be usable to override
previous settings back to the target default max tokens (SIZE_MAX).
This did not work for the builtin:
```
| executed command: clang -cc1 [..] -nostdsysteminc -triple x86_64-linux-gnu -std=c++23 -fsyntax-only -verify clang/test/SemaCXX/alloc-token.cpp -falloc-token-max=0
| clang: llvm/lib/Support/AllocToken.cpp:38: std::optional<uint64_t> llvm::getAllocToken(AllocTokenMode, const AllocTokenMetadata &, uint64_t): Assertion `MaxTokens && "Must provide non-zero max tokens"' failed.
```
Fix it by also picking the default if "0" is passed.
Improve the documentation to be clearer what the value of "0" means.
Commit: b42851b8dda8c85a277573610519e8c66e91322f
https://github.com/llvm/llvm-project/commit/b42851b8dda8c85a277573610519e8c66e91322f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] EltsFromConsecutiveLoads - add recursion depth limiter (#168694)
EltsFromConsecutiveLoads can be recursively called - ensure we limit the recursion depth.
Commit: 50791c3a708123ef75808e73a81d7d2e759f6f9b
https://github.com/llvm/llvm-project/commit/50791c3a708123ef75808e73a81d7d2e759f6f9b
Author: stomfaig <55883018+stomfaig at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
Log Message:
-----------
[Clang][X86] allow VPERMILPD/S imm intrinsics to be used in constexpr (#168044)
Resolves #166529
Commit: 5343dd92303657dc15f4038a3843ddb778760242
https://github.com/llvm/llvm-project/commit/5343dd92303657dc15f4038a3843ddb778760242
Author: Kashika Akhouri <77923634+kashika0112 at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Detect use-after-return (#165370)
Adding "use-after-return" in Lifetime Analysis.
Detecting when a function returns a reference to its own stack memory:
[UAR Design
Doc](https://docs.google.com/document/d/1Wxjn_rJD_tuRdejP81dlb9VOckTkCq5-aE1nGcerb_o/edit?usp=sharing)
Consider the following example:
```cpp
std::string_view foo() {
std::string_view a;
std::string str = "small scoped string";
a = str;
return a;
}
```
The code adds a new Fact "OriginEscape" in the end of the CFG to
determine any loan that is escaping the function as shown below:
```
Function: foo
Block B2:
End of Block
Block B1:
OriginFlow (Dest: 0 (Decl: a), Src: 1 (Expr: CXXConstructExpr))
OriginFlow (Dest: 2 (Expr: ImplicitCastExpr), Src: 3 (Expr: StringLiteral))
Issue (0 (Path: operator=), ToOrigin: 4 (Expr: DeclRefExpr))
OriginFlow (Dest: 5 (Expr: ImplicitCastExpr), Src: 4 (Expr: DeclRefExpr))
Use (0 (Decl: a), Write)
Issue (1 (Path: str), ToOrigin: 6 (Expr: DeclRefExpr))
OriginFlow (Dest: 7 (Expr: ImplicitCastExpr), Src: 6 (Expr: DeclRefExpr))
OriginFlow (Dest: 8 (Expr: CXXMemberCallExpr), Src: 7 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 9 (Expr: ImplicitCastExpr), Src: 8 (Expr: CXXMemberCallExpr))
OriginFlow (Dest: 10 (Expr: ImplicitCastExpr), Src: 9 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 11 (Expr: MaterializeTemporaryExpr), Src: 10 (Expr: ImplicitCastExpr))
OriginFlow (Dest: 0 (Decl: a), Src: 11 (Expr: MaterializeTemporaryExpr))
Use (0 (Decl: a), Read)
OriginFlow (Dest: 12 (Expr: ImplicitCastExpr), Src: 0 (Decl: a))
OriginFlow (Dest: 13 (Expr: CXXConstructExpr), Src: 12 (Expr: ImplicitCastExpr))
Expire (1 (Path: str))
OriginEscapes (13 (Expr: CXXConstructExpr))
End of Block
Block B0:
End of Block
```
The confidence of the report is determined by checking if at least one
of the loans returned is not expired (strict). If all loans are expired
it is considered permissive.
More information [UAR Design
Doc](https://docs.google.com/document/d/1Wxjn_rJD_tuRdejP81dlb9VOckTkCq5-aE1nGcerb_o/edit?usp=sharing)
Commit: 58e6d02aa28ba48ee37f1b59ad006dfeb45d1dd3
https://github.com/llvm/llvm-project/commit/58e6d02aa28ba48ee37f1b59ad006dfeb45d1dd3
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
Log Message:
-----------
[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerge (#168692)
This aims to fix the crash in #168495, my combine rule was
missing a check that the source vector was in fact a vector. This then
caused the legality check to fail in this example as the concat was
trying to concat a non vector.
I have also gated the bitcast of the concat to only work on non-scalable
vectors as the mutation calls `getNumElements` which crashes when called
on a scalable vector.
Fixes #168495
Commit: 7b94dd336e25b18e05b3b1f20360df81e4900ffb
https://github.com/llvm/llvm-project/commit/7b94dd336e25b18e05b3b1f20360df81e4900ffb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPLan] Reduce duplication in VPHeaderPHIRecipe::classof. (NFCI)
Implement VPHeaderPHIRecipe::classof(const VPValue *V) in terms of the
variant taking VPRecipeBase.
Reduces some duplication, split off from
https://github.com/llvm/llvm-project/pull/141431.
Commit: c32c1d0d21cedb8017914eb6951bea4cf1fb10f9
https://github.com/llvm/llvm-project/commit/c32c1d0d21cedb8017914eb6951bea4cf1fb10f9
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/lib/sanitizer_common/symbolizer/CMakeLists.txt
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/test/lit.site.cfg.in
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
[Runtimes] Default build must use its own output dirs (#168266)
Post-commit fix of #164794 reported at
https://github.com/llvm/llvm-project/pull/164794#issuecomment-3536253493
`LLVM_LIBRARY_OUTPUT_INTDIR` and `LLVM_RUNTIME_OUTPUT_INTDIR` is used by
`AddLLVM.cmake` as output directories. Unless we are in a
bootstrapping-build, It must not point to directories found by
`find_package(LLVM)` which may be read-only directories. MLIR for
instance sets thesese variables to its own build output
directory, so should the runtimes.
Commit: bdcaa0001a5081737b12b9ec0c284fe06002a97c
https://github.com/llvm/llvm-project/commit/bdcaa0001a5081737b12b9ec0c284fe06002a97c
Author: Philip Ginsbach-Chen <ginsbach at github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/test/CodeGen/AArch64/arm64-trn.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
Log Message:
-----------
[AArch64] match TRN starting from undef elements (#167955)
When the first element of a trn mask is undef, the `isTRNMask` function
assumes `WhichResult = 1`. That has a 50% chance of being wrong, so we
fail to match some valid trn1/trn2.
This patch introduces a more precise test to determine the correct value
of `WhichResult`, based on corresponding code in the `isZIPMask` and
`isUZPMask` functions.
- This change is based on #89578. I'd like to follow it up with a
further change along the lines of #167235.
Commit: dce60025c1ae5c6c00885b49e496b29dffc03c8b
https://github.com/llvm/llvm-project/commit/dce60025c1ae5c6c00885b49e496b29dffc03c8b
Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.h
M clang/lib/Basic/Builtins.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang][Codegen] Move floating point math intrinsic check to separate function [NFC] (#168198)
This PR moves the code that checks whether an LLVM intrinsic should be
generated instead of a call to floating point math functions to a
separate function. This simplifies `EmitBuiltinExpr` in `CGBuiltin.cpp`
and will allow us to reuse the logic in ClangIR.
Commit: 655662e94e969ee1bb3c17ea036335d7865f0462
https://github.com/llvm/llvm-project/commit/655662e94e969ee1bb3c17ea036335d7865f0462
Author: BogdanDragosV <dragos-valentin.bogdan at intel.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/include/mlir/IR/Properties.td
Log Message:
-----------
[MLIR][ODS] Fully qualify namespace for mlir::Attribute in ODS generated code (#168536)
ODS generate code can be included and used outside of the `mlir`
namespace and so references to symbols in the mlir namespace
must be fully qualified.
Commit: 6fc48de4ffe23508b3936c5480e46a5c0af02fec
https://github.com/llvm/llvm-project/commit/6fc48de4ffe23508b3936c5480e46a5c0af02fec
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
Log Message:
-----------
[AArch64] Update zero latency instructions in Neoverse scheduling tables (#165690)
NeoverseZeroMove was introduced for Neoverse-V2 and was added to V3 and
V3AE.
Use NeoverseZeroMove for Neoverse-V1, N2, N3 in the same way, including
these instructions:
MOV Xd|Wd, #0|XZR|WZR
For all the above Neoverse targets, the following instructions are also
decoded as not utilizing the scheduling and execution resources of the
machine:
MOV Wd,Wn
MOV Xd,Xn
For Neoverse-N3 only, these instructions also have zero latency
FMOV Dd, Dn
FMOV Sd, Sn
MOV Vd, Vn (vector)
MOV Zd.D, Zn.D
PTRUE
PFALSE
Commit: 68d2ce8e74cb2428d5c6299176f471753151d356
https://github.com/llvm/llvm-project/commit/68d2ce8e74cb2428d5c6299176f471753151d356
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Coupled.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/Invariant.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PR51512.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/Separability.ll
M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
M llvm/test/Transforms/LoopFusion/pr164082.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies_multidims.ll
Log Message:
-----------
[DA] Replace delinearization for fixed size array (#161822)
This patch replaces the delinearization function used in DA, switching
from one that depends on type information in GEPs to one that does not.
There are three types of changes in regression tests: improvements,
degradations, and degradations but the related features will be
removed. Since there were very few cases that are classified into the
second category, I believe the impact of this change should be
practically insignificant.
Commit: a2ddb020d76cdb1c5708cf3dadd2c46866202707
https://github.com/llvm/llvm-project/commit/a2ddb020d76cdb1c5708cf3dadd2c46866202707
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
A llvm/test/Transforms/LoopInterchange/zero-btc.ll
Log Message:
-----------
[LoopInterchange] Don't consider loops with BTC=0 (#167113)
Do not consider loops with a zero backedge taken count as candidates for
interchange. This seems like a sensible thing because it suggests the loop
doesn't execute and there is no point in interchanging. As a bonus, this
seems to avoid triggering an assert about phis and their uses from source
code, so this is a partial fix for #163954 but it needs more work to properly
fix that.
Commit: 7fe35641672b6431134e99af658bd79fd438da54
https://github.com/llvm/llvm-project/commit/7fe35641672b6431134e99af658bd79fd438da54
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/Headers/llvm_libc_wrappers/assert.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/llvm_libc_wrappers/inttypes.h
R clang/lib/Headers/llvm_libc_wrappers/llvm-libc-decls/README.txt
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Headers/llvm_libc_wrappers/stdlib.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Headers/llvm_libc_wrappers/time.h
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/docs/dev/header_generation.rst
R libc/utils/hdrgen/hdrgen/gpu_headers.py
M libc/utils/hdrgen/hdrgen/yaml_to_classes.py
Log Message:
-----------
[Clang] Gut the libc wrapper headers and simplify (#168438)
Summary:
These were originally intended to represent the functions that are
present on the GPU as to be provided by the LLVM libc implementation.
The original plan was that LLVM libc would report which functions were
supported and then the offload interface would mark those as supported.
The problem is that these wrapper headers are very difficult to make
work given the various libc extensions everyone does so they were
extremely fragile.
OpenMP already declares all functions used inside of a target region as
implicitly host / device, while these headers weren't even used for CUDA
/ HIP yet anyway. The only things we need to define right now are the
stdio FILE types. If we want to make this work for CUDA we'd need to
define these manually, but we're a ways off and that's way easier
because they do proper overloading.
Commit: 9eee396c58d2e24beb93c460141170def328776d
https://github.com/llvm/llvm-project/commit/9eee396c58d2e24beb93c460141170def328776d
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
Log Message:
-----------
[flang] "Almost NFC" changes to fir::runtime::genCharCompare() (#168563)
As part of investigating a related issue, I made the following changes
to fir::runtime::genCharCompare():
- Renamed a variable
- Added an error check for the same kind of input args
- Updated another error check to use the same error found elsewhere in
this source file
Commit: 5da0445420015d859f71431a2c76f5b0cf78cbad
https://github.com/llvm/llvm-project/commit/5da0445420015d859f71431a2c76f5b0cf78cbad
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Consolidate shouldOptimizeForSize and remove unused BFI/PSI. NFC (#168697)
#158690 plans on passing BFI as a lazy lambda to avoid computing
BlockFrequencyInfo when not needed.
In preparation for that, this PR removes BFI and PSI from some
constructors that aren't used. It also consolidates the two calls to
llvm::shouldOptimizeForSize so that the result is computed once and
passed where needed.
This also renames OptForSize in LoopVectorizationLegality to clarify
that it's to prevent runtime SCEV checks, see
https://reviews.llvm.org/D68082
Commit: 7b8eee6b2b10ce88a24521aa0e91193cf7203c95
https://github.com/llvm/llvm-project/commit/7b8eee6b2b10ce88a24521aa0e91193cf7203c95
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/sincos-expansion.ll
Log Message:
-----------
[RISCV][test] Add sincos-expansion.ll test case
Commit: 2fc42c7163142d74e2e8ce5549f5d0142fccd89f
https://github.com/llvm/llvm-project/commit/2fc42c7163142d74e2e8ce5549f5d0142fccd89f
Author: Nathan Gauër <brioche at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-compute.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-mesh.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-lib.hlsl
A clang/test/SemaHLSL/Semantics/missing-vs.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
M clang/test/SemaHLSL/Semantics/position.vs.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
Log Message:
-----------
[HLSL] Add initial support for output semantics (#168095)
This commits adds the first part of the output semantics. It only
considers return values (and sret), but does not handle `inout` or `out`
parameters yet.
Those missing bits will reuse the same code, but will require additional
testing & some fixups, so planning on adding them separately.
Commit: 48dca1e929f5ef4ffbd4d291ce8bd9ab03c23fed
https://github.com/llvm/llvm-project/commit/48dca1e929f5ef4ffbd4d291ce8bd9ab03c23fed
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/include/clang/AST/StmtOpenACC.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
Log Message:
-----------
[OpenACC][CIR] Implement 'atomic capture' lowering (#168422)
The 'atomic capture' variant of the `atomic` construct accepts either a
single statement, or a compound statement containing two statements.
Each of the statements it accepts meet a form of the previous
read/write/update forms, or is a combination of two.
The IR node for atomic capture takes two separate other acc.atomics,
plus a terminator.
This patch implements all of the lowering for these.
Note: This gets the postfix-increment/decrement wrong, but the effort
to do so is enough that I believe we can do that in a followup patch, so
I'll be doing so in the next patch.
Commit: ad31e11ab6d719d803708169a981a49b347c4d82
https://github.com/llvm/llvm-project/commit/ad31e11ab6d719d803708169a981a49b347c4d82
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__ranges/iota_view.h
M libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
Log Message:
-----------
[libc++] Make views::iota aware of __int128 (#167869)
Fixes #167991
Commit: a7ba8dcad76476478100c228a31d9c48391b1e03
https://github.com/llvm/llvm-project/commit/a7ba8dcad76476478100c228a31d9c48391b1e03
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/property-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/no-int-to-ptr.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-copy-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/std-allocator-const.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
Log Message:
-----------
[clang-tidy][docs][NFC] Enforce 80 characters limit (4/4) (#168049)
Fix documentation in `mpi`, `objc`, `openmp`, `performance`,
`portability`, `readability` and `zircon`.
This is part of the codebase cleanup described in
https://github.com/llvm/llvm-project/issues/167098
Commit: 93a1327deaef7abd5c2bf5caf4c4ef40d34460f6
https://github.com/llvm/llvm-project/commit/93a1327deaef7abd5c2bf5caf4c4ef40d34460f6
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
Log Message:
-----------
[lldb] Skip TestLibcxxInternalsRecognizer on asan + MacOS
Unfortunately, in this configuration, the bots are forced to use the
system libcxx, which is too old for what this test is verifying.
In the future, we should re-enable building libcxx with asan on MacOS.
Commit: 1723a5137cba77cc1aace84d392b2ecd501e1069
https://github.com/llvm/llvm-project/commit/1723a5137cba77cc1aace84d392b2ecd501e1069
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
Log Message:
-----------
[mlir][tensor] Drop unused AffineExpr variable (NFC) (#168651)
Commit: c62fc065b4c10370c1aa68cad6f5fa980b640136
https://github.com/llvm/llvm-project/commit/c62fc065b4c10370c1aa68cad6f5fa980b640136
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/lib/asan/CMakeLists.txt
A compiler-rt/lib/asan/asan_aix.cpp
M compiler-rt/lib/asan/asan_posix.cpp
M compiler-rt/lib/asan/scripts/asan_symbolize.py
Log Message:
-----------
[asan] Implement address sanitizer on AIX: platform support (#139587)
Adds some general changes for supporting asan on AIX.
Issue: #138916
Commit: 71e3de8a7f1c0fc71302ac84c826f34fa324ee1c
https://github.com/llvm/llvm-project/commit/71e3de8a7f1c0fc71302ac84c826f34fa324ee1c
Author: Simone Pellegrini <simone.pellegrini at arm.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
Log Message:
-----------
[mlir][vector] Missing indices on vectorization of 1-d reduction to 1-ranked memref (#166959)
Vectorization of a 1-d reduction where the output variable is a 1-ranked
memref can generate an invalid `vector.transfer_write` with no indices
for the memref, e.g.:
vector.transfer_write"(%vec, %buff) <{...}> : (vector<f32>,
memref<1xf32>) -> ()
This patch solves the problem by providing the expected amount of
indices (i.e. matching the rank of the memref).
Commit: b11b7b333ddb90db42dfd2d5003e3a51c3a7c38a
https://github.com/llvm/llvm-project/commit/b11b7b333ddb90db42dfd2d5003e3a51c3a7c38a
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/test/Analysis/block-in-critical-section.cpp
Log Message:
-----------
[clang][analyzer] Add defer_lock_t modelling to BlockInCriticalSectionChecker (#168338)
Fixes #166573
---------
Co-authored-by: Donát Nagy <donat.nagy at ericsson.com>
Co-authored-by: Alan Li <me at alanli.org>
Commit: b79a665f7170fbb631b13175ec747ccfd779bf9e
https://github.com/llvm/llvm-project/commit/b79a665f7170fbb631b13175ec747ccfd779bf9e
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
[AMDGPU] Remove leftover implicit operands from SI_SPILL/SI_RESTORE. (#168546)
Remove leftover implicit operands from SI_SPILL/SI_RESTORE.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 86a82f27ee8cb7477c25561bc5697a6a6a8ff21d
https://github.com/llvm/llvm-project/commit/86a82f27ee8cb7477c25561bc5697a6a6a8ff21d
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M mlir/CMakeLists.txt
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/python/CMakeLists.txt
Log Message:
-----------
[MLIR][Python] make sure stubs get installed with LLVM_DISTRIBUTION_COMPONENTS (#168407)
Fixes https://github.com/llvm/llvm-project/issues/168393. Also adds
top-level `MLIR_PYTHON_STUBGEN_ENABLED` CMake option.
Commit: 9cd40da328ca4ee4018dae42f071e5a1540e359f
https://github.com/llvm/llvm-project/commit/9cd40da328ca4ee4018dae42f071e5a1540e359f
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M flang/test/Lower/assignment.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/host-associated.f90
Log Message:
-----------
[flang][NFC] Strip trailing whitespace from tests (7 of N)
Only some fortran source files in flang/test/Lower have been modified.
The other files in the directory will be cleaned up in subsequent
commits
Commit: 7a3923676fecb0dc8d2d728310e84949dabb511a
https://github.com/llvm/llvm-project/commit/7a3923676fecb0dc8d2d728310e84949dabb511a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/interface_symbols_darwin.cpp
Log Message:
-----------
[ASan] Fix interface_symbols_darwin.cpp on internal shell
This test turned out to not actually be that interested. There was just a
subshell usage that needed replacing with readfile, and then the test just
works.
Reviewers: fmayer, DanBlackwell, ndrewh
Reviewed By: ndrewh
Pull Request: https://github.com/llvm/llvm-project/pull/168654
Commit: b4366bbe83c4370c05dc318927a24ae3c8ed39a4
https://github.com/llvm/llvm-project/commit/b4366bbe83c4370c05dc318927a24ae3c8ed39a4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
M bolt/test/lit.local.cfg
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/property-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/no-int-to-ptr.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-copy-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/std-allocator-const.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
M clang/docs/AllocToken.rst
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/llvm_libc_wrappers/assert.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/llvm_libc_wrappers/inttypes.h
R clang/lib/Headers/llvm_libc_wrappers/llvm-libc-decls/README.txt
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Headers/llvm_libc_wrappers/stdlib.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Headers/llvm_libc_wrappers/time.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/test/Analysis/block-in-critical-section.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
A clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
A clang/test/CodeGen/Sparc/sparc-arguments.c
A clang/test/CodeGen/Sparc/sparc-vaarg.c
A clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/Sparc/sparcv8-inline-asm.c
A clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/Sparc/sparcv9-class-return.cpp
A clang/test/CodeGen/Sparc/sparcv9-dwarf.c
A clang/test/CodeGen/Sparc/sparcv9-inline-asm.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/link-builtin-bitcode.c
R clang/test/CodeGen/sparc-arguments.c
R clang/test/CodeGen/sparc-vaarg.c
R clang/test/CodeGen/sparcv8-abi.c
R clang/test/CodeGen/sparcv8-inline-asm.c
R clang/test/CodeGen/sparcv9-abi.c
R clang/test/CodeGen/sparcv9-class-return.cpp
R clang/test/CodeGen/sparcv9-dwarf.c
R clang/test/CodeGen/sparcv9-inline-asm.c
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/alloc-token.cpp
M clang/test/SemaHLSL/Availability/attr-availability-compute.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-mesh.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-lib.hlsl
A clang/test/SemaHLSL/Semantics/missing-vs.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
M clang/test/SemaHLSL/Semantics/position.vs.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/lib/asan/CMakeLists.txt
A compiler-rt/lib/asan/asan_aix.cpp
M compiler-rt/lib/asan/asan_posix.cpp
M compiler-rt/lib/asan/scripts/asan_symbolize.py
M compiler-rt/lib/sanitizer_common/symbolizer/CMakeLists.txt
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M flang/test/Lower/assignment.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/host-associated.f90
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/docs/dev/header_generation.rst
M libc/test/src/stdio/fileop_test.cpp
R libc/utils/hdrgen/hdrgen/gpu_headers.py
M libc/utils/hdrgen/hdrgen/yaml_to_classes.py
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int32.inc
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int64.inc
M libclc/opencl/lib/amdgcn/SOURCES
R libclc/opencl/lib/amdgcn/cl_khr_int64_extended_atomics/minmax_helpers.ll
M libclc/opencl/lib/generic/atomic/atom_add.cl
M libclc/opencl/lib/generic/atomic/atom_and.cl
M libclc/opencl/lib/generic/atomic/atom_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atom_dec.cl
M libclc/opencl/lib/generic/atomic/atom_inc.cl
R libclc/opencl/lib/generic/atomic/atom_int32_binary.inc
M libclc/opencl/lib/generic/atomic/atom_max.cl
M libclc/opencl/lib/generic/atomic/atom_min.cl
M libclc/opencl/lib/generic/atomic/atom_or.cl
M libclc/opencl/lib/generic/atomic/atom_sub.cl
M libclc/opencl/lib/generic/atomic/atom_xchg.cl
M libclc/opencl/lib/generic/atomic/atom_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_add.cl
M libclc/opencl/lib/generic/atomic/atomic_and.cl
M libclc/opencl/lib/generic/atomic/atomic_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
M libclc/opencl/lib/generic/atomic/atomic_max.cl
M libclc/opencl/lib/generic/atomic/atomic_min.cl
M libclc/opencl/lib/generic/atomic/atomic_or.cl
M libclc/opencl/lib/generic/atomic/atomic_sub.cl
M libclc/opencl/lib/generic/atomic/atomic_xchg.cl
M libclc/opencl/lib/generic/atomic/atomic_xor.cl
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__ranges/iota_view.h
M libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
M lld/test/ELF/dso-undef-extract-lazy.s
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
A llvm/lib/Target/RISCV/RISCVPassRegistry.def
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Coupled.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/Invariant.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PR51512.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/Separability.ll
M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
M llvm/test/CodeGen/AArch64/arm64-trn.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
A llvm/test/CodeGen/RISCV/sincos-expansion.ll
A llvm/test/CodeGen/X86/vector-compress-freeze.ll
M llvm/test/Transforms/LoopFusion/pr164082.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
A llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
A llvm/test/Transforms/LoopInterchange/zero-btc.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies_multidims.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M mlir/CMakeLists.txt
R mlir/docs/Dialects/NVVM/_index.md
A mlir/docs/Dialects/NVVMDialect.md
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/Properties.td
M mlir/include/mlir/Transforms/Passes.h
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
M mlir/python/CMakeLists.txt
M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/test/lit.site.cfg.in
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
A orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M runtimes/CMakeLists.txt
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Commit: ad701abfc809e7993c980c7c7572a97b9302d8c7
https://github.com/llvm/llvm-project/commit/ad701abfc809e7993c980c7c7572a97b9302d8c7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-19 (Wed, 19 Nov 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/new-prs.yml
M bolt/test/lit.local.cfg
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.rst
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
M clang-tools-extra/docs/clang-tidy/checks/objc/property-declaration.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/no-int-to-ptr.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-copy-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/std-allocator-const.rst
M clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
M clang/docs/AllocToken.rst
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/llvm_libc_wrappers/assert.h
M clang/lib/Headers/llvm_libc_wrappers/ctype.h
M clang/lib/Headers/llvm_libc_wrappers/inttypes.h
R clang/lib/Headers/llvm_libc_wrappers/llvm-libc-decls/README.txt
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Headers/llvm_libc_wrappers/stdlib.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Headers/llvm_libc_wrappers/time.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/test/Analysis/block-in-critical-section.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
A clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
A clang/test/CodeGen/Sparc/sparc-arguments.c
A clang/test/CodeGen/Sparc/sparc-vaarg.c
A clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/Sparc/sparcv8-inline-asm.c
A clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/Sparc/sparcv9-class-return.cpp
A clang/test/CodeGen/Sparc/sparcv9-dwarf.c
A clang/test/CodeGen/Sparc/sparcv9-inline-asm.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/link-builtin-bitcode.c
R clang/test/CodeGen/sparc-arguments.c
R clang/test/CodeGen/sparc-vaarg.c
R clang/test/CodeGen/sparcv8-abi.c
R clang/test/CodeGen/sparcv8-inline-asm.c
R clang/test/CodeGen/sparcv9-abi.c
R clang/test/CodeGen/sparcv9-class-return.cpp
R clang/test/CodeGen/sparcv9-dwarf.c
R clang/test/CodeGen/sparcv9-inline-asm.c
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/alloc-token.cpp
M clang/test/SemaHLSL/Availability/attr-availability-compute.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-mesh.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-default-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-relaxed-lib.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-compute.hlsl
M clang/test/SemaHLSL/Availability/avail-diag-strict-lib.hlsl
A clang/test/SemaHLSL/Semantics/missing-vs.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
M clang/test/SemaHLSL/Semantics/position.vs.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/lib/asan/CMakeLists.txt
A compiler-rt/lib/asan/asan_aix.cpp
M compiler-rt/lib/asan/asan_posix.cpp
M compiler-rt/lib/asan/scripts/asan_symbolize.py
M compiler-rt/lib/sanitizer_common/symbolizer/CMakeLists.txt
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M flang/test/Lower/assignment.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/host-associated.f90
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/docs/dev/header_generation.rst
M libc/test/src/stdio/fileop_test.cpp
R libc/utils/hdrgen/hdrgen/gpu_headers.py
M libc/utils/hdrgen/hdrgen/yaml_to_classes.py
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int32.inc
M libclc/opencl/include/clc/opencl/atomic/atom_decl_int64.inc
M libclc/opencl/lib/amdgcn/SOURCES
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M libclc/opencl/lib/generic/atomic/atom_add.cl
M libclc/opencl/lib/generic/atomic/atom_and.cl
M libclc/opencl/lib/generic/atomic/atom_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atom_dec.cl
M libclc/opencl/lib/generic/atomic/atom_inc.cl
R libclc/opencl/lib/generic/atomic/atom_int32_binary.inc
M libclc/opencl/lib/generic/atomic/atom_max.cl
M libclc/opencl/lib/generic/atomic/atom_min.cl
M libclc/opencl/lib/generic/atomic/atom_or.cl
M libclc/opencl/lib/generic/atomic/atom_sub.cl
M libclc/opencl/lib/generic/atomic/atom_xchg.cl
M libclc/opencl/lib/generic/atomic/atom_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_add.cl
M libclc/opencl/lib/generic/atomic/atomic_and.cl
M libclc/opencl/lib/generic/atomic/atomic_cmpxchg.cl
M libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
M libclc/opencl/lib/generic/atomic/atomic_max.cl
M libclc/opencl/lib/generic/atomic/atomic_min.cl
M libclc/opencl/lib/generic/atomic/atomic_or.cl
M libclc/opencl/lib/generic/atomic/atomic_sub.cl
M libclc/opencl/lib/generic/atomic/atomic_xchg.cl
M libclc/opencl/lib/generic/atomic/atomic_xor.cl
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__ranges/iota_view.h
M libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
M lld/test/ELF/dso-undef-extract-lazy.s
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h
R llvm/include/llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
A llvm/lib/Target/RISCV/RISCVPassRegistry.def
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Coupled.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/Invariant.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PR51512.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/Separability.ll
M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
M llvm/test/CodeGen/AArch64/arm64-trn.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/NVPTX/convert-sm80-sf.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
A llvm/test/CodeGen/RISCV/sincos-expansion.ll
A llvm/test/CodeGen/X86/vector-compress-freeze.ll
M llvm/test/Transforms/LoopFusion/pr164082.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
A llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
A llvm/test/Transforms/LoopInterchange/zero-btc.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies_multidims.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M mlir/CMakeLists.txt
R mlir/docs/Dialects/NVVM/_index.md
A mlir/docs/Dialects/NVVMDialect.md
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/Properties.td
M mlir/include/mlir/Transforms/Passes.h
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
M mlir/python/CMakeLists.txt
M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor.mlir
A mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor.mlir
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/test/lit.site.cfg.in
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
A orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M runtimes/CMakeLists.txt
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
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