[all-commits] [llvm/llvm-project] 699a0f: [AMDGPU] Verify dominance when rewriting spills to...

[Austin Kerbow via All-commits]

  Branch: refs/heads/users/kerbowa/rewrite-agpr-copy-crash
  Home:   https://github.com/llvm/llvm-project
  Commit: 699a0fa80d2030ff0b874efdaa66bddc464dab07
      https://github.com/llvm/llvm-project/commit/699a0fa80d2030ff0b874efdaa66bddc464dab07
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2025-11-10 (Mon, 10 Nov 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
    A llvm/test/CodeGen/AMDGPU/rewrite-agpr-spill-multi-store-crash.ll

  Log Message:
  -----------
  [AMDGPU] Verify dominance when rewriting spills to registers

When performing spill elimination in the AGPR copy rewrite pass it was
possible to see spill reloads that were not dominated by any store. This
caused invalid MIR to be generated where vreg uses were not dominated by
defs. This patch adds a dominance check before rewriting spills.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications