[all-commits] [llvm/llvm-project] 70f4b5: Add `llvm.vector.partial.reduce.fadd` intrinsic (#...

[Damian Heaton via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 70f4b596cf453369ce4111c23e7e93633e5fe4b1
      https://github.com/llvm/llvm-project/commit/70f4b596cf453369ce4111c23e7e93633e5fe4b1
  Author: Damian Heaton <Damian.Heaton at arm.com>
  Date:   2025-11-07 (Fri, 07 Nov 2025)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/CodeGen/ISDOpcodes.h
    M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    A llvm/test/CodeGen/AArch64/sve2p1-fdot.ll
    A llvm/test/CodeGen/AArch64/sve2p1-fixed-length-fdot.ll

  Log Message:
  -----------
  Add `llvm.vector.partial.reduce.fadd` intrinsic (#159776)

With this intrinsic, and supporting SelectionDAG nodes, we can better
make use of instructions such as AArch64's `FDOT`.



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