[all-commits] [llvm/llvm-project] 6145b9: [RISCV] Support outlining of CFI instructions in t...

[Sudharsan Veeravalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6145b9d1925ada30b49ddf0a190d01407edc4e10
      https://github.com/llvm/llvm-project/commit/6145b9d1925ada30b49ddf0a190d01407edc4e10
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-11-07 (Fri, 07 Nov 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/test/CodeGen/RISCV/machine-outliner-cfi.mir

  Log Message:
  -----------
  [RISCV] Support outlining of CFI instructions in the machine outliner (#166149)

Add support for outlining CFI instructions if

  a) the outlined function is being tail called
  b) all of the CFI instructions in the function are being outlined

This is similar to what is being done on AArch64 and X86.

---------

Co-authored-by: Craig Topper <craig.topper at sifive.com>



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