[all-commits] [llvm/llvm-project] 99334f: [ADT] Add static_assert to llvm::to_address for fu...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Thu Nov 6 08:15:00 PST 2025
Branch: refs/heads/users/boomanaiden154/main.ci-make-premerge_advisor_explain-write-comments
Home: https://github.com/llvm/llvm-project
Commit: 99334f74ae1cd57634c87975e32c797bed3865ce
https://github.com/llvm/llvm-project/commit/99334f74ae1cd57634c87975e32c797bed3865ce
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/include/llvm/ADT/STLForwardCompat.h
Log Message:
-----------
[ADT] Add static_assert to llvm::to_address for function types (#166505)
This patch aligns llvm::to_address with C++20 std::to_address by
adding a static_assert to prevent instantiation with function types.
The C++20 standard says that std::to_address is ill-formed on a
function type.
Commit: ab02808c66b0e14c35356c378399ca04a9bc7271
https://github.com/llvm/llvm-project/commit/ab02808c66b0e14c35356c378399ca04a9bc7271
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
[Support] Simplify minIntN and isUIntN (NFC) (#166506)
Commit: 0b29c3c1a1bd3d57961dbba7a39b8dae29b4ecf2
https://github.com/llvm/llvm-project/commit/0b29c3c1a1bd3d57961dbba7a39b8dae29b4ecf2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonQFPOptimizer.cpp
Log Message:
-----------
[Hexagon] Remove redundant declarations (NFC) (#166507)
These two functions are decalred in Hexagon.h.
Identified with readability-redundant-declaration.
Commit: aea75d059f24b4f191d7601f68d61b28f78c4d4d
https://github.com/llvm/llvm-project/commit/aea75d059f24b4f191d7601f68d61b28f78c4d4d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/ObjectYAML/ELFYAML.cpp
Log Message:
-----------
[ObjectYAML] Remove redundant declarations (NFC) (#166508)
In C++17, static constexpr members are implicitly inline, so they no
longer require an out-of-line definition.
Identified with readability-redundant-declaration.
Commit: d7c1df38b99bd3ab01b50cfe5fb6b0b2e5044091
https://github.com/llvm/llvm-project/commit/d7c1df38b99bd3ab01b50cfe5fb6b0b2e5044091
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/docs/GoldPlugin.rst
Log Message:
-----------
[llvm] Proofread GoldPlugin.rst (#166509)
Commit: 6fec104b45734034f3772747e5adb47b1f7ee658
https://github.com/llvm/llvm-project/commit/6fec104b45734034f3772747e5adb47b1f7ee658
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
Log Message:
-----------
[AMDGPU] Enable typechecks for __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16 (#166547)
We didn't remove the `t` for this builtin in the past due to not being
sure if we should use `float16/half`.
This patch doesn't fix the _Float16/half question, I'll address that in
a separate patch later (after discussing the options on our weekly
meeting). At the moment we maintain the `h` for this builtin (which is
likely not what we want for HIP).
Commit: 3154a841be807943fc83604ab8b2d9ecf300ac21
https://github.com/llvm/llvm-project/commit/3154a841be807943fc83604ab8b2d9ecf300ac21
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/packetizer.ll
Log Message:
-----------
[AMDGPU] Autogenerate R600 packetizer checks (#166570)
Commit: d4e3a2327da11e07961117b3b443de24a8d80095
https://github.com/llvm/llvm-project/commit/d4e3a2327da11e07961117b3b443de24a8d80095
Author: Martin Storsjö <martin at martin.st>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang] [doc] Document that the ms_abi attribute works on aarch64 too (#166373)
Since 022e782e75766e9dd98b9e18572129cd313f3ab5 (2017) this attribute has
an effect on both aarch64 and x86_64; update the docs to reflect this.
Commit: 95c87505255032c1cfcd4091e1e114865f62be9a
https://github.com/llvm/llvm-project/commit/95c87505255032c1cfcd4091e1e114865f62be9a
Author: Joshua Rodriguez <josh.rodriguez at arm.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-neon-3vdiff.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/highextractbitcast.ll
Log Message:
-----------
[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)
GISel no longer falls back onto SDAG when attempting to lower the pmull
and pmull64 intrinsics.
Commit: 0b72899f6db93dab140415e800130c7c82c255b1
https://github.com/llvm/llvm-project/commit/0b72899f6db93dab140415e800130c7c82c255b1
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/include/llvm-libc-macros/math-macros.h
Log Message:
-----------
[libc][math] Refactor the `math_errhandling` macro definition (#166350)
This patch refactors the logic to define each component of the
`math_errhandling` macro.
It assumes that math error handling is supported by the target and the C
library unless otherwise disabled in the preprocessor logic.
In addition to the refactoring, the support for error handling via
exceptions is explicitly disabled for Arm targets with no FPU, that is,
where `__ARM_FP` is not defined. This is because LLVM libc does not
provide a floating-point environment for Arm no-FP configurations (or at
least one with support for FP exceptions).
Commit: 9b1719efa063b78a996d837b8b4bcb11ddcffcf8
https://github.com/llvm/llvm-project/commit/9b1719efa063b78a996d837b8b4bcb11ddcffcf8
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M lldb/include/lldb/lldb-private-types.h
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Mark single-argument SourceLanguage constructors explicit (#166527)
This avoids unintentional comparisons between `SourceLanguage` and
`LanguageType`.
Also marks `operator bool` explicit so we don't implicitly convert to
bool.
Commit: 056d2c12f75654b4b78c938a5243fa57efbd1547
https://github.com/llvm/llvm-project/commit/056d2c12f75654b4b78c938a5243fa57efbd1547
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
A llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Transforms/Utils/DeclareRuntimeLibcalls.cpp
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sincos_stret.ll
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcalls: Split lowering decisions into LibcallLoweringInfo (#164987)
Introduce a new class for the TargetLowering usage. This tracks the
subtarget specific lowering decisions for which libcall to use.
RuntimeLibcallsInfo is a module level property, which may have multiple
implementations of a particular libcall available. This attempts to be
a minimum boilerplate patch to introduce the new concept.
In the future we should have a tablegen way of selecting which
implementations should be used for a subtarget. Currently we
do have some conflicting implementations added, it just happens
to work out that the default cases to prefer is alphabetically
first (plus some of these still are using manual overrides
in TargetLowering constructors).
Commit: dd8892300e7279e4b3ea5e085defe14d4849626f
https://github.com/llvm/llvm-project/commit/dd8892300e7279e4b3ea5e085defe14d4849626f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
Log Message:
-----------
RuntimeLibcalls: Remove LibcallLoweringPredicate from RuntimeLibcallImpl (#166585)
This is unused and will not make sense.
Commit: 6312d2751144bd53af7ef56798cbe60aa8b2fb56
https://github.com/llvm/llvm-project/commit/6312d2751144bd53af7ef56798cbe60aa8b2fb56
Author: Finn Plummer <mail at inbelic.dev>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
A llvm/test/CodeGen/DirectX/wavesize-md-errs.ll
A llvm/test/CodeGen/DirectX/wavesize-md-valid.ll
Log Message:
-----------
[DirectX] Emit `hlsl.wavesize` function attribute as entry property metadata (#165624)
This pr adds support for emitting the `hlsl.wavesize` function attribute
as an entry property metadata for a compute shader.
It follows the implementation of `hlsl.numthreads`.
- Collects the wave range information from the function attribute in
`DXILMetadataAnalysis`
- Introduce the `WaveRange` property tag
- Emit a `WaveSize` or `WaveRange` metadata (depending on shader model)
in `DXILTranslateMetadata`
- Add tests for valid/invalid scenarios
- Updates the base `PSVInfo` to reflect the min/max wave lane counts
Resolves #70118
Commit: a1f0fe140a0e8f15dcd33df42b2c8cf170f69db8
https://github.com/llvm/llvm-project/commit/a1f0fe140a0e8f15dcd33df42b2c8cf170f69db8
Author: nerix <nerixdev at outlook.de>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Demangle/MicrosoftDemangle.cpp
Log Message:
-----------
[MsDemangle] Use NodeList over SmallVector for target names (#166586)
Using `SmallVector` would introduce a dependency cycle (see
https://github.com/llvm/llvm-project/pull/155630#discussion_r2495268497),
so this uses a NodeList.
Commit: 9564b26f81f481f91299ebc446011ed4e5407400
https://github.com/llvm/llvm-project/commit/9564b26f81f481f91299ebc446011ed4e5407400
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M lldb/CMakeLists.txt
M lldb/bindings/python/get-python-config.py
Log Message:
-----------
[lldb] Support a Stable ABI LLDB_PYTHON_EXT_SUFFIX (#166269)
When building against the Python Stable API, we should use the `abi3`
ABI tag. Otherwise, Python will refuse to import the native shared
object. This PR adds support for generating a stable ABI compatible
suffix when `LLDB_ENABLE_PYTHON_LIMITED_API` is set.
Previously, on Darwin when building against Python 3.14, you would end
up with `_lldb.cpython-314-darwin.so`. Now, when using the stable ABI,
you get `_lldb.abi3.so` instead. A different version of the Python
interpreter will not consider loading the former, but will load the
latter.
Commit: f60e69315e9ed94b2b330acb39a766ac86aa1f80
https://github.com/llvm/llvm-project/commit/f60e69315e9ed94b2b330acb39a766ac86aa1f80
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/test/CodeGen/ARM/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/ARM/call-graph-section-assembly.ll
M llvm/test/CodeGen/ARM/call-graph-section-tailcall.ll
M llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/X86/call-graph-section-assembly.ll
Log Message:
-----------
[llvm] Emit canonical linkage correct function symbol (#166487)
In the call graph section, we were emitting the temporary label
pointing to the start of the function instead of the canonical linkage
correct function symbol. This patch fixes it and updates the
corresponding tests.
Commit: cb41408d3c2de0d79b9c4c39ed2a8639906bc572
https://github.com/llvm/llvm-project/commit/cb41408d3c2de0d79b9c4c39ed2a8639906bc572
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
A llvm/test/CodeGen/Xtensa/s32c1i.ll
A llvm/test/MC/Xtensa/s32c1i.s
Log Message:
-----------
[Xtensa] Fix S32C1I instruction encoding and copyPhysReg. (#165174)
Fix S21C1I instruction encoding.Fix special registers parsing for S32C1I
feature. Fix copyPhysReg function for f32 registers copy.
Commit: efa7ab06ebf7e88a3cf1befebf58f24f8b09fcec
https://github.com/llvm/llvm-project/commit/efa7ab06ebf7e88a3cf1befebf58f24f8b09fcec
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
Log Message:
-----------
[profcheck] Add unknown branch weights to expanded cmpxchg loop. (#165841)
The AtomicExpandPass is responsible for lowering high-level atomic
operations (like `atomicrmw fadd`) that are unsupported by the target
hardware into a cmpxchg retry loop.
Given that we cannot empirically prove the precision branch weights, It
uses the `setExplicitlyUnknownBranchWeightsIfProfiled` function to
explicitly add "unknown" (50/50) branch weights to this branch.
This PR includes fies for the following tests:
```
Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
Transforms/AtomicExpand/AArch64/pcsections.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-nand.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
Transforms/AtomicExpand/ARM/atomicrmw-fp.ll
Transforms/AtomicExpand/LoongArch/atomicrmw-fp.ll
Transforms/AtomicExpand/Mips/atomicrmw-fp.ll
Transforms/AtomicExpand/PowerPC/atomicrmw-fp.ll
Transforms/AtomicExpand/RISCV/atomicrmw-fp.ll
Transforms/AtomicExpand/SPARC/libcalls.ll
Transforms/AtomicExpand/X86/expand-atomic-rmw-fp.ll
Transforms/AtomicExpand/X86/expand-atomic-rmw-initial-load.ll
Transforms/AtomicExpand/X86/expand-atomic-xchg-fp.ll
```
Co-authored-by: Jin Huang <jingold at google.com>
Commit: d49c6707d07389e4bccdb23951dc9d3bc20996b1
https://github.com/llvm/llvm-project/commit/d49c6707d07389e4bccdb23951dc9d3bc20996b1
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libcxxabi/src/demangle/cp-to-llvm.sh
Log Message:
-----------
[libcxxabi][demangle] Fix the cp-to-llvm.sh sync script to copy all headers (#166572)
In https://github.com/llvm/llvm-project/pull/137947 I refactored the
script and added a `copy_files` function, which takes the header files
to copy as an argument.
But because the list of headers is a space separated string, we need to
quote the string. Otherwise we would just copy the first header in the
list.
This patch also adds an `echo` statement in the `copy_files` loop to
print the source/destination. Confirming that the files are copied as
expected.
```
$ libcxxabi/src/demangle/cp-to-llvm.sh
This will overwrite the copies of ItaniumDemangle.h ItaniumNodes.def StringViewExtras.h Utility.h in ../../../llvm/include/llvm/Demangle and DemangleTestCases.inc in ../../../llvm/include/llvm/Demangle/../Testing/Demangle; are you sure? [y/N]y
Copying ./ItaniumDemangle.h to ../../../llvm/include/llvm/Demangle/ItaniumDemangle.h
Copying ./ItaniumNodes.def to ../../../llvm/include/llvm/Demangle/ItaniumNodes.def
Copying ./StringViewExtras.h to ../../../llvm/include/llvm/Demangle/StringViewExtras.h
Copying ./Utility.h to ../../../llvm/include/llvm/Demangle/Utility.h
Copying ../../test/DemangleTestCases.inc to ../../../llvm/include/llvm/Demangle/../Testing/Demangle/DemangleTestCases.inc
```
Luckily there weren't any out-of-sync changes introduced in the
meantime.
Commit: 3c162ba247d30c9d8113e66fe5d96e24156ce797
https://github.com/llvm/llvm-project/commit/3c162ba247d30c9d8113e66fe5d96e24156ce797
Author: nerix <nerixdev at outlook.de>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/test/Shell/SymbolFile/NativePDB/class_layout.cpp
M lldb/unittests/SymbolFile/NativePDB/UdtRecordCompleterTests.cpp
Log Message:
-----------
[LLDB][NativePDB] Add non-overlapping fields in root struct (#166243)
When anonymous unions are used in a struct or vice versa, their fields
are merged into the parent record when using PDB. LLDB tries to recreate
the original definition of the record _with_ the anonymous
unions/structs.
For tagged unions (like `std::optional`) where the tag followed the
anonymous union, the result was suboptimal:
```cpp
// input:
struct Foo {
union {
Bar b;
char c;
};
bool tag;
};
// reconstructed:
struct Foo {
union {
Bar b;
struct {
char c;
bool tag;
};
};
};
```
Once the algorithm is in some nested union, it can't get out.
In the above case, we can get to the correct reconstructed record if we
always add fields that don't overlap others in the root struct. So when
we see `tag`, we'll see that it comes after all other fields, so it's
possible to add it in the root `Foo`.
Commit: af0b6b18a8690e98586f342d28bb97a29c0eb45d
https://github.com/llvm/llvm-project/commit/af0b6b18a8690e98586f342d28bb97a29c0eb45d
Author: Tim Gymnich <tim at gymni.ch>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
Log Message:
-----------
[ProfCheck][NFC] fix argument order for call to setExplicitlyUnknownBranchWeightsIfProfiled (#166601)
Commit: ebeb36b12e4649954a62dfbef7a5b04c5d8e52d7
https://github.com/llvm/llvm-project/commit/ebeb36b12e4649954a62dfbef7a5b04c5d8e52d7
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
Log Message:
-----------
[PowerPC] Implement vsx rotate left word instr (#160754)
Implement `xvrlw`.
Commit: d3caae1c07c297a5765d0498faf43f4730f71466
https://github.com/llvm/llvm-project/commit/d3caae1c07c297a5765d0498faf43f4730f71466
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang/include/clang/Basic/IdentifierTable.h
M clang/lib/Basic/IdentifierTable.cpp
Log Message:
-----------
[clang] Refactor clang's keyword enable/disable mechanism to allow lldb to re-use it (#165323)
lldb's CPlusPlusNameParser is currently identifying keywords using it's
own map implemented using clang/Basic/TokenKinds.def. However, it does
not respect the language options so identifiers can incorrectly
determined to be keywords when using languages in which they are not
keywords.
Rather than implement the logic to enable/disable keywords in both
projects it makes sense for lldb to use clang's implementation.
See #164284 for more information
Commit: bc55f4f4f2b4ef196cf3ec25f69dfbd9cd032237
https://github.com/llvm/llvm-project/commit/bc55f4f4f2b4ef196cf3ec25f69dfbd9cd032237
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.cpp
Log Message:
-----------
[debugserver] Fix debugserver build on < macOS 10.15 (#166599)
The VM_MEMORY_SANITIZER constant was added in macOs 10.15 and friends.
Support using the constant on older OSes.
Fixes #156144
Commit: c193eea86e9f0111e15df62343813857e306b779
https://github.com/llvm/llvm-project/commit/c193eea86e9f0111e15df62343813857e306b779
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 056d2c12f756
Commit: 120689e46679c6db37cd9e839ec0721e80a22d4f
https://github.com/llvm/llvm-project/commit/120689e46679c6db37cd9e839ec0721e80a22d4f
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/src/__support/ctype_utils.h
M libc/src/__support/integer_to_string.h
M libc/src/ctype/CMakeLists.txt
M libc/src/ctype/isalnum.cpp
M libc/src/ctype/isalnum_l.cpp
M libc/src/ctype/isalpha.cpp
M libc/src/ctype/isalpha_l.cpp
M libc/src/ctype/isdigit.cpp
M libc/src/ctype/isdigit_l.cpp
M libc/src/ctype/isgraph.cpp
M libc/src/ctype/isgraph_l.cpp
M libc/src/ctype/islower.cpp
M libc/src/ctype/islower_l.cpp
M libc/src/ctype/ispunct.cpp
M libc/src/ctype/ispunct_l.cpp
M libc/src/ctype/isspace.cpp
M libc/src/ctype/isspace_l.cpp
M libc/src/ctype/isupper.cpp
M libc/src/ctype/isupper_l.cpp
M libc/src/ctype/isxdigit.cpp
M libc/src/ctype/isxdigit_l.cpp
M libc/src/ctype/tolower.cpp
M libc/src/ctype/tolower_l.cpp
M libc/src/ctype/toupper.cpp
M libc/src/ctype/toupper_l.cpp
M libc/src/stdio/printf_core/float_dec_converter_limited.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/src/stdlib/l64a.cpp
M libc/src/string/strcasestr.cpp
M libc/src/strings/strcasecmp.cpp
M libc/src/strings/strcasecmp_l.cpp
M libc/src/strings/strncasecmp.cpp
M libc/src/strings/strncasecmp_l.cpp
M libc/test/UnitTest/MemoryMatcher.cpp
M libc/test/src/ctype/islower_test.cpp
M libc/test/src/stdlib/StrtolTest.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Migrate ctype_utils to use char instead of int where applicable. (#166225)
Functions like isalpha / tolower can operate on chars internally. This
allows us to get rid of unnecessary casts and open a way to creating
wchar_t overloads with the same names (e.g. for isalpha), that would
simplify templated code for conversion functions (see
315dfe5865962d8a3d60e21d1fffce5214fe54ef).
Add the int->char converstion to public entrypoints implementation
instead. We also need to introduce bounds check on the input argument
values - these functions' behavior is unspecified if the argument is
neither EOF nor fits in "unsigned char" range, but the tests we've had
verified that they always return false for small negative values. To
preserve this behavior, cover it explicitly.
Commit: e7f7973899f76773ae6e9a6b1e8c7e9f9cc5cb56
https://github.com/llvm/llvm-project/commit/e7f7973899f76773ae6e9a6b1e8c7e9f9cc5cb56
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/src/__support/CMakeLists.txt
M libc/src/__support/wctype_utils.h
M libc/src/wctype/iswalpha.cpp
M libc/test/src/wchar/WcstolTest.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Migrate wctype_utils to use wchar_t where applicable. (#166234)
This is a counterpart of
https://github.com/llvm/llvm-project/pull/166225 but for wctype_utils
(which are not yet widely used). For now, I'm just changing the types
from wint_t to wchar_t to match the regular ctype_utils change. The next
change may rename most of the functions to match the name of ctype_utils
variants, so that we could be calling them from the templated code
operating on "const char*" and "const wchar_t*" strings, and the right
function signature would be picked up.
Commit: 37fff6e17ee29e790f850f6e133d14a73c08a0f8
https://github.com/llvm/llvm-project/commit/37fff6e17ee29e790f850f6e133d14a73c08a0f8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/FPEnv.cpp
M llvm/lib/IR/Operator.cpp
M llvm/lib/IR/PassTimingInfo.cpp
M llvm/lib/IR/PseudoProbe.cpp
M llvm/lib/IR/ReplaceConstant.cpp
M llvm/lib/IR/Use.cpp
M llvm/lib/IR/User.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[NFC][LLVM][IR] Cleanup namespace usage in LLVM IR cpp files (#166477)
Commit: 00171b352def8afa314c89a090501e890326fb34
https://github.com/llvm/llvm-project/commit/00171b352def8afa314c89a090501e890326fb34
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
M llvm/utils/TableGen/SDNodeInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in SDNodeInfoEmitter (#165622)
Use `IfDefEmitter` and `NamespaceEmitter` in SDNodeInfoEmitter.
Commit: 28a279ce14f913df71546d8201d5363682a75901
https://github.com/llvm/llvm-project/commit/28a279ce14f913df71546d8201d5363682a75901
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
A lldb/tools/lldb-dap/src-ts/utils.ts
Log Message:
-----------
[lldb-dap] expand tilde in dap executable path (#162635)
Users may have multiple devices and would like to resolve the homepath
based on the machine they are on.
expands the tilde `~` character at the front of the given file path.
Commit: 3d0a3674d9ae52ed685ce467a48653cc27a2e5eb
https://github.com/llvm/llvm-project/commit/3d0a3674d9ae52ed685ce467a48653cc27a2e5eb
Author: Marcell Leleszi <59964679+mleleszi at users.noreply.github.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/IntegrationTest/test.h
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ErrnoCheckingTest.h
Log Message:
-----------
[libc] Make errno asserts noop on gpu targets (#166606)
This patch defines errno unit and integration test asserts as noop on
GPU targets. Checking for errnos is tests has caused build breakages in
previous patches.
Commit: e2d2affc70a8191ea67eee697e83ef4834c6b4a8
https://github.com/llvm/llvm-project/commit/e2d2affc70a8191ea67eee697e83ef4834c6b4a8
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-control-flow.ll
Log Message:
-----------
[AMDGPU][LowerBufferFatPointers] Fix crash with `select false` (#166471)
If the input to LowerBufferFatPointers is such that the resource- and
offset-specific `select` instructions generated for a `select` on `ptr
addrspae(7)` fold away, the pass would crash when trying to replace an
instruction with itself. This commit resolves the issue.
Fixes https://github.com/iree-org/iree/issues/22551
Commit: 1041423393ff64834df793a8bd982fa6c898d5d8
https://github.com/llvm/llvm-project/commit/1041423393ff64834df793a8bd982fa6c898d5d8
Author: SKill <skill at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang/include/clang/Basic/SourceManager.h
M clang/lib/Basic/SourceManager.cpp
Log Message:
-----------
[clang][SourceManager] Reuse code when computing Column and Line numbers (#166593)
Commit: db6231b4c2e18bb5fc107624e9c9071b02124844
https://github.com/llvm/llvm-project/commit/db6231b4c2e18bb5fc107624e9c9071b02124844
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/test/MC/AMDGPU/gfx90a_err.s
M llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
M llvm/test/MC/AMDGPU/gfx942_err.s
M llvm/test/MC/AMDGPU/gfx9_asm_flat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx9_flat.txt
Log Message:
-----------
[AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A (#154237) targets
This patch enables support of the NV (non-volatile) bit in FLAT
instructions in GFX9 (pre-GFX90A) targets.
Commit: 6c4f9688082361a5c5d57aa1e6d368dfc4aeea75
https://github.com/llvm/llvm-project/commit/6c4f9688082361a5c5d57aa1e6d368dfc4aeea75
Author: Hannes Braun <hannes at hannesbraun.net>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestJava.cpp
Log Message:
-----------
[clang-format] Fix brace wrapping for Java records (#164711)
The brace wrapping for Java records should now behave similar to
classes. Before, opening braces for Java records were always placed in
the same line as the record definition.
Commit: 0469ff0a212d7f3dea464c52e19d56e22b5af858
https://github.com/llvm/llvm-project/commit/0469ff0a212d7f3dea464c52e19d56e22b5af858
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/utils/TableGen/Basic/CMakeLists.txt
A llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
A llvm/utils/TableGen/Basic/RuntimeLibcalls.h
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
TableGen: Split RuntimeLibcallsEmitter into separate utility header (#166583)
This information will be needed in more emitters, so start factoring
it to be more reusable.
Commit: b0ae054a568622982e7e623c354709a7463b152a
https://github.com/llvm/llvm-project/commit/b0ae054a568622982e7e623c354709a7463b152a
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Fix LDR relocation type in ADRP+LDR sequence (#166391)
`R_AARCH64_ADD_ABS_LO12_NC` is for the `ADD` instruction in the
`ADRP+ADD` sequence. For `ADRP+LDR` sequence generated in LDR
relaxation, relocation type for `LDR` should be
`R_AARCH64_LDST64_ABS_LO12_NC` if it is 64-bit integer load or
`R_AARCH64_LDST32_ABS_LO12_NC` if 32-bit.
Sorry should have included this in #165787.
Commit: f76c132230326a296c4fb8f7cb6c0fb6b943fadb
https://github.com/llvm/llvm-project/commit/f76c132230326a296c4fb8f7cb6c0fb6b943fadb
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/switch-of-powers-of-two.ll
Log Message:
-----------
[SimplifyCFG] Fix weight calculation for `simplifySwitchOfPowersOfTwo` (#165956)
Continued from #165804
This maintains the BFI of the default branch. Originally `10/63`, post-pass, it ends up being `5/63 + 58/63 * 5/58`(first term is from `PROF`, second is the probability of going to the switch lookup times the probability, there, of taking the default branch)
Issue #147390
Commit: 78d649199b47370b72848c1ca8d9bd3323b050ac
https://github.com/llvm/llvm-project/commit/78d649199b47370b72848c1ca8d9bd3323b050ac
Author: Ramkrishnan <ramkrishnan.nk at huawei.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
A llvm/test/Transforms/LoopVectorize/AArch64/interleaved_store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/interleave_vec.ll
Log Message:
-----------
[InterleavedAccess] Construct interleaved access store with shuffles
Cost of interleaved store of 8 factor and 16 factor are cheaper in AArch64 with additional interleave instructions.
Commit: 1fc5c02aa56ad4cef1391863dfc0922ef7110569
https://github.com/llvm/llvm-project/commit/1fc5c02aa56ad4cef1391863dfc0922ef7110569
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/test/Transforms/LoopDistribute/basic-with-memchecks.ll
Log Message:
-----------
[LVer][profcheck] explicitly set unknown branch weights for the versioned/unversioned selector (#164507)
We don't have sufficient information to know when the versioned (or unversioned) loop variant will be taken, so we mark the branch as having "unknown" probabilities.
Issue #147390
Commit: 163933e9e7099f352ff8df1973f9a9c3d7def6c5
https://github.com/llvm/llvm-project/commit/163933e9e7099f352ff8df1973f9a9c3d7def6c5
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 0469ff0a212d
Commit: 5f1b9023a8093fd8beb931a74d28753fbda88fdf
https://github.com/llvm/llvm-project/commit/5f1b9023a8093fd8beb931a74d28753fbda88fdf
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M bolt/lib/Core/Relocation.cpp
A bolt/test/AArch64/relocation-type-print.s
Log Message:
-----------
[BOLT][AArch64] Fix printing of relocation types (#166621)
Enumeration of relocation types is not always sequential, e.g. on
AArch64 the first real relocation type is 0x101. As such, the existing
code in `Relocation::print()` was crashing while printing AArch64
relocations. Fix it by using `llvm::object::getELFRelocationTypeName()`.
Commit: 54190970cf275fd1d8a99b7c84a6a106fd543c3d
https://github.com/llvm/llvm-project/commit/54190970cf275fd1d8a99b7c84a6a106fd543c3d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-and-casts.ll
Log Message:
-----------
[LV] Add tests for narrowing interleave groups with casts.
Add additional tests for narrowing interleave groups with casts.
Commit: 9e2f73fe9052a4fbf382a06e30b2441c6d99fb7e
https://github.com/llvm/llvm-project/commit/9e2f73fe9052a4fbf382a06e30b2441c6d99fb7e
Author: Marcell Leleszi <59964679+mleleszi at users.noreply.github.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/asprintf.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/printf.cpp
M libc/src/stdio/baremetal/vprintf.cpp
M libc/src/stdio/generic/CMakeLists.txt
M libc/src/stdio/generic/fprintf.cpp
M libc/src/stdio/generic/printf.cpp
M libc/src/stdio/generic/vfprintf.cpp
M libc/src/stdio/generic/vprintf.cpp
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/printf_core/core_structs.h
A libc/src/stdio/printf_core/error_mapper.h
A libc/src/stdio/printf_core/generic/CMakeLists.txt
A libc/src/stdio/printf_core/generic/error_mapper.h
A libc/src/stdio/printf_core/linux/CMakeLists.txt
A libc/src/stdio/printf_core/linux/error_mapper.h
M libc/src/stdio/printf_core/printf_main.h
M libc/src/stdio/printf_core/vasprintf_internal.h
M libc/src/stdio/printf_core/vfprintf_internal.h
M libc/src/stdio/printf_core/write_int_converter.h
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/vasprintf.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/time/strftime_core/strftime_main.h
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fprintf_test.cpp
M libc/test/src/stdio/printf_core/converter_test.cpp
M libc/test/src/stdio/printf_core/writer_test.cpp
M libc/test/src/stdio/snprintf_test.cpp
M libc/test/src/stdio/vfprintf_test.cpp
M libc/test/src/stdlib/StrfromTest.h
Log Message:
-----------
[libc] Add printf error handling (with fixes #2) (#166517)
https://github.com/llvm/llvm-project/issues/159474
Another try of trying to land
https://github.com/llvm/llvm-project/pull/166382
- Fix some leftover tests checking for specific errnos
- Guard errno checking tests to not run on the GPU
@michaelrj-google
Commit: e79528f7b82b6dc98bc8a81d202d58aef3f26519
https://github.com/llvm/llvm-project/commit/e79528f7b82b6dc98bc8a81d202d58aef3f26519
Author: Sayan Sivakumaran <sivakusayan at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add basic support for nextafter/nexttoward libcalls (#166250)
First patch for #74368. Constant folding will be added in a follow-up
patch.
Commit: 0502314f7a414e089ec8cfc4514ee82ec1198a76
https://github.com/llvm/llvm-project/commit/0502314f7a414e089ec8cfc4514ee82ec1198a76
Author: Peiming Liu <geticliu at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix bazel build (#166641)
Commit: c3b284919139bc0758cd547a56ffd5dbf6e67bb1
https://github.com/llvm/llvm-project/commit/c3b284919139bc0758cd547a56ffd5dbf6e67bb1
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/src/fcntl/linux/creat.cpp
M libc/src/fcntl/linux/openat.cpp
Log Message:
-----------
[libc] Allow openat and creat to return fd 0. (#166466)
Previously, if the `open` or `openat` syscalls returned 0 as a (valid)
file descriptor, the `creat` and `openat` wrappers would erroneously
return -1.
Commit: 0c0b0ea887c8c82881e91b7a6e7ce48ebbe33e61
https://github.com/llvm/llvm-project/commit/0c0b0ea887c8c82881e91b7a6e7ce48ebbe33e61
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
A llvm/test/CodeGen/SPARC/predictable-select.ll
Log Message:
-----------
[SPARC] Mark branches as being expensive in early Niagara CPUs (#166489)
Early Niagara processors (T1-T3) lacks any branch predictor, yet they
also have a pipeline long enough that the delay slot cannot cover for
all of the branch latency.
This means that branch instructions will stall the processor for a
couple cycles, which makes them an expensive operation. Additionally,
the high cost of branching means that it's still profitable to prefer
conditional moves even when the conditional is predictable, so let LLVM
know about both things.
On SPARC T2, a pgbench test seem to show a modest, but pretty consistent
speedup (up to around 3%).
Commit: 5e46103f1b521ccca3e95f27f0e742fa2a2826f7
https://github.com/llvm/llvm-project/commit/5e46103f1b521ccca3e95f27f0e742fa2a2826f7
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
A llvm/test/Transforms/LoopIdiom/X86/preserve-profile.ll
Log Message:
-----------
[LIR][profcheck] Reuse the loop's exit condition profile (#164523)
The idioms are described in https://reviews.llvm.org/D102116 and [https://reviews.llvm.org/D92754](https://reviews.llvm.org/D91038). In both cases, the way the loop is expressed changes, without changing its iteration count, which means we can reuse the original loop's branch probabilities.
Issue #147390
Commit: 5da2c09e6ad3d18c14071e3b2833f4da9b70b6b8
https://github.com/llvm/llvm-project/commit/5da2c09e6ad3d18c14071e3b2833f4da9b70b6b8
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
R llvm/test/CodeGen/X86/issue163738.ll
A llvm/test/CodeGen/X86/vpternlog.ll
Log Message:
-----------
[X86][ISel] Fix VPTERNLOG matching ensuring the InnerOp is logicOp (#166591)
This patch fixes a crash in `tryVPTERNLOG` when trying to peel out the
outer not in cases like `~(A | B | C)`.
Previously, `InnerOp` was taken directly from `Op->getOperand(0)` before
verifying that it was a logical operation. As a result, the code could
later access `InnerOp->getOperand(0)` or `InnerOp->getOperand(1)` even
when `InnerOp` was something like a bitcast, causing an error.
This patch applies `getFoldableLogicOp` to `InnerOp`, ensuring that
`InnerOp` is a valid logic operation before it is dereferenced.
Commit: c1ca4a55d41b8edf4ce4af7a18db537bf3bf4406
https://github.com/llvm/llvm-project/commit/c1ca4a55d41b8edf4ce4af7a18db537bf3bf4406
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Strip redundant code in VPTransformState::get (NFC) (#166145)
vputils::isSingleScalar is sufficient.
Commit: b0b46167906c6ca9b03c14fdf85a2f8383c6bcbc
https://github.com/llvm/llvm-project/commit/b0b46167906c6ca9b03c14fdf85a2f8383c6bcbc
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/vector-scalar-select-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
Log Message:
-----------
[VPlan] Handle single-scalar conds in VPWidenSelectRecipe. (#165506)
Generalize VPWidenSelectRecipe codegen to consider single-scalar
conditions instead of just loop-invariant ones.
If the condition is a single-scalar, we can simply use a scalar
condition.
PR: https://github.com/llvm/llvm-project/pull/165506
Commit: 521bafc203c80eefd25df8888d21635e3a3dff23
https://github.com/llvm/llvm-project/commit/521bafc203c80eefd25df8888d21635e3a3dff23
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[LLDB] Fix typo
Commit: 81dede888a35281e20b59107a6bf347c23e1c5f6
https://github.com/llvm/llvm-project/commit/81dede888a35281e20b59107a6bf347c23e1c5f6
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/src/__support/OSUtil/linux/fcntl.cpp
M libc/test/src/fcntl/fcntl_test.cpp
Log Message:
-----------
[libc] Return errno from OFD failure paths in fcntl. (#166252)
This patch also configures fcntl lock tests to run with F_OFD_* command
variants, as all existing lock tests do not exercise process-associated-
or OFD-specific functionality.
Commit: ac547a532a91670c5d8747e7da1279fe03189c74
https://github.com/llvm/llvm-project/commit/ac547a532a91670c5d8747e7da1279fe03189c74
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
A llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Analysis/Analysis.cpp
M llvm/lib/Analysis/CMakeLists.txt
A llvm/lib/Analysis/RuntimeLibcallInfo.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/Target.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/tools/llc/new-pm/start-stop.ll
Log Message:
-----------
Analysis: Add RuntimeLibcall analysis pass (#165196)
Currently RuntimeLibcallsInfo is a hardcoded list based on the triple.
In the future the available libcall set should be dynamically modifiable
with module flags.
Note this isn't really used yet. TargetLowering is still constructing
its own copy, and untangling that to use this requires several more
steps.
Commit: 9fc8ddd2c8404b79f0176abb33484363e71eb0ec
https://github.com/llvm/llvm-project/commit/9fc8ddd2c8404b79f0176abb33484363e71eb0ec
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Move code narrowing ops feeding an interleave group to helper (NFCI)
Move and combine the code to narrow ops feeding interleave groups to a
single unified static helper. NFC, as legalization logic has not
changed.
Commit: 2d5170594147b42a37698760d6e0194eec4f1390
https://github.com/llvm/llvm-project/commit/2d5170594147b42a37698760d6e0194eec4f1390
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
A clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-co_await-assertion-failure.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Assertion failure with coroutine body (#165650)
Fix the assertion failure in TrivialFunctionAnalysis::isTrivialImpl with
a coroutine body by caching the result with WithCachedResult.
Commit: 597cd767d6ad2cca0d8676888c40cbc5700db1ca
https://github.com/llvm/llvm-project/commit/597cd767d6ad2cca0d8676888c40cbc5700db1ca
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libc/src/__support/OSUtil/linux/fcntl.cpp
M libc/test/src/fcntl/fcntl_test.cpp
Log Message:
-----------
Revert "[libc] Return errno from OFD failure paths in fcntl." (#166658)
Reverts llvm/llvm-project#166252
Causing buildbot failures on `libc-x86_64-debian-dbg-asan`.
Commit: efe8573127b5c3d0934e85055968f5a42507a124
https://github.com/llvm/llvm-project/commit/efe8573127b5c3d0934e85055968f5a42507a124
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-chained.ll
Log Message:
-----------
[LV] Add extra tests for narrowing interleave groups with op chains.
Add additional tests to cover chains of ops feeding interleave groups,
some of which could be narrowed.
Commit: 1ff0098f7c9d3d5f77aaf10ed995964746f35b88
https://github.com/llvm/llvm-project/commit/1ff0098f7c9d3d5f77aaf10ed995964746f35b88
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/test/lit.cfg.py
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Exclude Instrumentation tests (for now) (#166659)
Tracking issue: #166655
Commit: 46c948935dd94c8caa0e8e850a8ec95dff784bd2
https://github.com/llvm/llvm-project/commit/46c948935dd94c8caa0e8e850a8ec95dff784bd2
Author: Moritz Zielke <moritz.zielke at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir
M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
Log Message:
-----------
[GlobalISel] Add `G_EXTRACT_VECTOR_ELT` for `computeKnownBits` (#164825)
The code is ported from `SelectionDAG::computeKnownBits`.
As a result of adding `G_EXTRACT_VECTOR_ELT` to `GlobalISel`, the code
generated for some of the existing regression tests changes. The changes
in `neon-extadd-extract.ll` and `knownbits-buildvector.mir` look good to
me. Though I'm struggling to understand the diff in `sdiv.i64.ll`. Is
there a test that checks if the generated amdgcn produces the correct
result? Or tools that help with executing it (I do have an AMD GPU)?
**Edit**: Related to #150515
Commit: d18b7964292643bb5db2c532a3e833caf5e0ff32
https://github.com/llvm/llvm-project/commit/d18b7964292643bb5db2c532a3e833caf5e0ff32
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
Log Message:
-----------
[clang-doc] remove FullName from serialization (#166595)
An Info's FullName was not being used anywhere in clang-doc. It seems to
have been superseded by other types like QualName. Removing FullName
also orphans getRecordPrototype, which constructs a record's full
declaration (template<...> class ...). There are better ways to
construct this documentation in templates.
Fixes #143086
Commit: 3b010c96ac237e3cad06c7ed467e8a7eca096090
https://github.com/llvm/llvm-project/commit/3b010c96ac237e3cad06c7ed467e8a7eca096090
Author: Wenju He <wenju.he at intel.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/Sema/builtins-elementwise-math.c
Log Message:
-----------
[Clang] Add elementwise ldexp builtin function (#166296)
This PR adds __builtin_elementwise_ldexp. It can be used for
implementing OpenCL ldexp builtin with vector inputs.
Commit: 050cbd297ba401cb4089e13c925f233d1d3af26e
https://github.com/llvm/llvm-project/commit/050cbd297ba401cb4089e13c925f233d1d3af26e
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/Register.h
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
A llvm/unittests/CodeGen/RegisterTest.cpp
Log Message:
-----------
[CodeGen] Allow negative frame indicies in Register class. (#164459)
The register values between `2 << 30` (inclusive) and `2 << 31`
(exclusive) correspond to frame indices. To obtain the frame index from
the given register value we interpret first 30 bits as an unsigned
integer. Thus, currently only non-negative frame indices can be
represented.
However, we should also be able to represent negative frame indices as
register values as well. This is used by reaching definitions analysis
for example.
In order to do that, we interpret the first 30 bits of the register
value as a signed integer.
---------
Co-authored-by: Mikhail Gudim <mgudim at ventanamicro.com>
Co-authored-by: Petr Penzin <ppenzin at tenstorrent.com>
Commit: 3665e7606e221ce58da2bc90b366cf8596d4d088
https://github.com/llvm/llvm-project/commit/3665e7606e221ce58da2bc90b366cf8596d4d088
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 050cbd297ba4
Commit: 8321eaa037b994f22351af67a3e7d8bd4a54ae0c
https://github.com/llvm/llvm-project/commit/8321eaa037b994f22351af67a3e7d8bd4a54ae0c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port ac547a532a91
Commit: d584d00ed250e547c9910e0a93b7f9d07f2e71c3
https://github.com/llvm/llvm-project/commit/d584d00ed250e547c9910e0a93b7f9d07f2e71c3
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
A lldb/bindings/interface/SBFrameListExtensions.i
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
M lldb/include/lldb/API/SBFrame.h
A lldb/include/lldb/API/SBFrameList.h
M lldb/include/lldb/API/SBStream.h
M lldb/include/lldb/API/SBThread.h
M lldb/include/lldb/Target/StackFrameList.h
M lldb/include/lldb/Target/Thread.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBFrameList.cpp
M lldb/source/API/SBThread.cpp
A lldb/test/API/python_api/frame_list/Makefile
A lldb/test/API/python_api/frame_list/TestSBFrameList.py
A lldb/test/API/python_api/frame_list/main.cpp
Log Message:
-----------
[lldb] Introduce SBFrameList for lazy frame iteration (#166651)
This patch introduces `SBFrameList`, a new SBAPI class that allows
iterating over stack frames lazily without calling
`SBThread::GetFrameAtIndex` in a loop.
The new `SBThread::GetFrames()` method returns an `SBFrameList` that
supports Python iteration (`for frame in frame_list:`), indexing
(`frame_list[0]`, `frame_list[-1]`), and length queries (`len()`).
The implementation uses `StackFrameListSP` as the opaque pointer,
sharing the thread's underlying frame list to ensure frames are
materialized on-demand.
This is particularly useful for ScriptedFrameProviders, where user
scripts will be to iterate, filter, and replace frames lazily without
materializing the entire stack upfront.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 158dfe9b3d61c0207b1c189f892da348c684f7d2
https://github.com/llvm/llvm-project/commit/158dfe9b3d61c0207b1c189f892da348c684f7d2
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
Log Message:
-----------
[gn build] Port d584d00ed250
Commit: d2b43ffffcde00108ff1e3e6a4c123037ada6e1f
https://github.com/llvm/llvm-project/commit/d2b43ffffcde00108ff1e3e6a4c123037ada6e1f
Author: Mark Danial <mark.danial at ibm.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M flang/test/Driver/gcc-triple.f90
Log Message:
-----------
[AIX] unsupport gcc triple test case on aix NFC (#166408)
This new test case breaks the buildbot starting
https://lab.llvm.org/buildbot/#/builders/201/builds/6934. The
corresponding clang test case sets the target triple to avoid failures.
Commit: bd9030e762c0bd27f536a3e81d8e8e6c012b49d6
https://github.com/llvm/llvm-project/commit/bd9030e762c0bd27f536a3e81d8e8e6c012b49d6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachTask.h
M lldb/tools/debugserver/source/MacOSX/MachTask.mm
Log Message:
-----------
[debugserver] Move constants into TaskPortForProcessID (NFC) (#166670)
I was looking at the calls to `usleep` in debugserver and noticed that
these default arguments are never overwritten. I converted them to
constants in the function, which makes it easier to reason about.
Commit: 1262dce1fddf7b8e6396d1359b574d36b8992d87
https://github.com/llvm/llvm-project/commit/1262dce1fddf7b8e6396d1359b574d36b8992d87
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrRef.td
M llvm/test/MC/WebAssembly/reference-types.s
Log Message:
-----------
Add support for ref.func to AsmParser/MC (#163326)
This is step 1 of exposing WASM `ref.func` to LLVM.
This PR only handles creating the instruction and a test for assembling
it.
Commit: 47e450190cbb23c615b970814f1fcbc01ec88f91
https://github.com/llvm/llvm-project/commit/47e450190cbb23c615b970814f1fcbc01ec88f91
Author: nvptm <pmathew at nvidia.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-kernels.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-parallel.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-serial.f90
Log Message:
-----------
[flang][acc] Lower zero modifier for Copyout clause (#166660)
>From the OpenACC 3.4 Specification:
```
1924 2.7.9 copyout clause
1925 The copyout clause may appear on structured data and compute constructs, on declare di
1926 rectives, and on exit data directives. The clause may optionally have a zero modifier if the
1927 copyout clause appears on a structured data or compute construct.
1928 Only the following modifiers may appear in the optional modifier-list: always, alwaysin or zero.
1929 Additionally, on structured data and compute constructs capture modifier may appear
```
`readonly` is not a legal modifier for the `copyout` clause. The call to
`genDataOperandOperationsWithModifier` should be checking the parsed
modifier for the `copyout` clause against the `Zero` modifier.
Commit: 93ef57617d080f6eac7a064e09f3e4145c334ae8
https://github.com/llvm/llvm-project/commit/93ef57617d080f6eac7a064e09f3e4145c334ae8
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Add binop-select test to profcheck-xfail.txt (#166678)
Revealed in PR #166102, which itself doesn't _cause_ the profile being
dropped. Referencing if it makes debugging easier.
Commit: b84784f9e63dbf7663c6d29d15df5902522f5656
https://github.com/llvm/llvm-project/commit/b84784f9e63dbf7663c6d29d15df5902522f5656
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/test/lit.cfg.py
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Exclude GPU tests (#166681)
Commit: 77e3975236fcb47f431e3793846746103d259d81
https://github.com/llvm/llvm-project/commit/77e3975236fcb47f431e3793846746103d259d81
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
Log Message:
-----------
[LSCFG][profcheck] Add dummy branch weights for the dummy switch to dead exits (#164714)
As noted in the doc comment of `handleDeadExits`, the dummy switch is just an artifact of the constraints placed by the fact that we operate in a loop pass. Adding weights here is unnecessary, but the complexity is low, and it helps keep things easy for profile propagation verification (in a sense, the overall complexity would be higher if we special-cased this somehow).
Issue #147390
Commit: 5321f5c0b29c6f15019effd1e151003c93c18627
https://github.com/llvm/llvm-project/commit/5321f5c0b29c6f15019effd1e151003c93c18627
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M compiler-rt/test/profile/instrprof-tmpdir.c
Log Message:
-----------
[compiler-rt][Profile] Temporarily Disable Test on AIX
This was very hackily patched in
16ef893e9fdec2b08dafc82f5450b41834e09039 to not use env -u. The internal
shell does not support unset, but does supprt env -u. Disable the test
for now so we can enable the internal shell with a TODO to enable it
after the internal shell landing has stuck.
Reviewers: fmayer, vitalybuka, w2yehia, daltenty, mingmingl-llvm, madanial0
Reviewed By: mingmingl-llvm
Pull Request: https://github.com/llvm/llvm-project/pull/166637
Commit: 67b6fd04dd464554bf82c52f7cac8160e7219c0f
https://github.com/llvm/llvm-project/commit/67b6fd04dd464554bf82c52f7cac8160e7219c0f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
A llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll
Log Message:
-----------
AMDGPU: Delete redundant recursive copy handling code (#157032)
This fixes a regression exposed after
445415219708f9539801018e03282049ca33e0e2.
This introduces a few small regressions for true16. There are more cases
where the value can propagate through subregister extracts which need
new handling. They're also small enough that perhaps there's a way to
avoid needing to deal with this case in the first place.
Commit: 260f9e9f67c038fdfea008b923f5388526a6a236
https://github.com/llvm/llvm-project/commit/260f9e9f67c038fdfea008b923f5388526a6a236
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Update profcheck-xfail.txt after recent fixes (#166685)
Commit: 3361e40c3288e702595433d21cb5ce89e851df85
https://github.com/llvm/llvm-project/commit/3361e40c3288e702595433d21cb5ce89e851df85
Author: Mark Danial <mark.danial at ibm.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M libcxx/utils/ci/buildkite-pipeline.yml
Log Message:
-----------
[AIX] Enable libc++ bots on AIX (#166650)
Removing skip after confirming builds pass locally. Upgraded workers to
clang 20
Fixes #162516
Commit: 9a0000b1502290c302cf421d87deafa7e502b6a6
https://github.com/llvm/llvm-project/commit/9a0000b1502290c302cf421d87deafa7e502b6a6
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/test/MC/AMDGPU/gfx90a_err.s
M llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
M llvm/test/MC/AMDGPU/gfx942_err.s
M llvm/test/MC/AMDGPU/gfx9_asm_flat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx9_flat.txt
Log Message:
-----------
Revert "[AMDGPU][MC] GFX9 - Support NV bit in FLAT instructions in pre-GFX90A" (#166693)
Reverts llvm/llvm-project#154237
It breaks bot: https://lab.llvm.org/buildbot/#/builders/123/builds/30172
Commit: 95557e32945abf9af370b861d6156460b2d9df99
https://github.com/llvm/llvm-project/commit/95557e32945abf9af370b861d6156460b2d9df99
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda][NFC] Use the NVVM op for syncwarp (#166695)
Commit: e700f157026bf8b4d58f936c5db8f152e269d77f
https://github.com/llvm/llvm-project/commit/e700f157026bf8b4d58f936c5db8f152e269d77f
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/test/ClangScanDeps/strip-codegen-args.m
Log Message:
-----------
[clang] Unify -mspeculative-load-hardening as a benign compiler option (#166640)
Before this patch, compilations using modules &
`-mspeculative-load-hardening` failed because it was not consistent
whether this option impacts module compatibility.
This repairs it by always treating it as benign. This was determined by
checking if the option enables any kind of preprocessor checks and
comparing how the compiler handles a similar option that impacts codegen
(-fvisibility=hidden) but is more widely used.
resolves: rdar://163985667
Commit: 49f55f4991227f3c7a2b8161bbf45c74b7023944
https://github.com/llvm/llvm-project/commit/49f55f4991227f3c7a2b8161bbf45c74b7023944
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M mlir/docs/PassManagement.md
M mlir/tools/mlir-tblgen/PassGen.cpp
Log Message:
-----------
[mlir][ods] Enable granular pass registration. (#166532)
Same as with pass def & decl. This doesn't change anything with registry
and the big flag kept (e.g., GEN_PASS_REGISTRATION behaves like
GEN_PASS_DECL and so too for sub ones).
Commit: 868f23f8cc1aec26c40f070d85f70ed3cb6b72cb
https://github.com/llvm/llvm-project/commit/868f23f8cc1aec26c40f070d85f70ed3cb6b72cb
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/test/CodeGen/LoongArch/ldptr.ll
M llvm/test/CodeGen/LoongArch/sink-fold-addi.ll
M llvm/test/CodeGen/LoongArch/stptr.ll
Log Message:
-----------
[LoongArch] Override hooks to enable sink-and-fold support in MachineSink (#163721)
Add option `loongarch-enable-sink-fold` to enable sink-fold and set
`true` as default. This pass can fold `addi+load/store` to a single
`load/store` with offset.
Commit: 556dd019eb7f1512cc72162b17cee3dee73245f3
https://github.com/llvm/llvm-project/commit/556dd019eb7f1512cc72162b17cee3dee73245f3
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Expand multiplication by `(2/4/8 * 3/5/9 + 1) << N` with SHL_ADD (#166372)
Commit: 6986f125c9013f574a5c19c985b47257c5badc6a
https://github.com/llvm/llvm-project/commit/6986f125c9013f574a5c19c985b47257c5badc6a
Author: Jeremy Kun <jkun at google.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
Log Message:
-----------
[mlir] [NFC] Remove stray debug statement (#166696)
Co-authored-by: Jeremy Kun <j2kun at users.noreply.github.com>
Commit: 5e7f7a496ccb4856c7060ba9a4ba222a79306375
https://github.com/llvm/llvm-project/commit/5e7f7a496ccb4856c7060ba9a4ba222a79306375
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-05 (Wed, 05 Nov 2025)
Changed paths:
A llvm/test/CodeGen/ARM/ldexp-fp128.ll
Log Message:
-----------
ARM: Add fp128 ldexp tests (#166619)
Commit: cc8f7cd2521c98c53f3cdb053b689543c36671c4
https://github.com/llvm/llvm-project/commit/cc8f7cd2521c98c53f3cdb053b689543c36671c4
Author: SahilPatidar <sahilpatidar60 at gmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
Log Message:
-----------
[ORC][LibraryResolver] Fix ensureFilterBuilt assertion failure and concurrency issue. (#166510)
- Fixed architecture compatibility check.
Previously, we used `sys::getDefaultTriple()`, which caused issues on
build bots
using cross-compilation. We now ensure that the target architecture
where the
shared library (.so) is run or loaded matches the architecture it was
built for.
- Fixed ensureFilterBuilt assertion failure.
- Replaced use of FilteredView with a safer alternative for concurrent
environments.
The old FilteredView approach iterated over shared state without
sufficient
synchronization, which could lead to invalid accesses when libraries
were being
added or removed concurrently.
Commit: 9100c9212db83321762d709e8fb225030899924e
https://github.com/llvm/llvm-project/commit/9100c9212db83321762d709e8fb225030899924e
Author: Shikhar Jain <shikharj at qti.qualcomm.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
A llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
Log Message:
-----------
[AArch64] Enable masked load/store for Streaming-SVE with -march=armv8-a+sme (#163133)
For subtarget aarch64, isLegalMaskedLoadStore() should not return false
for Streaming-SVE. Thus now on usage of -march=armv8-a+sme & for
workloads that contains loops with control flow where predication is
data dependent on any array/vectors, masked load/stores along with
necessary scalable vectorization constructs would be emitted.
Fixes: #162797
Commit: 1c756932e9968d5843801fec77920e3b44036370
https://github.com/llvm/llvm-project/commit/1c756932e9968d5843801fec77920e3b44036370
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/zicond-opts.ll
Log Message:
-----------
[DAGCombiner] Bail out if BitWidthDiff > BitWidth when folding cltz(and) - BitWidthDiff (#166607)
Fixes https://github.com/llvm/llvm-project/issues/166596
We cannot use `APInt::isMask` if `numBits` exceeds the bitwidth of APInt
or `numBits` is zero. We avoid such a case by guaranteeing BitWidthDiff
< BitWidth.
Commit: 9f5811ec6bd5e9f99dd22c4a06e6e984cb15ae4b
https://github.com/llvm/llvm-project/commit/9f5811ec6bd5e9f99dd22c4a06e6e984cb15ae4b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M compiler-rt/test/hwasan/TestCases/Linux/fixed-shadow.c
Log Message:
-----------
[compiler-rt][HWAsan] Remove CHECK lines from test
These check lines were added in 144dae207a3b1750ec94553248bf44c359b6d452
as part of reenabling on Linux. The check lines were added using an or
clause though that gets short circuited, so were never actually
executed. Fixing the short circuit so they do execute reveals the
filecheck assertions no longer pass. Remove them for now given they did
not exist in the original test.
This would cause failures on the internal shell given the (<command>)
syntax is not understood by the internal shell.
Reviewers: vitalybuka, thurstond, fmayer
Reviewed By: vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/166638
Commit: 9e6a31f832a424646c141460335ef535c70e491b
https://github.com/llvm/llvm-project/commit/9e6a31f832a424646c141460335ef535c70e491b
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll
M llvm/test/CodeGen/WebAssembly/memory-interleave.ll
Log Message:
-----------
[WebAssembly] vf32 to vi8, vi16 lowering (#164644)
Avoid scalarizing the conversion and use trunc_sat and narrow instead.
Commit: a928c61961004cc94c4cb37bc4c414f1537e7660
https://github.com/llvm/llvm-project/commit/a928c61961004cc94c4cb37bc4c414f1537e7660
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[mlir] Make remove-dead-values pass remove blocks arguments first (#165725)
Fix https://github.com/llvm/llvm-project/issues/163051. Some Ops which
have multiple blocks, before deleting the ops, first remove the dead
parameters within its blocks.
Commit: d1874047f5908b2fabf92de662ff97862bf02f8d
https://github.com/llvm/llvm-project/commit/d1874047f5908b2fabf92de662ff97862bf02f8d
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Retrieve alignment from Load/StoreInst in constructors. nfc (#165722)
This patch removes the explicit Alignment parameter from
VPWidenLoadRecipe and VPWidenStoreRecipe constructors. Instead, these
recipes now directly retrieve the alignment from their
LoadInst/StoreInst.
Commit: 8b3a124ad87d1e808852644090ea5d1117fe2f9f
https://github.com/llvm/llvm-project/commit/8b3a124ad87d1e808852644090ea5d1117fe2f9f
Author: Martin Storsjö <martin at martin.st>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
R llvm/test/Transforms/LoopVectorize/AArch64/interleaved_store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/interleave_vec.ll
Log Message:
-----------
Revert "[InterleavedAccess] Construct interleaved access store with shuffles"
This reverts commit 78d649199b47370b72848c1ca8d9bd3323b050ac.
That commit caused failed asserts, see
https://github.com/llvm/llvm-project/pull/164000 for details.
Commit: 22242ae072f8249818fa08f1f37a113cc342d5cb
https://github.com/llvm/llvm-project/commit/22242ae072f8249818fa08f1f37a113cc342d5cb
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/FloatLoopCounterCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/FloatLoopCounterCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
R clang-tools-extra/clang-tidy/cert/FloatLoopCounter.cpp
R clang-tools-extra/clang-tidy/cert/FloatLoopCounter.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/float-loop-counter.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/float-loop-counter.c
R clang-tools-extra/test/clang-tidy/checkers/cert/flp30-c.c
Log Message:
-----------
[clang-tidy] Rename `cert-flp30-c` to `bugprone-float-loop-counter` (#166571)
Closes [#157291](https://github.com/llvm/llvm-project/issues/157291)
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Commit: f88071301053623182fa0c4419eeaf03770e90ea
https://github.com/llvm/llvm-project/commit/f88071301053623182fa0c4419eeaf03770e90ea
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
Log Message:
-----------
[gn build] Port 22242ae072f8
Commit: bf2653ed770f737a7950047f81724a104a7d0c79
https://github.com/llvm/llvm-project/commit/bf2653ed770f737a7950047f81724a104a7d0c79
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/unittests/Support/TimeProfilerTest.cpp
Log Message:
-----------
Disable flaky test TimeProfilerTest.ConstantEvaluationCxx20
See comments on https://github.com/llvm/llvm-project/pull/138613
Commit: cc8478b38d9dc72f4f3b38bbaa55718663523277
https://github.com/llvm/llvm-project/commit/cc8478b38d9dc72f4f3b38bbaa55718663523277
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M compiler-rt/test/hwasan/TestCases/Linux/fixed-shadow.c
Log Message:
-----------
Revert "[compiler-rt][HWAsan] Remove CHECK lines from test"
This reverts commit 9f5811ec6bd5e9f99dd22c4a06e6e984cb15ae4b.
It looks like this caused some test failures:
1. https://lab.llvm.org/buildbot/#/builders/51/builds/26529
2. https://lab.llvm.org/buildbot/#/builders/198/builds/9462
Commit: cad96ad703d9ba16c354aa782ded8a7058cd47e4
https://github.com/llvm/llvm-project/commit/cad96ad703d9ba16c354aa782ded8a7058cd47e4
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
Log Message:
-----------
[NFC] Refactor target intrinsic call lowering (#153204)
Refactor intrinsic call handling in SelectionDAGBuilder and IRTranslator
to prepare the addition of intrinsic support to the callbr instruction,
which should then share code with the handling of the normal call
instruction.
Commit: a24eac88eb533b70e8c6a23824668f54edec2972
https://github.com/llvm/llvm-project/commit/a24eac88eb533b70e8c6a23824668f54edec2972
Author: Ádám Kallai <kadam at inf.u-szeged.hu>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M bolt/unittests/Profile/PerfSpeEvents.cpp
Log Message:
-----------
[BOLT] Adding a unittest that covers Arm SPE PBT aggregation (#160095)
When the SPE Previous Branch Target address (FEAT_SPE_PBT) feature is
available, an SPE sample by combining this PBT feature, has two entries.
Arm SPE records SRC/DEST addresses of the latest sampled branch
operation, and it stores into the first entry. PBT records the target
address of most recently taken branch in program order before the
sampled operation, it places into the second entry. They are formed a
chain of two consecutive branches.
Where:
- The previous branch operation (PBT) is always taken.
- In SPE entry, the current source branch (SRC) may be either
fall-through or taken, and the target address (DEST) of the recorded
branch operation is always what was architecturally executed.
However PBT doesn't provide as much information as SPE does. It lacks
those information such as the address of source branch, branch type, and
prediction bit. These information are always filled with zero in PBT
entry. Therefore Bolt cannot evaluate the prediction, and source branch
fields, it leaves them zero during the aggregation process.
Tests includes a fully expanded example.
Commit: fc179af5202f8c87905ddea8c0fc1373e3ed2f9a
https://github.com/llvm/llvm-project/commit/fc179af5202f8c87905ddea8c0fc1373e3ed2f9a
Author: Karlo Basioli <basioli at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M libc/src/__support/CPP/type_traits/is_destructible.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build issue caused in #166517 (#166734)
Commit: eab44600fb7e5fcdb5548d7c4c13d0f3de838ebe
https://github.com/llvm/llvm-project/commit/eab44600fb7e5fcdb5548d7c4c13d0f3de838ebe
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Rename onlyFirst(Lane|Part)Used (NFC) (#166562)
Rename onlyFirst(Lane|Part)Used to usesFirst(Lane|Part)Only, in line
with usesScalars, for clarity.
Commit: 92da0ec4626ddefab92d5a56c23b392cfc61b363
https://github.com/llvm/llvm-project/commit/92da0ec4626ddefab92d5a56c23b392cfc61b363
Author: Karlo Basioli <basioli at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build issue caused in #166517 (some targets were still failing) (#166737)
Commit: f9360e36c1ae7d5576324a1c7bba6da37f744eac
https://github.com/llvm/llvm-project/commit/f9360e36c1ae7d5576324a1c7bba6da37f744eac
Author: Davide Cunial <dcunial at proton.me>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/hicpp/NoAssemblerCheck.cpp
M clang/docs/LibASTMatchersReference.html
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
Log Message:
-----------
[clang] Make 'fileScopeAsmDecl' matcher public (#165319)
This PR makes the `fileScopeAsmDecl` matcher public.
Commit: 3ea1ffde025c1be8062020bdaa42cc54d999ef55
https://github.com/llvm/llvm-project/commit/3ea1ffde025c1be8062020bdaa42cc54d999ef55
Author: Karlo Basioli <basioli at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
Log Message:
-----------
Fix bazel build issue caused in #166517 one last target (#166739)
I apologise for 3 PRs
Commit: 59f6f33bc3d666acdc5e4c822dfaddc92dee1f83
https://github.com/llvm/llvm-project/commit/59f6f33bc3d666acdc5e4c822dfaddc92dee1f83
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_mixed.ll
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_mixed.ll.expected
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_same_prefix.ll
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_same_prefix.ll.expected
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/x86-asm-mir-mixed.test
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/x86-asm-mir-same-prefix.test
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/UpdateTestChecks/mir.py
M llvm/utils/update_llc_test_checks.py
Log Message:
-----------
Reapply "[utils][UpdateLLCTestChecks] Add MIR support to update_llc_test_checks.py." (#164965) (#166575)
This change enables update_llc_test_checks.py to automatically generate
MIR checks for RUN lines that use `-stop-before` or `-stop-after` flags
allowing tests to verify intermediate compilation stages (e.g., after
instruction selection but before peephole optimizations) alongside the
final assembly output. If `-debug-only` flag is present in the run line it's
considered as the main point of interest for testing and stop flags above
are ignored (that is no MIR checks are generated).
This resulted from the scenario, when I needed to test two instruction
matching patterns where the later pattern in the peepholer reverts the
earlier pattern in the instruction selector and distinguish it from the
case when the earlier pattern didn't worked at all.
Initially created by Claude Sonnet 4.5 it was improved later to handle
conflicts in MIR <-> ASM prefixes and formatting.
Commit: 06ec47055ad1f085e64edca3f94f34f4da053ba0
https://github.com/llvm/llvm-project/commit/06ec47055ad1f085e64edca3f94f34f4da053ba0
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
A llvm/test/CodeGen/SPIRV/allow_unknown_intrinsics.ll
Log Message:
-----------
[SPIRV] Handle unknown intrinsics (#166284)
This ports rather useful functionality that was already available in the
Translator, and was mostly implemented in the BE. Today, if we encounter
an unknown intrinsic, we pipe it through and hope for the best, which in
practice yields either obtuse ISEL errors, or potentially impossible to
use SPIR-V. With this change, if instructed via a newly added
`--spv-allow-unknown-intrinsics` flag, we emit allowed intrinsics as
calls to extern (import) functions. The test is also mostly lifted from
the Translator.
Commit: 22b6c491d69e916d9af8221a543570535c923764
https://github.com/llvm/llvm-project/commit/22b6c491d69e916d9af8221a543570535c923764
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M libc/startup/baremetal/arm/start.cpp
Log Message:
-----------
[libc] Enable the FPU in Arm startup code (#166349)
This patch enables the FPU in Arm startup code, which is required to run
tests on Arm configurations with hardware floating-point support.
Commit: 47cf5a1b828d993d0a21f44334a31a0f7337f8a8
https://github.com/llvm/llvm-project/commit/47cf5a1b828d993d0a21f44334a31a0f7337f8a8
Author: Aadesh Premkumar <aadesh.premkumar at multicorewareinc.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
Log Message:
-----------
[SPIRV] Support for the extension SPV_ALTERA_blocking_pipes (#138675)
--Added support for the extension SPV_ALTERA_blocking_pipes
--Added test files for the extension SPV_ALTERA_blocking_pipes
Commit: 474237bcdd6d8795903bb57d3e486fbc511b65f6
https://github.com/llvm/llvm-project/commit/474237bcdd6d8795903bb57d3e486fbc511b65f6
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/include/mlir/Support/Timing.h
M mlir/lib/Support/Timing.cpp
Log Message:
-----------
[mlir] Expose output strategies of TimingManager (#166548)
After the original API change to DefaultTimingManager::setOutput() (see
362aa434cc31ccca96749a6db8cd97f5b7d71206), users are forced to provide
their own implementation of OutputStrategy. However, default MLIR
implementations are usually sufficient. Expose Text and Json strategies
via factory-like method to avoid the problem in downstream projects.
Commit: 55fb1caf8a13cfb0b8eebaec662f1b3f1ca6cc15
https://github.com/llvm/llvm-project/commit/55fb1caf8a13cfb0b8eebaec662f1b3f1ca6cc15
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
Revert "[mlir] Make remove-dead-values pass remove blocks arguments first" (#166746)
Reverts llvm/llvm-project#165725. See
https://lab.llvm.org/buildbot/#/builders/169/builds/16768,
Commit: ee0818a1f1fab4303eeb1263ac1f6b22f3fe2110
https://github.com/llvm/llvm-project/commit/ee0818a1f1fab4303eeb1263ac1f6b22f3fe2110
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
A llvm/test/CodeGen/X86/pr166744.ll
Log Message:
-----------
[X86] Add test coverage for #166744 (#166745)
Commit: e4467fbf3077ff0d2ae9f600df129dc11fa35c0f
https://github.com/llvm/llvm-project/commit/e4467fbf3077ff0d2ae9f600df129dc11fa35c0f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ExprConstant.cpp
A clang/test/SemaCXX/dependent-switch-case.cpp
Log Message:
-----------
[clang][ExprConst] Handle dependent switch case statements (#166533)
By rejecting them.
Fixes https://github.com/llvm/llvm-project/issues/165555
Commit: 0663710a59e643716f6b2b3e86c7b4a007c2db07
https://github.com/llvm/llvm-project/commit/0663710a59e643716f6b2b3e86c7b4a007c2db07
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr166744.ll
Log Message:
-----------
[X86] narrowBitOpRMW/combineTruncate - don't retain pointer info for unknown offset load/stores (#166752)
#166337 replaces large (illegal type) loads/stores with a smaller i32
load/store based off the demanded shifted bits. As these shifts are
non-constant we can't regenerate the PointerInfo data with a fixed
offset, so we need to discard the data entirely.
Fixes #166744 - post-ra has to reconstruct dependencies after the chains
have been stripped and uses pointer info instead - which resulted in
some loads being rescheduled earlier than the dependent store as it was
thought they didn't alias
Commit: fd9dd4327f2a014ef531cc908923c05f31d0ea3e
https://github.com/llvm/llvm-project/commit/fd9dd4327f2a014ef531cc908923c05f31d0ea3e
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
Log Message:
-----------
[mlir] Use LDBG to replace LLVM_DEBUG (NFC) (#166733)
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 47d71b69b49326f0305b9250184974b6b7397d6f
https://github.com/llvm/llvm-project/commit/47d71b69b49326f0305b9250184974b6b7397d6f
Author: Shakil Ahmed <44522075+ahmedshakill at users.noreply.github.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/test/Transforms/VectorCombine/AArch64/sve-interleave-splat.ll
Log Message:
-----------
[BasicTTI] Only split vectors with even element counts in getCastInstrCost (#166528)
Fixes #166320
Commit: e974c65774414eceaf789e2464f56e39c9afc210
https://github.com/llvm/llvm-project/commit/e974c65774414eceaf789e2464f56e39c9afc210
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/object-size-flex-array.c
A clang/test/CIR/CodeGen/object-size.c
A clang/test/CIR/CodeGen/object-size.cpp
A clang/test/CIR/IR/objsize.cir
Log Message:
-----------
[CIR] Implement __builtin_object_size and __builtin_dynamic_object_size (#166191)
* Add cir.objsize operation to CIR dialect
* Add lowering for cir.objsize operation to LLVM dialect
* Add codegen for __builtin_object_size and
__builtin_dynamic_object_size
Note that this does not support the pass_object_size attribute yet.
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: cbb9b0e08ed19b074ff594a1306c3ca3cb8b9913
https://github.com/llvm/llvm-project/commit/cbb9b0e08ed19b074ff594a1306c3ca3cb8b9913
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/vector-minmax.ll
Log Message:
-----------
[AArch64] Lower v1i64 and v2i64 [S|U][MIN|MAX] to SVE when available (#166735)
The predicate is likely to be hoisted, so in a loop, this would result
in a single SVE instruction, which should have lower latency.
Commit: 4830e638f939c76884e3214d680fff457ed45842
https://github.com/llvm/llvm-project/commit/4830e638f939c76884e3214d680fff457ed45842
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/popcount_vmask.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Improve lowering of boolean vector popcount operations. (#166401)
Commit: 75573041969a0d42cbf771c4b3c3ccea661f44aa
https://github.com/llvm/llvm-project/commit/75573041969a0d42cbf771c4b3c3ccea661f44aa
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg] Update vectorization of linalg.pack (#163539)
This patch changes `vectorizeAsTensorPackOp` to require users to specify
**all** write-side vector sizes for `linalg.pack` (not just the outer
dimensions). This makes `linalg.pack` vectorization consistent with
`linalg.unpack` (see https://github.com/llvm/llvm-project/pull/149293
for a similar change).
Conceptually, `linalg.pack` consists of these high-level steps:
* **Read** from the source tensor using `vector.transfer_read`.
* **Re-associate** dimensions of the read value, as specified by
the op (via `vector.shape_cast`)
* **Transpose** the re-associated value according to the permutation
in the `linalg.pack` op (via `vector.transpose`).
* **Write** the result into the destination tensor via
`vector.transfer_write`.
Previously, the vector sizes provided by the user were interpreted as
write-vector-sizes for PackOp **_outer_** dims (i.e. the final step
above). These were used to:
* Infer read-vector-sizes using the `inner_tiles` attribute of PackOp.
* Deduce vector sizes for the transpose and shape cast operations.
* Ultimately determine the vector shape for the read.
However, this logic breaks when one or more tile sizes are dynamic (*).
In such cases, `vectorizePackOpPrecondition` would currently fail (see
`@pack_with_dynamic_dims_and_dynamic_inner_tile` added in this PR -
without this change it will crash).
This patch updates the contract: users now directly specify _all_ the
"write-vector-sizes", which inherently encode all inner tile sizes -
including dynamic ones. It becomes the user's responsibility to provide
valid sizes.
In practice, since `linalg.pack` is typically constructed, tiled, and
vectorized by the same transformation pipeline, the necessary
"write-vector-sizes" should be recoverable.
Notes for reviewers:
* See test updates for user-facing impact.
* Review `vectorizeAsTensorPackOp` as a new implementation rather than
a diff.
* Comments and variable names were updated to align with
`vectorizeAsTensorUnPackOp`.
(*) As a concrete example, "scalable" tile sizes are represent as
dynamic values. Note, support for "scalable" vectorisation will be added
in a separate PR.
Commit: 99bb7895fa8367eecee661ecc20932db00597461
https://github.com/llvm/llvm-project/commit/99bb7895fa8367eecee661ecc20932db00597461
Author: Mikael Holmen <mikael.holmen at ericsson.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Fix gcc -Wparentheses warning
Wihtout this gcc complained with
../lib/Transforms/Vectorize/VPlan.h: In constructor 'llvm::VPWidenMemoryRecipe::VPWidenMemoryRecipe(unsigned char, llvm::Instruction&, std::initializer_list<llvm::VPValue*>, bool, bool, const llvm::VPIRMetadata&, llvm::DebugLoc)':
../lib/Transforms/Vectorize/VPlan.h:3216:21: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
3216 | !Reverse &&
| ~~~~~~~~~^~
3217 | "Reversed acccess without VPVectorEndPointerRecipe address?");
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Commit: 9d1b578a2237e9c65993d3b9f959e64de184e479
https://github.com/llvm/llvm-project/commit/9d1b578a2237e9c65993d3b9f959e64de184e479
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
Log Message:
-----------
[RISCV] Shrink deleted dead ADDI's use if coalesced in RISCVInsertVSETVLI (#166729)
If two vsetvlis are coalesced (or during insertion when a VSETVLIInfo
turns out to be compatible), we may end up with a dead ADDI that we
delete.
Normally these are LIs (addi $x0, imm), but it's possible for the first
operand to be a virtual register. Make sure we shrink the live interval
of it when we remove it to avoid crashes.
Fixes #166613
Commit: 3a6875119080ea31d318017673cbaf8c95f0a084
https://github.com/llvm/llvm-project/commit/3a6875119080ea31d318017673cbaf8c95f0a084
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformTypes.td
M mlir/include/mlir/Dialect/XeGPU/CMakeLists.txt
A mlir/include/mlir/Dialect/XeGPU/TransformOps/CMakeLists.txt
A mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.h
A mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.td
M mlir/lib/Dialect/XeGPU/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/TransformOps/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/XeGPUTransformOps.td
A mlir/python/mlir/dialects/transform/xegpu.py
A mlir/test/Dialect/XeGPU/transform-ops-invalid.mlir
A mlir/test/Dialect/XeGPU/transform-ops.mlir
A mlir/test/python/dialects/transform_xegpu_ext.py
Log Message:
-----------
[MLIR][XeGPU][Transform] add xegpu.set_desc_layout transform op (#165615)
Adds the first XeGPU transform op, `xegpu.set_desc_layout`, which attachs a `xegpu.layout` attribute to the descriptor that a `xegpu.create_nd_tdesc` op returns.
Commit: 831a8b55cafe6c139beb0f6d88ab32a71bdfd1ca
https://github.com/llvm/llvm-project/commit/831a8b55cafe6c139beb0f6d88ab32a71bdfd1ca
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
Log Message:
-----------
Add dump info for VarDecl
A VarDecl can either be a declaration, a definition, or a tentative
definition. This dumps that information because it turned out to be
useful for a discussion trying to understand a difference in behavior
between C and C++.
Commit: b8a814e4fce292a24449702de07d0705f5045c0b
https://github.com/llvm/llvm-project/commit/b8a814e4fce292a24449702de07d0705f5045c0b
Author: Nathan Gauër <brioche at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.hlsl
M clang/test/ParserHLSL/semantic_parsing.hlsl
A clang/test/SemaHLSL/Semantics/semantics-invalid.hlsl
A clang/test/SemaHLSL/Semantics/semantics-valid.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
Log Message:
-----------
[HLSL] Add support for user semantics (#153424)
This commit adds support for HLSL input semantics. User semantics are
all semantics not starting with `SV_`.
Those semantics ends up with a Location assignment in SPIR-V.
Note: user semantics means Location, but the opposite is not true.
Depending on the stage, some system semantics can rely on a Location
index. This is not implemented in this PR.
Commit: 277bd096890f04979e44c09ffa020e35bf35e06a
https://github.com/llvm/llvm-project/commit/277bd096890f04979e44c09ffa020e35bf35e06a
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
Log Message:
-----------
Revert "Add dump info for VarDecl"
This reverts commit 831a8b55cafe6c139beb0f6d88ab32a71bdfd1ca.
Other test need to be updated too
Commit: 7ff8a5175428361e90c7bd7fd765192bec42be42
https://github.com/llvm/llvm-project/commit/7ff8a5175428361e90c7bd7fd765192bec42be42
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M libc/src/string/string_utils.h
M libc/test/src/string/memchr_test.cpp
Log Message:
-----------
[libc] Fix stale char_ptr for find_first_character_wide read (#166594)
On exit from the loop, char_ptr had not been updated to match block_ptr,
resulting in erroneous results. Moving all updates out of the loop fixes
that.
Adjust derefences to always be inside bounds checks.
Commit: d5d697f3591280448c139b9b5393b0532f674969
https://github.com/llvm/llvm-project/commit/d5d697f3591280448c139b9b5393b0532f674969
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/Tooling/Syntax/TokenBufferTokenManager.cpp
Log Message:
-----------
[clang] Remove redundant declarations (NFC) (#166711)
In C++17, static constexpr members are implicitly inline, so they no
longer require an out-of-line definition.
Identified with readability-redundant-declaration.
Commit: 753d4bc57147996de81608a55907290351f6dd4b
https://github.com/llvm/llvm-project/commit/753d4bc57147996de81608a55907290351f6dd4b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[lld] Remove redundant declarations (NFC) (#166712)
In C++17, static constexpr members are implicitly inline, so they no
longer require an out-of-line definition.
Identified with readability-redundant-declaration.
Commit: eb63a4aa9e0cbc380b6b59bbb88d3591cc4c66e2
https://github.com/llvm/llvm-project/commit/eb63a4aa9e0cbc380b6b59bbb88d3591cc4c66e2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
Log Message:
-----------
[llvm] Remove redundant declarations (NFC) (#166713)
In C++17, static constexpr members are implicitly inline, so they no
longer require an out-of-line definition.
Identified with readability-redundant-declaration.
Commit: cdfd2905fd0b3c9d0dbf484cc1a79af34674f88c
https://github.com/llvm/llvm-project/commit/cdfd2905fd0b3c9d0dbf484cc1a79af34674f88c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Async/IR/Async.cpp
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/IR/BuiltinTypeInterfaces.cpp
M mlir/lib/IR/Operation.cpp
Log Message:
-----------
[mlir] Remove redundant declarations (NFC) (#166714)
In C++17, static constexpr members are implicitly inline, so they no
longer require an out-of-line definition.
Identified with readability-redundant-declaration.
Commit: 875646b1f3c1da9ff3fea9e5dd9093db3a479f65
https://github.com/llvm/llvm-project/commit/875646b1f3c1da9ff3fea9e5dd9093db3a479f65
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/docs/Extensions.rst
Log Message:
-----------
[llvm] Proofread Extensions.rst (#166716)
Commit: a6893f9a113a796a7fd46e9b0708634b62cf73e9
https://github.com/llvm/llvm-project/commit/a6893f9a113a796a7fd46e9b0708634b62cf73e9
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/same-sd-for-diff-becount-type-loops.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-overflow.ll
Log Message:
-----------
[DA] Regenerate test checks (NFC) (#166736)
To avoid noise by other changes.
Commit: e0736c0b4338bb10c8345c2c6854fc4cbb1d44e5
https://github.com/llvm/llvm-project/commit/e0736c0b4338bb10c8345c2c6854fc4cbb1d44e5
Author: Will Froom <willfroom at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.td
Log Message:
-----------
[MLIR] Add missing namespace qualifier in BufferizableOpInterface.td (#166781)
Commit: 43b69e760eb489f2fa741e973a8cc36ff80ea9db
https://github.com/llvm/llvm-project/commit/43b69e760eb489f2fa741e973a8cc36ff80ea9db
Author: Sean Fertile <sd.fertile at gmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
A llvm/test/CodeGen/PowerPC/annotate-metadata.ll
Log Message:
-----------
Filter out unemitted metadata before assertion in AIXAsmPrinter. (#165620)
Global annotations metadata would trigger an assertion during code
emission on AIX. Filter out globals that are in the "llvm.metadata"
section before reaching the assert. Adds a test to verify the metadata
is not emitted on either ELF or XCOFF targets.
Commit: ff11b93bb8f5578c9eb7296160570ea001a1155f
https://github.com/llvm/llvm-project/commit/ff11b93bb8f5578c9eb7296160570ea001a1155f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
Log Message:
-----------
[RISCV] Correct the CFA offsets for stack probing. (#166616)
We need to take into account that we may have already done a FirstSPAdjust.
Fixes #164805.
Commit: 3d589a93efed59349a432aef757abfaaf12f59b9
https://github.com/llvm/llvm-project/commit/3d589a93efed59349a432aef757abfaaf12f59b9
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Add splitAt unit test. NFC (#164636)
@sink_replicate_region_4_requires_split_at_end_of_block was originally
added to ensure splitting at the end of a block wouldn't crash, see
bdada7546e6b4a189a22c7ba9ce2d1b507b9c22e
However it looks like we're now no longer testing this because conv
isn't at the end of the block anymore.
This moves it into a unit test instead. Discovered when working on
https://github.com/llvm/llvm-project/pull/160449
Commit: 54803f8fce5b66fec9a39c6a532a5778083e6e40
https://github.com/llvm/llvm-project/commit/54803f8fce5b66fec9a39c6a532a5778083e6e40
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
Log Message:
-----------
[RISCV] Add test cases for widening add/sub with mismatched extends. NFC (#166700)
These are test cases where we have an add and a sub with the same
operands. One operand is a sign extend and the other is a zero extend.
The sub can only form a vwsub.wv but because add is commutable, it could
form vwadd.wv or vwaddu.wv depending on which extend is removed. We want
to form vwadd.wv to match the sub so the vsext can be removed.
Depending on the order of the instructions and the operand order of the
add, we might form vwaddu.wv instead and no extends will be removed.
Commit: 28c6ed591464c4846c65aea7f42c04ff024aa6e6
https://github.com/llvm/llvm-project/commit/28c6ed591464c4846c65aea7f42c04ff024aa6e6
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
A mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/test/Dialect/OpenACC/acc-implicit-data-reduction.mlir
A mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
Log Message:
-----------
[mlir][acc] Add ACCImplicitData pass for implicit data attributes (#166472)
This change adds the ACCImplicitData pass which implements the OpenACC
specification for "Variables with Implicitly Determined Data Attributes"
(OpenACC 3.4 spec, section 2.6.2).
The pass automatically generates data clause operations (copyin,
copyout, present, firstprivate, etc.) for variables used within OpenACC
compute constructs (parallel, kernels, serial) that do not already have
explicit data clauses.
Key features:
- Respects default(none) and default(present) clauses
- Handles scalar vs. aggregate variables with different semantics:
* Aggregates: present clause (if default(present)) or copy clause
* Scalars: copy clause (kernels) or firstprivate (parallel/serial)
- Generates privatization recipes when needed for firstprivate clauses
- Performs alias analysis to avoid redundant data mappings
- Ensures proper data clause ordering for partial entity access
- Generates exit operations (copyout, delete) to match entry operations
Requirements:
- Types must implement acc::MappableType and/or acc::PointerLikeType
interfaces to be considered candidates.
- Operations accessing partial entities or creating subviews should
implement acc::PartialEntityAccess and/or mlir::ViewLikeOpInterface for
proper clause ordering.
- Optionally pre-register acc::OpenACCSupport and mlir::AliasAnalysis if
custom alias analysis, variable name determination, or error reporting
is needed.
Commit: fa050eadab2ebb5d7224e7a26c86090af4f315d8
https://github.com/llvm/llvm-project/commit/fa050eadab2ebb5d7224e7a26c86090af4f315d8
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/finalizebundle.mir
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx12.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir
M llvm/test/CodeGen/AMDGPU/postra-bundle-vimage-vsample-gfx12.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir
Log Message:
-----------
Reland: CodeGen: Record MMOs in finalizeBundle (#166689)
(original PR: #166210)
This allows more accurate alias analysis to apply at the bundle level.
This has a bunch of minor effects in post-RA scheduling that look mostly
beneficial to me, all of them in AMDGPU (the Thumb2 change is cosmetic).
The pre-existing (and unchanged) test in
CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll tests that MIR with a
bundle with MMOs can be parsed successfully.
v2:
- use cloneMergedMemRefs
- add another test to explicitly check the MMO bundling behavior
v3:
- use poison instead of undef to initialize the global variable in the
test
v4:
- treat bundle memory accesses as never trivially disjoint
Commit: 1af0424fed2e470a43b23816ff311c6ec6ea200f
https://github.com/llvm/llvm-project/commit/1af0424fed2e470a43b23816ff311c6ec6ea200f
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
Log Message:
-----------
[flang][OpenACC] simplify copy and combiner recipe generation (#164988)
OpenACC copy and combiner recipe generation had non-trivial
ad-hoc handling of the FIR types, and ended-up generating hlfir.assign
that become runtime calls for arrays because of the lack of aliasing
guarantees given to FIR for the region arguments.
This code was started before HFLIR, and with HLFIR tools, most of the
type specific handling can just be removed to use hlfir generic helper
and assign (-230 lines in OpenACC.cpp).
To avoid ending up with runtime calls in recipes:
- use hlfir.assign temporary_lhs in copies to indicate that the copy
cannot alias with the rhs.
- add a new genNoAliasAssignment hlfir helper that takes its logic from
the HLFIRInlineIntrinsic pass and allows applying a scalar combiner
before generating the scalar assignments. This allows generating loops
directly for the reduction and avoid having to find a clever way to
signal HLFIR that the arguments do not alias (an other option would have
been to introduce a dummy_scope and declares, but that would not be
enough for POINTERs, and I am not sure we should start using this as a
noalias operation).
Commit: b1bd74e1cc1fa939f3467ef84852a259529c2e19
https://github.com/llvm/llvm-project/commit/b1bd74e1cc1fa939f3467ef84852a259529c2e19
Author: Laxman Sole <lsole at nvidia.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/IR/DebugInfoMetadata.cpp
A llvm/test/DebugInfo/extradata-node-reference.ll
Log Message:
-----------
[LLVM][DebugInfo] Allow ExtraData field to be a node reference (#165023)
This change enhances debug info metadata handling to support node
references in the `extraData` field for `DW_TAG_member`,
`DW_TAG_variable`, and `DW_TAG_inheritance` tags.
The change enables LLVM to handle both direct constant values (e.g.,
extraData: i8 1) and node references (e.g., extraData: !18 where !18 =
!{ i8 1 }).
Commit: d380c2a96df4c1831a22c79c4925a5ef419cc8bf
https://github.com/llvm/llvm-project/commit/d380c2a96df4c1831a22c79c4925a5ef419cc8bf
Author: Karlo Basioli <basioli at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix bazel build issue caused by #165615 (#166788)
Commit: a1640c1e89a8e3dc311cfca8bd32c71870d888c6
https://github.com/llvm/llvm-project/commit/a1640c1e89a8e3dc311cfca8bd32c71870d888c6
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in InstrInfoEmitter (#166442)
Adopt `IfDefEmitter` and `NamespaceEmitter` in InstrInfoEmitter
Commit: 2a2d7496cce5235721fa4263f5b97972118b1b5d
https://github.com/llvm/llvm-project/commit/2a2d7496cce5235721fa4263f5b97972118b1b5d
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/RegionPrinter.h
M llvm/lib/Analysis/RegionPrinter.cpp
Log Message:
-----------
[NFC][LLVM] Code cleanup in RegionPrinter (#166622)
- Fix indendation in header file.
- Use namespace qualifiers for defining DOTGraphTraits.
Commit: c08644caa684600f5f1e7f9bb802f1c523bba099
https://github.com/llvm/llvm-project/commit/c08644caa684600f5f1e7f9bb802f1c523bba099
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/BypassSlowDivision.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
Log Message:
-----------
[NFC][LLVM][Transforms/Utils] Fix indentation inside namespace (#166624)
Code inside namespace need not be indented. Fix such indendations in a
few cases.
Commit: 0b153a9de9d91555eca911bdee30f9b8b4286d08
https://github.com/llvm/llvm-project/commit/0b153a9de9d91555eca911bdee30f9b8b4286d08
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M llvm/lib/Analysis/RegionPrinter.cpp
Log Message:
-----------
Fix a build error
Fixes: 2a2d7496cc ("[NFC][LLVM] Code cleanup in RegionPrinter (#166622)")
commit-id:552ef7cb
Commit: 96d4cb080d8b4df08899978609b8e5845cbf7a6e
https://github.com/llvm/llvm-project/commit/96d4cb080d8b4df08899978609b8e5845cbf7a6e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M .ci/generate_test_report_lib.py
Log Message:
-----------
[CI][NFC] Generalize _format_ninja_failures
This is actually perfectly applicable to the test failure case as well
and results in some easy code consolidation/deletion.
Reviewers: dschuff, lnihlen, gburgessiv, Keenuts, DavidSpickett
Reviewed By: Keenuts, DavidSpickett
Pull Request: https://github.com/llvm/llvm-project/pull/166589
Commit: 4d67e157682d0953761593955ae6c87ed65b3274
https://github.com/llvm/llvm-project/commit/4d67e157682d0953761593955ae6c87ed65b3274
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
A clang/test/SemaHLSL/Types/AggregateSplatConstantExpr.hlsl
A clang/test/SemaHLSL/Types/ElementwiseCastConstantExpr.hlsl
Log Message:
-----------
[HLSL] add support for HLSLAggregateSplatCast and HLSLElementwiseCast to constant expression evaluator (#164700)
Add support to handle these casts in the constant expression evaluator.
- HLSLAggregateSplatCast
- HLSLElementwiseCast
- HLSLArrayRValue
Add tests
Closes #125766
Closes #125321
Commit: 7227030a82ec28b4b4e7fd648e344fdee274e05a
https://github.com/llvm/llvm-project/commit/7227030a82ec28b4b4e7fd648e344fdee274e05a
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
A clang/test/Driver/HLSL/wconversion.hlsl
Log Message:
-----------
[HLSL] enable Wconversion by default for HLSL (#166617)
Add WConversion by default to cc1 args.
Closes #134761
Commit: 792524e067ad6b89fe3606f8abf9f658d5ddf10d
https://github.com/llvm/llvm-project/commit/792524e067ad6b89fe3606f8abf9f658d5ddf10d
Author: Karlo Basioli <basioli at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix openacc bazel build (#166790)
Commit: 55436aeb2e8275d803a0e1bdff432717a1cf86b5
https://github.com/llvm/llvm-project/commit/55436aeb2e8275d803a0e1bdff432717a1cf86b5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
Log Message:
-----------
[CI] Add Ability to Explain Failures
With the premerge advisor infrastructure almost done, we can now request
on demand explanations (failing at head or flaky). This patch adds the
infrastructure to write out test reports containing this information so
we can easily surface it to the user.
Reviewers: Keenuts, gburgessiv, dschuff, lnihlen
Reviewed By: Keenuts
Pull Request: https://github.com/llvm/llvm-project/pull/166590
Commit: 36d477850fac1a6be974fa01ec524084de657bf4
https://github.com/llvm/llvm-project/commit/36d477850fac1a6be974fa01ec524084de657bf4
Author: Amit Kumar Pandey <pandey.kumaramit2023 at gmail.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
A clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_isa_version_1250.bc
A clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_isa_version_1251.bc
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/rocm-device-libs.cl
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[ASan] Skip explicit check of 'xnack' feature for gfx1250 && gfx1251. (#166754)
Xnack processing is essential and performed at the frontend to enable
ASan instrumentation for AMDGPU device code. Certain AMDGPU subtargets
like gfx1250 && gfx1251 don't have to enable 'xnack+' explictly in
'--offload-arch=' for device ASan instrumentation.
Commit: 527b7a48c6e155857bd976bfb8813be7d9166ed8
https://github.com/llvm/llvm-project/commit/527b7a48c6e155857bd976bfb8813be7d9166ed8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M .ci/generate_test_report_github.py
M .ci/generate_test_report_lib.py
Log Message:
-----------
[CI][NFC] Refactor compute_platform_title into generate_test_report_lib
This enables reuse in other CI components, like
premerge_advisor_explain.py.
Reviewers: DavidSpickett, gburgessiv, Keenuts, dschuff, lnihlen
Reviewed By: Keenuts, DavidSpickett
Pull Request: https://github.com/llvm/llvm-project/pull/166604
Commit: 0d66b7eed5228b3565d559dd7d242b0cf904ca77
https://github.com/llvm/llvm-project/commit/0d66b7eed5228b3565d559dd7d242b0cf904ca77
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-06 (Thu, 06 Nov 2025)
Changed paths:
M .ci/generate_test_report_lib_test.py
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/test/AArch64/relocation-type-print.s
M bolt/unittests/Profile/PerfSpeEvents.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/FloatLoopCounterCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/FloatLoopCounterCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
R clang-tools-extra/clang-tidy/cert/FloatLoopCounter.cpp
R clang-tools-extra/clang-tidy/cert/FloatLoopCounter.h
M clang-tools-extra/clang-tidy/hicpp/NoAssemblerCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/float-loop-counter.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/test/clang-doc/json/class.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/float-loop-counter.c
R clang-tools-extra/test/clang-tidy/checkers/cert/flp30-c.c
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang/docs/LanguageExtensions.rst
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/SourceManager.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Basic/IdentifierTable.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/Tooling/Syntax/TokenBufferTokenManager.cpp
A clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-co_await-assertion-failure.cpp
A clang/test/CIR/CodeGen/object-size-flex-array.c
A clang/test/CIR/CodeGen/object-size.c
A clang/test/CIR/CodeGen/object-size.cpp
A clang/test/CIR/IR/objsize.cir
M clang/test/ClangScanDeps/strip-codegen-args.m
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
A clang/test/CodeGenHLSL/semantics/semantic.struct.hlsl
A clang/test/Driver/HLSL/wconversion.hlsl
A clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_isa_version_1250.bc
A clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_isa_version_1251.bc
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/rocm-device-libs.cl
M clang/test/ParserHLSL/semantic_parsing.hlsl
M clang/test/Sema/builtins-elementwise-math.c
A clang/test/SemaCXX/dependent-switch-case.cpp
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
A clang/test/SemaHLSL/Semantics/semantics-invalid.hlsl
A clang/test/SemaHLSL/Semantics/semantics-valid.hlsl
A clang/test/SemaHLSL/Types/AggregateSplatConstantExpr.hlsl
A clang/test/SemaHLSL/Types/ElementwiseCastConstantExpr.hlsl
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M compiler-rt/test/profile/instrprof-tmpdir.c
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/test/Driver/gcc-triple.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-kernels.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-parallel.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-serial.f90
M libc/include/llvm-libc-macros/math-macros.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/type_traits/is_destructible.h
M libc/src/__support/ctype_utils.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/wctype_utils.h
M libc/src/ctype/CMakeLists.txt
M libc/src/ctype/isalnum.cpp
M libc/src/ctype/isalnum_l.cpp
M libc/src/ctype/isalpha.cpp
M libc/src/ctype/isalpha_l.cpp
M libc/src/ctype/isdigit.cpp
M libc/src/ctype/isdigit_l.cpp
M libc/src/ctype/isgraph.cpp
M libc/src/ctype/isgraph_l.cpp
M libc/src/ctype/islower.cpp
M libc/src/ctype/islower_l.cpp
M libc/src/ctype/ispunct.cpp
M libc/src/ctype/ispunct_l.cpp
M libc/src/ctype/isspace.cpp
M libc/src/ctype/isspace_l.cpp
M libc/src/ctype/isupper.cpp
M libc/src/ctype/isupper_l.cpp
M libc/src/ctype/isxdigit.cpp
M libc/src/ctype/isxdigit_l.cpp
M libc/src/ctype/tolower.cpp
M libc/src/ctype/tolower_l.cpp
M libc/src/ctype/toupper.cpp
M libc/src/ctype/toupper_l.cpp
M libc/src/fcntl/linux/creat.cpp
M libc/src/fcntl/linux/openat.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/asprintf.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/printf.cpp
M libc/src/stdio/baremetal/vprintf.cpp
M libc/src/stdio/generic/CMakeLists.txt
M libc/src/stdio/generic/fprintf.cpp
M libc/src/stdio/generic/printf.cpp
M libc/src/stdio/generic/vfprintf.cpp
M libc/src/stdio/generic/vprintf.cpp
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/printf_core/core_structs.h
A libc/src/stdio/printf_core/error_mapper.h
M libc/src/stdio/printf_core/float_dec_converter_limited.h
M libc/src/stdio/printf_core/float_hex_converter.h
A libc/src/stdio/printf_core/generic/CMakeLists.txt
A libc/src/stdio/printf_core/generic/error_mapper.h
A libc/src/stdio/printf_core/linux/CMakeLists.txt
A libc/src/stdio/printf_core/linux/error_mapper.h
M libc/src/stdio/printf_core/printf_main.h
M libc/src/stdio/printf_core/vasprintf_internal.h
M libc/src/stdio/printf_core/vfprintf_internal.h
M libc/src/stdio/printf_core/write_int_converter.h
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/vasprintf.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/l64a.cpp
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/string/strcasestr.cpp
M libc/src/string/string_utils.h
M libc/src/strings/strcasecmp.cpp
M libc/src/strings/strcasecmp_l.cpp
M libc/src/strings/strncasecmp.cpp
M libc/src/strings/strncasecmp_l.cpp
M libc/src/time/strftime_core/strftime_main.h
M libc/src/wctype/iswalpha.cpp
M libc/startup/baremetal/arm/start.cpp
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/IntegrationTest/test.h
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ErrnoCheckingTest.h
M libc/test/UnitTest/MemoryMatcher.cpp
M libc/test/src/ctype/islower_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fprintf_test.cpp
M libc/test/src/stdio/printf_core/converter_test.cpp
M libc/test/src/stdio/printf_core/writer_test.cpp
M libc/test/src/stdio/snprintf_test.cpp
M libc/test/src/stdio/vfprintf_test.cpp
M libc/test/src/stdlib/StrfromTest.h
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/string/memchr_test.cpp
M libc/test/src/wchar/WcstolTest.h
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxxabi/src/demangle/cp-to-llvm.sh
M lld/ELF/SyntheticSections.cpp
M lldb/CMakeLists.txt
A lldb/bindings/interface/SBFrameListExtensions.i
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/bindings/interfaces.swig
M lldb/bindings/python/get-python-config.py
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
M lldb/include/lldb/API/SBFrame.h
A lldb/include/lldb/API/SBFrameList.h
M lldb/include/lldb/API/SBStream.h
M lldb/include/lldb/API/SBThread.h
M lldb/include/lldb/Target/StackFrameList.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/lldb-private-types.h
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBFrameList.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
A lldb/test/API/python_api/frame_list/Makefile
A lldb/test/API/python_api/frame_list/TestSBFrameList.py
A lldb/test/API/python_api/frame_list/main.cpp
M lldb/test/Shell/SymbolFile/NativePDB/class_layout.cpp
M lldb/tools/debugserver/source/MacOSX/MachTask.h
M lldb/tools/debugserver/source/MacOSX/MachTask.mm
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.cpp
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
A lldb/tools/lldb-dap/src-ts/utils.ts
M lldb/unittests/SymbolFile/NativePDB/UdtRecordCompleterTests.cpp
M llvm/docs/Extensions.rst
M llvm/docs/GoldPlugin.rst
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/include/llvm/Analysis/RegionPrinter.h
A llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
A llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Analysis/Analysis.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/RegionPrinter.cpp
A llvm/lib/Analysis/RuntimeLibcallInfo.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
A llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Demangle/MicrosoftDemangle.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/FPEnv.cpp
M llvm/lib/IR/Operator.cpp
M llvm/lib/IR/PassTimingInfo.cpp
M llvm/lib/IR/PseudoProbe.cpp
M llvm/lib/IR/ReplaceConstant.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Use.cpp
M llvm/lib/IR/User.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFPreserveDIType.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/Hexagon/HexagonQFPOptimizer.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Target.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrRef.td
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/BypassSlowDivision.cpp
M llvm/lib/Transforms/Utils/DeclareRuntimeLibcalls.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/DependenceAnalysis/same-sd-for-diff-becount-type-loops.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-overflow.ll
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-neon-3vdiff.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/highextractbitcast.ll
M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
A llvm/test/CodeGen/AArch64/popcount_vmask.ll
A llvm/test/CodeGen/AArch64/vector-minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/finalizebundle.mir
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx12.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-control-flow.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packetizer.ll
M llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir
M llvm/test/CodeGen/AMDGPU/postra-bundle-vimage-vsample-gfx12.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
A llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll
M llvm/test/CodeGen/ARM/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/ARM/call-graph-section-assembly.ll
M llvm/test/CodeGen/ARM/call-graph-section-tailcall.ll
A llvm/test/CodeGen/ARM/ldexp-fp128.ll
A llvm/test/CodeGen/DirectX/wavesize-md-errs.ll
A llvm/test/CodeGen/DirectX/wavesize-md-valid.ll
M llvm/test/CodeGen/LoongArch/ldptr.ll
M llvm/test/CodeGen/LoongArch/sink-fold-addi.ll
M llvm/test/CodeGen/LoongArch/stptr.ll
A llvm/test/CodeGen/PowerPC/annotate-metadata.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
M llvm/test/CodeGen/RISCV/zicond-opts.ll
A llvm/test/CodeGen/SPARC/predictable-select.ll
A llvm/test/CodeGen/SPIRV/allow_unknown_intrinsics.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll
M llvm/test/CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir
M llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll
M llvm/test/CodeGen/WebAssembly/memory-interleave.ll
M llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/X86/call-graph-section-assembly.ll
R llvm/test/CodeGen/X86/issue163738.ll
A llvm/test/CodeGen/X86/pr166744.ll
A llvm/test/CodeGen/X86/vpternlog.ll
A llvm/test/CodeGen/Xtensa/s32c1i.ll
A llvm/test/DebugInfo/extradata-node-reference.ll
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
M llvm/test/MC/WebAssembly/reference-types.s
A llvm/test/MC/Xtensa/s32c1i.s
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/LoopDistribute/basic-with-memchecks.ll
A llvm/test/Transforms/LoopIdiom/X86/preserve-profile.ll
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
A llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-and-casts.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-chained.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/vector-scalar-select-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch-of-powers-of-two.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sincos_stret.ll
A llvm/test/Transforms/VectorCombine/AArch64/sve-interleave-splat.ll
M llvm/test/lit.cfg.py
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_mixed.ll
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_mixed.ll.expected
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_same_prefix.ll
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_same_prefix.ll.expected
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/x86-asm-mir-mixed.test
A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/x86-asm-mir-same-prefix.test
M llvm/test/tools/llc/new-pm/start-stop.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
A llvm/unittests/CodeGen/RegisterTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
A llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
A llvm/utils/TableGen/Basic/RuntimeLibcalls.h
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/SDNodeInfoEmitter.cpp
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/UpdateTestChecks/mir.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M llvm/utils/update_llc_test_checks.py
M mlir/docs/PassManagement.md
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/Transform/IR/TransformTypes.td
M mlir/include/mlir/Dialect/XeGPU/CMakeLists.txt
A mlir/include/mlir/Dialect/XeGPU/TransformOps/CMakeLists.txt
A mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.h
A mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.td
M mlir/include/mlir/Support/Timing.h
M mlir/lib/Dialect/Async/IR/Async.cpp
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
A mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/XeGPU/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/TransformOps/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
M mlir/lib/IR/BuiltinTypeInterfaces.cpp
M mlir/lib/IR/Operation.cpp
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/lib/Support/Timing.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/XeGPUTransformOps.td
A mlir/python/mlir/dialects/transform/xegpu.py
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
A mlir/test/Dialect/OpenACC/acc-implicit-data-reduction.mlir
A mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
A mlir/test/Dialect/XeGPU/transform-ops-invalid.mlir
A mlir/test/Dialect/XeGPU/transform-ops.mlir
A mlir/test/python/dialects/transform_xegpu_ext.py
M mlir/tools/mlir-tblgen/PassGen.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/0dc46fc31d67...0d66b7eed522
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list