[all-commits] [llvm/llvm-project] 1c7569: [DAGCombiner] Bail out if BitWidthDiff > BitWidth ...

[Hongyu Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1c756932e9968d5843801fec77920e3b44036370
      https://github.com/llvm/llvm-project/commit/1c756932e9968d5843801fec77920e3b44036370
  Author: Hongyu Chen <xxs_chy at outlook.com>
  Date:   2025-11-06 (Thu, 06 Nov 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/RISCV/zicond-opts.ll

  Log Message:
  -----------
  [DAGCombiner] Bail out if BitWidthDiff > BitWidth when folding cltz(and) - BitWidthDiff (#166607)

Fixes https://github.com/llvm/llvm-project/issues/166596
We cannot use `APInt::isMask` if `numBits` exceeds the bitwidth of APInt
or `numBits` is zero. We avoid such a case by guaranteeing BitWidthDiff
< BitWidth.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications