[all-commits] [llvm/llvm-project] f2b0d4: AMDGPU: Really use AV classes by default for vecto...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/use-av-classes-default-vector-class-getRegClassFor
  Home:   https://github.com/llvm/llvm-project
  Commit: f2b0d4fff15e063b986f5f2d0eb6017a9233860d
      https://github.com/llvm/llvm-project/commit/f2b0d4fff15e063b986f5f2d0eb6017a9233860d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-11-05 (Wed, 05 Nov 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
    M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
    M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
    M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
    M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
    M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
    M llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
    M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
    M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll

  Log Message:
  -----------
  AMDGPU: Really use AV classes by default for vector classes

Update getRegClassFor to use AV classes in place of VGPRs for
gfx90a-gfx950. There are a handful of regressions. Most are
enabling unprofitable rematerialization which reduce register
count by 1 but add an unnecessary instruction.


  Commit: 1ed31309fa6f96a84faf95ed3fe9c7703cbd82ce
      https://github.com/llvm/llvm-project/commit/1ed31309fa6f96a84faf95ed3fe9c7703cbd82ce
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-11-05 (Wed, 05 Nov 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
    M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
    M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll

  Log Message:
  -----------
  Update regressed tests


Compare: https://github.com/llvm/llvm-project/compare/87ec603e8cbc...1ed31309fa6f

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