[all-commits] [llvm/llvm-project] 2a42a8: [MLIR][NVVM] Add support for Convert Ops with rs-r...

[Stefan Mada via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a42a85f5bf8202f942a7d638c1abde6dbba0db6
      https://github.com/llvm/llvm-project/commit/2a42a85f5bf8202f942a7d638c1abde6dbba0db6
  Author: Stefan Mada <smada at nvidia.com>
  Date:   2025-11-03 (Mon, 03 Nov 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    A mlir/test/Dialect/LLVMIR/nvvm/invalid-convert-stochastic-rounding.mlir
    A mlir/test/Target/LLVMIR/nvvm/convert_stochastic_rounding.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add support for Convert Ops with rs-rounding mode (#165736)

Added NVVM dialect operations for stochastic rounding (.rs) conversions
from F32 to various packed floating-point formats. These operations map
to existing PTX instructions and LLVM intrinsics.

Supported conversions:
- F32x2 to F16x2/BF16x2 (with optional relu and satfinite modifiers)
- F32x4 to packed F8 formats (E4M3, E5M2)
- F32x4 to packed F6 formats (E2M3, E3M2)
- F32x4 to packed F4 format (E2M1)

All operations support stochastic rounding with randomness provided via
an rbits parameter, and optional relu and saturation modifiers.



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