[all-commits] [llvm/llvm-project] 4c3546: [AArch64] Sink mismatching wide extends to mul (#1...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4c3546f964ad0ceba77323b786b94170fd2e3e75
      https://github.com/llvm/llvm-project/commit/4c3546f964ad0ceba77323b786b94170fd2e3e75
  Author: David Green <david.green at arm.com>
  Date:   2025-11-03 (Mon, 03 Nov 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll

  Log Message:
  -----------
  [AArch64] Sink mismatching wide extends to mul (#164986)

If we have v4i64 mul(zext(v4i16), sext(v4i16)), we can code-generate
that as v4i64 smull(v4i32 zext(v4i16), sext(v4i16), as
zext(x)==sext(zext(x)). This teaches the part of CGP that sinks operands
to uses about that, so that it can treat a zext that is more than twice
the width as a sext.



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