[all-commits] [llvm/llvm-project] a2178e: [Hexagon] Incorrect MIR after "hexinsert" pass (#1...

[Nikita Popov via All-commits]

  Branch: refs/heads/release/21.x
  Home:   https://github.com/llvm/llvm-project
  Commit: a2178ebcb02ad72c9063a0d1168c3953e8de61a6
      https://github.com/llvm/llvm-project/commit/a2178ebcb02ad72c9063a0d1168c3953e8de61a6
  Author: Alexey Karyakin <akaryaki at quicinc.com>
  Date:   2025-10-28 (Tue, 28 Oct 2025)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
    A llvm/test/CodeGen/Hexagon/insert-big.ll

  Log Message:
  -----------
  [Hexagon] Incorrect MIR after "hexinsert" pass (#164021)

The "hexinsert" pass tries to replace bitfield operations with Hexagon
`insert` instructions. To limit memory usage, there is a limit on the
internal table size. When the limit is reached, the state is not
correctly cleaned up so defs from from new `insert` instructions are not
deleted after processing the basic block. Later, these defs can be
incorrectly used in other basic blocks even they are not reachable. Then
compiler will crash with:

*** Bad machine code: Virtual register defs don't dominate all uses. ***

Fixes: #163774
(cherry picked from commit f3a60cf8dd602958f706c11db66e401257364be7)


  Commit: 495a2ab653aecdb59b41ccf63de3ab17df043589
      https://github.com/llvm/llvm-project/commit/495a2ab653aecdb59b41ccf63de3ab17df043589
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-10-28 (Tue, 28 Oct 2025)

  Changed paths:
    M llvm/test/CodeGen/Hexagon/insert-big.ll

  Log Message:
  -----------
  [Hexagon] Add REQUIRES: asserts to test

This test uses -debug-only, so needs an assertion-enabled build.


Compare: https://github.com/llvm/llvm-project/compare/04102d998d0e...495a2ab653ae

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