[all-commits] [llvm/llvm-project] 385c12: [AMDGPU] Rework GFX11 VALU Mask Write Hazard (#138...

[Carl Ritson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 385c12134aa6b3215d92ce6034d99fd7aec45dd7
      https://github.com/llvm/llvm-project/commit/385c12134aa6b3215d92ce6034d99fd7aec45dd7
  Author: Carl Ritson <carl.ritson at amd.com>
  Date:   2025-10-28 (Tue, 28 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
    M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
    M llvm/test/CodeGen/AMDGPU/nor-divergent-lanemask.ll
    M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
    M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir

  Log Message:
  -----------
  [AMDGPU] Rework GFX11 VALU Mask Write Hazard (#138663)

Apply additional counter waits to address VALU writes to SGPRs. Rework
expiry detection and apply wait coalescing to mitigate some of the
additional waits.



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