[all-commits] [llvm/llvm-project] 30f2bf: [AMDGPU] Use implicit operand to preserve liveness...

[Jeffrey Byrnes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 30f2bf75587e87d73c238619866d39c53c389849
      https://github.com/llvm/llvm-project/commit/30f2bf75587e87d73c238619866d39c53c389849
  Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
  Date:   2025-10-27 (Mon, 27 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
    A llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
    M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
    M llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir

  Log Message:
  -----------
  [AMDGPU] Use implicit operand to preserve liveness of COPY (#164911)

When lowering spills / restores, we may end up partially lowering the
spill via copies and the remaining portion with loads/stores. In this
partial lowering case,the implicit-def operands added to the restore
load clobber the preceding copies -- telling MachineCopyPropagation to
delete them. By also attaching an implicit operand to the load, the
COPYs have an artificial use and thus will not be deleted - this is the
same strategy taken in https://github.com/llvm/llvm-project/pull/115285

I'm not sure that we need implicit-def operands on any load restore, but
I guess it may make sense if it needs to be split into multiple loads
and some have been optimized out as containing undef elements.

These implicit / implicit-def operands continue to cause correctness
issues. A previous / ongoing long term plan to remove them is being
addressed via:


https://discourse.llvm.org/t/llvm-codegen-rfc-add-mo-lanemask-type-and-a-new-copy-lanemask-instruction/88021
https://github.com/llvm/llvm-project/pull/151123
https://github.com/llvm/llvm-project/pull/151124



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