[all-commits] [llvm/llvm-project] 4d80e0: [flang][OpenMP] Add missing forward declarations a...
Florian Mayer via All-commits
all-commits at lists.llvm.org
Mon Oct 27 09:29:27 PDT 2025
Branch: refs/heads/users/fmayer/spr/main.flowsensitive-statusor-9n-make-sure-all-statusor-are-initialized
Home: https://github.com/llvm/llvm-project
Commit: 4d80e0c4446b3bd1c2ae2583be8dc545e5a4e0b9
https://github.com/llvm/llvm-project/commit/4d80e0c4446b3bd1c2ae2583be8dc545e5a4e0b9
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Add missing forward declarations and includes (#164860)
Add declarations/includes of Scope and Symbol to Semantics/openmp-utils.
Commit: c20835b4c978e1f20628186223e1ce27db757df2
https://github.com/llvm/llvm-project/commit/c20835b4c978e1f20628186223e1ce27db757df2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Log Message:
-----------
[ARM] Fix a warning
This patch fixes:
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1643:9: error: unused variable
'T2SOImmVal' [-Werror,-Wunused-variable]
Commit: b08bbe5ada92e7bebac8bf9ebe362fd1d2265ca6
https://github.com/llvm/llvm-project/commit/b08bbe5ada92e7bebac8bf9ebe362fd1d2265ca6
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
Log Message:
-----------
[ARM][KFCI] Fix unused variable for #163698 (#164857)
Commit: e665f245f501a5cb9e33e67085ddc9507959d5bb
https://github.com/llvm/llvm-project/commit/e665f245f501a5cb9e33e67085ddc9507959d5bb
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Passes.h
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
M mlir/test/Dialect/Affine/unroll.mlir
M mlir/test/Transforms/scf-loop-unroll.mlir
M mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp
Log Message:
-----------
[mlir] Delete unroll-full option for Affine/SCF unroll pass (#164658)
Make the unroll-factor take -1 as "full" and avoid potential conflict
when passing both an explicit factor and unroll-full=true.
Commit: 3f27f5723ba36c44d2cbeddf14b00eb32f6565e2
https://github.com/llvm/llvm-project/commit/3f27f5723ba36c44d2cbeddf14b00eb32f6565e2
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
M llvm/unittests/ADT/SmallVectorTest.cpp
Log Message:
-----------
[ADT] Use `adl_begin`/`end` with `to_vector` functions (#164823)
Similar to other code in ADT / STLExtras, allow `to_vector` to work with
ranges that require ADL to find the begin/end iterators.
Commit: 0198e8f068460f292477a6797de31aa4bac736f5
https://github.com/llvm/llvm-project/commit/0198e8f068460f292477a6797de31aa4bac736f5
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
A lld/test/wasm/lto/relocation-model.ll
M lld/wasm/LTO.cpp
Log Message:
-----------
[lld][WebAssembly] Honor command line reloc model during LTO (#164838)
This code matches what the ELF linker already does. See ae4c30a4bed from
back in 2019.
Commit: 2bb4226c7c6da0edf40b4f1b87e9a625ff2a0e31
https://github.com/llvm/llvm-project/commit/2bb4226c7c6da0edf40b4f1b87e9a625ff2a0e31
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/TableGen/intrinsic-manual-name.td
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
Log Message:
-----------
[LLVM][Intrinsics] Print note if manual name matches default name (#164716)
Print a note when the manually specified name in an intrinsic matches
the default name it would have been assigned based on the record name,
in which case the manual specification is redundant and can be
eliminated.
Also remove existing redundant manual names.
Commit: b2c8b07f79cacc9d7f37e73370475e47f4121749
https://github.com/llvm/llvm-project/commit/b2c8b07f79cacc9d7f37e73370475e47f4121749
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
Log Message:
-----------
[flang][OpenMP] Rename some AST classes to follow spec naming, NFC (#164870)
Rename OmpTypeSpecifier to OmpTypeName, since it represents a type-name
list item. Also, OpenMP 6.0 introduced type-specifier with a different
meaning.
Rename OmpReductionCombiner to OmpCombinerExpression.
Commit: f11899f6479cebe47bcdc2cf049fa8a47991ad46
https://github.com/llvm/llvm-project/commit/f11899f6479cebe47bcdc2cf049fa8a47991ad46
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
Log Message:
-----------
[ThinLTO][WPD] Simplify check for local summary for efficiency (NFCI) (#164859)
Use the new HasLocal flag to avoid looking through all summaries to see
if there is a local copy.
Commit: a909ec64dc36ba26f103b9f1bd71dd4b9c73ed5f
https://github.com/llvm/llvm-project/commit/a909ec64dc36ba26f103b9f1bd71dd4b9c73ed5f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
Log Message:
-----------
[ThinLTO][WPD] LICM a loop invariant check (#164862)
Move a loop invariant check out of the innermost loop. I measured a
small but consistent thin link speedup from this change for a large
target (0.75%).
Commit: c745f745b11766949cfc7326e69e3cdccf9cc893
https://github.com/llvm/llvm-project/commit/c745f745b11766949cfc7326e69e3cdccf9cc893
Author: Florian Mayer <fmayer at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[FlowSensitive] [StatusOr] [7/N] Support StatusOr::emplace
This always makes the StatusOr OK.
Reviewers: jvoung, Xazax-hun
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/163876
Commit: ad75b3be4e187e4cc634b33d8ed638c8232c33f4
https://github.com/llvm/llvm-project/commit/ad75b3be4e187e4cc634b33d8ed638c8232c33f4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Add AltFmtType = IS_NOT_ALTFMT to SF_VFNRCLIP_X(U)_F_QF. (#164759)
These instructions are FP instructions with SEW=8. vtype.altfmt=1 should
be considered reserved for them.
Commit: d87200e8ca2a2c593baea2e113b90bf43409b534
https://github.com/llvm/llvm-project/commit/d87200e8ca2a2c593baea2e113b90bf43409b534
Author: jofrn <jofernau at amd.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/test/CodeGen/X86/atomic-load-store.ll
Log Message:
-----------
[X86] Add atomic vector tests for unaligned >1 sizes. (#148896)
Unaligned atomic vectors with size >1 are lowered to calls.
Adding their tests separately here.
Commit: 1c30038e5af5256aeda45946ddc0b5f801749e15
https://github.com/llvm/llvm-project/commit/1c30038e5af5256aeda45946ddc0b5f801749e15
Author: Atmn Patel <atmnp at nvidia.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][mlir] add missing type conversion when lowering atomiccas (#164865)
When lowering `atomiccas`, flang does not convert the output of the
`llvm.extract_value` op to result type expected in the expression being
lowered. This results in invalid MLIR being generated such as when the
output of the atomiccas is being used for an equality check in a `do
while` loop condition, where the `arith.cmpi` would be comparing an `i64
0` with an `i1`. This change ensures that the appropriate cast is
inserted.
Reviewers: @clementval @vzakhari
Commit: f899893c1949183d35ec986090f449d82a796b2d
https://github.com/llvm/llvm-project/commit/f899893c1949183d35ec986090f449d82a796b2d
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU][NFC] Cleanly make 32-bit abs legal (#164837)
Cleanly make 32-bit abs legal only in SIISelLowering.cpp
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: eaedab226cfcf99b92fbfc91b502096a11b45de8
https://github.com/llvm/llvm-project/commit/eaedab226cfcf99b92fbfc91b502096a11b45de8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in Serializer.cpp (NFC)
Commit: 2b808c0e009e60460be7c91e4770225af56d5504
https://github.com/llvm/llvm-project/commit/2b808c0e009e60460be7c91e4770225af56d5504
Author: cmtice <cmtice at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
Log Message:
-----------
[CI][Github] Install Clang in Windows container (#164519)
Downloads clang-for-windows from the LLVM releases website, decompresses
and untars the images, and leave them in C:\clang\clang-msvc\...
Temporarily downloads the 'xz' utility to decompress the downloaded
clang tarball image.
Commit: 4456afcf0bcb29d3ba5670dbc583ee5ea00a01f3
https://github.com/llvm/llvm-project/commit/4456afcf0bcb29d3ba5670dbc583ee5ea00a01f3
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M lldb/test/Shell/lldb-server/TestPlatformErrorMessages.test
M lldb/test/Shell/lldb-server/TestPlatformHelp.test
Log Message:
-----------
Revert "[lldb] fix lldb-server test failures on windows (#164843)"
This reverts commit 930b36cfbbc873fe6c329b95e1c56c6ae1ea1d94.
Reverting because it depends on 5fc40a5f2bedaf6ca3f024aa2a91c5f4ce187061.
Commit: aac036a7f6730118f0d832150243d66b603c3af3
https://github.com/llvm/llvm-project/commit/aac036a7f6730118f0d832150243d66b603c3af3
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
A lldb/test/Shell/lldb-server/TestErrorMessages.test
R lldb/test/Shell/lldb-server/TestGdbserverErrorMessages.test
R lldb/test/Shell/lldb-server/TestPlatformErrorMessages.test
R lldb/test/Shell/lldb-server/TestPlatformHelp.test
R lldb/test/Shell/lldb-server/TestPlatformSuccessfulStartup.test
M lldb/tools/lldb-server/CMakeLists.txt
R lldb/tools/lldb-server/PlatformOptions.td
M lldb/tools/lldb-server/lldb-platform.cpp
Log Message:
-----------
Revert "[lldb] update lldb-server platform help parsing (#162730)"
This reverts commit faf7af864f9258768133894764f1fae58d43bb09.
This is failing on the Darwin bots.
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/lldb-cmake/16164/changes#faf7af864f9258768133894764f1fae58d43bb09
Commit: 910cf518922305ad079211184e843a4437de89ba
https://github.com/llvm/llvm-project/commit/910cf518922305ad079211184e843a4437de89ba
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port d8d80b659a2b
Commit: c97256d540d1903d6d884f26cdfb90467ae46b59
https://github.com/llvm/llvm-project/commit/c97256d540d1903d6d884f26cdfb90467ae46b59
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/utils/mlgo-utils/IR2Vec/generateTriplets.py
Log Message:
-----------
[MIR2Vec] Add MIR support to triplet generator script (#164332)
Add support for MIR (Machine IR) triplet generation to the triplet gen script.
Commit: d47873784174181f1d5837f1389d23afeead734c
https://github.com/llvm/llvm-project/commit/d47873784174181f1d5837f1389d23afeead734c
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/arm64/sme_thread_status.h
Log Message:
-----------
[lldb][debugserver] fix typeo in SME ZA register
chunk enumeartions. Noticed by David Spickett.
NFC--no machine with a ZA register large enough to use this exists
today.
Commit: 4ec5852c1d9f78df2d586ad4ee7af3f087a97555
https://github.com/llvm/llvm-project/commit/4ec5852c1d9f78df2d586ad4ee7af3f087a97555
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
Log Message:
-----------
[LV] Add tests for narrowing interleave groups with multiple blocks.
Add additional test coverage for narrowInterleaveGroups with loops with
multiple blocks.
Commit: 7ac29007187e43c2b5224a0334f82800f5109a34
https://github.com/llvm/llvm-project/commit/7ac29007187e43c2b5224a0334f82800f5109a34
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/test/CodeGen/arm-acle-coproc.c
A clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/arm-cortex-cpus-1.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/arm-target-features.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/ARM/ARMArchitectures.td
M llvm/lib/Target/ARM/ARMFeatures.td
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/TargetParser/ARMTargetParser.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[ARM][AArch64] Introduce the Armv9.7-A architecture version (#163154)
This introduces the Armv9.7-A architecture version, including the
relevant command-line option for -march.
More details about the Armv9.7-A architecture version can be found at:
* https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2025
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
* https://developer.arm.com/documentation/ddi0602/2025-09/
Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
Commit: f28224b78f9ef8c0017a62b9db19338fbd051394
https://github.com/llvm/llvm-project/commit/f28224b78f9ef8c0017a62b9db19338fbd051394
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
A llvm/test/MC/AArch64/armv9.7a-memsys.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for FEAT_CMH and FEAT_LSCP (#163155)
Add the following instructions to support:
* `FEAT_CMH`: Contention Management Hints extension
* `SHUH` instruction
* `FEAT_LSCP`: Load-acquire and store-release pair extension
* `STLP` instruction
* `LDAP` instruction
* `LDAPP` instruction
and system registers:
- `TLBIDIDR_EL1`
- `VTLBID<n>_EL2`
- `VTLBIDOS<n>_EL2`
as documented here:
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
* https://developer.arm.com/documentation/ddi0602/2025-09/
Co-authored-by: Martin Wehking <martin.wehking at arm.com>
Commit: 66e8270e8f3cd5a291e48097095c4f547ddf417d
https://github.com/llvm/llvm-project/commit/66e8270e8f3cd5a291e48097095c4f547ddf417d
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
A llvm/test/MC/AArch64/armv9.7a-tlbid-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-tlbid.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for TLBI Domains (FEAT_TLBID) (#163156)
Allow the following `TLBI` operation types to take an optional register
operand when enabled by `FEAT_TLBID`:
- ALL*
- VMALL*
- VMALLS12*
- VMALLWS2*
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Notes on implementation:
Currently, AArch64 `SYS` alias instructions fall into two categories:
* a register value must be present (indicated by any value except `XZR`)
* no register value must be present (this value must be `XZR`)
When +tblid is enabled, `SYS` aliases are now allowed to take an optional
register, or no register as before. We need an extra tablegen flag to
indicate if the register is optional or not (the existing "NeedsReg" flag
is binary and not suitable; the register is either present or absent,
not either for a specific TLBI operation)
Don't produce an error message if the register operand is missing or
unexpected, if it is specified as an optional register.
Commit: d30f18d2cd464383ba5777d21219026780b0b890
https://github.com/llvm/llvm-project/commit/d30f18d2cd464383ba5777d21219026780b0b890
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/test/MC/AArch64/armv8.4a-mpam.s
A llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-mpamv2.s
M llvm/test/MC/Disassembler/AArch64/armv8.4a-mpam.txt
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for Memory Partitioning and Management (FEAT_MPAMv2) (#163157)
Add new instructions and system registers for `FEAT_MPAMv2`:
* MLBI ALLE1
* MLBI VMALLE1
* MLBI VPIDE1, <Xt>
* MLBI VPMGE1, <Xt>
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
Commit: ca10dacf19d52cad8cbf6c4b5eb5dad0e265a704
https://github.com/llvm/llvm-project/commit/ca10dacf19d52cad8cbf6c4b5eb5dad0e265a704
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
A llvm/test/MC/AArch64/armv9.7a-mtetc-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-mtetc.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for Virtual Memory Tagging (FEAT_MTETC) (#163158)
Add the following instructions for `FEAT_MTETC`, which is a part of
`FEAT_VMTE` for Virtual Tagging:
* `DC ZGBVA`
* `DC GBVA`
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Commit: 6836261ee4acecd14c31f8d66d746f58de87a34b
https://github.com/llvm/llvm-project/commit/6836261ee4acecd14c31f8d66d746f58de87a34b
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
A llvm/test/MC/AArch64/armv9.7a-gcie-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-gcie.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for GICv5 (FEAT_GCIE) (#163159)
Add new instruction and system registers that are specified in the
Generic Interrupt Controller Architecture v5 (GICv5) standard,
announced here:
* https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/introducing-gicv5
and documented here:
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
* https://developer.arm.com/documentation/ddi0602/2025-09/
Co-authored-by: Jack Styles <jack.styles at arm.com>
Commit: ef923f1b281cf25bc8fed129e0851b178a094c56
https://github.com/llvm/llvm-project/commit/ef923f1b281cf25bc8fed129e0851b178a094c56
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
[AMDGPU] Change patterns for v_[pk_]add_{min|max} (#164881)
The intermediate result is in fact the add with saturation
regardless of the clamp bit.
Commit: 997af95fac7b9069e8afa5bd208e02344fab8ce3
https://github.com/llvm/llvm-project/commit/997af95fac7b9069e8afa5bd208e02344fab8ce3
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
Log Message:
-----------
[AMDGPU] Remove validation of s_set_vgpr_msb range (#164888)
We will need the full 16-bit range of the operand to record
previous mode.
Commit: cab4c68a669df7856c9b0babf05709e10f89c7e2
https://github.com/llvm/llvm-project/commit/cab4c68a669df7856c9b0babf05709e10f89c7e2
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/MC/AArch64/SVE2p3/arithmetic-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/arithmetic.s
A llvm/test/MC/AArch64/SVE2p3/directive-arch-negative.s
A llvm/test/MC/AArch64/SVE2p3/directive-arch_extension-negative.s
A llvm/test/MC/AArch64/SVE2p3/directive-cpu-negative.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 arithmetic operations (#163160)
Add instructions for SVE2p3 arithmetic operations:
- `ADDQP` (add pairwise within quadword vector segments)
- `ADDSUBP` (add subtract pairwise)
- `SABAL` (two-way signed absolute difference sum and accumulate long)
- `SUBP` (subtract pairwise)
- `UABAL` (two-way unsigned absolute difference sum and accumulate long)
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Commit: bfae15a1257a63f205db12308ca4b131f3b3f3b3
https://github.com/llvm/llvm-project/commit/bfae15a1257a63f205db12308ca4b131f3b3f3b3
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/MC/AArch64/SVE/bfmmla-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/sdot-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/udot-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fmmla-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fmmla.s
A llvm/test/MC/AArch64/SVE2p3/bfmmla-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/bfmmla.s
A llvm/test/MC/AArch64/SVE2p3/dot-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/dot.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 DOT and MLA operations (#163161)
Add instructions for SVE2p3 DOT and MLA operations:
- BFMMLA (non-widening)
- FMMLA (non-widening)
- SDOT (2-way, vectors)
- SDOT (2-way, indexed)
- UDOT (2-way, vectors)
- UDOT (2-way, indexed)
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Commit: 29969c988bb9004d201e7e6280e193cbcf7aacc8
https://github.com/llvm/llvm-project/commit/29969c988bb9004d201e7e6280e193cbcf7aacc8
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/MC/AArch64/SVE2p3/cvt-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/cvt.s
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations (#163162)
Add instructions for SVE2p3 CVT operations:
- FCVTZSN
- FCVTZUN
- SCVTF
- SCVTFLT
- UCVTF
- UCVTFLT
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Commit: 301fa24671256734df6b7ee65f23ad885400108e
https://github.com/llvm/llvm-project/commit/301fa24671256734df6b7ee65f23ad885400108e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
Log Message:
-----------
[VPlan] Limit narrowInterleaveGroups to single block regions for now.
Currently only regions with a single block are supported by the legality
checks.
Commit: 9470c2e152c6917b8950d2d506b0a4505723011a
https://github.com/llvm/llvm-project/commit/9470c2e152c6917b8950d2d506b0a4505723011a
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/lib/AST/ASTContext.cpp
A clang/test/SemaCXX/ptrauth-nested-incomplete-types.cpp
Log Message:
-----------
[PAC][clang] Correct handling of ptrauth queries of incomplete types (#164528)
In normal circumstances we can never get to this point as earlier Sema
checks will have already have prevented us from making these queries.
However in some cases, for example a sufficiently large number of
errors, clang can start allowing incomplete types in records.
This means a number of the internal interfaces can end up perform type
trait queries that require querying the pointer authentication
properties of types that contain incomplete types. While the trait
queries attempt to guard against incomplete types, those tests fail in
this case as the incomplete types are actually nested in the seemingly
complete parent type.
Commit: d12ab4434cd84667a25cee6e7eddedc0ac7e4371
https://github.com/llvm/llvm-project/commit/d12ab4434cd84667a25cee6e7eddedc0ac7e4371
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/MC/AArch64/SVE2p3/qshrn-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/qshrn.s
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 shift operations (#163163)
Add instructions for SVE2p3 shift operations:
- SQRSHRN
- SQRSHRUN
- SQSHRN
- SQSHRUN
- UQRSHRN
- UQSHRN
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Commit: 475a1c5882305357ec432c93c496fed7c8e1fcdf
https://github.com/llvm/llvm-project/commit/475a1c5882305357ec432c93c496fed7c8e1fcdf
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/MC/AArch64/SME2p3/luti6-diagnostics.s
A llvm/test/MC/AArch64/SME2p3/luti6.s
A llvm/test/MC/AArch64/SVE2p3/luti6-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/luti6.s
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 LUTI6 operations (#163164)
Add instructions for SVE2p3 LUTI6 operations:
- LUTI6 (16-bit)
- LUTI6 (8-bit)
- LUTI6 (vector, 16-bit)
- LUTI6 (table, four registers, 8-bit)
- LUTI6 (table, single, 8-bit)
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Co-authored-by: Virginia Cangelosi <virginia.cangelosi at arm.com>
Commit: 09cf301384ce29312347c608db4871f21af753fc
https://github.com/llvm/llvm-project/commit/09cf301384ce29312347c608db4871f21af753fc
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/MC/AArch64/FP8/fmmla-diagnostics.s
A llvm/test/MC/AArch64/neon-fdot-diagnostics.s
A llvm/test/MC/AArch64/neon-fdot.s
A llvm/test/MC/AArch64/neon-fmmla-HtoS-diagnostics.s
A llvm/test/MC/AArch64/neon-fmmla-HtoS.s
A llvm/test/MC/AArch64/neon-fmmla-diagnostics.s
A llvm/test/MC/AArch64/neon-fmmla.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Armv9.7-A: Add support for new Advanced SIMD (Neon) instructions (#163165)
Add support for new Advanced SIMD (Neon) instructions:
- FDOT (half-precision to single-precision, by element)
- FDOT (half-precision to single-precision, vector)
- FMMLA (half-precision, non-widening)
- FMMLA (widening, half-precision to single-precision)
as documented here:
* https://developer.arm.com/documentation/ddi0602/2025-09/
* https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
Co-authored-by: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
Co-authored-by: Virginia Cangelosi <virginia.cangelosi at arm.com>
Commit: 6dd78f6aefdb76ce7c82ea69813f8e92481737cd
https://github.com/llvm/llvm-project/commit/6dd78f6aefdb76ce7c82ea69813f8e92481737cd
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/test/MC/AArch64/armv8.4a-mpam.s
M llvm/test/MC/Disassembler/AArch64/armv8.4a-mpam.txt
Log Message:
-----------
[AArch64][llvm] Remove FeatureMPAM guards for parity with gcc (#163166)
Remove `AArch64::FeatureMPAM` guards from some MPAM system registers,
since these system registers are not any under feature guard for gcc.
Commit: 7d0ce4840c1f2850de905b06d957a6dcd99c2825
https://github.com/llvm/llvm-project/commit/7d0ce4840c1f2850de905b06d957a6dcd99c2825
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] (NFC) Tidy up alignment/formatting in AArch64/AArch64InstrInfo.td (#163645)
It was noted in a code-review for earlier changes in this stack
that some of the new 9.7 entries were mis-aligned. But actually,
many of the entries were, so I've tidied them all up.
Commit: 0e8781100357b46c9ec6cd2e31a635ad2b2b3211
https://github.com/llvm/llvm-project/commit/0e8781100357b46c9ec6cd2e31a635ad2b2b3211
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/test/Driver/aarch64-v96a.c
M clang/test/Driver/aarch64-v97a.c
M llvm/lib/Target/AArch64/AArch64Features.td
Log Message:
-----------
[AArch64][llvm] Relax mandatory features for Armv9.6-A (#163973)
`FEAT_FPRCVT` is moved from being mandatory in Armv9.6-A to Armv9.7-A
`FEAT_SVE2p2` is removed from being mandatory in Armv9.6-A
Commit: cea8ffa5f3412a58adc5c9c4b0ad0e31869f6e3d
https://github.com/llvm/llvm-project/commit/cea8ffa5f3412a58adc5c9c4b0ad0e31869f6e3d
Author: Thurston Dang <thurston at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
Log Message:
-----------
[asan] Avoid -Wpointer-bool-conversion warning by comparing to nullptr (#164906)
The current code may trigger a compiler warning:
```
address of function 'wcsnlen' will always evaluate to 'true' [-Wpointer-bool-conversion]
```
Fix this by comparing to nullptr. The same fix is applied to strnlen for
future-proofing.
Commit: 169626f11ab19a0b33fba2ca84cf4d9ec2b76fb1
https://github.com/llvm/llvm-project/commit/169626f11ab19a0b33fba2ca84cf4d9ec2b76fb1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
Log Message:
-----------
[RISCV] Rename RISCVISD::ABSW->NEGW_MAX. NFC (#164909)
This matches what it expands to. The P extension adds a proper ABSW
instruction so being precise is important to avoid confusion.
Commit: 6ed814a823258fa357c25bd71e76eb688fbbff79
https://github.com/llvm/llvm-project/commit/6ed814a823258fa357c25bd71e76eb688fbbff79
Author: Andrew Savonichev <andrew.savonichev at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/IR/Module.cpp
M llvm/unittests/IR/ModuleTest.cpp
Log Message:
-----------
[IR] Fix Module::setModuleFlag for uniqued metadata (#164580)
`Module::setModuleFlag` is supposed to change a single module. However,
when an `MDNode` has the same value in more than one module in the same
`LLVMContext`, such `MDNode` is shared (uniqued) across all of them.
Therefore `MDNode::replaceOperandWith` changes all modules that share
the same `MDNode`.
This used to cause problems for #86212, where a module is marked as
"upgraded" via a module flag. When this flag is shared across multiple
modules, all of them are marked, yet some may not have been processed at
all.
After the patch we now construct a new `MDNode` and replace the old one.
Commit: 4a84f10554a78486e69384590582117c09154ce3
https://github.com/llvm/llvm-project/commit/4a84f10554a78486e69384590582117c09154ce3
Author: Carl Peto <carl.peto at me.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AVRRegisterInfo.td
M llvm/test/CodeGen/AVR/dynalloca.ll
A llvm/test/CodeGen/AVR/issue-163015.ll
Log Message:
-----------
[AVR] Fix occasional corruption in stack passed params
Corruption can occur with passing parameters on the stack when under register pressure.
Fixes #163015 .
Commit: 6a0f392bb50d890f13cb961a911be28f965ed4f2
https://github.com/llvm/llvm-project/commit/6a0f392bb50d890f13cb961a911be28f965ed4f2
Author: Thurston Dang <thurston at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
Log Message:
-----------
[asan] Avoid -Wtautological-pointer-compare (#164918)
https://github.com/llvm/llvm-project/pull/164906 converted a
-Wpointer-bool-conversion warning into a -Wtautological-pointer-compare
warning. Avoid both by using the bool cast.
Commit: bcee0ee68dbdcdd5e07e16303b6a5805814d1dfd
https://github.com/llvm/llvm-project/commit/bcee0ee68dbdcdd5e07e16303b6a5805814d1dfd
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
Log Message:
-----------
[SDAG] Fix deferring constrained function calls (#153029)
Selection DAG has a more sophisticated execution order representation
than the simple sequence used in IR, so building the DAG can take into
account specific properties of the nodes to better express possible
parallelism. The existing implementation does this for constrained
function calls, some of them are considered as independent, which can
potentially improve the generated code. However this mechanism
incorrectly implies that the calls with exception behavior 'ebIgnore'
cannot raise floating-point exception. The purpose of this change is to
fix the implementation.
In the current implementation, constrained function calls don't
immediately update the DAG root. Instead, the DAG builder collects their
output chains and flushes them when the root is required. Constrained
function calls cannot be moved across calls of external functions and
intrinsics that access floating-point environment, they work as
barriers. Between the barriers, constrained function calls can be
reordered, they may be considered independent from viewpoint of raising
exceptions. For strictfp functions this is possible only if
floating-point trapping is disabled.
This change introduces a new restriction - the calls with default
exception handling cannot not be moved between strictfp function calls.
Otherwise the exceptions raised by such call can disturb the expected
exception sequence. It means that constrained function calls with strict
exception behavior act as barriers for the calls with non-strict
behavior and vice versa. Effectively it means that the entire sequence
of constrained calls in IR is split into "strict" and "non-strict"
regions, in which restrictions on the order of constrained calls are
relaxed, but move from one region to another is not allowed. It agrees
with the representation of strictfp code in high-level languages. For
example, C/C++ strictfp code correspond to blocks where pragma `STDC
FENV_ACCESS ON` is in effect, this restriction should help preserving
the intended semantics.
When floating-point exception trapping is enabled, constrained
intrinsics with 'ebStrict' cannot be reordered, their sequence must be
identical to the original source order. The current implementation does
not distinguish between strictfp modes with trapping and without it.
This change make assumption that the trapping is disabled. It is not
correct in the general case, but is compatible with the existing
implementation.
Commit: 0341fb63f2abe2ce98434c45fef8826718f9198c
https://github.com/llvm/llvm-project/commit/0341fb63f2abe2ce98434c45fef8826718f9198c
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[ThinLTO] Avoid creating map entries on lookup (NFCI) (#164873)
We could inadvertently create new entries in the PrevailingModuleForGUID
map during lookup, which was always using operator[]. In most cases we
will have one for external symbols, but not in cases where the
prevailing copy is in a native object. Or if this happened to be looked
up for a local.
Make the map private and create and use accessors.
Commit: 750a58337ee8594f5253733786e066f7941d617d
https://github.com/llvm/llvm-project/commit/750a58337ee8594f5253733786e066f7941d617d
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[ThinLTO] Simplify checking for single external copy (NFCI) (#164861)
Replace a loop over all summary copies with a simple check for a single
externally available copy of a symbol. The usage of this result has
changed since it was added and we now only need to know if there is a
single one.
Commit: e4c308424f9fbde2b9429f5f977e92e289e10991
https://github.com/llvm/llvm-project/commit/e4c308424f9fbde2b9429f5f977e92e289e10991
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
[MemProf] Fix the propagation of context/size info after inlining (#164872)
In certain cases the context/size info we use for reporting of hinted
bytes in the LTO link was being dropped when we re-constructed context
tries and memprof metadata after inlining. This only affected cases
where we were using the -memprof-min-percent-max-cold-size option to
only keep that information for the largest cold contexts, and where the
pre-LTO compile did *not* specify -memprof-report-hinted-sizes.
The issue is that we don't have a MaxSize, which is only available
during the profile matching step. Use an existing bool indicating that
we are redoing this from existing metadata to always propagate any
context size metadata in that case.
Commit: 93bb5c699f9fc2e6ee26fc8f86f8bca038f58409
https://github.com/llvm/llvm-project/commit/93bb5c699f9fc2e6ee26fc8f86f8bca038f58409
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/arrays.cpp
Log Message:
-----------
[clang][bytecode] Fix CXXConstructExpr for multidim arrays (#164760)
This is a thing apparently.
Fixes https://github.com/llvm/llvm-project/issues/153803
Commit: 57ccb4624f7a8329567ec5a02962815f5617e3f1
https://github.com/llvm/llvm-project/commit/57ccb4624f7a8329567ec5a02962815f5617e3f1
Author: David Green <david.green at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/add-cast-vect.ll
M llvm/test/Analysis/CostModel/ARM/cast_ldst.ll
M llvm/test/Analysis/CostModel/ARM/freeshift.ll
M llvm/test/Analysis/CostModel/ARM/gep.ll
M llvm/test/Analysis/CostModel/ARM/immediates.ll
M llvm/test/Analysis/CostModel/ARM/insertelement.ll
M llvm/test/Analysis/CostModel/ARM/load-to-trunc.ll
M llvm/test/Analysis/CostModel/ARM/load_store.ll
M llvm/test/Analysis/CostModel/ARM/logicalop.ll
M llvm/test/Analysis/CostModel/ARM/mul-cast-vect.ll
M llvm/test/Analysis/CostModel/ARM/muls-in-smlal-patterns.ll
M llvm/test/Analysis/CostModel/ARM/muls-in-umull-patterns.ll
M llvm/test/Analysis/CostModel/ARM/select.ll
M llvm/test/Analysis/CostModel/ARM/shl-cast-vect.ll
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
M llvm/test/Analysis/CostModel/ARM/sub-cast-vect.ll
Log Message:
-----------
[ARM] Update remaining cost tests with -cost-kind=all. NFC
Commit: 7c441b21b7fac52a8c28eaa4a4b829c0e5ce6d7b
https://github.com/llvm/llvm-project/commit/7c441b21b7fac52a8c28eaa4a4b829c0e5ce6d7b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Catch placement-new into invalid destination (#164804)
We failed to check for null and non-block pointers.
Fixes https://github.com/llvm/llvm-project/issues/152952
Commit: c07d305718744917ba5dc6693322e13a5c2314df
https://github.com/llvm/llvm-project/commit/c07d305718744917ba5dc6693322e13a5c2314df
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Add the support for WTF::ScopeExit and WTF::makeVisitor (#161926)
Lambda passed to WTF::ScopeExit / WTF::makeScopeExit and
WTF::makeVisitor should be ignored by the lambda captures checker so
long as its resulting object doesn't escape the current scope.
Unfortunately, recognizing this pattern generally is too hard to do so
directly hard-code these two function names to the checker.
Commit: 9681705fbc3e16810ed031ca9bdd4b78654a3058
https://github.com/llvm/llvm-project/commit/9681705fbc3e16810ed031ca9bdd4b78654a3058
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
M llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir
M llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir
M llvm/test/CodeGen/X86/atom-fixup-lea4.ll
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change2.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change3.mir
M llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
M llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
M llvm/test/CodeGen/X86/bit-piece-comment.ll
M llvm/test/CodeGen/X86/catchpad-regmask.ll
M llvm/test/CodeGen/X86/catchpad-weight.ll
M llvm/test/CodeGen/X86/clang-section-coff.ll
M llvm/test/CodeGen/X86/cleanuppad-inalloca.ll
M llvm/test/CodeGen/X86/complex-fastmath.ll
M llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll
M llvm/test/CodeGen/X86/dag-optnone.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen.ll
M llvm/test/CodeGen/X86/dbg-combine.ll
M llvm/test/CodeGen/X86/debug-loclists-lto.ll
M llvm/test/CodeGen/X86/debugloc-argsize.ll
M llvm/test/CodeGen/X86/early-cfi-sections.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
M llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
M llvm/test/CodeGen/X86/fdiv.ll
M llvm/test/CodeGen/X86/fma_patterns_wide.ll
M llvm/test/CodeGen/X86/fold-tied-op.ll
M llvm/test/CodeGen/X86/fp128-g.ll
M llvm/test/CodeGen/X86/fp128-i128.ll
M llvm/test/CodeGen/X86/frame-order.ll
M llvm/test/CodeGen/X86/fsafdo_test2.ll
M llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
M llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
M llvm/test/CodeGen/X86/label-annotation.ll
M llvm/test/CodeGen/X86/label-heapallocsite.ll
M llvm/test/CodeGen/X86/late-remat-update.mir
M llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
M llvm/test/CodeGen/X86/lifetime-alias.ll
M llvm/test/CodeGen/X86/limit-split-cost.mir
M llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll
M llvm/test/CodeGen/X86/misched-copy.ll
M llvm/test/CodeGen/X86/misched-matmul.ll
M llvm/test/CodeGen/X86/movpc32-check.ll
M llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll
M llvm/test/CodeGen/X86/nocf_check.ll
M llvm/test/CodeGen/X86/pr15705.ll
M llvm/test/CodeGen/X86/pr18846.ll
M llvm/test/CodeGen/X86/pr31045.ll
M llvm/test/CodeGen/X86/pr32610.ll
M llvm/test/CodeGen/X86/pr34080-2.ll
M llvm/test/CodeGen/X86/pr34080.ll
M llvm/test/CodeGen/X86/pr34629.ll
M llvm/test/CodeGen/X86/pr34634.ll
M llvm/test/CodeGen/X86/pr42727.ll
M llvm/test/CodeGen/X86/pr48064.mir
M llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll
M llvm/test/CodeGen/X86/recip-fastmath.ll
M llvm/test/CodeGen/X86/recip-fastmath2.ll
M llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
M llvm/test/CodeGen/X86/regparm.ll
M llvm/test/CodeGen/X86/seh-catchpad.ll
M llvm/test/CodeGen/X86/seh-except-finally.ll
M llvm/test/CodeGen/X86/seh-no-invokes.ll
M llvm/test/CodeGen/X86/shrinkwrap-hang.ll
M llvm/test/CodeGen/X86/sqrt-fastmath.ll
M llvm/test/CodeGen/X86/sse1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
M llvm/test/CodeGen/X86/stack-protector-3.ll
M llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
M llvm/test/CodeGen/X86/stack_guard_remat.ll
M llvm/test/CodeGen/X86/tail-merge-wineh.ll
M llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
M llvm/test/CodeGen/X86/unused_stackslots.ll
M llvm/test/CodeGen/X86/uwtables.ll
M llvm/test/CodeGen/X86/vec_int_to_fp.ll
M llvm/test/CodeGen/X86/vector-sqrt.ll
M llvm/test/CodeGen/X86/vector-width-store-merge.ll
M llvm/test/CodeGen/X86/win-cleanuppad.ll
M llvm/test/CodeGen/X86/win32-seh-catchpad.ll
M llvm/test/CodeGen/X86/win32-seh-nested-finally.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
M llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
Log Message:
-----------
[test][X86] Remove unsafe-fp-math uses (NFC) (#164814)
Post cleanup for #164534.
Commit: a1e59bdc173187ec47e6ede69c99316eaee9e375
https://github.com/llvm/llvm-project/commit/a1e59bdc173187ec47e6ede69c99316eaee9e375
Author: David Green <david.green at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
A llvm/test/CodeGen/MIR/AArch64/parse-shufflemask-invalid-scalar.mir
M llvm/test/CodeGen/MIR/AArch64/parse-shufflemask.mir
M llvm/test/MachineVerifier/test_g_shuffle_vector.mir
Log Message:
-----------
[GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (#140508)
I'm not sure if this is the best way forward or not, but we have a lot
of issues with forgetting that shuffle_vectors can be scalar again and
again. (There is another example from the recent known-bits code added
recently). As a scalar-dst shuffle vector is just an extract, and a
scalar-source shuffle vector is just a build vector, this patch makes
scalar shuffle vector illegal and adjusts the irbuilder to create the
correct node as required.
Most targets do this already through lowering or combines. Making scalar
shuffles illegal simplifies gisel as a whole, it just requires that
transforms that create shuffles of new sizes to account for the scalar
shuffle being illegal (mostly IRBuilder and LessElements).
Commit: 8ebec3d55123bf1c961df829f5529705004dacc2
https://github.com/llvm/llvm-project/commit/8ebec3d55123bf1c961df829f5529705004dacc2
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/constant-vector-insert.ll
Log Message:
-----------
[InstCombine] Constant fold binops through `vector.insert` (#164624)
This patch improves constant folding through `llvm.vector.insert`. It
does not change anything for fixed-length vectors (which can already be
folded to ConstantVectors for these cases), but folds scalable vectors
that otherwise would not be folded.
These folds preserve the destination vector (which could be undef or
poison), giving targets more freedom in lowering the operations.
Commit: 44331d25949302c3898b71fa5aceaea3d49248b5
https://github.com/llvm/llvm-project/commit/44331d25949302c3898b71fa5aceaea3d49248b5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__cxx03/__thread/support/pthread.h
M libcxx/include/__cxx03/cctype
M libcxx/include/__cxx03/cerrno
M libcxx/include/__cxx03/cfenv
M libcxx/include/__cxx03/cfloat
M libcxx/include/__cxx03/cinttypes
R libcxx/include/__cxx03/complex.h
M libcxx/include/__cxx03/cstddef
M libcxx/include/__cxx03/cstdio
R libcxx/include/__cxx03/ctype.h
M libcxx/include/__cxx03/cwctype
R libcxx/include/__cxx03/errno.h
M libcxx/include/__cxx03/ext/__hash
R libcxx/include/__cxx03/fenv.h
R libcxx/include/__cxx03/float.h
R libcxx/include/__cxx03/inttypes.h
R libcxx/include/__cxx03/stdbool.h
R libcxx/include/__cxx03/stddef.h
R libcxx/include/__cxx03/stdio.h
R libcxx/include/__cxx03/tgmath.h
M libcxx/include/__cxx03/wchar.h
R libcxx/include/__cxx03/wctype.h
M libcxx/include/complex.h
M libcxx/include/ctype.h
M libcxx/include/errno.h
M libcxx/include/fenv.h
M libcxx/include/float.h
M libcxx/include/inttypes.h
M libcxx/include/stdbool.h
M libcxx/include/stddef.h
M libcxx/include/stdio.h
M libcxx/include/tgmath.h
M libcxx/include/wctype.h
Log Message:
-----------
[libc++][C++03] Remove some of the C++03-specific C wrapper headers (#163772)
`include_next` doesn't work very well with the C++03 headers and
modules. Since these specific headers are very self-contained there
isn't much of a reason to split them into C++03/non-C++03 headers, so
let's just remove them. The few C wrapper headers that aren't as
self-contained will be refactored in a separate patch.
Commit: 6b30d2104084eda539278097b6b16215a7c908d7
https://github.com/llvm/llvm-project/commit/6b30d2104084eda539278097b6b16215a7c908d7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 44331d259493
Commit: ea2de9aaa64ac5e20a9c7898864760c1086e0f8c
https://github.com/llvm/llvm-project/commit/ea2de9aaa64ac5e20a9c7898864760c1086e0f8c
Author: Brandon <61314499+brandonxin at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-adc.ll
M llvm/test/CodeGen/X86/combine-sbb.ll
M llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
Log Message:
-----------
[X86] Fold generic ADD/SUB with constants to X86ISD::SUB/ADD (#164316)
Fix #163125
This PR enhances `combineX86AddSub` so that it can handle `X86ISD::SUB(X,Constant)` with `add(X,-Constant)` and other similar cases:
- `X86ISD::ADD(LHS, C)` will fold `sub(-C, LHS)`
- `X86ISD::SUB(LHS, C)` will fold `add(LHS, -C)`
- `X86ISD::SUB(C, RHS)` will fold `add(RHS, -C)`
`CodeGen/X86/dag-update-nodetomatch.ll` is updated because following IR is folded:
```llvm
for.body2:
; ......
; This generates `add t6, Constant:i64<1>`
%indvars.iv.next = add nsw i64 %indvars.iv, 1;
; This generates `X86ISD::SUB t6, Constant:i64<-1>` and folds the previous `add`
%cmp = icmp slt i64 %indvars.iv, -1;
br i1 %cmp, label %for.body2, label %for.cond1.for.inc3_crit_edge.loopexit
```
```diff
- ; CHECK-NEXT: movq (%r15), %rax
- ; CHECK-NEXT: movq %rax, (%r12,%r13,8)
- ; CHECK-NEXT: leaq 1(%r13), %rdx
- ; CHECK-NEXT: cmpq $-1, %r13
- ; CHECK-NEXT: movq %rdx, %r13
+ ; CHECK-NEXT: movq (%r12), %rax
+ ; CHECK-NEXT: movq %rax, (%r13,%r9,8)
+ ; CHECK-NEXT: incq %r9
```
Commit: 27453ce5215969a5e56b4dd5503361ffca3d8835
https://github.com/llvm/llvm-project/commit/27453ce5215969a5e56b4dd5503361ffca3d8835
Author: Ye Tian <939808194 at qq.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[Headers][X86] Allow SLLDQ/SRLDQ byte shift intrinsics to be used in constexpr (#164166)
Support constexpr usage for SLLDQ/SRLDQ byte shift intrinsics
This draft PR adds support for using the following SRLDQ intrinsics in
constant expressions:
- _mm_srli_si128
- _mm256_srli_si256
- _mm_slli_si128
- _mm256_slli_si256
Relevant tests are included.
Fixes #156494
Commit: fc7f34078cdaaecac0100a30cdbcdbcced76fef7
https://github.com/llvm/llvm-project/commit/fc7f34078cdaaecac0100a30cdbcdbcced76fef7
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/test/Dialect/Vector/vector-mem-transforms.mlir
Log Message:
-----------
[mlir][vector][nfc] Update tests for folding mem operations (#164255)
Tests in "fold_maskedload_to_load_all_true_dynamic" excercise folders
for:
* vector.maskedload, vector.maskedstore, vector.scatter,
vector.gather, vector.compressstore, vector.expandload.
This patch renames and documents these tests in accordance with:
* https://mlir.llvm.org/getting_started/TestingGuide/
Note: the updated tests are referenced in the Test Formatting Best
Practices section of the MLIR testing guide:
* https://mlir.llvm.org/getting_started/TestingGuide/#test-formatting-best-practices
Keeping them aligned with the guidelines ensures consistency and clarity
across MLIR’s test suite.
Commit: d522b1b3000f99337fd97059fae441476b000960
https://github.com/llvm/llvm-project/commit/d522b1b3000f99337fd97059fae441476b000960
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M libcxx/include/__config
M libcxx/test/std/depr/depr.c.headers/uchar_h.compile.pass.cpp
A libcxx/test/std/depr/depr.c.headers/uchar_h_char8_t.compile.pass.cpp
M libcxx/test/std/strings/c.strings/cuchar.compile.pass.cpp
A libcxx/test/std/strings/c.strings/cuchar_char8_t.compile.pass.cpp
R libcxx/test/std/strings/c.strings/no_c8rtomb_mbrtoc8.verify.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Define `_LIBCPP_HAS_C8RTOMB_MBRTOC8` to true if compiling with clang (#152724)
Define `_LIBCPP_HAS_C8RTOMB_MBRTOC8` to `1` if compiling with clang.
Some tests involving functionality from `uchar.h`/`cuchar` fail when the
platform or the supporting C library does not provide support for the
corresponding features. These have been xfailed.
This patch will enable the adoption of newer picolibc versions.
Commit: a1a37fedfecccd72fe2c3c8b03327819b9923c55
https://github.com/llvm/llvm-project/commit/a1a37fedfecccd72fe2c3c8b03327819b9923c55
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/global-init.cpp
Log Message:
-----------
[CIR] Support ExplicitCast for ConstantExpr (#164783)
Support the ExplicitCast for ConstantExpr
Commit: 86a2073b5bf5f0b44573b8f7e600040a8cdc8bc2
https://github.com/llvm/llvm-project/commit/86a2073b5bf5f0b44573b8f7e600040a8cdc8bc2
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
A mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
A mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][scf] Add parallelLoopUnrollByFactors() (#163806)
- In the SCF Utils, add the `parallelLoopUnrollByFactors()` function
to unroll scf::ParallelOp loops according to the specified unroll factors
- Add a test pass "TestParallelLoopUnrolling" and the related LIT test
- Expose `mlir::parallelLoopUnrollByFactors()`, `mlir::generateUnrolledLoop()`,
and `mlir::scf::computeUbMinusLb()` functions in the
mlir/Dialect/SCF/Utils/Utils.h header to make them available
to other passes.
- In `mlir::generateUnrolledLoop()`, add also an optional
`IRMapping *clonedToSrcOpsMap` argument to map the new cloned
operations to their original ones.
In the function body, change the default `AnnotateFn` type to
`static const` to silence potential warnings about dangling references
when a function_ref is assigned to a variable with automatic storage.
Signed-off-by: Fabrizio Indirli <Fabrizio.Indirli at arm.com>
Commit: ed87795aa6a0ea7bc49cd9257ff363e220f35872
https://github.com/llvm/llvm-project/commit/ed87795aa6a0ea7bc49cd9257ff363e220f35872
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
Log Message:
-----------
[llvm][docs] Correct description of %t lit substitution (#164397)
%t is currently documented as:
temporary file name unique to the test
https://llvm.org/docs/CommandGuide/lit.html#substitutions
Which I take to mean if the path is a/b/c/tempfile, then %t would be
tempfile. It is not, it's the whole path.
(which is hinted at by %basename_t, but why would you read that if you
didn't need to use it)
As seen in #164396 this can create confusion when people use it as if it
were just the file name.
Make it clear in the docs that this is a unique path, which can be used
to make files or folders.
Commit: 5f8b3c11ad7641e145d5bc79c21f7c0d9d589a59
https://github.com/llvm/llvm-project/commit/5f8b3c11ad7641e145d5bc79c21f7c0d9d589a59
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[AArch64][CostModel] Reduce cost of wider than legal get.active.lane.mask (#163786)
getIntrinsicInstrCost should halve the cost returned by getTypeLegalizationCost
when the return type requires splitting, but we know that the whilelo
(predicate pair) instruction can be used.
When splitting is still required, the cost get_active_lane_mask should also
reflect the additional saturating add required to increment the start value.
Commit: 4f53413ff0a5e33cf6e39f538d4103fe0e310bf4
https://github.com/llvm/llvm-project/commit/4f53413ff0a5e33cf6e39f538d4103fe0e310bf4
Author: SahilPatidar <sahilpatidar60 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp
A llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp
Log Message:
-----------
REAPPLY [ORC] Add automatic shared library resolver for unresolved symbols. #148410 (#164551)
This PR reapplies the changes previously introduced in #148410.
It introduces a redesigned and rebuilt Cling-based auto-loading
workaround that enables scanning libraries and resolving unresolved
symbols within those libraries.
Commit: 92e1be489a9a7a25857060872d6910573dfd41d5
https://github.com/llvm/llvm-project/commit/92e1be489a9a7a25857060872d6910573dfd41d5
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
R mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
R mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
Revert "[mlir][scf] Add parallelLoopUnrollByFactors()" (#164949)
Reverts llvm/llvm-project#163806 due to linking errors on the function
`mlir::scf::computeUbMinusLb`
Commit: fb925b5244012f42bfbd2f4566a6f01789d7412d
https://github.com/llvm/llvm-project/commit/fb925b5244012f42bfbd2f4566a6f01789d7412d
Author: Emilio Cota <ecg at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/Transforms/OpenMPOffloadPrivatizationPrepare.cpp
Log Message:
-----------
[flang][mlir] fix irreflexibility violation of strict weak ordering in #155348 (#164833)
This fixes strict weak ordering checks violations from #155348 when
running these two tests:
mlir/test/Dialect/OpenMP/omp-offload-privatization-prepare.mlir
mlir/test/Dialect/OpenMP/omp-offload-privatization-prepare-by-value.mlir
Sample error:
/stable/src/libcxx/include/__debug_utils/strict_weak_ordering_check.h:50: libc++ Hardening assertion !__comp(*__first + __a), *(__first + __b)) failed: Your comparator is not a valid strict-weak ordering
This is because (x < x) should be false, not true, to meet the
irreflexibility property. (Note that .dominates(x, x) returns true.)
I'm afraid that even after this commit we can't guarantee a strict weak
ordering, because we can't guarantee transitivity of equivalence by
sorting with a strict dominance function. However the tests are not
failing anymore, and I am not at all familiar with this code so I will
leave this concern up to the original author for consideration. (Ideas
without any further context: I would consider a topological sort or
walking a dominator tree.)
Reference on std::sort and strict weak ordering:
https://danlark.org/2022/04/20/changing-stdsort-at-googles-scale-and-beyond/
Commit: 5dfbe84da278126ac8017618af885ffc8581a728
https://github.com/llvm/llvm-project/commit/5dfbe84da278126ac8017618af885ffc8581a728
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 4f53413ff0a5
Commit: f362a4e7a0e587629fbb6f98469a2c6806c8f644
https://github.com/llvm/llvm-project/commit/f362a4e7a0e587629fbb6f98469a2c6806c8f644
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll
Log Message:
-----------
[AArch64] Optimized rdsvl followed by constant mul (#162853)
Currently when RDSVL is followed by constant multiplication, no specific
optimization exist which would leverage the immediate multiplication
operand to generate simpler assembly. This patch adds such optimization
and allow rewrites like these if certain conditions are met:
`(mul (srl (rdsvl 1), 3), x) -> (shl (rdsvl y), z) `
Commit: 2c6c2689c5d631f08fe52844a4b192521fd710d5
https://github.com/llvm/llvm-project/commit/2c6c2689c5d631f08fe52844a4b192521fd710d5
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
Log Message:
-----------
[VPlan] Extend tryToFoldLiveIns to fold binary intrinsics (#161703)
InstSimplifyFolder can fold binary intrinsics, so take the opportunity
to unify code with getOpcodeOrIntrinsicID, and handle the case. The
additional handling of WidenGEP is non-functional, as the GEP is
simplified before it is widened, as the included test shows.
Commit: 332f786a3597442f49a3f7531f3188c8cc14e8fb
https://github.com/llvm/llvm-project/commit/332f786a3597442f49a3f7531f3188c8cc14e8fb
Author: David Green <david.green at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/ldst-prepost-uses.ll
Log Message:
-----------
[DAG][AArch64] Ensure that ResNo is correct for uses of Ptr when considering postinc. (#164810)
We might be looking at a different use, for example in the uses of a
i32,i64,ch preindex load.
Fixes #164775
Commit: 86fd3af1637d64bfe329379ac4af330cfb27e449
https://github.com/llvm/llvm-project/commit/86fd3af1637d64bfe329379ac4af330cfb27e449
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add ext-int64 support (#164389)
This commit adds support for the EXT-INT64 extension added
to the specification here:
https://github.com/arm/tosa-specification/commit/1b690f8e120de2cc9b28a23b9f607225aedafdce
Commit: f8b81b45ba654d6768b98db5041046ba9231df1d
https://github.com/llvm/llvm-project/commit/f8b81b45ba654d6768b98db5041046ba9231df1d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_muladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_submuladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/vectorizable-intrinsic.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_flop7.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr16899.ll
M llvm/test/Transforms/SLPVectorizer/X86/vector_gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
M llvm/test/Transforms/SafeStack/ARM/debug.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
M llvm/test/Transforms/SampleProfile/Inputs/profile-symbol-list.ll
M llvm/test/Transforms/SampleProfile/branch.ll
M llvm/test/Transforms/SampleProfile/csspgo-import-list.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline-debug.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline.ll
M llvm/test/Transforms/SampleProfile/csspgo-summary.ll
M llvm/test/Transforms/SampleProfile/csspgo-use-preinliner.ll
M llvm/test/Transforms/SampleProfile/entry_counts_cold.ll
M llvm/test/Transforms/SampleProfile/entry_counts_missing_dbginfo.ll
M llvm/test/Transforms/SampleProfile/fsafdo_test.ll
M llvm/test/Transforms/SampleProfile/gcc-simple.ll
M llvm/test/Transforms/SampleProfile/inline-act.ll
M llvm/test/Transforms/SampleProfile/misexpect.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-2.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-3.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-4.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp.ll
M llvm/test/Transforms/SampleProfile/offset.ll
M llvm/test/Transforms/SampleProfile/profile-context-order.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker.ll
M llvm/test/Transforms/SampleProfile/profile-topdown-order.ll
M llvm/test/Transforms/SampleProfile/propagate.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-discriminator.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-icp-factor.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-no-debug-info.ll
M llvm/test/Transforms/SampleProfile/remarks.ll
M llvm/test/Transforms/SampleProfile/uniqname.ll
M llvm/test/Transforms/Scalarizer/dbginfo.ll
M llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-cleanuppads.ll
M llvm/test/Transforms/SimplifyCFG/pr50060-constantfold-loopid.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/pr23975.ll
M llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
Log Message:
-----------
[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787)
Post cleanup for #164534.
Commit: 89b18f0304c8a4f7e069fdba92a13d1b939a218f
https://github.com/llvm/llvm-project/commit/89b18f0304c8a4f7e069fdba92a13d1b939a218f
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
A llvm/test/CodeGen/AArch64/arm64-cvt-simd-fptoi.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
Log Message:
-----------
[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)
This is followup patch to #157680, which allows simd fpcvt instructions
to be generated from fptoi(_sat) nodes.
Commit: 9ef60ff7ff187f5d80e745d3047d0f0b1e684cac
https://github.com/llvm/llvm-project/commit/9ef60ff7ff187f5d80e745d3047d0f0b1e684cac
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
[llvm][utils] Improve the StringRef summary provider (#162298)
- check the length of data before casting as `char[N]` because the will
cause lldb to allocate `N` bytes of memory.
---------
Co-authored-by: Dave Lee <davelee.com at gmail.com>
Commit: 2db482d4ea97d4b2a690775655534c2b48695319
https://github.com/llvm/llvm-project/commit/2db482d4ea97d4b2a690775655534c2b48695319
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - Allow shufps/pd shuffles intrinsics to be used in constexpr (#164078)
Resolves #161208
Commit: 357b030f5e62a5891fd6120c02aa28d0874f0a06
https://github.com/llvm/llvm-project/commit/357b030f5e62a5891fd6120c02aa28d0874f0a06
Author: Owen Anderson <resistor at mac.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
A lld/test/riscv-vendor-relocations.s
Log Message:
-----------
[lld] Add infrastructure for handling RISCV vendor-specific relocations. (#159987)
Commit: a2f3811a3d252994c18957fb777c66bba129ccf8
https://github.com/llvm/llvm-project/commit/a2f3811a3d252994c18957fb777c66bba129ccf8
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Add dependency for 4f53413ff0a5e33cf6e39f538d4103fe0e310bf4
Commit: d34ead1ce493c0c1630468a1604764450ef41c77
https://github.com/llvm/llvm-project/commit/d34ead1ce493c0c1630468a1604764450ef41c77
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/test/Driver/aarch64-ptrauth.c
Log Message:
-----------
[PAC][clang] Handle pauthtest environment and ABI in Linux-specific code (#113151)
Since pauthtest is a Linux-specific ABI, it should not be handled in
common driver code.
Commit: 9e7a3ee5ff85a6c6838b20734822d658744e9bf3
https://github.com/llvm/llvm-project/commit/9e7a3ee5ff85a6c6838b20734822d658744e9bf3
Author: Owen Anderson <resistor at mac.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
A lld/test/ELF/riscv-vendor-relocations.s
R lld/test/riscv-vendor-relocations.s
Log Message:
-----------
[lld] Fix RISCV vendor relocation testcase to require RISCV
Fixes test issue introduced in 357b030f5e62a5891fd6120c02aa28d0874f0a06
Commit: c087b8048380e46834c73313bb5d5c4920f7d5a3
https://github.com/llvm/llvm-project/commit/c087b8048380e46834c73313bb5d5c4920f7d5a3
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/test/MC/Disassembler/Xtensa/debug.txt
M llvm/test/MC/Xtensa/debug.s
Log Message:
-----------
[Xtensa] Fix encoding of `break.n` (#155159)
According to the manual, bits 3...0 should be 1101. (1100 is `movi.n`.)
Commit: 7d4430bb7fd488344fba9ecf88f5cd34accaf3be
https://github.com/llvm/llvm-project/commit/7d4430bb7fd488344fba9ecf88f5cd34accaf3be
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add ext-mxfp support for const and cast ops (#163641)
This commit allows const and cast ops with MXFP datatypes through the
validation pass when specification version 1.1.draft is selected.
Note: it doesn't include support for the mxint8 datatype. This will be
added in a separate commit.
Note: this commit adds support as defined in the spec in
https://github.com/arm/tosa-specification/commit/063846a75b9687ab01e58cb3538472bffb3a03b0.
EXT_MXFP extension is considered experimental and subject to breaking
change.
Commit: f5a2e6bb8ff98cdccd0531e22fa3a7875d718fde
https://github.com/llvm/llvm-project/commit/f5a2e6bb8ff98cdccd0531e22fa3a7875d718fde
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
CodeGen: Remove overrides of getSSPStackGuardCheck (NFC) (#164044)
All 3 implementations are just checking if this has the
windows check function, so merge that as the only implementation.
Commit: 6c5770ddaa2769fbc9261d59b50e705a1f463a81
https://github.com/llvm/llvm-project/commit/6c5770ddaa2769fbc9261d59b50e705a1f463a81
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
Log Message:
-----------
RuntimeLibcalls: Avoid reporting __stack_chk_guard as available for msvc (#164133)
The predicate system is currently primitive and alternative call
predicates
should be mutually exclusive.
Commit: 26db21400d5bfe87e2b3d386c8589b56b965b158
https://github.com/llvm/llvm-project/commit/26db21400d5bfe87e2b3d386c8589b56b965b158
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
Log Message:
-----------
Fix link error with shared libraries
/usr/bin/ld: unittests/ExecutionEngine/Orc/CMakeFiles/OrcJITTests.dir/L
ibraryResolverTest.cpp.o: undefined reference to symbol '_ZN4llvm4yaml1
1convertYAMLERNS0_5InputERNS_11raw_ostreamENS_12function_refIFvRKNS_5Tw
ineEEEEjm'
/usr/bin/ld: lib/libLLVMObjectYAML.so.22.0git: error adding symbols: DS
O missing from command line
Commit: fe5f49942eb7b27989b04736bc91e14730dc478d
https://github.com/llvm/llvm-project/commit/fe5f49942eb7b27989b04736bc91e14730dc478d
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Lower G_FMINIMUM and G_FMAXIMUM (#151122)
Add GlobalISel lowering of G_FMINIMUM and G_FMAXIMUM following the same
logic as in SDag's expandFMINIMUM_FMAXIMUM.
Update AMDGPU legalization rules: Pre GFX12 now uses new lowering method
and make G_FMINNUM_IEEE and G_FMAXNUM_IEEE legal to match SDag.
Commit: 76b6399ca2bacd13e8bd0e26c95513c6036a8438
https://github.com/llvm/llvm-project/commit/76b6399ca2bacd13e8bd0e26c95513c6036a8438
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
Log Message:
-----------
DAG: Remove unused TargetLowering field (#164969)
This has been dead since 97bfb936af4077e8cb6c75664231f27a9989d563
Commit: c0b27cf9e5578aba68ac3fca7ad857ccef337f32
https://github.com/llvm/llvm-project/commit/c0b27cf9e5578aba68ac3fca7ad857ccef337f32
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
Revert "[bazel][lldb] Port #162730: tablegen for lldb-server platform ops" (#164981)
Reverts llvm/llvm-project#164832. The corresponding
[#162730](https://github.com/llvm/llvm-project/pull/162730) was reverted
in
https://github.com/llvm/llvm-project/commit/aac036a7f6730118f0d832150243d66b603c3af3.
Commit: f6d8f55a41094bdce401521c0ce31d1ffde7b87a
https://github.com/llvm/llvm-project/commit/f6d8f55a41094bdce401521c0ce31d1ffde7b87a
Author: Nathan Gauër <brioche at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Parse/ParseHLSL.cpp
Log Message:
-----------
[NFC][clang] cleanup dead code (#164977)
Dead code probably left-over of some PR refactoring.
Commit: 426d1fe548b6d10994862e309c169831fbba4c35
https://github.com/llvm/llvm-project/commit/426d1fe548b6d10994862e309c169831fbba4c35
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M offload/include/OffloadPolicy.h
M offload/include/OpenMP/InternalTypes.h
M offload/include/OpenMP/omp.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/OpenMP/InteropAPI.cpp
Log Message:
-----------
[OFFLOAD] Remove weak from __kmpc_* calls and gather them in one header (#164613)
Follow-up from #162652
---------
Co-authored-by: Michael Klemm <michael.klemm at amd.com>
Commit: ab9bdb7ecdac8900217917b80a74b551efd56e84
https://github.com/llvm/llvm-project/commit/ab9bdb7ecdac8900217917b80a74b551efd56e84
Author: David Green <david.green at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
Log Message:
-----------
[AArch64] Add an extra long-multiple test case. NFC
Commit: 26450db480761c0fedf319fc350178798ce7e547
https://github.com/llvm/llvm-project/commit/26450db480761c0fedf319fc350178798ce7e547
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
Log Message:
-----------
AArch64: Use RuntimeLibcallsInfo in SMEAttributes (NFC) (#164968)
Eventually this should be program state, and not part of TargetLowering
so avoid direct references to the libcall functions in it.
The usage of RuntimeLibcallsInfo here is not good though, particularly
the use through TargetTransformInfo. It would be better if the IR
attributes were directly encoded in the libcall definition (or at least made
consistent elsewhere). The parsing of the attributes should not also be
responsible for doing the libcall recognition, which is the only part pulling in
the dependency.
Commit: 83e852e4cf201048186e7cc2883d33ef696f45b4
https://github.com/llvm/llvm-project/commit/83e852e4cf201048186e7cc2883d33ef696f45b4
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsHexagon.td
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsV65.td
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
A llvm/test/CodeGen/Hexagon/autohvx/ripple_scalarize_scatter.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather_SpVV.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vscatter.ll
A llvm/test/CodeGen/Hexagon/masked_gather.ll
A llvm/test/CodeGen/Hexagon/vector-gather.ll
Log Message:
-----------
Add HVX vgather/vscatter Support (#164421)
This patch adds HVX vgather/vscatter genertion for i16, i32, and i8. It
also adds a flag to control generation of scatter/gather instructions
for HVX. Default to "disable".
Co-authored-by: Sergei Larin <slarin at codeaurora.org>
Co-authored-by: Sergei Larin <slarin at quicinc.com>
Co-authored-by: Maxime Schmitt <maxime.schmitt at qti.qualcomm.com>
Commit: 11a293aadb24376cdb627ead888bdddc5867b7aa
https://github.com/llvm/llvm-project/commit/11a293aadb24376cdb627ead888bdddc5867b7aa
Author: Timur Baydyusenov <t.baydyusenov at syntacore.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
A llvm/test/Assembler/metadata-annotations.ll
Log Message:
-----------
[llvm][llvm-dis] Fix 'llvm-dis' with '--materialize-metadata --show-annotations' crashes (#164819)
Commit: 3af73460bcf996862fb5626cb95b89194e77d9bd
https://github.com/llvm/llvm-project/commit/3af73460bcf996862fb5626cb95b89194e77d9bd
Author: Guy David <guyda96 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
A llvm/test/CodeGen/AArch64/dup-ext-load-combine.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/load-zext-bitcast.ll
Log Message:
-----------
[AArch64] Optimize splat of extending loads to avoid GPR->FPR transfer (#163067)
Loads the data into the SIMD register, thus sparing a physical register
and a potentially costly movement of data.
Commit: 986e0feb1d688409236832d9dac65fc900c2bf51
https://github.com/llvm/llvm-project/commit/986e0feb1d688409236832d9dac65fc900c2bf51
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for cast_from/to_block_scaled (#163436)
This commit adds support for the cast_from/to_block_scaled operations
from the ext-mxfp extension. This includes:
- Operation definition in TosaOps.td
- Micro-scaling supported types definition
- Shape inference and verifiers
- Validation pass checks to ensure usage is only valid when the target
environment includes ext-mxfp and at least v1.1.draft of the
specification.
Note: currently it excludes support for mxint8. This will be added in a
later commit.
Note: this commit adds support as defined in the spec in
https://github.com/arm/tosa-specification/commit/063846a75b9687ab01e58cb3538472bffb3a03b0.
EXT_MXFP extension is considered experimental and subject to breaking
change.
Co-authored-by: Tat Wai Chong <tatwai.chong at arm.com>
Commit: c18c3ccd0b48c4055dfdcdc2ff7514ca8ab3dfae
https://github.com/llvm/llvm-project/commit/c18c3ccd0b48c4055dfdcdc2ff7514ca8ab3dfae
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
Log Message:
-----------
Fix unused variable warning in release build
Commit: 202bcc4fa1c7d65b29978f063f5aa82010f1d99d
https://github.com/llvm/llvm-project/commit/202bcc4fa1c7d65b29978f063f5aa82010f1d99d
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-sve-instructions.s
Log Message:
-----------
[AArch64] Fix Neoverse-V2 scheduling information for STNT1 (#164780)
Fix 3 cases in the scheduler tables to match the current SWOG,
in section 3.29 SVE Store: change pipeline V to V01.
Commit: 9824930744d50667aad3539d7936571a6d148a11
https://github.com/llvm/llvm-project/commit/9824930744d50667aad3539d7936571a6d148a11
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M llvm/include/llvm/Support/Timer.h
M llvm/lib/Support/Timer.cpp
Log Message:
-----------
[NFC] Add PrintOnExit parameter to a llvm::TimerGroup (#164407)
Clean up AnalysisConsumer code from the timer-related branches that are
not used most of the time, and move this logic to Timer.cpp, which is a
more relevant place and allows for a cleaner implementation.
Commit: bdec5bf69c74a51ae9de53cc951a42d491d85987
https://github.com/llvm/llvm-project/commit/bdec5bf69c74a51ae9de53cc951a42d491d85987
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-s64-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Combine (or s64, zext(s32)) (#151519)
If we only deal with a one part of 64bit value we can just generate
merge and unmerge which will be either combined away or
selected into copy / mov_b32.
Commit: a1ae9001ebb04a43f15a063663be22b92c3d0eb6
https://github.com/llvm/llvm-project/commit/a1ae9001ebb04a43f15a063663be22b92c3d0eb6
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/CodeGen/BPF/BTF/binary-format.ll
M llvm/test/CodeGen/BPF/BTF/builtin-btf-type-id.ll
M llvm/test/CodeGen/BPF/BTF/char-no-debuginfo.ll
M llvm/test/CodeGen/BPF/BTF/extern-builtin.ll
M llvm/test/CodeGen/BPF/BTF/extern-func-arg.ll
M llvm/test/CodeGen/BPF/BTF/extern-global-var.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/filename.ll
M llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll
M llvm/test/CodeGen/BPF/BTF/func-non-void.ll
M llvm/test/CodeGen/BPF/BTF/func-source.ll
M llvm/test/CodeGen/BPF/BTF/func-typedef.ll
M llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll
M llvm/test/CodeGen/BPF/BTF/func-void.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-1.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-2.ll
M llvm/test/CodeGen/BPF/BTF/local-var.ll
M llvm/test/CodeGen/BPF/BTF/pruning-const.ll
M llvm/test/CodeGen/BPF/BTF/pruning-typedef.ll
M llvm/test/CodeGen/BPF/BTF/static-func.ll
M llvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
M llvm/test/CodeGen/BPF/BTF/static-var-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
M llvm/test/CodeGen/BPF/BTF/static-var.ll
M llvm/test/CodeGen/BPF/BTF/struct-anon-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global.ll
M llvm/test/CodeGen/BPF/CORE/btf-id-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-enum-value.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-exist.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll
M llvm/test/CodeGen/BPF/CORE/no-elf-ama-symbol.ll
M llvm/test/CodeGen/BPF/CORE/no-narrow-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-access-str.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
M llvm/test/CodeGen/BPF/CORE/store-addr.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp2.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative1.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative2.ll
M llvm/test/CodeGen/BPF/callx.ll
M llvm/test/CodeGen/BPF/dwarfdump.ll
M llvm/test/CodeGen/BPF/i128.ll
M llvm/test/CodeGen/BPF/is_trunc_free.ll
M llvm/test/CodeGen/BPF/is_zext_free.ll
M llvm/test/CodeGen/BPF/objdump_two_funcs.ll
M llvm/test/CodeGen/BPF/optnone-1.ll
M llvm/test/CodeGen/BPF/reloc-btf-2.ll
M llvm/test/CodeGen/BPF/reloc-btf.ll
M llvm/test/CodeGen/BPF/simplifycfg.ll
M llvm/test/CodeGen/BPF/warn-stack.ll
M llvm/test/CodeGen/BPF/xadd.ll
Log Message:
-----------
[test][BPF] Remove unsafe-fp-math uses (NFC) (#164784)
Post cleanup for #164534.
Also pick suggestion by nikic, remove redundant attributes.
Commit: 30984358ff94f3f71f4ac50ea58f6ab32ccc7c23
https://github.com/llvm/llvm-project/commit/30984358ff94f3f71f4ac50ea58f6ab32ccc7c23
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
A llvm/test/Analysis/DependenceAnalysis/compute-absolute-value.ll
Log Message:
-----------
[DA] Fix absolute value calculation (#164967)
This patch fixes the computation of the absolute value for SCEV.
Previously, it was calculated as `AbsX = SE->isKnownNonNegative(X) ? X :
-X`, which would incorrectly assume that `!isKnownNonNegative` implies
`isKnownNegative`. This assumption does not hold in general, for
example, when `X` is a `SCEVUnknown` and it can be an arbitrary value.
To compute the absolute value properly, we should use
ScalarEvolution::getAbsExpr instead.
Fix #149977
Commit: 22f29d61e50593c46945f100c9ca11fb9c5cca1b
https://github.com/llvm/llvm-project/commit/22f29d61e50593c46945f100c9ca11fb9c5cca1b
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
Log Message:
-----------
[AArch64][SME] Fix incorrect "attributes at callsite do not match" assert (#164991)
Clang always duplicates SME attributes to each callsite, which means
removing "ZA_State_Agnostic" from CalledFn before the assert resulted in
the assertion failing for IR emitted by clang.
I've updated the existing test to match the form emitted by clang (which
previously hit the assert).
Commit: 8a5f15330feb693bc2c3923c0e77ce808382491f
https://github.com/llvm/llvm-project/commit/8a5f15330feb693bc2c3923c0e77ce808382491f
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsHexagon.td
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Preprocessor/hexagon-predefines.c
M llvm/include/llvm/IR/IntrinsicsHexagonDep.td
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Hexagon/HexagonDepArch.h
M llvm/lib/Target/Hexagon/HexagonDepArch.td
M llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
M llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
M llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
M llvm/lib/Target/Hexagon/HexagonSchedule.td
A llvm/lib/Target/Hexagon/HexagonScheduleV81.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/test/MC/Hexagon/arch-support.s
A llvm/test/MC/Hexagon/v81_arch.s
Log Message:
-----------
[Hexagon] Add V81 support to compiler and assembler (#164922)
This patch introduces support for the Hexagon V81 architecture. It
includes instruction formats, definitions, encodings, scheduling
classes, and builtins/intrinsics.
Commit: 734d554fe6f22065e262c43111604c931f505004
https://github.com/llvm/llvm-project/commit/734d554fe6f22065e262c43111604c931f505004
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/test/Driver/fuchsia.c
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll
Log Message:
-----------
De-support SafeStack on non-x86 Fuchsia (#164855)
The Fuchsia Compiler ABI will no longer provide the unsafe stack
for SafeStack on machines other than x86-64. The x86_64-fuchsia
target still both supports -fsanitize=safe-stack and defaults to
it. Fuchsia targets that default to -fsanitize=shadow-call-stack
do not need SafeStack also to be available.
Commit: dc5f2745604d4c5a003e909574b531662b372355
https://github.com/llvm/llvm-project/commit/dc5f2745604d4c5a003e909574b531662b372355
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
A mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx11.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
R mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add explicit intrinsic shape to wmma (#164920)
This is in preparation for adding support for gfx1250 wmma intrinsics
that include much more possible shapes.
Instead of guessing the wave32/wave64 mode based on element types and
vector sizes, require the intrinsic shapes to be set explicitly as
attributes.
Commit: bf553338e5e1e4520d69ef5b34a8659bf3d92492
https://github.com/llvm/llvm-project/commit/bf553338e5e1e4520d69ef5b34a8659bf3d92492
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaObjCProperty.cpp
Log Message:
-----------
[clang][Sema][NFC] Adjust parameter name comment
The parameter is called `isSynthesizedAccessorStub`. This is the only callsite that sets it to `true`. So making it greppable is important.
I tried to find this callsite via `grep` but couldn't. This patch aligns the comment with all the other instances.
Commit: 6034ab3d98bf75fd6e6b231a6601d0536e44c222
https://github.com/llvm/llvm-project/commit/6034ab3d98bf75fd6e6b231a6601d0536e44c222
Author: Mihail Mihov <mihovmihailp+github at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/ctlz-cttz.ll
Log Message:
-----------
[InstCombine] Add CTLZ -> CTTZ simplification (#164733)
This PR adds the simplification `ctlz(~x & (x - 1)) -> bitwidth -
cttz(x, false)` ([Alive2](https://alive2.llvm.org/ce/z/vVDRCu)).
Closes issue #164436
Commit: 4a6c5c6ea845f1dcc32234355d4401659121b13c
https://github.com/llvm/llvm-project/commit/4a6c5c6ea845f1dcc32234355d4401659121b13c
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
Log Message:
-----------
[InstCombine] Fold shifts + selects with -1 to scmp(X, 0) (#164129)
This is because the sign function with 0 tends to be folded to ashr and
other things.
Alive2: https://alive2.llvm.org/ce/z/Q59KvH
Commit: 28e1628ff6b749fddca5fe50d1cc230fd3dce9dd
https://github.com/llvm/llvm-project/commit/28e1628ff6b749fddca5fe50d1cc230fd3dce9dd
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
Log Message:
-----------
[Hexagon] Fix unused variables for #164421 (#165012)
Commit: 8c4d6617d173f6ddde1f6c2866ff2cf19f165d78
https://github.com/llvm/llvm-project/commit/8c4d6617d173f6ddde1f6c2866ff2cf19f165d78
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/MCSFrame.cpp
A llvm/test/MC/ELF/cfi-sframe-cfi-escape-diagnostics.s
A llvm/test/MC/ELF/cfi-sframe-cfi-escape.s
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Sframe] Support cfi_escape directives compatibly with gnu-gas (#161927)
Some cfi_escape directives don't affect sframe unwind info, some do.
Detect those cases appropriately, following gnu-gas for most cases.
Using a full-blown dwarf expression parser allows for somewhat more
precise error detection than other sframe implementations. So this code
is less conservative for long and more involved expressions. It could be
made even more permissive.
Commit: 1297bf2974eea11f25ff4375253ad44e37987a7c
https://github.com/llvm/llvm-project/commit/1297bf2974eea11f25ff4375253ad44e37987a7c
Author: Tim Creech <timothy.m.creech at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
A llvm/test/tools/llvm-profdata/input-wildcard.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Reintroduce use of InitLLVM (#164736)
Before llvm-profdata participated in llvm-driver it directly called
InitLLVM, which takes care of wildcard argument expansion for tools on
Windows. When llvm-driver support was added to llvm-profdata this
InitLLVM call was effectively moved into the common llvm-driver wrapper
mechanism.
More recently, in #162191, llvm-driver support was temporarily backed
out of llvm-profdata due to an issue with `cl::opt` handling. This
change reintroduces the direct call to InitLLVM in order to restore
wildcard expansion and also adds a test for the wildcard expansion on
Windows.
Commit: ab1765d76502707c8c3082039775bcaf3c25f280
https://github.com/llvm/llvm-project/commit/ab1765d76502707c8c3082039775bcaf3c25f280
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
A clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
Log Message:
-----------
[CIR] Upstream trivial constructor const handling (#164849)
This adds handling for records with trivial constructors in CIR's
ConstExprEmitter.
Commit: a1dc546f7f2130b2a9b8c29f24ee57ad9002f5a3
https://github.com/llvm/llvm-project/commit/a1dc546f7f2130b2a9b8c29f24ee57ad9002f5a3
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/int_hk_t.h
A libc/include/llvm-libc-types/int_hr_t.h
A libc/include/llvm-libc-types/int_k_t.h
A libc/include/llvm-libc-types/int_lk_t.h
A libc/include/llvm-libc-types/int_lr_t.h
A libc/include/llvm-libc-types/int_r_t.h
R libc/include/llvm-libc-types/stdfix-types.h
A libc/include/llvm-libc-types/uint_uhk_t.h
A libc/include/llvm-libc-types/uint_uhr_t.h
A libc/include/llvm-libc-types/uint_uk_t.h
A libc/include/llvm-libc-types/uint_ulk_t.h
A libc/include/llvm-libc-types/uint_ulr_t.h
A libc/include/llvm-libc-types/uint_ur_t.h
M libc/include/stdfix.yaml
M libc/src/stdfix/CMakeLists.txt
M libc/src/stdfix/bitshk.cpp
M libc/src/stdfix/bitshk.h
M libc/src/stdfix/bitshr.cpp
M libc/src/stdfix/bitshr.h
M libc/src/stdfix/bitsk.cpp
M libc/src/stdfix/bitsk.h
M libc/src/stdfix/bitslk.cpp
M libc/src/stdfix/bitslk.h
M libc/src/stdfix/bitslr.cpp
M libc/src/stdfix/bitslr.h
M libc/src/stdfix/bitsr.cpp
M libc/src/stdfix/bitsr.h
M libc/src/stdfix/bitsuhk.cpp
M libc/src/stdfix/bitsuhk.h
M libc/src/stdfix/bitsuhr.cpp
M libc/src/stdfix/bitsuhr.h
M libc/src/stdfix/bitsuk.cpp
M libc/src/stdfix/bitsuk.h
M libc/src/stdfix/bitsulk.cpp
M libc/src/stdfix/bitsulk.h
M libc/src/stdfix/bitsulr.cpp
M libc/src/stdfix/bitsulr.h
M libc/src/stdfix/bitsur.cpp
M libc/src/stdfix/bitsur.h
M libc/src/stdfix/bitusk.cpp
M libc/src/stdfix/hkbits.h
M libc/src/stdfix/hrbits.h
M libc/src/stdfix/kbits.h
M libc/src/stdfix/lkbits.h
M libc/src/stdfix/lrbits.h
M libc/src/stdfix/rbits.h
M libc/src/stdfix/uhkbits.h
M libc/src/stdfix/uhrbits.h
M libc/src/stdfix/ukbits.h
M libc/src/stdfix/ulkbits.h
M libc/src/stdfix/ulrbits.h
M libc/src/stdfix/urbits.h
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/stdfix/FxBitsTest.h
M libc/test/src/stdfix/bitshk_test.cpp
M libc/test/src/stdfix/bitshr_test.cpp
M libc/test/src/stdfix/bitsk_test.cpp
M libc/test/src/stdfix/bitslk_test.cpp
M libc/test/src/stdfix/bitslr_test.cpp
M libc/test/src/stdfix/bitsr_test.cpp
M libc/test/src/stdfix/bitsuhk_test.cpp
M libc/test/src/stdfix/bitsuhr_test.cpp
M libc/test/src/stdfix/bitsuk_test.cpp
M libc/test/src/stdfix/bitsulk_test.cpp
M libc/test/src/stdfix/bitsulr_test.cpp
M libc/test/src/stdfix/bitsur_test.cpp
Log Message:
-----------
[libc] add missing headers in stdfix (#162078)
Fixes https://github.com/llvm/llvm-project/issues/129361
@michaelrj-google @PiJoules
---------
Signed-off-by: Shreeyash Pandey <shreeyash335 at gmail.com>
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: c576c6b41f574d7467acd84cb63c81509752cece
https://github.com/llvm/llvm-project/commit/c576c6b41f574d7467acd84cb63c81509752cece
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
Log Message:
-----------
[flang][cuda] Remove error check from allocation and free call (#165022)
As in https://github.com/llvm/llvm-project/pull/164463, do not do error
checking in the runtime itself but let error go through as user might
want to catch them for error recovery.
Commit: 704240125ddf17b9b4995871af3759c742a202ba
https://github.com/llvm/llvm-project/commit/704240125ddf17b9b4995871af3759c742a202ba
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/MC/PowerPC/ppc64-encoding-ext.s
Log Message:
-----------
[PowerPC][NFC] Add new mtpidr alias introduced in ISA3.0 (#163989)
Add new alias `m[tf]pidr` for `m[tf]spr 48` introduced in ISA3.0.
Commit: 621ed04e28787ade92b98e296332ac71d1b81678
https://github.com/llvm/llvm-project/commit/621ed04e28787ade92b98e296332ac71d1b81678
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[MLIR][XeGPU]Enhance Pack/Unpack for XeGPUUnroll (#163459)
This PR changes the pack/unpack method used for unrolling to allow for
lower rank slice to be extracted and inserted from and to src vector by
adding reshapes. It also removes leading unit dims from inst_data if
there are any.
Commit: 224f18e549c42233e1cc597873803a183927dfb3
https://github.com/llvm/llvm-project/commit/224f18e549c42233e1cc597873803a183927dfb3
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/delete.cpp
Log Message:
-----------
[CIR] Handle operator delete with virtual destructors (#165010)
This adds support for emitting operator delete when used with classes
that have a virtual destructor.
Commit: 6de1c25d6ba2a22167160ff80f4875b312e79dcd
https://github.com/llvm/llvm-project/commit/6de1c25d6ba2a22167160ff80f4875b312e79dcd
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/FileManager.h
M clang/lib/Basic/FileManager.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/tools/driver/cc1_main.cpp
Log Message:
-----------
[clang] Don't require `FileManager` for creating an output file (#164665)
Conceptually, the `CompilerInstance` doesn't need an instance of the
`FileManager` to create an output file. This PR enables that, removing
an edge-case in `cc1_main()`.
Commit: 1e84cb7de2e2e5d1b710521f55e75d4ff5e8fd0f
https://github.com/llvm/llvm-project/commit/1e84cb7de2e2e5d1b710521f55e75d4ff5e8fd0f
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCVXsf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/lib/Target/RISCV/RISCVScheduleXSf.td
A llvm/test/CodeGen/RISCV/rvv/sf_vfbfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp32e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa64e.ll
Log Message:
-----------
[RISCV] Add LLVM IR intrinsics and codegen for XSfvfexp* and XSfvfexpa* (#164499)
This patch adds LLVM IR intrinsics and basic codegen support for the
XSfvfexp* and XSfvfexpa* extensions.
---------
Co-authored-by: Jesse Huang <jesse.huang at sifive.com>
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 17abc16d7b76addee09d37dfd20247f0c890c3d8
https://github.com/llvm/llvm-project/commit/17abc16d7b76addee09d37dfd20247f0c890c3d8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
A llvm/test/CodeGen/RISCV/rv32p.ll
A llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Support codegen for some scalar P extension instructions. (#164359)
This includes sext.b, sext.h, min/max, rev8, clz(w), and abs.
Test cases copied from rv32zbb.ll and rv64zbb.ll and pruned to what was
needed for P. Eventually we should merge these back into a single test
file, but I wanted to keep P separated while it is experimental.
Commit: 4e7a8456b316bb20874cc1343747b36869eab7a2
https://github.com/llvm/llvm-project/commit/4e7a8456b316bb20874cc1343747b36869eab7a2
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
Log Message:
-----------
[lldb] Improve error logging in test (NFC)
Commit: 50eb8659340d4cf318ea208547fa3413caf5e76b
https://github.com/llvm/llvm-project/commit/50eb8659340d4cf318ea208547fa3413caf5e76b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Remove unused 'build_flang' variables (#164547)
Commit: fb87708317e28573151d588bd117701dd77f2e16
https://github.com/llvm/llvm-project/commit/fb87708317e28573151d588bd117701dd77f2e16
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/sifive_vector.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettk.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettm.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettn.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettnt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtdiscard.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_t_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_v_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtzero_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vtmv_t_v.c
A clang/test/Sema/sifive-xsfmm.c
A clang/test/Sema/sifive_sf_vset_invalid.c
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV] Support XSfmm C intrinsics (#143070)
In this version of intrinsics, users need to manage the life time of
tiles on their own, compiler doesn't have tile type for variables not
only for design simplicity but also preventing users to write bad
performance code that could potentially having tile spills which are
quite expensive in terms of cycles.
Intrinsics are specified at the end of this document
https://www.sifive.com/document-file/xsfmm-matrix-extensions-specification
stack on: https://github.com/llvm/llvm-project/pull/143068 and
https://github.com/llvm/llvm-project/pull/143069
Commit: dddcb84f152b99dfe7e117c02ab506c6c14b2f2b
https://github.com/llvm/llvm-project/commit/dddcb84f152b99dfe7e117c02ab506c6c14b2f2b
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
Log Message:
-----------
[scudo] Secondary release to OS uses LRU to scan. (#163691)
Before this change, the code would scan the entire set of cached entries
to find ones to be released. Now, it uses the LRUEntries list to iterate
over the live cached entries. In addition, remove the OldestTime
variable and replace it with OldestPresentEntry which will always be the
oldest entry in the LRU that has Time non-zero.
Commit: f7b4018748715aea536d3d266786ab0d895b335b
https://github.com/llvm/llvm-project/commit/f7b4018748715aea536d3d266786ab0d895b335b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
Log Message:
-----------
[OpenACC][CIR] Implement atomic update lowering (#164836)
This is the 3rd of 4 forms of the 'atomic' construct. This one allows
increment/decrement, compound-assign, and assign-to-bin-op(referencing
the original variable).
All of the above is enforced during Sema, but for our purposes, we ONLY
need to know the variable on the LHS and the expression, so this does
that.
The ACC dialect for acc.atomic.update uses a 'recipe' as well, which
takes the VALUE, and yields the value of the updated value.
To simplify the implementation, our lowering very simply creates an
alloca inside the recipe, stores the passed-in value, then loads/yields
it at the end.
Commit: d518f8e40e2b0318264ab45424e515862744b572
https://github.com/llvm/llvm-project/commit/d518f8e40e2b0318264ab45424e515862744b572
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Transforms/debug-assumed-size-array.fir
Log Message:
-----------
[flang] fix assumed-size debug info after #164452 (#164772)
I missed this case because the code was not explicitly looking for -1.
Commit: a377b8563428dd53cc33fdd4645d194db5f01397
https://github.com/llvm/llvm-project/commit/a377b8563428dd53cc33fdd4645d194db5f01397
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bug1491.f90
M flang/test/Semantics/null-init.f90
Log Message:
-----------
[flang] Adjust needless warning (#164500)
When an external procedure has an explicit interface in one scope, and
an implicit interface in another, and there's at least one call to it
from which dummy argument information can be inferred, don't emit a
warning about potential incompatibility if the only difference in their
characteristics is that one of their interfaces was implicit.
Commit: 1df7f2baa9a8f9fcec90de486686766cc2fd2bb1
https://github.com/llvm/llvm-project/commit/1df7f2baa9a8f9fcec90de486686766cc2fd2bb1
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/connection.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
Log Message:
-----------
[flang][runtime] Tweak GetNextNonBlank() performance (#164521)
When skipping blanks during input from an ASCII file, scan the buffered
characters directly when possible rather than using the more general
path. This adds complexity, but shaves a few percent off the runtime of
a code that reads in millions of list-directed integers (best time over
multiple runs goes from 17.56 to 16.84 sec).
Commit: 1e237b1785e77b472279f85455decc6ebe3eaf90
https://github.com/llvm/llvm-project/commit/1e237b1785e77b472279f85455decc6ebe3eaf90
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/func-proc-result.f90
Log Message:
-----------
[flang] Catch function result that is non-pointer procedure (#164664)
A function result that is a procedure must be a procedure pointer.
Commit: e34d603f185b55a0ef61b1008cdfd12d296a82ac
https://github.com/llvm/llvm-project/commit/e34d603f185b55a0ef61b1008cdfd12d296a82ac
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/include/flang/Evaluate/call.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/generic-error.f90
Log Message:
-----------
[flang] More information on generic resolution failures (#164738)
When a generic procedure reference does not match any of its specific
procedures, run through them and emit the errors for each attempted
match, so that the user has more information to resolve the problem by
adjusting the actual arguments.
Commit: af34890ef8f501cf758525f04b3e6f0e18a96b44
https://github.com/llvm/llvm-project/commit/af34890ef8f501cf758525f04b3e6f0e18a96b44
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/bug164727.cuf
Log Message:
-----------
[flang] Let !@acc and !@cuf conditional lines be continuations (#164892)
OpenMP conditional compilation lines (!$) work as continuation lines,
but OpenACC and CUDA conditional lines do not.
Fixes https://github.com/llvm/llvm-project/issues/164727 and
https://github.com/llvm/llvm-project/issues/164708.
Commit: 251edd122808f1849adb8000119ba9134793a294
https://github.com/llvm/llvm-project/commit/251edd122808f1849adb8000119ba9134793a294
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Initialization.h
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/AST/HLSL/matrix-constructors.hlsl
A clang/test/AST/HLSL/matrix-general-initializer.hlsl
A clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl
Log Message:
-----------
[HLSL] Add matrix constructors using initalizer lists (#162743)
fixes #159434
In HLSL matrices are matrix_type in all respects except that they
support a constructor style syntax for initializing matrices.
This change adds a translation of vector constructor arguments into
initializer lists.
This supports the following HLSL syntax:
(1) HLSL matrices support constructor syntax
(2) HLSL matrices are expanded to constituate components in constructor
using the same initalizer list behavior defined in transformInitList
allows us to support struct element initalization via
HLSLElementwiseCast
Commit: 0b01b96864983c4b150776b869a3d048b0d50e2c
https://github.com/llvm/llvm-project/commit/0b01b96864983c4b150776b869a3d048b0d50e2c
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Symbols.h
M lld/COFF/Writer.cpp
A lld/test/COFF/common-dedup.ll
Log Message:
-----------
[LLD][COFF] Deduplicate common chunks when linking COFF files. (#162553)
This fixes [issue
162148](https://github.com/llvm/llvm-project/issues/162148).
Common symbols are intended to have only a single version of the data
present in the final executable. The MSVC linker is able to successfully
deduplicate these chunks. If you have an application with a large number
of translation units with a large block of common data (this is
possible, for example, with Fortran code), then failing to deduplicate
these chunks can make the data size so large that the resulting
executable fails to load.
The logic in this patch doesn't catch all of the potential cases for
deduplication, but it should catch the most common ones.
Commit: 0fd330dfe3d0504f4143aea58e88d52e62bf7da7
https://github.com/llvm/llvm-project/commit/0fd330dfe3d0504f4143aea58e88d52e62bf7da7
Author: Finn Plummer <mail at inbelic.dev>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.h
M llvm/test/CodeGen/DirectX/legalize-module-flags.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags2.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/metadata-stripping.ll
M llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll
M llvm/test/CodeGen/DirectX/strip-rootsignatures.ll
Log Message:
-----------
[NFC][DirectX] Refactor `DXILPrepare`/`DXILTranslateMetadata` (#164285)
This pr updates `DXILPrepare` and `DXILTranslateMetadata` by moving all
the removal of metadata from `DXILPrepare` to `DXILTranslateMetadata` to
have a more consistent definition of what each pass is doing.
It restricts the `DXILPrepare` to only update function attributes and
insert bitcasts, and moves the removal of metadata to
`DXILTranslateMetadata` so that all manipulation of metadata is done in
a single pass.
Commit: b6e6a4dc6d494191a9665715b0d989876778a46d
https://github.com/llvm/llvm-project/commit/b6e6a4dc6d494191a9665715b0d989876778a46d
Author: Thurston Dang <thurston at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
Log Message:
-----------
[msan] Convert target("aarch64.svcount") from compile-time crash to MSan false negatives (#165028)
MSan currently crashes at compile-time when it encounters
target("aarch64.svcount") (e.g.,
https://github.com/llvm/llvm-project/pull/164315). This patch duct-tapes
MSan so that it won't crash at compile-time, and instead propagates a
clean shadow (resulting in false negatives but not false positives).
Commit: e07aef9dde4cc84af8b696b97c294b6497ce667a
https://github.com/llvm/llvm-project/commit/e07aef9dde4cc84af8b696b97c294b6497ce667a
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/Frontend/cfi-unchecked-callee-attribute.cpp
Log Message:
-----------
[clang][Sema] close IsStandardConversion hole when adding cfi_unchecked_callee (#164592)
Commit b194cf1e401a changed this function for the case where attribute
`cfi_unchecked_callee` is added in a function conversion. But this
introduces a hole (issue #162798), and it seems the change was
unnecessary: the preceding `TryFunctionConversion` will already allow
adding the `cfi_unchecked_callee` attribute, and will update `FromType`
if it succeeds. So we revert the changes to `IsStandardConversion`. We
also remove the helper function `AddingCFIUncheckedCallee` which is no
longer needed, and simplify the corresponding
`DiscardingCFIUncheckedCallee`.
Fixes: #162798
Commit: bd27abcceedfc60f4598124aa022cd0b766da3d8
https://github.com/llvm/llvm-project/commit/bd27abcceedfc60f4598124aa022cd0b766da3d8
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
Revert "Reapply "[clang-format] Annotate ::operator and Foo::operator… (#165038)
… correctly" (#164670)"
This reverts commit 50ca1f407801cd268a1c130b9576dfb51fe7f392.
Reverting because this leads to the bug on ToT described in
https://github.com/llvm/llvm-project/issues/164866. The original fix
addresses an old regression which we'd still like to land eventually.
See the discussion in https://github.com/llvm/llvm-project/pull/164670
for more context.
Commit: 8c29bce1e9f03a22b42d11604e7555e16306f2aa
https://github.com/llvm/llvm-project/commit/8c29bce1e9f03a22b42d11604e7555e16306f2aa
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Remove SCEVToExpansion mapping (NFC). (#164490)
VPlan::SCEVToExpansion isn't needed any longer, as SCEV expansion
de-duplication is handled locally in expandSCEVs.
PR: https://github.com/llvm/llvm-project/pull/164490
Commit: 825eefe856cb957adf33924a9232d3f7e947e7f4
https://github.com/llvm/llvm-project/commit/825eefe856cb957adf33924a9232d3f7e947e7f4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/program-parsers.cpp
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
M flang/test/Parser/cuf-sanity-common
M flang/test/Parser/cuf-sanity-tree.CUF
Log Message:
-----------
[flang][cuda] Accept scalar expression for bytes in kernel call (#165040)
Commit: fdcbf74a7da4fb074d5c408eb2ec4ed75fb74bf4
https://github.com/llvm/llvm-project/commit/fdcbf74a7da4fb074d5c408eb2ec4ed75fb74bf4
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
Log Message:
-----------
[Github][CI] Add default gha user for tooling containers (#164294)
This would solve
https://github.com/llvm/llvm-project/blob/c0073a9170aaa4f3504f7cdf20758176bcb14ac1/.github/workflows/pr-code-format.yml#L28-L34
Commit: 9b80fc39606f6f02b88a21ac29e98a74b0b7426a
https://github.com/llvm/llvm-project/commit/9b80fc39606f6f02b88a21ac29e98a74b0b7426a
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
Log Message:
-----------
[lldb] Add missing function call in test (NFC)
Commit: 4c52c454c0f266a5948b5ba48c597571d1a0040a
https://github.com/llvm/llvm-project/commit/4c52c454c0f266a5948b5ba48c597571d1a0040a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/IndexedMap.h
Log Message:
-----------
[ADT] Rename variable names in IndexedMap (NFC) (#164925)
This patch renames variable names to conform to the LLVM Coding
Standards. The public interface remains the same.
Commit: 30e77152961b2c560127cc8391ca79f002497a09
https://github.com/llvm/llvm-project/commit/30e77152961b2c560127cc8391ca79f002497a09
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/SparseSet.h
Log Message:
-----------
[ADT] Consolidate SparseSetValFunctor implementations (NFC) (#164926)
This patch consolidates the two implementations of SparseSetValFunctor
with "if constexpr". std::is_same_v<KeyT, ValueT> is more readable
than "KeyT, KeyT" in the template parameter list.
Commit: 8388a5b3403a4f711890a397ec577a11bb9d5fc3
https://github.com/llvm/llvm-project/commit/8388a5b3403a4f711890a397ec577a11bb9d5fc3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/include/llvm/ADT/SparseMultiSet.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/unittests/ADT/STLForwardCompatTest.cpp
Log Message:
-----------
[ADT] Rename identity_cxx20 to identity (#164927)
Now that the old llvm::identity has moved into IndexedMap.h under a
different name, this patch renames identity_cxx20 to identity. Note
that llvm::identity closely models std::identity from C++20.
Commit: b4d11c98917c3fd0e09f826a85232c322678299b
https://github.com/llvm/llvm-project/commit/b4d11c98917c3fd0e09f826a85232c322678299b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang] Proofread UsersManual.rst (#164928)
Commit: 7e76473d3fa90b954d8533f558274df1b95256fd
https://github.com/llvm/llvm-project/commit/7e76473d3fa90b954d8533f558274df1b95256fd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h
M llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp
Log Message:
-----------
[DebugInfo] Add "override" where appropriate (NFC) (#164929)
Note that "override" makes "virtual" redundant.
Identified with modernize-use-override.
Commit: 4448ff453d25e402aeab55749a99df5ff5ea81f1
https://github.com/llvm/llvm-project/commit/4448ff453d25e402aeab55749a99df5ff5ea81f1
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/coro-task.cpp
Log Message:
-----------
[CIR] Emit CIR builtins: coroAlloc, coroBegin, and coroSize (#164180)
This PR adds support for emitting the builtins coroAlloc, coroBegin, and
coroSize.
Commit: e68cf1ebcf8a059ea5f373340a854c15146a20dd
https://github.com/llvm/llvm-project/commit/e68cf1ebcf8a059ea5f373340a854c15146a20dd
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
Log Message:
-----------
[GitHub][CI] Remove 'Set Safe Directory' step (#165052)
Commit: 409c6544435395ac24d3efb92fd51841e9223315
https://github.com/llvm/llvm-project/commit/409c6544435395ac24d3efb92fd51841e9223315
Author: cmtice <cmtice at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Update Windows premerge testing to use clang-cl.exe (#164900)
Now that the Windows container contains clang, use it for building the
premerge tests. Measurements show this is significantly faster than
using msvc cl. Note we had to disable four warnings -Wc++98-compat,
-Wc++14-compat, -Wunsafe-buffer-usage, and -Wold-style-cast to make
this work with 'check-mlir' on Windows (clang generates a lot of warnings
that msvc cl does not).
Commit: 10a975be0f4c6337fe981c4086d90c582a970010
https://github.com/llvm/llvm-project/commit/10a975be0f4c6337fe981c4086d90c582a970010
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
A lldb/test/Shell/ExecControl/StopHook/stop-hook-list.test
Log Message:
-----------
[lldb] Introduce internal stop hooks (#164506)
Introduce the concept of internal stop hooks.
These are similar to LLDB's internal breakpoints:
LLDB itself will add them and users of LLDB will
not be able to add or remove them.
This change adds the following 3
independently-useful concepts:
* Maintain a list of internal stop hooks that will be populated by LLDB
and cannot be added to or removed from by users. They are managed in a
separate list in `Target::m_internal_stop_hooks`.
* `StopHookKind:CodeBased` and `StopHookCoded` represent a stop hook
defined by a C++ code callback (instead of command line expressions or a
Python class).
* Stop hooks that do not print any output can now also suppress the
printing of their header and description when they are hit via
`StopHook::GetSuppressOutput`.
Combining these 3 concepts we can model "internal
stop hooks" which serve the same function as
LLDB's internal breakpoints: executing built-in,
LLDB-defined behavior, leveraging the existing
mechanism of stop hooks.
This change also simplifies
`Target::RunStopHooks`. We already have to
materialize a new list for combining internal and
user stop hooks. Filter and only add active hooks to this list to avoid
the need for "isActive?"
checks later on.
Commit: 3a59407689da7a3f2f934a841ed32ffcbfaf24dc
https://github.com/llvm/llvm-project/commit/3a59407689da7a3f2f934a841ed32ffcbfaf24dc
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M .ci/utils.sh
Log Message:
-----------
[CI] Make Postcommit Testing Pass In Correct Flags to Premerge Advisor
Before this patch we were passing in the previous commit rather than the
current commit due to a copy and paste adjustment failure from the PR
flow. We want the base SHA to just be the commit SHA for postcommit. We
also were not attaching the run number which made the source ID the
first JUnit XML file rather than the buildbot run number.
Commit: 5fda2a5d9c1a0f90da5d0afc412c9ad613702823
https://github.com/llvm/llvm-project/commit/5fda2a5d9c1a0f90da5d0afc412c9ad613702823
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/docs/ProgrammersManual.rst
A llvm/include/llvm/ADT/RadixTree.h
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/RadixTreeTest.cpp
Log Message:
-----------
[NFC][ADT] Add RadixTree (#164524)
This commit introduces a RadixTree implementation to LLVM.
RadixTree, as a Trie, is very efficient by searching for prefixes.
A Radix Tree is more efficient implementation of Trie.
The tree will be used to optimize Glob matching in SpecialCaseList:
* https://github.com/llvm/llvm-project/pull/164531
* https://github.com/llvm/llvm-project/pull/164543
* https://github.com/llvm/llvm-project/pull/164545
---------
Co-authored-by: Kazu Hirata <kazu at google.com>
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: cc4f462ba46c288dc26aa155775444cd9a7c4d0e
https://github.com/llvm/llvm-project/commit/cc4f462ba46c288dc26aa155775444cd9a7c4d0e
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/issue163738.ll
Log Message:
-----------
[X86][ISel] Improve VPTERNLOG matching for negated logic trees (#164863)
This patch extends VPTERNLOG pattern matching to handle cases where an
outer NOT wraps a pure logical tree, such as `~(A | B | C)`. By
recognizing these negated logic trees, the instruction selector can now
emit a single vpternlog instruction.
The change preserves the match for patterns like `(x != C1) & (x !=
C2)`, which also have the xor-with-all-ones pattern outside. The patch
conservatively peels the outer XOR-with-all-ones only when it directly
wraps a foldable logical operator (AND, OR, XOR, or ANDNP).
Resolves #163738
Commit: 9161760123cd8b10694483a8f27d72ed134173b2
https://github.com/llvm/llvm-project/commit/9161760123cd8b10694483a8f27d72ed134173b2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M .ci/premerge_advisor_upload.py
Log Message:
-----------
[CI] Make Premerge Advisor Upload to Both Advisor Instances
So that we do not have to worry about synchronizing data between the two
clusters. This also enables this script to work on AArch64, although
we'll look at enabling that later.
Reviewers: cmtice
Reviewed By: cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/165058
Commit: c9a45d3fd777997f669ff6af9c1f27e60a0fa23f
https://github.com/llvm/llvm-project/commit/c9a45d3fd777997f669ff6af9c1f27e60a0fa23f
Author: Kees Cook <kees at kernel.org>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrInfo.td
Log Message:
-----------
[ARM][KCFI] Fix bundle sizes to reflect worst-case expansion (#164917)
The KCFI_CHECK pseudo-instruction size for ARM got miscalculated. These
should represent worst-case expansion to ensure correct branch range
calculations and code layout.
Update the Size field for each ARM sub-architecture:
- ARM: 28 → 40 bytes (10 instructions @ 4 bytes when r3 spill needed)
- Thumb2: 32 → 34 bytes (mixed 16/32-bit instructions with r3 spill)
- Thumb1: 50 → 38 bytes (19 instructions @ 2 bytes with r2+r3 spills)
The ARM and Thumb2 sizes were underestimating the case where the target
register is r12, requiring r3 to be used as scratch and
spilled/restored. The Thumb1 size was overestimated and has been
corrected to the actual worst-case of 19 instructions.
Commit: a7c38b8a9c7feb94dc7f500e62c4197b8089da05
https://github.com/llvm/llvm-project/commit/a7c38b8a9c7feb94dc7f500e62c4197b8089da05
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/RadixTree.h
Log Message:
-----------
[ADT][NFC] Add missing #include <vector> (#165068)
Added in #164524. Fails when using libc++ in a mode that prunes
transitive headers.
Commit: 30f9ce14b439ddb14a9624705ac573d7597d6ce2
https://github.com/llvm/llvm-project/commit/30f9ce14b439ddb14a9624705ac573d7597d6ce2
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M libc/include/llvm-libc-macros/gpu/signal-macros.h
M libc/include/llvm-libc-macros/linux/signal-macros.h
Log Message:
-----------
[libc] add SIG_HOLD for linux/gpu (#165007)
Commit: 2afbd3df2ae6959b6bf5cbf22db22b57247f36ac
https://github.com/llvm/llvm-project/commit/2afbd3df2ae6959b6bf5cbf22db22b57247f36ac
Author: SahilPatidar <sahilpatidar60 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
R llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h
R llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
R llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp
R llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
R llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_linux.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_macho.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_linux.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_macho.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_linux.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_macho.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_linux.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_macho.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_linux.yaml
R llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_macho.yaml
R llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp
Log Message:
-----------
Revert "REAPPLY [ORC] Add automatic shared library resolver for unresolved symbols. #148410" (#165069)
Reverting llvm/llvm-project#164551 due to persistent build bot failure
caused by a path difference issue.
Commit: 351dc85e006ffc81ea63ad19490ce9158b25d37b
https://github.com/llvm/llvm-project/commit/351dc85e006ffc81ea63ad19490ce9158b25d37b
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/test/CodeGen/Mips/Fast-ISel/br1.ll
M llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
M llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
M llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll
M llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
M llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
M llvm/test/CodeGen/Mips/beqzc.ll
M llvm/test/CodeGen/Mips/beqzc1.ll
M llvm/test/CodeGen/Mips/brsize3.ll
M llvm/test/CodeGen/Mips/brsize3a.ll
M llvm/test/CodeGen/Mips/ci2.ll
M llvm/test/CodeGen/Mips/cmplarge.ll
M llvm/test/CodeGen/Mips/const1.ll
M llvm/test/CodeGen/Mips/const4a.ll
M llvm/test/CodeGen/Mips/const6.ll
M llvm/test/CodeGen/Mips/const6a.ll
M llvm/test/CodeGen/Mips/ctlz.ll
M llvm/test/CodeGen/Mips/delay-slot-fill-forward.ll
M llvm/test/CodeGen/Mips/f16abs.ll
M llvm/test/CodeGen/Mips/fp16instrinsmc.ll
M llvm/test/CodeGen/Mips/fpneeded.ll
M llvm/test/CodeGen/Mips/fpnotneeded.ll
M llvm/test/CodeGen/Mips/hf16call32.ll
M llvm/test/CodeGen/Mips/hf16call32_body.ll
M llvm/test/CodeGen/Mips/hfptrcall.ll
M llvm/test/CodeGen/Mips/l3mc.ll
M llvm/test/CodeGen/Mips/lcb2.ll
M llvm/test/CodeGen/Mips/lcb3c.ll
M llvm/test/CodeGen/Mips/lcb4a.ll
M llvm/test/CodeGen/Mips/lcb5.ll
M llvm/test/CodeGen/Mips/mbrsize4a.ll
M llvm/test/CodeGen/Mips/micromips-attr.ll
M llvm/test/CodeGen/Mips/mips16-hf-attr-2.ll
M llvm/test/CodeGen/Mips/mips16-hf-attr.ll
M llvm/test/CodeGen/Mips/mips16_32_1.ll
M llvm/test/CodeGen/Mips/mips16_32_10.ll
M llvm/test/CodeGen/Mips/mips16_32_3.ll
M llvm/test/CodeGen/Mips/mips16_32_4.ll
M llvm/test/CodeGen/Mips/mips16_32_5.ll
M llvm/test/CodeGen/Mips/mips16_32_6.ll
M llvm/test/CodeGen/Mips/mips16_32_7.ll
M llvm/test/CodeGen/Mips/mips16_32_8.ll
M llvm/test/CodeGen/Mips/mips16_32_9.ll
M llvm/test/CodeGen/Mips/nomips16.ll
M llvm/test/CodeGen/Mips/pbqp-reserved-physreg.ll
M llvm/test/CodeGen/Mips/powif64_16.ll
M llvm/test/CodeGen/Mips/s2rem.ll
M llvm/test/CodeGen/Mips/sel1c.ll
M llvm/test/CodeGen/Mips/sel2c.ll
M llvm/test/CodeGen/Mips/simplebr.ll
M llvm/test/CodeGen/Mips/sr1.ll
M llvm/test/CodeGen/Mips/tnaked.ll
Log Message:
-----------
[test][MIPS] Remove unsafe-fp-math uses (NFC) (#164790)
Post cleanup for #164534.
Commit: 168db5eca0da25b92a105c8df5c55ed7fd2d4cfc
https://github.com/llvm/llvm-project/commit/168db5eca0da25b92a105c8df5c55ed7fd2d4cfc
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/SpecialCaseList.h
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[SpecialCaseList] Filtering Globs with matching prefix (#164531)
This commit optimizes `SpecialCaseList` by using a `RadixTree` to filter
glob patterns based on their prefixes. When matching a query, the
`RadixTree` quickly identifies all glob patterns whose prefixes match
the query's prefix. This significantly reduces the number of glob
patterns that need to be fully evaluated, leading to performance
improvements, especially when dealing with a large number of patterns.
According to SpecialCaseListBM:
Lookup benchmarks (significant improvements):
```
OVERALL_GEOMEAN -0.8177
```
Lookup like `prefix*` benchmarks (huge improvements):
```
OVERALL_GEOMEAN -0.9819
```
https://gist.github.com/vitalybuka/824884bcbc1713e815068c279159dafe
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 44601d1a7a8a9df879998ae0a193ccab851d4131
https://github.com/llvm/llvm-project/commit/44601d1a7a8a9df879998ae0a193ccab851d4131
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
Reapply "Reapply "[clang-format] Annotate ::operator and Foo::operator… (#165038)
This reverts commit bd27abcceedfc60f4598124aa022cd0b766da3d8.
See https://github.com/llvm/llvm-project/pull/164670#issuecomment-3445926724
Commit: f7585adc94e87e0e32161be5a07d03927b6ce1a7
https://github.com/llvm/llvm-project/commit/f7585adc94e87e0e32161be5a07d03927b6ce1a7
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir
M llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing-gpr.ll
Log Message:
-----------
[AArch64] Widen GPR32 zero cycle zeroing (#164244)
Given a GPR32 zeroing instruction, if the target supports zero cycle
zeroing for GPR64 but not for GPR32, widen the instruction to 64 bit
`$xn = MOVZXi 0, 0` instead of writing to `$wn` to exploit zero cycle
zeroing.
It also aligns naming in the generic zeroing test.
Commit: 7be3cac735b272ffa9b89e36c8c7b7a5d333cf40
https://github.com/llvm/llvm-project/commit/7be3cac735b272ffa9b89e36c8c7b7a5d333cf40
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
M llvm/lib/Target/X86/X86.h
Log Message:
-----------
[X86] Move x86 specific create*Pass Functions to X86.h
There are no other target specific passes in Passes.h and these really
belong inside x86.h to be consistent with other targets.
Reviewers: arsenm, phoebewang, RKSimon, topperc
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/165075
Commit: 59e601a3d5e7669fdf809b9c6494e6f877ea5cd8
https://github.com/llvm/llvm-project/commit/59e601a3d5e7669fdf809b9c6494e6f877ea5cd8
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
Log Message:
-----------
[CodeGenPrepare] Don't simplify incomplete expression tree in AddrModeCombine (#164628)
Since new select/phi instructions may construct loops, the expression
tree to be simplified may still be incomplete (i.e., it may contain
select with dummy values or phi without incoming values). This patch
removes the call to simplifyInstruction for now, as it doesn't break
existing tests.
Original PR: https://reviews.llvm.org/D36073
Fix the crash reported in
https://github.com/llvm/llvm-project/pull/163453#issuecomment-3429922732.
Commit: f248010a5233e726f6ab1767c09cd582057a6413
https://github.com/llvm/llvm-project/commit/f248010a5233e726f6ab1767c09cd582057a6413
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Update mfma assembly format with intrinsic shape (#165037)
Use the same format as introduced for wmma by
https://github.com/llvm/llvm-project/pull/164920.
Also make `blocks` default to 1.
Commit: 51fcb9d4daa73f7b62b065af4b4b23b6e8ceb090
https://github.com/llvm/llvm-project/commit/51fcb9d4daa73f7b62b065af4b4b23b6e8ceb090
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Upstream CallOp with ComplexType as return type (#164980)
Upstream support calling function that returns ComplexType
Issue https://github.com/llvm/llvm-project/issues/141365
Commit: b0658b1151a7dce63e7bc29b69037462c07c355e
https://github.com/llvm/llvm-project/commit/b0658b1151a7dce63e7bc29b69037462c07c355e
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR][NFC] Upstream EHPersonality for function (#164883)
Upstream the EHPersonality class for a function as a prerequisite for
working with the handlers
Issue #154992
Commit: f58aa0ec8b3523f3bdaa73964b809d6d54c42768
https://github.com/llvm/llvm-project/commit/f58aa0ec8b3523f3bdaa73964b809d6d54c42768
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
[ORC] Fix race when checking isComplete (#165063)
After #164340 there is a tsan race on `OutstandingSymbolsCount` when
decrementing it in `notifySymbolMetRequiredState` vs reading it in
`isComplete()`. Fix this by having `IL_emit` filter out non-completed
queries when it has the lock to do so, and that way we avoid needing to
call `isComplete()` later.
Commit: bbe92096bbcdfe9bdb47bf7ca42b17992ad94e74
https://github.com/llvm/llvm-project/commit/bbe92096bbcdfe9bdb47bf7ca42b17992ad94e74
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
M mlir/test/Dialect/AMDGPU/canonicalize.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Update scaled_mfma assembly format with intrinsic shape (#165044)
Use the same format as introduced for wmma by
https://github.com/llvm/llvm-project/pull/164920 and for mfma by
https://github.com/llvm/llvm-project/pull/165037.
Commit: 9a0a1fadef0880e19c1c278486b4e79aa04e580f
https://github.com/llvm/llvm-project/commit/9a0a1fadef0880e19c1c278486b4e79aa04e580f
Author: Luo Yuanke <lyk_03 at hotmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[ISel] Use CallBase instead of CallInst (#164769)
This is to follow the discussion in
https://github.com/llvm/llvm-project/pull/164565
CallBase can cover more call-like instructions which carry caling
convention flag.
Co-authored-by: Yuanke Luo <ykluo at birentech.com>
Commit: 1d661a97a53b8f701fec8d3056f692c39ed12f6a
https://github.com/llvm/llvm-project/commit/1d661a97a53b8f701fec8d3056f692c39ed12f6a
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Add Codegen/Hexagon/masked_gather.ll to profcheck-xfail (#165093)
Commit: b97835d09df36e91434c82db28cad7bbdd5b37b8
https://github.com/llvm/llvm-project/commit/b97835d09df36e91434c82db28cad7bbdd5b37b8
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Add new MemorySanitizer test cases for AArch64 (#165094)
Commit: 881b001b07cc761dd9e92c0958f0231ea56298d8
https://github.com/llvm/llvm-project/commit/881b001b07cc761dd9e92c0958f0231ea56298d8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
Log Message:
-----------
[ADT] Make internal methods of DenseMap/SmallDenseMap private (NFC) (#165079)
This patch moves the init, copyFrom, and grow methods in DenseMap and
SmallDenseMap from public to private to hide implementation details.
The only problem is that PhysicalRegisterUsageInfo calls
DenseMap::grow instead of DenseMap::reserve, which I don't think is
intended. This patch updates the call to reserve.
Commit: d4612449e207e7841e3fd65c21443a6e24edd4c7
https://github.com/llvm/llvm-project/commit/d4612449e207e7841e3fd65c21443a6e24edd4c7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/unittests/ADT/DenseMapTest.cpp
Log Message:
-----------
[ADT] Skip DenseMapBase::destroyAll on trivially destructible types (#165080)
DenseMap::destroyAll currently iterates through the entire bucket
array to call destructors keys and values. We don't need to do that
if we know that both key and value types are trivially destructible,
meaning that the destructors are no-ops.
This patch introduces "constexpr if" at the beginning of destroyAll to
skip the rest of the function if both key and value types are
trivially destructible.
Commit: 7379100be637eeb72d732d8f174a3b01d22532e3
https://github.com/llvm/llvm-project/commit/7379100be637eeb72d732d8f174a3b01d22532e3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/Recycler.h
Log Message:
-----------
[Support] Consolidate the two implementations of Recycler::clear (NFC) (#165081)
This patch consolidates the two implementations of Recycler::clear
with "if constexpr" for simplicity.
Commit: 84857775b76f7e27096d9ac311b378f99a8442c7
https://github.com/llvm/llvm-project/commit/84857775b76f7e27096d9ac311b378f99a8442c7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
M llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFTargetLoweringObjectFile.h
M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.h
M llvm/lib/Target/RISCV/RISCVConstantPoolValue.h
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
Log Message:
-----------
[Target] Add "override" where appropriate (NFC) (#165083)
Note that "override" makes "virtual" redundant.
Identified with modernize-use-override.
Commit: 09eea2256e5305e7527df61b2fc35f16410b63be
https://github.com/llvm/llvm-project/commit/09eea2256e5305e7527df61b2fc35f16410b63be
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
A llvm/test/Transforms/Attributor/range-and-constant-fold.ll
Log Message:
-----------
[Attributor] Check range size before constant fold load (#151359)
If the range size doesn't match the type size, it might read wrong data.
Commit: 059d90d08f610d5919c42646f267bbab77f7bee4
https://github.com/llvm/llvm-project/commit/059d90d08f610d5919c42646f267bbab77f7bee4
Author: Yunqing Yu <yunqingy at nvidia.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
Log Message:
-----------
[Legalizer] Cache extracted element when lowering G_SHUFFLE_VECTOR. (#163893)
Cache extracted elements in lowerShuffleVector(). For example, when
lowering
```
%0:_(<2 x s32>) = G_BUILD_VECTOR %0, %1
%2:_(<N x s32>) = G_SHUFFLE_VECTOR %1, shufflemask(0, 0, 0, 0 ... x N )
```
Currently, we generate `N` `G_EXTRACT_VECTOR_ELT` for each element in
shufflemask. This is undesirable and bloats the code, especially for
larger vectors.
With this change, we only generate one `G_EXTRACT_VECTOR_ELT` from `%0`
and reuse it for all four result elements.
Commit: 05c495de132f7609537686f60f312059ea70b4a6
https://github.com/llvm/llvm-project/commit/05c495de132f7609537686f60f312059ea70b4a6
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/SpecialCaseList.h
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[SpecialCaseList] Filtering Globs with matching prefix and suffix (#164543)
This commit enhances the `SpecialCaseList::GlobMatcher` to filter globs
more efficiently by considering both prefixes and suffixes.
Previously, the `GlobMatcher` used a `RadixTree` to store globs based
on their prefixes. This allowed for quick lookup of potential matches
by matching the query string's prefix against the stored prefixes.
However, for globs with common prefixes but different suffixes,
unnecessary glob matching attempts could still occur.
This change introduces a nested `RadixTree` structure:
`PrefixSuffixToGlob: RadixTree<Prefix, RadixTree<Suffix, Globs>>`.
Now, when a query string is matched, it first finds matching prefixes,
and then within those prefix matches, it further filters by matching
the reversed suffix of the query string against the reversed suffixes
of the globs. This significantly reduces the number of `Glob::match`
calls, especially for large special case lists with many globs sharing
common prefixes but differing in their suffixes.
According to SpecialCaseListBM:
Lookup benchmarks (significant improvements):
```
OVERALL_GEOMEAN -0.5815
```
Lookup `*suffix` and `prefix*suffix` like benchmarks (huge
improvements):
```
OVERALL_GEOMEAN -0.9316
```
https://gist.github.com/vitalybuka/e586751902760ced6beefcdf0d7b26fd
Commit: 5113ca0f43a5ce071b462e9f62ebedfa728525be
https://github.com/llvm/llvm-project/commit/5113ca0f43a5ce071b462e9f62ebedfa728525be
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
Log Message:
-----------
[clang] Proofread LanguageExtensions.rst (#165082)
Commit: 7b9cf0fe8d7bd77cd5d6747cfed6ecdded64fca3
https://github.com/llvm/llvm-project/commit/7b9cf0fe8d7bd77cd5d6747cfed6ecdded64fca3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/Bitfields.h
Log Message:
-----------
[ADT] Tighten static_assert in Bitfields (#165099)
This patch tightens the static_assert. FirstBit and LastBit are
0-based bit indices of a bitfield, so they must be strictly less than
StorageBits.
Commit: e510797700fb53d114371ad18084bce11fdfafc0
https://github.com/llvm/llvm-project/commit/e510797700fb53d114371ad18084bce11fdfafc0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/ConcurrentHashtable.h
Log Message:
-----------
[ADT] Use std::scoped_lock in ConcurrentHashtable (NFC) (#165100)
This patch uses std::scoped_lock to ensure the mutex is released via
RAII, improving robustness.
Commit: c3a4093dae316c0c4cf71bf965c3f6a99a8476d8
https://github.com/llvm/llvm-project/commit/c3a4093dae316c0c4cf71bf965c3f6a99a8476d8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Consolidate copyFrom in DenseMap.h (NFC) (#165101)
DenseMap.h has:
- DenseMapBase::copyFrom
- DenseMap::copyFrom
- SmallDenseMap::copyFrom
The latter two clear and set up the storage again before delegating
DenseMapBase::copyFrom to do the actual work of copying buckets.
This patch consolidates all these into DenseMapBase::copyFrom while
eliminating name shadowing concerns. Note that DenseMap::copyFrom and
SmallDenseMap::copyFrom are nearly identical, and they can be made
identical with small adjustments:
- Set NumEntries and NumTombstones to 0 unconditionally.
- Teach SmallDenseMap::allocateBuckets to always return true.
This patch essentially applies these adjustments and then "inlines"
the identical function body to the beginning of
DenseMapBase::copyFrom.
This patch de-templatizes DenseMapBase::copyFrom because nobody calls
it with any type other than DerivedT.
Commit: e4909203feb2f6f4eccb42ed148cc39cedd5b524
https://github.com/llvm/llvm-project/commit/e4909203feb2f6f4eccb42ed148cc39cedd5b524
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Remove KeyInfoT forwarders in DenseMap.h (NFC) (#165102)
This patch removes getEmptyKey, getTombstoneKey, and getHashValue from
DenseMapBase. These forwarder methods do not really encapsulate
KeyInfoT. Many of their callers already mention KeyInfoT::isEqual for
example.
An existing static_assert is moved to another method. Note that it
must live in a method for type completeness reasons.
Commit: 9458ecd298a6d445ade80e750cbbfb89da0e0d5f
https://github.com/llvm/llvm-project/commit/9458ecd298a6d445ade80e750cbbfb89da0e0d5f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Move shrink_and_clear to DenseMapBase (NFC) (#165103)
Without this patch, DenseMap and SmallDenseMap have distinct
implementations of shrink_and_clear. These implementations mix a
common high-level algorithm with class-specific logic.
This patch moves the common algorithm into
DenseMapBase::shrink_and_clear. A new private helper,
planShrinkAndClear, now handles the class-specific logic for deciding
whether to shrink the buffer. The base class method now serves as the
single public entry point.
Commit: fd804f076d117bc1d0a8751ef7ad44132a03453e
https://github.com/llvm/llvm-project/commit/fd804f076d117bc1d0a8751ef7ad44132a03453e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/docs/CIBestPractices.rst
Log Message:
-----------
[CI][Github] Add Fully Qualified Container Names to Best Practices (#165067)
Based on some recent discussion in #162007. Documenting this in the best
practices page so we have something easy to point to in code
review/reference for ourselves now that the repository has been cleaned
up.
Commit: 5d0f1591f8b91ac7919910c4e3e9614a8804c02a
https://github.com/llvm/llvm-project/commit/5d0f1591f8b91ac7919910c4e3e9614a8804c02a
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/ARM/load-combine-big-endian.ll
M llvm/test/CodeGen/ARM/load-combine.ll
Log Message:
-----------
[DAGCombine] Improve bswap lowering for machines that support bit rotates (#164848)
Source: Hacker's delight.
Commit: b35c93ffe392cb41e24a6aa5fa6f1ae6999aa98f
https://github.com/llvm/llvm-project/commit/b35c93ffe392cb41e24a6aa5fa6f1ae6999aa98f
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
Log Message:
-----------
[BOLT] Avoid extra function dump on invalid BBs found by UCE (NFC) (#165111)
Commit: 57828a6d5de0be08b36382833aa2a6737f5d63a2
https://github.com/llvm/llvm-project/commit/57828a6d5de0be08b36382833aa2a6737f5d63a2
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/LiteralSupport.cpp
M llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/tools/llvm-cov/llvm-cov.cpp
M llvm/unittests/ADT/StringSwitchTest.cpp
Log Message:
-----------
[ADT] Prepare for deprecation of StringSwitch cases with 3+ args. NFC. (#165112)
Update `.Cases` and `.CasesLower` with 4+ args to use the
`initializer_list` overload. The deprecation of these functions will
come in a separate PR.
For more context, see: https://github.com/llvm/llvm-project/pull/163405.
Commit: d748a1276c0b21df136984e03776186c4bf5df15
https://github.com/llvm/llvm-project/commit/d748a1276c0b21df136984e03776186c4bf5df15
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/docs/Reference.rst
Log Message:
-----------
[Docs] Add CIBestPractices docs link to Reference.rst (#165108)
Based on
https://github.com/llvm/llvm-project/pull/165067#issuecomment-3446142541.
Commit: d020b2da5419ba6780e77b8543dad51df8fbcf0e
https://github.com/llvm/llvm-project/commit/d020b2da5419ba6780e77b8543dad51df8fbcf0e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move isSingleScalar implementation to VPlanUtils.cpp (NFC)
Move the implementation of vputils::isSingleScalar to VPlanUtils.cpp to
enable code sharing.
Commit: f03ccef45f84b4e947ffc93dc5a6f87a827fddf3
https://github.com/llvm/llvm-project/commit/f03ccef45f84b4e947ffc93dc5a6f87a827fddf3
Author: Brad Smith <brad at comstyle.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/builtins/assembly.h
M libunwind/src/assembly.h
M libunwind/src/shadow_stack_unwind.h
Log Message:
-----------
[compiler-rt][libunwind] Allow for CET on OpenBSD (#164341)
Commit: 5a6c236e0f47986c816b89389dc5dc08a83a63b7
https://github.com/llvm/llvm-project/commit/5a6c236e0f47986c816b89389dc5dc08a83a63b7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/RadixTree.h
Log Message:
-----------
[ADT] Remove #include <limits> in RadixTree.h (NFC) (#165115)
RadixTree.h does not use anything from <limits>.
Commit: 5d23610ed59c816bf0977554eb9aadc6b4d95180
https://github.com/llvm/llvm-project/commit/5d23610ed59c816bf0977554eb9aadc6b4d95180
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/ScopedHashTable.h
Log Message:
-----------
[ADT] Fix a comment in ScopedHashTable (#165116)
This patch replaces "typedef" with "type alias" in the comment while
making it more concise.
Commit: 378d5ea2900608f636914826bbeb836c9eaeb249
https://github.com/llvm/llvm-project/commit/378d5ea2900608f636914826bbeb836c9eaeb249
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFAbbreviationDeclaration.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/MachO.h
M llvm/include/llvm/Remarks/RemarkLinker.h
M llvm/include/llvm/TextAPI/SymbolSet.h
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/Target/ARM/ARMConstantPoolValue.h
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/RegisterBankEmitter.cpp
Log Message:
-----------
[llvm] Use iterator_range<T>(Container &&) (NFC) (#165117)
This patch simplifies construction of iterator_range<T> by using:
iterator_range<T>(Container &&)
instead of:
iterator_range<T>(T begin_iterator, T end_iterator)
Commit: e219cf60598c2c133a29170f7a9f9e793e429cc2
https://github.com/llvm/llvm-project/commit/e219cf60598c2c133a29170f7a9f9e793e429cc2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/DataExtractor.h
Log Message:
-----------
[Support] Modernize Uint24 in DataExtractor.h (NFC) (#165118)
We can use brace initializer lists to simplify constructors.
Commit: 41bb6ed8827a8d170456026f6becd638efaea7f6
https://github.com/llvm/llvm-project/commit/41bb6ed8827a8d170456026f6becd638efaea7f6
Author: Nicholas Junge <nicholas.junge at web.de>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M mlir/docs/Bindings/Python.md
Log Message:
-----------
[mlir][docs] Migrate code examples to nanobind, make Python spelling … (#163933)
…consistent
Since the bindings now use nanobind, I changed the code examples and
mentions in the documentation prose to mention nanobind concepts and
symbols wherever applicable.
I also made the spelling of "Python" consistent by choosing the
uppercase name everywhere that's not an executable name, part of a URL,
or directory name.
----------------
Note that I left mentions of `PybindAdaptors.h` in because of
https://github.com/llvm/llvm-project/pull/162309.
Are there any thoughts about adding a virtual environment setup guide
using [uv](https://docs.astral.sh/uv/)? It has gotten pretty popular,
and is much faster than a "vanilla" Python pip install. It can also
bootstrap an interpreter not present on the user's machine, for example
a free-threaded Python build, with the `-p` flag to the `uv venv`
virtual environment creation command.
Commit: 3526bb099e79b1217bb8afbf9403b11528c384a6
https://github.com/llvm/llvm-project/commit/3526bb099e79b1217bb8afbf9403b11528c384a6
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp
M clang/unittests/Driver/MultilibBuilderTest.cpp
M clang/unittests/Driver/MultilibTest.cpp
M lld/Common/DriverDispatcher.cpp
M lldb/source/Host/common/File.cpp
M lldb/source/Host/common/Socket.cpp
M llvm/include/llvm/ADT/StringSwitch.h
Log Message:
-----------
[ADT] Deprecate StringSwitch Cases with 3+ args. NFC. (#165119)
Suggest the `initializer_list` overload instead.
3+ args is an arbitrary number that allows for incremental depreciation
without having to update too many call sites.
For more context, see https://github.com/llvm/llvm-project/pull/163117.
Commit: bba6bc671b23ee10212efd6d6cf8cbfa21410105
https://github.com/llvm/llvm-project/commit/bba6bc671b23ee10212efd6d6cf8cbfa21410105
Author: Vincent Palatin <vpalatin at users.noreply.github.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/test/API/lua_api/TestLuaAPI.py
Log Message:
-----------
[lldb][test] skip Lua tests when the Lua interpreter is not found (#164793)
When SWIG is installed but not any Lua interpreter, the cmake script in
`lldb/cmake/modules/FindLuaAndSwig.cmake` will execute
`find_program(LUA_EXECUTABLE, ...)` and this will set the
`LUA_EXECUTABLE` variable to `LUA_EXECUTABLE-NOTFOUND`.
Ensure that in this case we are skipping the Lua tests requiring the
interpreter.
Commit: c8f5c602c897d2345c1cfd8d886c1325598dbdc6
https://github.com/llvm/llvm-project/commit/c8f5c602c897d2345c1cfd8d886c1325598dbdc6
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/test/CodeGen/PowerPC/DisableHoistingDueToBlockHotnessProfileData.mir
M llvm/test/CodeGen/PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir
M llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
M llvm/test/CodeGen/PowerPC/addrfuncstr.ll
M llvm/test/CodeGen/PowerPC/asm-constraints.ll
M llvm/test/CodeGen/PowerPC/asym-regclass-copy.ll
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-R0-special-handling.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
M llvm/test/CodeGen/PowerPC/cr-spills.ll
M llvm/test/CodeGen/PowerPC/crypto_bifs.ll
M llvm/test/CodeGen/PowerPC/ctr-cleanup.ll
M llvm/test/CodeGen/PowerPC/ctrloop-do-not-duplicate-mi.mir
M llvm/test/CodeGen/PowerPC/ctrloop-intrin.ll
M llvm/test/CodeGen/PowerPC/div-e-32.ll
M llvm/test/CodeGen/PowerPC/div-e-all.ll
M llvm/test/CodeGen/PowerPC/extra-toc-reg-deps.ll
M llvm/test/CodeGen/PowerPC/fma-mutate-duplicate-vreg.ll
M llvm/test/CodeGen/PowerPC/frameaddr.ll
M llvm/test/CodeGen/PowerPC/glob-comp-aa-crash.ll
M llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
M llvm/test/CodeGen/PowerPC/isel-rc-nox0.ll
M llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
M llvm/test/CodeGen/PowerPC/mc-instrlat.ll
M llvm/test/CodeGen/PowerPC/negctr.ll
M llvm/test/CodeGen/PowerPC/ppc-empty-fs.ll
M llvm/test/CodeGen/PowerPC/ppc32-lshrti3.ll
M llvm/test/CodeGen/PowerPC/pr17168.ll
M llvm/test/CodeGen/PowerPC/pr17354.ll
M llvm/test/CodeGen/PowerPC/pr18663-2.ll
M llvm/test/CodeGen/PowerPC/pr24546.ll
M llvm/test/CodeGen/PowerPC/pr27350.ll
M llvm/test/CodeGen/PowerPC/pr28130.ll
M llvm/test/CodeGen/PowerPC/reloc-align.ll
M llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir
M llvm/test/CodeGen/PowerPC/setcr_bc.mir
M llvm/test/CodeGen/PowerPC/setcr_bc2.mir
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-regpressure-high.mir
M llvm/test/CodeGen/PowerPC/sjlj.ll
M llvm/test/CodeGen/PowerPC/stwu-sched.ll
M llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
M llvm/test/CodeGen/PowerPC/unal4-std.ll
M llvm/test/CodeGen/PowerPC/uwtables.ll
M llvm/test/CodeGen/PowerPC/zero-not-run.ll
Log Message:
-----------
[test][PowerPC] Remove unsafe-fp-math uses (NFC) (#164817)
Post cleanup for #164534.
Commit: c05ce9b0057c9b1413bee964bb2d400ffbddede5
https://github.com/llvm/llvm-project/commit/c05ce9b0057c9b1413bee964bb2d400ffbddede5
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[MLIR][Python] fix getOwner to return (typed) nb::object instead of abstract PyOpView (#165053)
https://github.com/llvm/llvm-project/pull/157930 changed `nb::object
getOwner()` to `PyOpView getOwner()` which implicitly constructs the
generic OpView against from a (possibly) concrete OpView. This PR fixes
that.
Commit: 5dcf82d3da1ff449ca3b19aed56a76112ae6c735
https://github.com/llvm/llvm-project/commit/5dcf82d3da1ff449ca3b19aed56a76112ae6c735
Author: Slava Gurevich <sgurevich at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensor.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/IterationGraphSorter.cpp
Log Message:
-----------
[MLIR] Fix use-after-move for DEBUG builds, and broken assert logic. (#164763)
These issues affect only Debug builds, and Release builds with asserts
enabled.
1. In `SparseTensor.h` a variable is moved-from within an assert,
introducing a side effect that alters its subsequent use, and causes
divergence between Debug and Release builds (with asserts disabled).
2. In `IterationGraphSorter.cpp`, the class constructor arguments are
moved-from to initialize class member variables via the initializer
list. Because both the arguments and class members are identically
named, there's a naming collision where the arguments shadow their
identically-named member variables counterparts inside the constructor
body. In the original code, unqualified names inside the asserts,
referred to the constructor arguments. This is wrong, because these have
already been moved-from. It's not just a UB, but is broken. These
SmallVector types when moved-from are reset i.e. the size resets to 0.
This actually renders the affected asserts ineffective, since the
comparisons operate on two hollowed-out objects and always succeed. This
name ambiguity is fixed by using 'this->' to correctly refer to the
initialized member variables carrying the relevant state.
3. While the fix 2 above made the asserts act as intended, it also
unexpectedly broke one mlir test: `llvm-lit -v
mlir/test/Dialect/SparseTensor/sparse_scalars.mlir` This required fixing
the assert logic itself, which likely has never worked and went
unnoticed all this time due to the bug 2. Specifically, in the failing
test that uses `mlir/test/Dialect/SparseTensor/sparse_scalars.mlir` the
'%argq' of 'ins' is defined as 'f32' scalar type, but the original code
inside the assert had no support for scalar types as written, and was
breaking the test.
Testing:
```
ninja check-mlir
llvm-lit -v mlir/test/Dialect/SparseTensor/sparse_scalars.mlir
```
Commit: 42bba7fc7a21d2b68933bbc98deb1ee52bbfe2eb
https://github.com/llvm/llvm-project/commit/42bba7fc7a21d2b68933bbc98deb1ee52bbfe2eb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang/test/Driver/config-file3.c
M clang/test/Driver/config-zos.c
M clang/test/Driver/config-zos1.c
M clang/test/Modules/crash-vfs-path-symlink-component.m
M clang/test/Modules/crash-vfs-path-traversal.m
M clang/test/Modules/crash-vfs-relative-overlay.m
Log Message:
-----------
[Clang] Reenable Tests on SystemZ/AIX Using env -u (#164816)
These were disabled when adjusting tests to work with the internal shell
because the implementation on these systems of env did not support the
-u option. Now that we have switched to the internal shell and env -u is
implemented internally, these tests should work again.
Commit: 7ebc3dbe8bbf1f7a6ae5af531d02dcfe745d92ef
https://github.com/llvm/llvm-project/commit/7ebc3dbe8bbf1f7a6ae5af531d02dcfe745d92ef
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[llvm] Make getEffectiveRelocModel helper consistent across targets. NFC (#165121)
- On targets that don't require the Triple, don't pass it.
- Use `.value_or` to where possible.
Commit: e246fffb253c3ed9a2c0b4a71ef33d97c7b5629c
https://github.com/llvm/llvm-project/commit/e246fffb253c3ed9a2c0b4a71ef33d97c7b5629c
Author: Congzhe <congzhe.cao at huawei.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/InstCombine/select_with_identical_phi.ll
Log Message:
-----------
Reland "[InstructionSimplify] Enhance simplifySelectInst() (#163453)" (#164694)
This reverts commit f1c1063.
PR #163453 was merged and reverted since it exposed a crash.
After investigation the crash was unrelated and is then fixed in #164628.
This is an attempt to reland #163453.
Commit: cd27741c1111f8a97af5fbca4153fa94f50ed9f3
https://github.com/llvm/llvm-project/commit/cd27741c1111f8a97af5fbca4153fa94f50ed9f3
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Remove CreatePastEnd parameter in getOrCreateLocalLabel(). NFC (#165065)
CreatePastEnd parameter had no effect on the label creation. Remove it.
Commit: 792c65c39f9ecf0d1bb36e846583470c492b3fca
https://github.com/llvm/llvm-project/commit/792c65c39f9ecf0d1bb36e846583470c492b3fca
Author: Amara Emerson <amara at apple.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/MC/MCParser/AsmLexer.cpp
A llvm/test/MC/AsmParser/comments-x86-darwin-eol-dropped.s
Log Message:
-----------
[MC] Fix accidentally eating the newline when handling a comment char at the end of the line. (#165129)
If we have a target where both # and ## are valid comment strings,
a line ending in # would trigger the lexer to eat 2 characters
and therefore lex the _next_ line as a comment. Oops. This was introduced
in 4946db15a74b761c5ac4ead18873639236b4ab5d
rdar://162635338
Commit: ff48353aaeb51a5c3ccf6720de9e756c1270ad2f
https://github.com/llvm/llvm-project/commit/ff48353aaeb51a5c3ccf6720de9e756c1270ad2f
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[clang-repl] Use RegisterPTU for tracking generated TranslationUnitDecl through parse (#164778)
Instead of manually creating and adding a PTU, we should be able to use
`RegisterPTU` which does the same job here.
Commit: 63b83ea213878acde020fc8923ee65f42727009e
https://github.com/llvm/llvm-project/commit/63b83ea213878acde020fc8923ee65f42727009e
Author: Pietro Albini <emily at oxidecomputer.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/docs/Security.rst
Log Message:
-----------
Update company affiliation (#165003)
Recently switched jobs. In practice this doesn't change much since I'm
still in the security group to represent Rust, but I'm updating the
actual company I work for to keep the list up to date.
Commit: be29f0dd86d1b2ae98fbc2de2a2b1dcd974871f9
https://github.com/llvm/llvm-project/commit/be29f0dd86d1b2ae98fbc2de2a2b1dcd974871f9
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
Log Message:
-----------
[LV]: Improve accuracy of calculating remaining iterations of MainLoopVF (#156723)
Transform TC and VF to same numerical space when they are different.
Commit: 3ebc935c24a352d5b82a65b9f1ef66661311056d
https://github.com/llvm/llvm-project/commit/3ebc935c24a352d5b82a65b9f1ef66661311056d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/ImmutableSet.h
Log Message:
-----------
[ADT] Simplify control flow in ImmutableSet (NFC) (#165133)
A conventional "if" statement is easier to read than the
do-while(false) pattern used here.
Commit: b153e01f83ffbfb929734bb450e34d27bea2b789
https://github.com/llvm/llvm-project/commit/b153e01f83ffbfb929734bb450e34d27bea2b789
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/Support/LSP/Protocol.cpp
Log Message:
-----------
[Support] Simplify control flow in percentDecode (NFC) (#165134)
The "if" statement being removed in this patch is identical to the
"else" clause.
Commit: c6b4ef196ae751679356c0e7d5bc4cec55fd6999
https://github.com/llvm/llvm-project/commit/c6b4ef196ae751679356c0e7d5bc4cec55fd6999
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/MC/MCDXContainerWriter.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCGOFFObjectWriter.h
M llvm/include/llvm/MC/MCMachObjectWriter.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCWasmObjectWriter.h
M llvm/include/llvm/MC/MCWinCOFFObjectWriter.h
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/XCOFFObjectWriter.cpp
M llvm/unittests/MC/SystemZ/SystemZMCDisassemblerTest.cpp
M llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
Log Message:
-----------
[MC] Add "override" where appropriate (NFC) (#165135)
Note that "override" makes "virtual" redundant.
Identified with modernize-use-override.
Commit: 4732ab5083dc10f3fc9abf259dde3378a0c95278
https://github.com/llvm/llvm-project/commit/4732ab5083dc10f3fc9abf259dde3378a0c95278
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M libcxx/cmake/caches/Armv7Arm.cmake
M libcxx/cmake/caches/Armv7Thumb-no-exceptions.cmake
M libcxx/cmake/caches/Armv8Arm.cmake
M libcxx/cmake/caches/Armv8Thumb-no-exceptions.cmake
M libcxx/cmake/caches/Generic-hardening-mode-debug.cmake
M libcxx/cmake/caches/Generic-hardening-mode-extensive.cmake
M libcxx/cmake/caches/Generic-hardening-mode-fast-with-abi-breaks.cmake
M libcxx/cmake/caches/Generic-hardening-mode-fast.cmake
M libcxx/cmake/caches/Generic-merged.cmake
M libcxx/cmake/caches/Generic-msan.cmake
M libcxx/cmake/caches/Generic-optimized-speed.cmake
M libcxx/cmake/caches/Generic-static.cmake
M libcxx/cmake/caches/Generic-tsan.cmake
M libcxx/cmake/caches/Generic-ubsan.cmake
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__flat_map/flat_multimap.h
M libcxx/include/__flat_set/flat_multiset.h
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.ctor.extents_span.non_unique.pass.cpp
M libcxx/test/libcxx/utilities/utility/__murmur2_or_cityhash.abi-v2.pass.cpp
M libcxx/test/std/iterators/iterator.container/ssize.LWG3207.compile.pass.cpp
Log Message:
-----------
[libc++] Enable Clang modules in most of the CI runs (#160251)
Enabling modules makes the CI quite a bit faster with basically no
downsides. The non-modules build is still tested through the
`generic-cxxab` configurations, but most of the other CI runs on
platforms with modules support now use modules.
Commit: ce61550d5a72a2b33f8fe6c052f919cf895aa6e6
https://github.com/llvm/llvm-project/commit/ce61550d5a72a2b33f8fe6c052f919cf895aa6e6
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
Log Message:
-----------
[compiler-rt] Restore unsigned value in struct, use enum only in function (#165048)
Typed enums are c23 features and are too new to be used. This PR
restores the types in the `__processor_model` struct back to `unsigned
int`, removes typed enums, and uses the enum in the function as a
variable that's later assigned to a struct in order to prevent errors
fixed initially here: #164713
See https://github.com/llvm/llvm-project/pull/165034 for more background
Commit: f767f231e8ba0cb53d9dbadba3e9c75138f03f09
https://github.com/llvm/llvm-project/commit/f767f231e8ba0cb53d9dbadba3e9c75138f03f09
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M clang/test/ClangScanDeps/resource_directory.c
M clang/test/Driver/baremetal-multilib-custom-error.yaml
M clang/test/Frontend/absolute-paths-symlinks.c
M clang/test/Tooling/clang-check-pwd.cpp
Log Message:
-----------
[Clang] Drop Shell Requirements (#165149)
These are basically synonymous with marking windows as an unsupported
platform at this point and should be removed in favor of such
annotations. Removing the remianing annotations which should further
unblock removing the feature altogether now that everything minus
compiler-rt is using the internal shell by default. These were missed
when making the tests compatible with the internal shell.
Commit: a7b188983fd804e05a15835c3f0df5fa7523c246
https://github.com/llvm/llvm-project/commit/a7b188983fd804e05a15835c3f0df5fa7523c246
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-last-instruction-different-parents.ll
Log Message:
-----------
[SLP]Consider non-inst operands, when checking insts, used outside only
If the instructions in the node do not require scheduling and used
outside basic block only, still need to check, if their operands are
non-inst too. Such nodes should be emitted in the beginning of the
block.
Fixes #165151
Commit: abdef44814e8b6916107840a4aecf4cd085770ba
https://github.com/llvm/llvm-project/commit/abdef44814e8b6916107840a4aecf4cd085770ba
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M clang/docs/ClangOffloadBundler.rst
Log Message:
-----------
[clang] Proofread ClangOffloadBundler.rst (#165136)
Commit: 160b72787cde6e9c0964cd1751af77e20696889b
https://github.com/llvm/llvm-project/commit/160b72787cde6e9c0964cd1751af77e20696889b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AddressPool.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
Log Message:
-----------
[CodeGen] Use DenseMap::try_emplace (NFC) (#165165)
With try_emplace, we can pass the key and the arguments for the
value's constructor, which is a lot shorter than:
Map.insert(std::make_pair(Key, ValueType(Arg1, Arg2)))
Commit: fb27f4f9c32231712097d93e0359947a2faab5e0
https://github.com/llvm/llvm-project/commit/fb27f4f9c32231712097d93e0359947a2faab5e0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/docs/YamlIO.rst
Log Message:
-----------
[llvm] Use "static constexpr bool flow" in YamlIO.rst (#165166)
In C++17, we should use "static constexpr bool" instead of
"static const bool" for class-scope constants for for better
compile-time evaluation and checks.
Commit: 042ac912b1e28784ddecb19c690561cc413f53d1
https://github.com/llvm/llvm-project/commit/042ac912b1e28784ddecb19c690561cc413f53d1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/DDG.h
M llvm/include/llvm/Analysis/InteractiveModelRunner.h
M llvm/include/llvm/Analysis/MLInlineAdvisor.h
M llvm/include/llvm/Analysis/ReleaseModeModelRunner.h
M llvm/include/llvm/Analysis/StackSafetyAnalysis.h
M llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameAnalyzer.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/include/llvm/DWARFLinker/Parallel/DWARFLinker.h
M llvm/include/llvm/Debuginfod/BuildIDFetcher.h
M llvm/include/llvm/IR/DroppedVariableStatsIR.h
M llvm/include/llvm/IR/OptBisect.h
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/include/llvm/MCA/HardwareUnits/ResourceManager.h
M llvm/include/llvm/MCA/HardwareUnits/Scheduler.h
M llvm/include/llvm/MCA/View.h
M llvm/include/llvm/ObjCopy/ConfigManager.h
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/include/llvm/SandboxIR/BasicBlock.h
M llvm/include/llvm/SandboxIR/PassManager.h
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/XRay/FDRRecords.h
M llvm/include/llvm/XRay/FDRTraceWriter.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-statistics.cpp
M llvm/tools/llvm-mca/Views/InstructionView.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/ADT/TrieRawHashMapTest.cpp
M llvm/unittests/CAS/CASTestConfig.h
M llvm/unittests/SandboxIR/PassTest.cpp
M llvm/unittests/Support/ScopedPrinterTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/GlobalISel/Patterns.h
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[llvm] Add "override" where appropriate (NFC) (#165168)
Note that "override" makes "virtual" redundant.
Identified with modernize-use-override.
Commit: 51427079f73df85716b1c63cf3a436a128b96188
https://github.com/llvm/llvm-project/commit/51427079f73df85716b1c63cf3a436a128b96188
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M libc/src/setjmp/x86_64/sigsetjmp.cpp
Log Message:
-----------
[libc] fix architecture guarding for 32bit sigsetjmp (#164923)
Fixes: https://github.com/llvm/llvm-project/issues/164653
Signed-off-by: Shreeyash Pandey <shreeyash335 at gmail.com>
Commit: 50a37c022626816614a9d7da0a69bb77045e9e05
https://github.com/llvm/llvm-project/commit/50a37c022626816614a9d7da0a69bb77045e9e05
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[llvm] Migrate away from a soft-deprecated constructor of APInt (NFC) (#165164)
We have:
/// Once all uses of this constructor are migrated to other
constructors,
/// consider marking this overload ""= delete" to prevent calls from
being
/// incorrectly bound to the APInt(unsigned, uint64_t, bool)
constructor.
LLVM_ABI APInt(unsigned numBits, unsigned numWords, const uint64_t
bigVal[]);
This patch migrates away from this soft-deprecated constructor.
Commit: 6cb942cec44e66c9507876ca09ce203c7722417a
https://github.com/llvm/llvm-project/commit/6cb942cec44e66c9507876ca09ce203c7722417a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/PDB/PDBTypes.h
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[llvm] Remove argument_type in std::hash specializations (NFC) (#165167)
The argument_type and result_type type aliases in std::hash are
deprecated in C++17 and removed in C++20. This patch aligns two
specializations of ours with the C++ standard.
Commit: c197718cdfb87787bbc858f7b87223f9aad242ed
https://github.com/llvm/llvm-project/commit/c197718cdfb87787bbc858f7b87223f9aad242ed
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Log Message:
-----------
AArch64: Reformat some debug printing blocks (#165178)
Add {} in LLVM_DEBUG for nicer clang-format handling.
Commit: 1fae9db3d5932f693c7430dbbe1b95f16288c101
https://github.com/llvm/llvm-project/commit/1fae9db3d5932f693c7430dbbe1b95f16288c101
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/sme-support-routines-calling-convention.ll
Log Message:
-----------
AArch64: Fix undefined behavior in sme calling convention test (#165183)
Mismatch of callsite and callee calling conventions
Commit: 3cb8a52e2d4f26373dfeb568707019784ebe0b43
https://github.com/llvm/llvm-project/commit/3cb8a52e2d4f26373dfeb568707019784ebe0b43
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/inbounds-gep-in-predicated-blocks.ll
Log Message:
-----------
[LAA] Add additional tests for #161445.
Add extra test variants for
https://github.com/llvm/llvm-project/pull/161445.
Commit: 279a81e240cb1f1633c1d800eb3705a5ba203dc7
https://github.com/llvm/llvm-project/commit/279a81e240cb1f1633c1d800eb3705a5ba203dc7
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vle.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vlm.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vlse.ll
Log Message:
-----------
[RISCV][GISel] Support select vector load intrinsics (#160720)
Include unit-stride, strided and mask vector load intrinsics.
Commit: 57ba58d55843f3429e79f4086428a23dbf9375f6
https://github.com/llvm/llvm-project/commit/57ba58d55843f3429e79f4086428a23dbf9375f6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/version-mem-access.ll
Log Message:
-----------
[LV] Modernize version-mem-access.ll tests.
Auto-generate CHECK lines and simplify tests a bit.
Commit: 6b885c3e5859270d7f76af8ba7f25f9ddb1e809f
https://github.com/llvm/llvm-project/commit/6b885c3e5859270d7f76af8ba7f25f9ddb1e809f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
Log Message:
-----------
RuntimeLibcalls: Make sure _Unwind_Resume entries are mutually exclusive (#164195)
Commit: bbf5c410e10763e070063af0cb02ae46cf4056e9
https://github.com/llvm/llvm-project/commit/bbf5c410e10763e070063af0cb02ae46cf4056e9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
Log Message:
-----------
X86: Make sure compiler-rt div calls are not added for msvc (#164591)
The current predicate system is primitive, we ought to have
a way to list a chain of alternatives.
Commit: b549ea77640a8bc072b4d8e45840ae6e73f96d64
https://github.com/llvm/llvm-project/commit/b549ea77640a8bc072b4d8e45840ae6e73f96d64
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
Log Message:
-----------
ARM: Avoid adding default libcalls overridden by AEABI functions (#164983)
Avoids adding alternative libcall impls for the same libcall.
I'm not sure if the default names exist or not, or are just not
preferred. compiler-rt appears to define aliases for all of these,
so I'm not sure why we bother distinguishing these in the first place.
Commit: 0a34cbe51c388a7cf1d55e8a86276d0b01d2cf1e
https://github.com/llvm/llvm-project/commit/0a34cbe51c388a7cf1d55e8a86276d0b01d2cf1e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
Log Message:
-----------
AArch64: Use Register in FrameLowering (#165188)
Commit: 3dce567e44098e91d8409add5077c8733de64f53
https://github.com/llvm/llvm-project/commit/3dce567e44098e91d8409add5077c8733de64f53
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
Log Message:
-----------
AArch64: Clean up some casts to target subclasses (#165189)
Prefer getSubtarget<AArch64>(). Also avoids one unnecessary
null check.
Commit: 3b8f63dcc9d831d84f75bebde28b0c0eb27b66ff
https://github.com/llvm/llvm-project/commit/3b8f63dcc9d831d84f75bebde28b0c0eb27b66ff
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Remove unused parameter in function (#164202)
82289aa refactored this function to not need this parameter.
Commit: 81de86123fcf376b3833fdb1448ceb7b74064383
https://github.com/llvm/llvm-project/commit/81de86123fcf376b3833fdb1448ceb7b74064383
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-typename-cxx98.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-typename.cpp
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
Log Message:
-----------
[clang-tidy] Add new check: `readability-redundant-typename` (#161574)
Closes #158374.
Commit: a61e016565409b6a6620422dd915e591ea75f998
https://github.com/llvm/llvm-project/commit/a61e016565409b6a6620422dd915e591ea75f998
Author: Wenju He <wenju.he at intel.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M libclc/clc/include/clc/integer/gentype.inc
M libclc/clc/lib/generic/integer/clc_abs.inc
Log Message:
-----------
[libclc] Implement integer __clc_abs using __builtin_elementwise_abs (#164957)
Previous implementation was cmp, select and @llvm.smax sequence in LLVM IR.
__CLC_GEN_U/__CLC_GEN_S is upstreamed from intel/llvm repo.
Commit: 0e28c9bc9d64625db8e4a1707720c9eecff069a4
https://github.com/llvm/llvm-project/commit/0e28c9bc9d64625db8e4a1707720c9eecff069a4
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Transforms/LoopVectorize/version-mem-access.ll
Log Message:
-----------
[LAA] Skip undef/poison strides in collectStridedAccess.
The map returned by collectStridedAccess is used to replace strides with
their versioned values. This does not work for Undef/Poison, which don't
have use-lists. Don't try to version them, as versioning won't be useful in
practice.
Fixes https://github.com/llvm/llvm-project/issues/162922.
Commit: 133ac3ad3fe87f9b3c21748d3421e65977605756
https://github.com/llvm/llvm-project/commit/133ac3ad3fe87f9b3c21748d3421e65977605756
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/DirectedGraph.h
Log Message:
-----------
[ADT] Achieve the "Rule of Zero" in DGNode (#165190)
This patch achieves the "Rule of Zero" in DGNode by removing the
copy/move constructors and copy/move assignment operators.
Note that the code being deleted does a couple of unusual things that
are most likely oversight:
- The copy constructor with "explicit" is highly unusual. This means
that we allow "DGNode<N, E> A(B);" but disallow
"DGNode<N, E> A = B;".
- The move assignment operator with const r-value reference is also
unusual, especially given that the move constructor is correctly
implemented.
Commit: ee25edf2d2a701d31f0777b2a944f1fd130bc0a6
https://github.com/llvm/llvm-project/commit/ee25edf2d2a701d31f0777b2a944f1fd130bc0a6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/PDB/PDBTypes.h
Log Message:
-----------
[DebugInfo] Fold a namespace into a std::hash specialization (NFC) (#165191)
This patch folds "std" into the std::hash specialization so that the
template mentions std::hash. std::hash is much easier to recognize
than std and hash separated by a couple of lines.
Commit: 8983127af58d9a121775759ba5cf1d2d78d27e68
https://github.com/llvm/llvm-project/commit/8983127af58d9a121775759ba5cf1d2d78d27e68
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/Program.h
Log Message:
-----------
[Support] Use "static constexpr" for a constant in ProcessInfo (NFC) (#165192)
Commit: 2bb95311ee3da1b2601bc6428b261e02fde464b9
https://github.com/llvm/llvm-project/commit/2bb95311ee3da1b2601bc6428b261e02fde464b9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/docs/YamlIO.rst
Log Message:
-----------
[llvm] Proofread YamlIO.rst (#165193)
Commit: f19bce31729c2931c43f0b054c28381c6b89f334
https://github.com/llvm/llvm-project/commit/f19bce31729c2931c43f0b054c28381c6b89f334
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-26 (Sun, 26 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
Log Message:
-----------
[AArch64] Remove an unused local variable (NFC) (#165194)
Commit: 1322e71f2baac9d7cfa77cfa5345bfffbff74cf7
https://github.com/llvm/llvm-project/commit/1322e71f2baac9d7cfa77cfa5345bfffbff74cf7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/SpecialCaseList.h
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[SpecialCaseList] Add RadixTree for substring matching (#164545)
This commit adds a new RadixTree to `SpecialCaseList` for handling
substring matches. Previously, `SpecialCaseList` only supported prefix
and suffix matching. With this change, patterns that have neither
prefixes nor suffixes can now be efficiently filtered.
According to SpecialCaseListBM:
Lookup benchmarks (significant improvements):
```
OVERALL_GEOMEAN -0.7809
```
Lookup `*test*` like benchmarks (huge improvements):
```
OVERALL_GEOMEAN -0.9947
```
https://gist.github.com/vitalybuka/ee7f681b448eb18974386ab35e2d4d27
Commit: f8b004dd7bdbebb8377be03ad54ecaf55082273b
https://github.com/llvm/llvm-project/commit/f8b004dd7bdbebb8377be03ad54ecaf55082273b
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
A clang/test/DebugInfo/ObjC/property-synthesized-accessors.m
Log Message:
-----------
[clang][DebugInfo] Don't mark explicit parameter of synthesized ObjC property accessors artificial (#164998)
In the past we used to only mark variables artificial that were
`isImplicit`. We would also omit the location information if the
variable's parent was implicit. Since
https://github.com/llvm/llvm-project/pull/100355 we made the logic to
mark variables as artificial the same as determining whether to omit its
location or not. This was to support binding variable declarations,
which we would like to have line information for (and don't want to mark
artificial as they are explicitly named in source).
However, this doesn't quite do the expected for parameters of
Objective-C synthesised property accessors. An Objective-C setter will
have an explicit parameter, which is the ivar to write to. However,
because the parent (i.e., the synthesised method) is artificial, we now
mark that parameter artificial. This is example debug-info for such an
accessor:
```
0x00000118: DW_TAG_subprogram
DW_AT_low_pc (0x0000000000000044)
DW_AT_high_pc (0x0000000000000078)
DW_AT_frame_base (DW_OP_reg29 W29)
DW_AT_object_pointer (0x00000128)
DW_AT_specification (0x00000068 "-[Foo setFooProp:]")
0x00000128: DW_TAG_formal_parameter
DW_AT_location (DW_OP_fbreg -8)
DW_AT_name ("self")
DW_AT_type (0x00000186 "Foo *")
DW_AT_artificial (true)
0x00000131: DW_TAG_formal_parameter
DW_AT_location (DW_OP_breg31 WSP+16)
DW_AT_name ("_cmd")
DW_AT_type (0x0000018b "SEL")
DW_AT_artificial (true)
0x0000013a: DW_TAG_formal_parameter
DW_AT_location (DW_OP_breg31 WSP+8)
DW_AT_name ("fooProp")
DW_AT_type (0x000000aa "id")
DW_AT_artificial (true)
```
Note how the `fooProp` parameter is marked artificial, although it
technically is an explicitly passed parameter. We want to treat the
synthesised method like any other, where explicitly passed parameters
aren't artificial. But we do want to omit the file/line info because it
doesn't exist in the source.
This patch prevents such parameters from being marked artificial. We
could probably generalise this to any kind of synthesised method, not
just Objective-C. But I'm currently not aware of such synthesised
functions, so made it Objective-C specific for now for testability.
*Motivator*
Marking such parameters artificial makes LLDB fail to parse the ObjC
method and emit an error such as:
```
error: Foo.o [0x00000000000009d7]: invalid Objective-C method DW_TAG_subprogram (DW_TAG_subprogram), please file a bug and attach the file at the start of this error message
```
rdar://163063569
Commit: 29346628e90be9e196c7ff2e20c103432c526f7c
https://github.com/llvm/llvm-project/commit/29346628e90be9e196c7ff2e20c103432c526f7c
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/X86/switch-of-powers-of-two.ll
Log Message:
-----------
[SimplifyCFG] Precommit tests for PR161807 (NFC)
Commit: 00f5a1e30b1b2a28569c5aa24219518135d107d0
https://github.com/llvm/llvm-project/commit/00f5a1e30b1b2a28569c5aa24219518135d107d0
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch-of-powers-of-two.ll
Log Message:
-----------
[SimplifyCFG] Extend `simplifySwitchOfPowersOfTwo` to reachable defaults
Favour a `cttz`-indexed table lookup over an indirect jump table when
the default switch case is reachable, by branching non-power-of-two
inputs to the default case.
Proofs: https://alive2.llvm.org/ce/z/HeRAtf.
Commit: de9e18dc75c432a59e94cecd0cab42909893123a
https://github.com/llvm/llvm-project/commit/de9e18dc75c432a59e94cecd0cab42909893123a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/ptrtoaddr.ll
Log Message:
-----------
[InstCombine] Handle ptrtoaddr in gep of pointer sub fold (#164818)
This extends the `ptradd x, ptrtoint(y) - ptrtoint(x)` to `y`
InstCombine fold to support ptrtoaddr. In the case where x and y have
the same underlying object, this is handled by InstSimplify already. If
the underlying object may differ, the replacement can only be performed
if provenance does not matter.
For pointers with non-address bits we need to be careful here, because
the pattern will return a pointer with the non-address bits of x and the
address bits of y. As such, uses in ptrtoaddr are safe to replace, but
uses in ptrtoint are not. Whether uses in icmp are safe to replace
depends on the outcome of the pending discussion on icmp semantics (I'll
adjust this in https://github.com/llvm/llvm-project/pull/163936 if/when
that lands).
Commit: bc37018a0bcd67d5fd8bfade51ecfd709498c45a
https://github.com/llvm/llvm-project/commit/bc37018a0bcd67d5fd8bfade51ecfd709498c45a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
A clang/test/AST/ByteCode/codegen-cxx20.cpp
Log Message:
-----------
[clang][bytecode] Fail on reads from constexpr-unknown pointers (#164996)
If they aren't const.
Fixes https://github.com/llvm/llvm-project/issues/164985
Commit: e86a42940a2c2c58ba5280ae2d54d58140a42875
https://github.com/llvm/llvm-project/commit/e86a42940a2c2c58ba5280ae2d54d58140a42875
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/mbarrier_arr.ll
A llvm/test/CodeGen/NVPTX/mbarrier_arr_relaxed.ll
A llvm/test/CodeGen/NVPTX/mbarrier_tx.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm80_ptx70.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm80_ptx71.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm90_ptx78.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm90_ptx80.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm90_ptx86.ll
Log Message:
-----------
[NVPTX] Add missing mbarrier intrinsics (#164864)
This patch adds a few more mbarrier intrinsics,
completing support for all the mbarrier variants
up to Blackwell architecture.
* Docs are updated in NVPTXUsage.rst.
* lit tests are added for all the variants.
* lit tests are verified with PTXAS from CUDA-12.8 toolkit.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: aa550cdc5f561e33aab8180ae1c9264a3c66072c
https://github.com/llvm/llvm-project/commit/aa550cdc5f561e33aab8180ae1c9264a3c66072c
Author: Albert Huang <Albert.huang at armchina.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/test/CodeGen/arm-target-features.c
M clang/test/Driver/arm-cortex-cpus-2.c
M clang/test/Misc/target-invalid-cpu-note/arm.c
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/lib/Target/ARM/ARMProcessors.td
M llvm/lib/TargetParser/Host.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[ARM] [AArch32] Add support for Arm China STAR-MC3 CPU (#163709)
STAR-MC3 is an Armv8.1m CPU.
Technical specificationa available at:
https://www.armchina.com/download/Documents/TRM?infoId=240
Commit: efcc6135daf1f44a9bfadf0aa7bdfb0eefe15074
https://github.com/llvm/llvm-project/commit/efcc6135daf1f44a9bfadf0aa7bdfb0eefe15074
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
A clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
A clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
Log Message:
-----------
[Clang][AMDGPU] Enable type-checking on __builtin_amdgcn_raw_ptr_buffer_atomic_{{add|fadd|fmin|fmax}} (#164824)
The "t" flag is used to mark the builtin signature as meaningless.
This is done on several builtins taking pointers since otherwise HIP
code would not compile
during compilation for the host (even if the builtin is only used in
device code, compilation would fail).
The builtins changed by this patch are not affected by this issue, so
they do not need the "t" flag in the first place.
Commit: cf6db6303bb50543522b01a9be55a2e265da4b84
https://github.com/llvm/llvm-project/commit/cf6db6303bb50543522b01a9be55a2e265da4b84
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/shufflevector-reverse.ll
M llvm/test/CodeGen/LoongArch/lsx/shufflevector-reverse.ll
Log Message:
-----------
[LoongArch] Optimize for reversing vector using shufflevector (#163151)
Commit: bcfd6da5dbb3c6bb0c598de7f9bbbae4c42f6ba9
https://github.com/llvm/llvm-project/commit/bcfd6da5dbb3c6bb0c598de7f9bbbae4c42f6ba9
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Target/SPIRV/global-variable.mlir
Log Message:
-----------
[mlir][spirv] Enable validation of global vars tests (#164974)
Currently the target test will fail with:
```
error: line 12: Initializer type must match the data type
%var2 = OpVariable %_ptr_Uniform_float Uniform %var1
```
When passed:
```mlir
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
spirv.GlobalVariable @var1 : !spirv.ptr<f32, Uniform>
spirv.GlobalVariable @var2 initializer(@var1) bind(1, 0) : !spirv.ptr<f32, Uniform>
}
```
The problem is that we try to initialize `f32` pointer with `f32`
pointer, but the validator fails because it expects `var1` to be `f32`,
not a pointer to `f32`. `spirv.GlobalVariable` only allows pointer type,
so in the current design we cannot initialize one `spirv.GlobalVariable`
with another.
So, for now we disallow initialization of one global variable with
another. In the future we may want to re-work global variables if we
want to support that.
Commit: 9af49ee4747e0871f196a643a4e4a362f0e80e43
https://github.com/llvm/llvm-project/commit/9af49ee4747e0871f196a643a4e4a362f0e80e43
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Handle discarded AddrLabelExprs properly (#165000)
emitDummyPtr() doesn't like to be called with DiscardResult set, so
check this first.
Fixes https://github.com/llvm/llvm-project/issues/164979
Commit: 046ed90d3f5189357bcce4cff43ad7739ae72b07
https://github.com/llvm/llvm-project/commit/046ed90d3f5189357bcce4cff43ad7739ae72b07
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Target/SPIRV/function-decorations.mlir
Log Message:
-----------
[mlir][spirv] Ensure function declarations precede definitions (#164956)
SPIR-V spec requires that any calls to external functions are preceded
by declarations of those external functions. To simplify the
implementation, we sort functions in the serializer using a stronger
condition: any functions declarations are moved before any functions
definitions - this ensures that external functions are always declared
before being used.
Commit: 5d1e1cfa086a8ef7e9a74a41f5d626d4d20a3708
https://github.com/llvm/llvm-project/commit/5d1e1cfa086a8ef7e9a74a41f5d626d4d20a3708
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Check memcmp for block pointers (#165070)
We can't read from non-block pointers anyway.
Fixes https://github.com/llvm/llvm-project/issues/165061
Commit: 538c8509efe8bcfcc0b1b6ad40dbc72b735e7fb5
https://github.com/llvm/llvm-project/commit/538c8509efe8bcfcc0b1b6ad40dbc72b735e7fb5
Author: Afanasyev Ivan <ivafanas at gmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/docs/SafeBuffers.rst
Log Message:
-----------
[clang][docs] Fix typos in SafeBuffers.rst (#163547)
Commit: 313b95f3a8d7efaf8970484c169f1a106bc12f68
https://github.com/llvm/llvm-project/commit/313b95f3a8d7efaf8970484c169f1a106bc12f68
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
A lldb/test/API/lang/objc/synthesized-property-accessor/Makefile
A lldb/test/API/lang/objc/synthesized-property-accessor/TestSynthesizedPropertyAccessor.py
A lldb/test/API/lang/objc/synthesized-property-accessor/main.m
Log Message:
-----------
[lldb][test] Add test for parsing Objective-C synthesized properties
Prior to https://github.com/llvm/llvm-project/pull/164998, recent LLDB
versions would fail to parse synthesized property setters correctly. The
only way this failure would manifest is an error to the console:
```
error: main.o [0x00000000000000cd]: invalid Objective-C method DW_TAG_subprogram (DW_TAG_subprogram), please file a bug and attach the file at the start of this error message
```
There weren't any Objective-C tests that failed when the original regression (https://github.com/llvm/llvm-project/pull/100355) landed. This patch adds a test that explicitly checks that the type of the setter is sensible.
This test fails without https://github.com/llvm/llvm-project/pull/164998
and passes with it.
I decided not to check for the absence of the console error because that kind of test would be fragile to the removal of (or any changes to) the error message.
Commit: 33185e7d43c604bd20b061b592437f1c46a14a84
https://github.com/llvm/llvm-project/commit/33185e7d43c604bd20b061b592437f1c46a14a84
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M lldb/docs/use/tutorials/implementing-standalone-scripts.md
Log Message:
-----------
[lldb][docs] Add example output for standalone debugging script
Varies by host but I think it's useful to give some expectation.
Commit: 9a39076d39c62976476fa9a4e0e6e3fbe3a0891c
https://github.com/llvm/llvm-project/commit/9a39076d39c62976476fa9a4e0e6e3fbe3a0891c
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
M llvm/test/DebugInfo/ARM/multiple-constant-uses-drops-dbgloc.ll
M llvm/test/DebugInfo/BPF/extern-void.ll
M llvm/test/DebugInfo/COFF/array-odr-violation.ll
M llvm/test/DebugInfo/COFF/asan-module-ctor.ll
M llvm/test/DebugInfo/COFF/asm.ll
M llvm/test/DebugInfo/COFF/class-options-common.ll
M llvm/test/DebugInfo/COFF/comdat.ll
M llvm/test/DebugInfo/COFF/cpp-mangling.ll
M llvm/test/DebugInfo/COFF/defer-complete-type.ll
M llvm/test/DebugInfo/COFF/enum-co.ll
M llvm/test/DebugInfo/COFF/fpo-argsize.ll
M llvm/test/DebugInfo/COFF/fpo-csrs.ll
M llvm/test/DebugInfo/COFF/fpo-funclet.ll
M llvm/test/DebugInfo/COFF/fpo-realign-alloca.ll
M llvm/test/DebugInfo/COFF/fpo-realign-vframe.ll
M llvm/test/DebugInfo/COFF/fpo-shrink-wrap.ll
M llvm/test/DebugInfo/COFF/fpo-stack-protect.ll
M llvm/test/DebugInfo/COFF/frameproc-flags.ll
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global-constants.ll
M llvm/test/DebugInfo/COFF/global_visibility.ll
M llvm/test/DebugInfo/COFF/globals.ll
M llvm/test/DebugInfo/COFF/inheritance.ll
M llvm/test/DebugInfo/COFF/inlining-files.ll
M llvm/test/DebugInfo/COFF/inlining-header.ll
M llvm/test/DebugInfo/COFF/inlining-levels.ll
M llvm/test/DebugInfo/COFF/inlining-padding.ll
M llvm/test/DebugInfo/COFF/inlining.ll
M llvm/test/DebugInfo/COFF/lambda.ll
M llvm/test/DebugInfo/COFF/lexicalblock.ll
M llvm/test/DebugInfo/COFF/lines-difile.ll
M llvm/test/DebugInfo/COFF/local-constant.ll
M llvm/test/DebugInfo/COFF/local-variable-gap.ll
M llvm/test/DebugInfo/COFF/local-variables.ll
M llvm/test/DebugInfo/COFF/long-name.ll
M llvm/test/DebugInfo/COFF/multifile.ll
M llvm/test/DebugInfo/COFF/multifunction.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/parameter-order.ll
M llvm/test/DebugInfo/COFF/parent-type-scopes.ll
M llvm/test/DebugInfo/COFF/pieces.ll
M llvm/test/DebugInfo/COFF/purge-typedef-udts.ll
M llvm/test/DebugInfo/COFF/register-variables.ll
M llvm/test/DebugInfo/COFF/retained-types.ll
M llvm/test/DebugInfo/COFF/scopes.ll
M llvm/test/DebugInfo/COFF/simple.ll
M llvm/test/DebugInfo/COFF/static-methods.ll
M llvm/test/DebugInfo/COFF/tail-call-without-lexical-scopes.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-array.ll
M llvm/test/DebugInfo/COFF/types-basic.ll
M llvm/test/DebugInfo/COFF/types-calling-conv.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-data-members.ll
M llvm/test/DebugInfo/COFF/types-method-ref-qualifiers.ll
M llvm/test/DebugInfo/COFF/types-recursive-struct.ll
M llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
M llvm/test/DebugInfo/COFF/udts.ll
M llvm/test/DebugInfo/COFF/unnamed.ll
M llvm/test/DebugInfo/COFF/vframe-csr.ll
M llvm/test/DebugInfo/COFF/vframe-fpo.ll
M llvm/test/DebugInfo/COFF/vftables.ll
M llvm/test/DebugInfo/COFF/virtual-method-kinds.ll
M llvm/test/DebugInfo/COFF/virtual-methods.ll
M llvm/test/DebugInfo/COFF/vtable-optzn-array.ll
M llvm/test/DebugInfo/Generic/PR20038.ll
M llvm/test/DebugInfo/Generic/block-asan.ll
M llvm/test/DebugInfo/Generic/constant-pointers.ll
M llvm/test/DebugInfo/Generic/cross-cu-inlining.ll
M llvm/test/DebugInfo/Generic/cross-cu-linkonce.ll
M llvm/test/DebugInfo/Generic/cu-range-hole.ll
M llvm/test/DebugInfo/Generic/cu-ranges.ll
M llvm/test/DebugInfo/Generic/dead-argument-order.ll
M llvm/test/DebugInfo/Generic/debug-info-always-inline.ll
M llvm/test/DebugInfo/Generic/def-line.ll
M llvm/test/DebugInfo/Generic/directives-only.ll
M llvm/test/DebugInfo/Generic/discriminator.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/enum.ll
M llvm/test/DebugInfo/Generic/extended-loc-directive.ll
M llvm/test/DebugInfo/Generic/global-sra-array.ll
M llvm/test/DebugInfo/Generic/global.ll
M llvm/test/DebugInfo/Generic/incorrect-variable-debugloc.ll
M llvm/test/DebugInfo/Generic/incorrect-variable-debugloc1.ll
M llvm/test/DebugInfo/Generic/inline-no-debug-info.ll
M llvm/test/DebugInfo/Generic/inline-scopes.ll
M llvm/test/DebugInfo/Generic/inlined-arguments.ll
M llvm/test/DebugInfo/Generic/inlined-strings.ll
M llvm/test/DebugInfo/Generic/lto-comp-dir.ll
M llvm/test/DebugInfo/Generic/mainsubprogram.ll
M llvm/test/DebugInfo/Generic/member-order.ll
M llvm/test/DebugInfo/Generic/multiline.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/Generic/namespace_function_definition.ll
M llvm/test/DebugInfo/Generic/namespace_inline_function_definition.ll
M llvm/test/DebugInfo/Generic/recursive_inlining.ll
M llvm/test/DebugInfo/Generic/restrict.ll
M llvm/test/DebugInfo/Generic/tu-composite.ll
M llvm/test/DebugInfo/Generic/unconditional-branch.ll
M llvm/test/DebugInfo/Generic/version.ll
M llvm/test/DebugInfo/Inputs/gmlt.ll
M llvm/test/DebugInfo/Inputs/line.ll
M llvm/test/DebugInfo/MSP430/cu-ranges.ll
M llvm/test/DebugInfo/Mips/fn-call-line.ll
M llvm/test/DebugInfo/NVPTX/cu-range-hole.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
M llvm/test/DebugInfo/Sparc/gnu-window-save.ll
M llvm/test/DebugInfo/WebAssembly/dbg-loop-loc.ll
M llvm/test/DebugInfo/WebAssembly/debugtest-opt.ll
M llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
M llvm/test/DebugInfo/X86/DW_AT_stmt_list_sec_offset.ll
M llvm/test/DebugInfo/X86/addr_comments.ll
M llvm/test/DebugInfo/X86/arguments.ll
M llvm/test/DebugInfo/X86/coff_debug_info_type.ll
M llvm/test/DebugInfo/X86/coff_relative_names.ll
M llvm/test/DebugInfo/X86/convert-loclist.ll
M llvm/test/DebugInfo/X86/cu-ranges-odr.ll
M llvm/test/DebugInfo/X86/cu-ranges.ll
M llvm/test/DebugInfo/X86/dbg_value_direct.ll
M llvm/test/DebugInfo/X86/debug-dead-local-var.ll
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/debug-loc-asan.mir
M llvm/test/DebugInfo/X86/debug-loc-offset.mir
M llvm/test/DebugInfo/X86/debug-ranges-offset.ll
M llvm/test/DebugInfo/X86/decl-derived-member.ll
M llvm/test/DebugInfo/X86/discriminator.ll
M llvm/test/DebugInfo/X86/discriminator2.ll
M llvm/test/DebugInfo/X86/discriminator3.ll
M llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
M llvm/test/DebugInfo/X86/dwarf-linkage-names.ll
M llvm/test/DebugInfo/X86/dwarf-pubnames-split.ll
M llvm/test/DebugInfo/X86/fission-inline.ll
M llvm/test/DebugInfo/X86/fission-no-inline-gsym.ll
M llvm/test/DebugInfo/X86/fission-no-inlining.ll
M llvm/test/DebugInfo/X86/fission-ranges.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/ghost-sdnode-dbgvalues.ll
M llvm/test/DebugInfo/X86/gmlt-empty-base-address.ll
M llvm/test/DebugInfo/X86/gnu-public-names-gmlt.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/inline-member-function.ll
M llvm/test/DebugInfo/X86/inline-seldag-test.ll
M llvm/test/DebugInfo/X86/lexical_block.ll
M llvm/test/DebugInfo/X86/line-info.ll
M llvm/test/DebugInfo/X86/low-pc-cu.ll
M llvm/test/DebugInfo/X86/mi-print.ll
M llvm/test/DebugInfo/X86/missing-abstract-variable.ll
M llvm/test/DebugInfo/X86/no_debug_ranges.ll
M llvm/test/DebugInfo/X86/nodebug.ll
M llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
M llvm/test/DebugInfo/X86/objc-property-void.ll
M llvm/test/DebugInfo/X86/pieces-4.ll
M llvm/test/DebugInfo/X86/pr19307.mir
M llvm/test/DebugInfo/X86/pr28270.ll
M llvm/test/DebugInfo/X86/pr45181.ll
M llvm/test/DebugInfo/X86/safestack-byval.ll
M llvm/test/DebugInfo/X86/set.ll
M llvm/test/DebugInfo/X86/spill-nospill.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/tls.ll
M llvm/test/DebugInfo/X86/tu-to-non-named-type.ll
M llvm/test/DebugInfo/X86/void-typedef.ll
Log Message:
-----------
[test][DebugInfo] Remove unsafe-fp-math uses (NFC) (#164966)
Post cleanup for #164534.
Not all attributes are stripped, some of them may affect debug info.
Commit: c40b6904751da529a0436faf72d5d63d35484689
https://github.com/llvm/llvm-project/commit/c40b6904751da529a0436faf72d5d63d35484689
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M lldb/test/API/commands/frame/var-dil/basics/GlobalVariableLookup/TestFrameVarDILGlobalVariableLookup.py
Log Message:
-----------
[lldb][test] TestFrameVarDILGlobalVariableLookup: skip for older DWARF versions
Test fails on the DWARFv2 and DWARFv5 macOS bot with:
```
07:00:39 FAIL: test_frame_var (TestFrameVarDILGlobalVariableLookup.TestFrameVarDILGlobalVariableLookup)
07:00:39 ----------------------------------------------------------------------
07:00:39 Traceback (most recent call last):
07:00:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/decorators.py", line 156, in wrapper
07:00:39 return func(*args, **kwargs)
07:00:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/commands/frame/var-dil/basics/GlobalVariableLookup/TestFrameVarDILGlobalVariableLookup.py", line 48, in test_frame_var
07:00:39 self.expect_var_path("ExtStruct::static_inline", value="16")
07:00:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2599, in expect_var_path
07:00:39 value_check.check_value(self, eval_result, str(eval_result))
07:00:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 302, in check_value
07:00:39 test_base.assertSuccess(val.GetError())
07:00:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2607, in assertSuccess
07:00:39 self.fail(self._formatMessage(msg, "'{}' is not success".format(error)))
07:00:39 AssertionError: '<user expression 0>:1:1: use of undeclared identifier 'ExtStruct::static_inline'
07:00:39 1 | ExtStruct::static_inline
07:00:39 | ^' is not success
07:00:39 Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/lldb-build/bin/clang
```
Possibly something to do with accelerator table differences between the versions.
Commit: 74bb1f435f32e5f329f0d24f7c2c7af179b913b0
https://github.com/llvm/llvm-project/commit/74bb1f435f32e5f329f0d24f7c2c7af179b913b0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M lldb/test/API/commands/frame/var-dil/basics/GlobalVariableLookup/TestFrameVarDILGlobalVariableLookup.py
Log Message:
-----------
[lldb][test] TestFrameVarDILGlobalVariableLookup: XFAIL on older Clang versions
Failing on macOS Clang-15 and Clang-17 bots with:
```
07:26:20 ======================================================================
07:26:20 FAIL: test_frame_var (TestFrameVarDILGlobalVariableLookup.TestFrameVarDILGlobalVariableLookup)
07:26:20 ----------------------------------------------------------------------
07:26:20 Traceback (most recent call last):
07:26:20 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/decorators.py", line 156, in wrapper
07:26:20 return func(*args, **kwargs)
07:26:20 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/commands/frame/var-dil/basics/GlobalVariableLookup/TestFrameVarDILGlobalVariableLookup.py", line 48, in test_frame_var
07:26:20 self.expect_var_path("ExtStruct::static_inline", value="16")
07:26:20 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2599, in expect_var_path
07:26:20 value_check.check_value(self, eval_result, str(eval_result))
07:26:20 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 302, in check_value
07:26:20 test_base.assertSuccess(val.GetError())
07:26:20 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2607, in assertSuccess
07:26:20 self.fail(self._formatMessage(msg, "'{}' is not success".format(error)))
07:26:20 AssertionError: '<user expression 0>:1:1: use of undeclared identifier 'ExtStruct::static_inline'
07:26:20 1 | ExtStruct::static_inline
07:26:20 | ^' is not success
```
I suspect Clang-17 (and earlier) used DWARFv4 on macOS by default. So we
would use the Apple accelerator tables, which didn't index `ExtStruct`
(based on what I observed locally). We already XFAIL this test for
DWARFv4, hence XFAIL it also for older Clang versions.
Commit: 60f20ea465545c9f3fc88354acc71a430424be98
https://github.com/llvm/llvm-project/commit/60f20ea465545c9f3fc88354acc71a430424be98
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
Log Message:
-----------
[AMDGPU] Add target feature for waits before system scope stores. NFC. (#164993)
Commit: d11f0bc56e81c20f6bcc4e914810a3b84630a252
https://github.com/llvm/llvm-project/commit/d11f0bc56e81c20f6bcc4e914810a3b84630a252
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.cpp
Log Message:
-----------
[clang-tidy] Remove unused #include. NFC.
Commit: 67de7106b9f73ed2be804e3488a20332f363359d
https://github.com/llvm/llvm-project/commit/67de7106b9f73ed2be804e3488a20332f363359d
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M lldb/unittests/DAP/Handler/DisconnectTest.cpp
Log Message:
-----------
[lldb-dap][test] Disable DisconnectTriggersTerminateCommands on Linux
It is flaky, see https://github.com/llvm/llvm-project/issues/154763.
Commit: e624048f5cdeb149c951a4c37f4901bb70356aea
https://github.com/llvm/llvm-project/commit/e624048f5cdeb149c951a4c37f4901bb70356aea
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Check overflow ops for block pointers (#165221)
We can't save the result in a non-block pointer.
Fixes https://github.com/llvm/llvm-project/issues/165076
Commit: ff5a7370c81799cb9cffb05d5fb3cc848412cc25
https://github.com/llvm/llvm-project/commit/ff5a7370c81799cb9cffb05d5fb3cc848412cc25
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M lldb/test/API/commands/frame/var-dil/basics/GlobalVariableLookup/TestFrameVarDILGlobalVariableLookup.py
Log Message:
-----------
[lldb][test] TestFrameVarDILGlobalVariableLookup: only XFAIL earlier DWARF versions on macOS
On Linux we would use the manual DWARF index and the failing test assertion (see `c40b6904751da529a0436faf72d5d63d35484689`) would still pass.
Commit: 1f65ab134fcb591ed7d39d960437a5cd19088d08
https://github.com/llvm/llvm-project/commit/1f65ab134fcb591ed7d39d960437a5cd19088d08
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/MIF/CMakeLists.txt
M flang/lib/Optimizer/Support/CMakeLists.txt
Log Message:
-----------
[flang] Fix build on different of cores from #164630 (#164841)
Normally fix incorrect linking introduced
in [#161179](https://github.com/llvm/llvm-project/pull/161179) with
build in parallel.
Commit: e964acf85f6d964fe5a1996289f34759cceeca3f
https://github.com/llvm/llvm-project/commit/e964acf85f6d964fe5a1996289f34759cceeca3f
Author: Lauren <38364197+laurenmchin at users.noreply.github.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
Log Message:
-----------
[DAG] Fold mismatched widened avg idioms to narrow form (#147946) (#163366)
[DAG] Fold mismatched widened avg idioms to narrow form (fixes half of
[llvm#147946](https://github.com/llvm/llvm-project/issues/147946))
1. `trunc(avgceilu(sext(x), sext(y))) -> avgceils(x, y)`
2. `trunc(avgceils(zext(x), zext(y))) -> avgceilu(x, y)`
When inputs are sign-extended, unsigned and signed averaging operations
produce identical results after truncation, allowing us to use the
semantically correct narrow operation.
alive2: https://alive2.llvm.org/ce/z/ZRbfHT
Commit: 6658933288b1175eb741229f21d87e420ba84bee
https://github.com/llvm/llvm-project/commit/6658933288b1175eb741229f21d87e420ba84bee
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/test/MC/AMDGPU/literals.s
M llvm/utils/update_mc_test_checks.py
Log Message:
-----------
[Utils][update_mc_test_checks] Support updating round-trip tests. (#164425)
Commit: f80b27349d4db84351c29595598d07e765516f1a
https://github.com/llvm/llvm-project/commit/f80b27349d4db84351c29595598d07e765516f1a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/AMX/amx-combine-undef.ll
M llvm/test/CodeGen/X86/AMX/amx-combine.ll
M llvm/test/CodeGen/X86/AMX/amx-configO2toO0-lower.ll
M llvm/test/CodeGen/X86/AMX/amx-type.ll
M llvm/test/CodeGen/X86/AMX/lat-combine-amx-bitcast.ll
M llvm/test/CodeGen/X86/AMX/lat-transform-amx-bitcast.ll
M llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O0.ll
M llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O2.ll
Log Message:
-----------
[X86][NewPM] Port X86LowerAMXType to NewPM
To enable the eventual migration of everything to the NewPM.
Reviewers: RKSimon, phoebewang, paperchalice, arsenm, topperc
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/165084
Commit: f29235d6981ed2f7aa96034fe53e4c00d4ede90b
https://github.com/llvm/llvm-project/commit/f29235d6981ed2f7aa96034fe53e4c00d4ede90b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Don't diagnose defined functions that will have a body (#165002)
Don't use `hasBody()`, which checks all declarations.
Fixes https://github.com/llvm/llvm-project/issues/164995
Commit: 20a742cb4fa0e7d133dac2aa6433dc9edb7ae8f4
https://github.com/llvm/llvm-project/commit/20a742cb4fa0e7d133dac2aa6433dc9edb7ae8f4
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M openmp/tools/CMakeLists.txt
M openmp/tools/omptest/test/CMakeLists.txt
Log Message:
-----------
[openmp][cmake] Don't glob for build dependencies (#165231)
LLVM's cmake standard explicitly lists all source in the CMakeLists.txt.
Remove globbing for source files in OpenMP's CMakeLists.txt.
Also see #4899, #71404, https://reviews.llvm.org/D79906,
https://reviews.llvm.org/D31363, https://reviews.llvm.org/D61275,
https://discourse.llvm.org/t/cmake-builds-clang/11536, and CMake's note
at https://cmake.org/cmake/help/latest/command/file.html#glob. Two
reasons to not glob for source files is that it breaks bisecting and
incremental builds. Renaming a file, reverting or checking out an older
reversion where a newly added source file disappears again will not
trigger a CMake configure step and make the build fail because of a
non-existing source file.
Commit: 30f1004bec5fb29625b067885118b0e90104f567
https://github.com/llvm/llvm-project/commit/30f1004bec5fb29625b067885118b0e90104f567
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
A llvm/test/CodeGen/X86/trunc-srl-load.ll
Log Message:
-----------
[X86] Add test coverage for #164853 (#165245)
Show examples of where truncated loads of non-constant, but known
aligned, shift amounts can be folded into address math to avoid
loads/spills of large/illegal scalar integers
Commit: 51cecd3f2ec9881b07fb7c2e4c1fb92408f66eb1
https://github.com/llvm/llvm-project/commit/51cecd3f2ec9881b07fb7c2e4c1fb92408f66eb1
Author: nerix <nerixdev at outlook.de>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
M lldb/test/Shell/SymbolFile/NativePDB/simple-types.cpp
M lldb/test/Shell/SymbolFile/PDB/typedefs.test
Log Message:
-----------
[LLDB][NativePDB] Create simple types from function arguments and return types (#163621)
When creating all types in a compilation unit, simple types (~>
primitive and pointer types) that were only used in function arguments
or return types weren't created as LLDB `Type`s.
With this PR, they're created when creating the function/method types.
This makes it possible to run the `SymbolFile/PDB/typedefs.test` with
both plugins.
Commit: d7e40f3e71654658e249ee481e28aeae0e0410b1
https://github.com/llvm/llvm-project/commit/d7e40f3e71654658e249ee481e28aeae0e0410b1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Call CheckStore() before activating pointers (#165235)
We used to do this the other way around to work around an awkwardness
with CheckStore, namely that we shouldn't check pointers for being
activated when activating them.
Add a parameter to CheckStore instead and call CheckStore() _before_
activating and initializing the pointers in the respective opcode
implementations.
Fixes https://github.com/llvm/llvm-project/issues/164975
Commit: 75737ca3985280d11c8a1513d24e0e4cf730940b
https://github.com/llvm/llvm-project/commit/75737ca3985280d11c8a1513d24e0e4cf730940b
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M libcxx/test/benchmarks/exception_ptr.bench.cpp
Log Message:
-----------
[libc++] Add benchmark for `std::exception_ptr` (#164278)
This commit adds benchmarks for `std::exception_ptr` to set a baseline
in preparation for follow-up optimizations.
Commit: 7d736710c2e251c92df24372e87eaacc8c7c4f5e
https://github.com/llvm/llvm-project/commit/7d736710c2e251c92df24372e87eaacc8c7c4f5e
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/test/MC/AMDGPU/literals.s
Log Message:
-----------
[AMDGPU][MC][NFC] Fix True16 instructions in the literals test. (#164426)
Commit: 1020ec0f31dd2ecca6c7f004c0c5eac0be970449
https://github.com/llvm/llvm-project/commit/1020ec0f31dd2ecca6c7f004c0c5eac0be970449
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/utils/update_mc_test_checks.py
Log Message:
-----------
[Utils][NFC] Clean up update_mc_test_checks.py. (#164454)
Refine the code a bit to make it easier to comprehend the logic.
Commit: 86cd1df2e7fad56f3a41a5e8a168c7800a094456
https://github.com/llvm/llvm-project/commit/86cd1df2e7fad56f3a41a5e8a168c7800a094456
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[clang][Driver][NFC] Remove trailing whitespace from Options.td
Commit: 48cc443a72d639b226038571958a2464f1fc02b2
https://github.com/llvm/llvm-project/commit/48cc443a72d639b226038571958a2464f1fc02b2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Semantics/OpenMP/anonymous-block-data.f90
Log Message:
-----------
[flang][OpenMP] Anonymous BLOCK DATA may not have Symbol at all (#165250)
This fixes https://linaro.atlassian.net/browse/LLVM-2106 and
https://github.com/llvm/llvm-project/issues/164815.
Commit: b2da8eff961fc05a51a9de08c40e805e1f19d81a
https://github.com/llvm/llvm-project/commit/b2da8eff961fc05a51a9de08c40e805e1f19d81a
Author: camc <69519329+camc at users.noreply.github.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Fix crash when array index is past end of array in C (#165186)
Fixes #165090
Make sure to reject invalid array pointer offsets in C.
Co-authored-by: camc <pushy-crop-cartel at duck.com>
Commit: dbd9818db320abc02a055201ba6b069069c09e58
https://github.com/llvm/llvm-project/commit/dbd9818db320abc02a055201ba6b069069c09e58
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCF.h
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
A mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
A mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][scf] Add parallelLoopUnrollByFactors() (#164958)
- In the SCF Utils, add the `parallelLoopUnrollByFactors()` function to
unroll scf::ParallelOp loops according to the specified unroll factors
- Add a test pass "TestParallelLoopUnrolling" and the related LIT test
- Expose `mlir::parallelLoopUnrollByFactors()`,
`mlir::generateUnrolledLoop()`, and `mlir::scf::computeUbMinusLb()`
functions in the mlir/Dialect/SCF/Utils/Utils.h and /IR/SCF.h headers to
make them available to other passes.
- In `mlir::generateUnrolledLoop()`, add an optional `IRMapping *clonedToSrcOpsMap`
argument to map the new cloned operations to their
original ones. In the function body, change the default `AnnotateFn`
type to `static const` to silence potential warnings about dangling
references when a function_ref is assigned to a variable with automatic
storage.
Signed-off-by: Fabrizio Indirli <Fabrizio.Indirli at arm.com>
Commit: 6bf6babb30488df340337923573c562553128706
https://github.com/llvm/llvm-project/commit/6bf6babb30488df340337923573c562553128706
Author: Douglas <Douglas.Gliner at sony.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsARM.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaARM.cpp
M clang/test/CodeGen/builtins-arm-exclusive.c
M clang/test/CodeGenCXX/builtins-arm-exclusive.cpp
M clang/test/Sema/builtins-arm-exclusive-124.c
M clang/test/Sema/builtins-arm-exclusive-4.c
M clang/test/Sema/builtins-arm-exclusive-none.c
M clang/test/Sema/builtins-arm-exclusive.c
Log Message:
-----------
[Clang][ARM][Sema] Check validity of ldrexd/strexd builtin calls (#164919)
This change enables validation checks against the following two ARM
atomic builtins:
```
__builtin_arm_ldrexd
__builtin_arm_strexd
```
Previously, no checks existed for these builtins, so under a release
compiler, it would be possible to emit `ldrexd`/`strexd` under ARM
targets which set the LDREX mask (returned via `getARMLDREXMask`) to
signify these as unsupported instructions.
For example, the following would compile with errors:
```c
> type atomics.c
long long func(void) {
long long num = 0;
__builtin_arm_strex(42, &num);
return __builtin_arm_ldrex(&num);
}
```
```
> clang --target=armv7m-linux-gnueabi -S atomics.c -o -
atomics.c:3:5: error: address argument to load or store exclusive builtin must be a pointer to 1,2
or 4 byte type ('volatile long long *' invalid)
3 | __builtin_arm_strex(42, &num);
| ^
atomics.c:4:12: error: address argument to load or store exclusive builtin must be a pointer to 1,2
or 4 byte type ('const volatile long long *' invalid)
4 | return __builtin_arm_ldrex(&num);
| ^
2 errors generated.
```
However, a similar program would compile without errors:
```c
> type atomics.c
long long func(void) {
long long num = 0;
__builtin_arm_strexd(42, &num);
return __builtin_arm_ldrexd(&num);
}
```
```
> clang --target=armv7m-linux-gnueabi -S atomics.c -o -
...
strexd r1, r2, r3, [r0]
ldrexd r0, r1, [r0]
...
```
With this change, we now have appropriate compile-time errors:
```
> clang --target=armv7m-linux-gnueabi -S atomics.c -o -
atomics.c:3:5: error: load and store exclusive builtins are not available on this architecture
3 | __builtin_arm_strexd(42, &num);
| ^ ~~~~
atomics.c:4:12: error: load and store exclusive builtins are not available on this architecture
4 | return __builtin_arm_ldrexd(&num);
| ^ ~~~~
2 errors generated.
```
Commit: e866c44b4936656ab91b8679044413331a225063
https://github.com/llvm/llvm-project/commit/e866c44b4936656ab91b8679044413331a225063
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M flang/docs/IORuntimeInternals.md
M flang/docs/ModFiles.md
M flang/docs/OpenACC-descriptor-management.md
M flang/docs/OpenMP-semantics.md
M flang/docs/OptionComparison.md
M flang/docs/Parsing.md
M flang/docs/Preprocessing.md
M flang/docs/RuntimeDescriptor.md
M flang/docs/RuntimeTypeInfo.md
Log Message:
-----------
[flang][docs] Replace references to f18 with flang (Part 2)
IntrinsicTypes.md has not been edited because, at the time that this PR was posted, there was another open PR updating that file. The replacement of f18 with flang will either be performed as part of that PR, or in a later commit.
Commit: 2b3a76825fb279c03a6ef8db5d37af6399780e51
https://github.com/llvm/llvm-project/commit/2b3a76825fb279c03a6ef8db5d37af6399780e51
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/PowerPC/P10InstrResources.td
M llvm/lib/Target/PowerPC/P9InstrResources.td
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCBack2BackFusion.def
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-add.ll
M llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
A llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p9.txt
R llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p9vector.txt
Log Message:
-----------
[PowerPC] Update tlbie instruction implementation for ISA3.0+ (#162729)
The instruction `tlbie` changed in ISA3.0.
ISA V2.07: `tlbie RB,RS`
ISA V3.0: `tlbie RB,RS,RIC,PRS,R`, with `tlbie RB,RS` aliased to `tlbie
RB,RS,0,0,0`
Commit: 964b4abe6c10642d29594a39a9291403218e56d6
https://github.com/llvm/llvm-project/commit/964b4abe6c10642d29594a39a9291403218e56d6
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
Log Message:
-----------
[Instrumentation] Fix typos across files in Transforms/Instrumentation (#165251)
Closes #165240.
Commit: 6d54a5e5b83ce3502b7a3488fea5afe1c8bf9c5c
https://github.com/llvm/llvm-project/commit/6d54a5e5b83ce3502b7a3488fea5afe1c8bf9c5c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M .github/workflows/release-binaries.yml
M clang/cmake/caches/Release.cmake
Log Message:
-----------
workflows/release-binaries: Disable flang on Darwin (#164667)
The tests are failing due to
https://github.com/llvm/llvm-project/issues/160546
---------
Co-authored-by: Cullen Rhodes <cullen.rhodes at arm.com>
Commit: a48792af05d33df0f01df624e4b807ce72bd51da
https://github.com/llvm/llvm-project/commit/a48792af05d33df0f01df624e4b807ce72bd51da
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
A lld/test/wasm/lto/cpu-string.ll
Log Message:
-----------
[lld][WebAssembly] Add LTO test for `-mllvm -mcpu=`. NFC (#165170)
Commit: 535197fcef35be44f6da37eaf852ef9a09873f43
https://github.com/llvm/llvm-project/commit/535197fcef35be44f6da37eaf852ef9a09873f43
Author: Kunqiu Chen <camsyn at foxmail.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/test/Transforms/Util/PredicateInfo/condprop.ll
Log Message:
-----------
[PredicateInfo] Reformat PT_Switch's annotation as valid comments (#165249)
Previously, PredicateInfo brutally annotated `PT_Switch` as follows:
```python
f'"; switch predicate info ... CaseValue: ... Switch: {*PS->Switch} Edge: ... RenamedOp: ..."'
```
However, the `switch` instruction in LLVM might cross >1 lines, leading
to the annotation of `PT_Switch` being **illegal comments**, e.g.,
```LLVM
; switch predicate info { CaseValue: i32 1 Switch: switch i32 %x, label %default [
i32 0, label %case0
i32 1, label %case1
i32 2, label %case0
i32 3, label %case3
i32 4, label %default
] Edge: [label %sw,label %case1], RenamedOp: %x }
x.0 = bitcast i32 %x to i32
```
This patch removes the `switch` printing, reformating the `PT_Switch`'s
annotation as follows:
```python
f'"; switch predicate info ... CaseValue: ... Edge: ... RenamedOp: ..."'
```
, e.g.,
```LLVM
; switch predicate info { CaseValue: i32 1 Edge: [label %sw,label %case1], RenamedOp: %x }
x.0 = bitcast i32 %x to i32
```
It should be Okay because `CaseValue: ...` + `Edge: ...` are meaningful
enough for diagnostics, covering the necessary info provided by full
switch printing (E.g., `PT_Branch` also did not print the relevant
branch instruction).
Commit: eb7386033ad7c51ec6de610f3266c58de6b25e8c
https://github.com/llvm/llvm-project/commit/eb7386033ad7c51ec6de610f3266c58de6b25e8c
Author: Jez Ng <jezng at fb.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M lld/MachO/Arch/X86_64.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Relocations.h
M lld/test/MachO/invalid/invalid-relocation-length.yaml
M lld/test/MachO/x86-64-relocs.s
Log Message:
-----------
[lld][macho] Support 1-byte branch relocs for x86_64 (#164439)
Commit: 98727f6a8f85481e1772fc73187d9a9274e57ce4
https://github.com/llvm/llvm-project/commit/98727f6a8f85481e1772fc73187d9a9274e57ce4
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/test/CodeGen/SPIRV/branching/OpSwitch64.ll
Log Message:
-----------
[SPIRV] Print split 64-bit OpSwitch operands as a single operand for text output (#164886)
In binary form, 64-bit values are split into two 32-bit values as per
the spec. Naturally this works fine with all tools.
However, the text format does not have a formal specification but
SPIR-V-Tools, which we already rely on in the SPIRV workflow (clang
calls `spirv-as` for example), expects the full 64 bit value, but today
we print the two 32-bit values. causing the tool to error and report
that the format is invalid.
The SPIR-V Translator also prints a single 64-bit value for text format.
This case is already handled specifically for `OpConstant`, but
`OpSwitch` was missed. The SPIR-V translator also has special code in
`OpSwitch` handling for this case.
Recombine the two 32-bit operands into a single 64-bit value to print in
`AsmPrinter`. The actual ASM (aka binary form) emission is unchanged.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: fc1f3f397e2a21c64b0d241a5a954da81b1efd1a
https://github.com/llvm/llvm-project/commit/fc1f3f397e2a21c64b0d241a5a954da81b1efd1a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M libcxx/include/__config
M libcxx/test/std/depr/depr.c.headers/uchar_h.compile.pass.cpp
R libcxx/test/std/depr/depr.c.headers/uchar_h_char8_t.compile.pass.cpp
M libcxx/test/std/strings/c.strings/cuchar.compile.pass.cpp
R libcxx/test/std/strings/c.strings/cuchar_char8_t.compile.pass.cpp
A libcxx/test/std/strings/c.strings/no_c8rtomb_mbrtoc8.verify.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
Revert "[libcxx] Define `_LIBCPP_HAS_C8RTOMB_MBRTOC8` to true if compiling with clang" (#165268)
Reverts llvm/llvm-project#152724
The PR was merged with broken pre-commit CI.
Commit: 07372fcf6c687208b72df96e763de494fc32ffc0
https://github.com/llvm/llvm-project/commit/07372fcf6c687208b72df96e763de494fc32ffc0
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[MLIR][XeGPU] Remove leading unit dims from vector ops before unrolling (#165030)
This PR uses the upstream populateCastAwayVectorLeadingOneDimPatterns to
remove leading unit dims from vector ops and then do the
unrolling/blocking
Commit: c431ee7ded5fe26bb43a2eb013321c9bd340de2d
https://github.com/llvm/llvm-project/commit/c431ee7ded5fe26bb43a2eb013321c9bd340de2d
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix isEvenlyDistributable API in xegpu (#164907)
Commit: 430d0edb521c33e6bf6e38cd1b7a49b173ef18e7
https://github.com/llvm/llvm-project/commit/430d0edb521c33e6bf6e38cd1b7a49b173ef18e7
Author: Florian Mayer <fmayer at google.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[FlowSensitive] [StatusOr] [8/N] Support value ctor and assignment
Reviewers: jvoung, Xazax-hun
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/163894
Commit: 7fce0ce2a55296f96b809c21782a504e34387207
https://github.com/llvm/llvm-project/commit/7fce0ce2a55296f96b809c21782a504e34387207
Author: Florian Mayer <fmayer at google.com>
Date: 2025-10-27 (Mon, 27 Oct 2025)
Changed paths:
M .ci/monolithic-windows.sh
M .ci/premerge_advisor_upload.py
M .ci/utils.sh
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/release-binaries.yml
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M clang-tools-extra/clang-tidy/ClangTidyCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-typename-cxx98.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-typename.cpp
M clang/cmake/caches/Release.cmake
M clang/docs/ClangOffloadBundler.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/SafeBuffers.rst
M clang/docs/UsersManual.rst
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsARM.def
M clang/include/clang/Basic/BuiltinsHexagon.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PPC.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/sifive_vector.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/c.c
A clang/test/AST/ByteCode/codegen-cxx20.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/unions.cpp
A clang/test/AST/HLSL/matrix-constructors.hlsl
A clang/test/AST/HLSL/matrix-general-initializer.hlsl
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/delete.cpp
M clang/test/CIR/CodeGen/global-init.cpp
A clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
M clang/test/ClangScanDeps/resource_directory.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettk.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettm.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettn.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettnt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtdiscard.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_t_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_v_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtzero_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vtmv_t_v.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/arm-acle-coproc.c
M clang/test/CodeGen/arm-target-features.c
M clang/test/CodeGen/builtins-arm-exclusive.c
M clang/test/CodeGenCXX/builtins-arm-exclusive.cpp
A clang/test/DebugInfo/ObjC/property-synthesized-accessors.m
M clang/test/Driver/aarch64-ptrauth.c
M clang/test/Driver/aarch64-v96a.c
A clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/arm-cortex-cpus-1.c
M clang/test/Driver/arm-cortex-cpus-2.c
M clang/test/Driver/baremetal-multilib-custom-error.yaml
M clang/test/Driver/config-file3.c
M clang/test/Driver/config-zos.c
M clang/test/Driver/config-zos1.c
M clang/test/Driver/fuchsia.c
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Frontend/absolute-paths-symlinks.c
M clang/test/Frontend/cfi-unchecked-callee-attribute.cpp
M clang/test/Misc/target-invalid-cpu-note/arm.c
M clang/test/Modules/crash-vfs-path-symlink-component.m
M clang/test/Modules/crash-vfs-path-traversal.m
M clang/test/Modules/crash-vfs-relative-overlay.m
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/arm-target-features.c
M clang/test/Preprocessor/hexagon-predefines.c
M clang/test/Sema/builtins-arm-exclusive-124.c
M clang/test/Sema/builtins-arm-exclusive-4.c
M clang/test/Sema/builtins-arm-exclusive-none.c
M clang/test/Sema/builtins-arm-exclusive.c
A clang/test/Sema/sifive-xsfmm.c
A clang/test/Sema/sifive_sf_vset_invalid.c
A clang/test/SemaCXX/ptrauth-nested-incomplete-types.cpp
A clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
A clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
A clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl
M clang/test/Tooling/clang-check-pwd.cpp
M clang/tools/driver/cc1_main.cpp
M clang/unittests/Driver/MultilibBuilderTest.cpp
M clang/unittests/Driver/MultilibTest.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/builtins/assembly.h
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
M flang-rt/include/flang-rt/runtime/connection.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/cuda/allocator.cpp
M flang/docs/IORuntimeInternals.md
M flang/docs/ModFiles.md
M flang/docs/OpenACC-descriptor-management.md
M flang/docs/OpenMP-semantics.md
M flang/docs/OptionComparison.md
M flang/docs/Parsing.md
M flang/docs/Preprocessing.md
M flang/docs/RuntimeDescriptor.md
M flang/docs/RuntimeTypeInfo.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Evaluate/call.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Dialect/MIF/CMakeLists.txt
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Parser/cuf-sanity-common
M flang/test/Parser/cuf-sanity-tree.CUF
A flang/test/Preprocessing/bug164727.cuf
A flang/test/Semantics/OpenMP/anonymous-block-data.f90
A flang/test/Semantics/bug1491.f90
A flang/test/Semantics/func-proc-result.f90
A flang/test/Semantics/generic-error.f90
M flang/test/Semantics/null-init.f90
M flang/test/Transforms/debug-assumed-size-array.fir
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/gpu/signal-macros.h
M libc/include/llvm-libc-macros/linux/signal-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/int_hk_t.h
A libc/include/llvm-libc-types/int_hr_t.h
A libc/include/llvm-libc-types/int_k_t.h
A libc/include/llvm-libc-types/int_lk_t.h
A libc/include/llvm-libc-types/int_lr_t.h
A libc/include/llvm-libc-types/int_r_t.h
R libc/include/llvm-libc-types/stdfix-types.h
A libc/include/llvm-libc-types/uint_uhk_t.h
A libc/include/llvm-libc-types/uint_uhr_t.h
A libc/include/llvm-libc-types/uint_uk_t.h
A libc/include/llvm-libc-types/uint_ulk_t.h
A libc/include/llvm-libc-types/uint_ulr_t.h
A libc/include/llvm-libc-types/uint_ur_t.h
M libc/include/stdfix.yaml
M libc/src/setjmp/x86_64/sigsetjmp.cpp
M libc/src/stdfix/CMakeLists.txt
M libc/src/stdfix/bitshk.cpp
M libc/src/stdfix/bitshk.h
M libc/src/stdfix/bitshr.cpp
M libc/src/stdfix/bitshr.h
M libc/src/stdfix/bitsk.cpp
M libc/src/stdfix/bitsk.h
M libc/src/stdfix/bitslk.cpp
M libc/src/stdfix/bitslk.h
M libc/src/stdfix/bitslr.cpp
M libc/src/stdfix/bitslr.h
M libc/src/stdfix/bitsr.cpp
M libc/src/stdfix/bitsr.h
M libc/src/stdfix/bitsuhk.cpp
M libc/src/stdfix/bitsuhk.h
M libc/src/stdfix/bitsuhr.cpp
M libc/src/stdfix/bitsuhr.h
M libc/src/stdfix/bitsuk.cpp
M libc/src/stdfix/bitsuk.h
M libc/src/stdfix/bitsulk.cpp
M libc/src/stdfix/bitsulk.h
M libc/src/stdfix/bitsulr.cpp
M libc/src/stdfix/bitsulr.h
M libc/src/stdfix/bitsur.cpp
M libc/src/stdfix/bitsur.h
M libc/src/stdfix/bitusk.cpp
M libc/src/stdfix/hkbits.h
M libc/src/stdfix/hrbits.h
M libc/src/stdfix/kbits.h
M libc/src/stdfix/lkbits.h
M libc/src/stdfix/lrbits.h
M libc/src/stdfix/rbits.h
M libc/src/stdfix/uhkbits.h
M libc/src/stdfix/uhrbits.h
M libc/src/stdfix/ukbits.h
M libc/src/stdfix/ulkbits.h
M libc/src/stdfix/ulrbits.h
M libc/src/stdfix/urbits.h
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/stdfix/FxBitsTest.h
M libc/test/src/stdfix/bitshk_test.cpp
M libc/test/src/stdfix/bitshr_test.cpp
M libc/test/src/stdfix/bitsk_test.cpp
M libc/test/src/stdfix/bitslk_test.cpp
M libc/test/src/stdfix/bitslr_test.cpp
M libc/test/src/stdfix/bitsr_test.cpp
M libc/test/src/stdfix/bitsuhk_test.cpp
M libc/test/src/stdfix/bitsuhr_test.cpp
M libc/test/src/stdfix/bitsuk_test.cpp
M libc/test/src/stdfix/bitsulk_test.cpp
M libc/test/src/stdfix/bitsulr_test.cpp
M libc/test/src/stdfix/bitsur_test.cpp
M libclc/clc/include/clc/integer/gentype.inc
M libclc/clc/lib/generic/integer/clc_abs.inc
M libcxx/cmake/caches/Armv7Arm.cmake
M libcxx/cmake/caches/Armv7Thumb-no-exceptions.cmake
M libcxx/cmake/caches/Armv8Arm.cmake
M libcxx/cmake/caches/Armv8Thumb-no-exceptions.cmake
M libcxx/cmake/caches/Generic-hardening-mode-debug.cmake
M libcxx/cmake/caches/Generic-hardening-mode-extensive.cmake
M libcxx/cmake/caches/Generic-hardening-mode-fast-with-abi-breaks.cmake
M libcxx/cmake/caches/Generic-hardening-mode-fast.cmake
M libcxx/cmake/caches/Generic-merged.cmake
M libcxx/cmake/caches/Generic-msan.cmake
M libcxx/cmake/caches/Generic-optimized-speed.cmake
M libcxx/cmake/caches/Generic-static.cmake
M libcxx/cmake/caches/Generic-tsan.cmake
M libcxx/cmake/caches/Generic-ubsan.cmake
M libcxx/include/CMakeLists.txt
M libcxx/include/__cxx03/__thread/support/pthread.h
M libcxx/include/__cxx03/cctype
M libcxx/include/__cxx03/cerrno
M libcxx/include/__cxx03/cfenv
M libcxx/include/__cxx03/cfloat
M libcxx/include/__cxx03/cinttypes
R libcxx/include/__cxx03/complex.h
M libcxx/include/__cxx03/cstddef
M libcxx/include/__cxx03/cstdio
R libcxx/include/__cxx03/ctype.h
M libcxx/include/__cxx03/cwctype
R libcxx/include/__cxx03/errno.h
M libcxx/include/__cxx03/ext/__hash
R libcxx/include/__cxx03/fenv.h
R libcxx/include/__cxx03/float.h
R libcxx/include/__cxx03/inttypes.h
R libcxx/include/__cxx03/stdbool.h
R libcxx/include/__cxx03/stddef.h
R libcxx/include/__cxx03/stdio.h
R libcxx/include/__cxx03/tgmath.h
M libcxx/include/__cxx03/wchar.h
R libcxx/include/__cxx03/wctype.h
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__flat_map/flat_multimap.h
M libcxx/include/__flat_set/flat_multiset.h
M libcxx/include/complex.h
M libcxx/include/ctype.h
M libcxx/include/errno.h
M libcxx/include/fenv.h
M libcxx/include/float.h
M libcxx/include/inttypes.h
M libcxx/include/stdbool.h
M libcxx/include/stddef.h
M libcxx/include/stdio.h
M libcxx/include/tgmath.h
M libcxx/include/wctype.h
M libcxx/test/benchmarks/exception_ptr.bench.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.ctor.extents_span.non_unique.pass.cpp
M libcxx/test/libcxx/utilities/utility/__murmur2_or_cityhash.abi-v2.pass.cpp
M libcxx/test/std/iterators/iterator.container/ssize.LWG3207.compile.pass.cpp
M libunwind/src/assembly.h
M libunwind/src/shadow_stack_unwind.h
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Symbols.h
M lld/COFF/Writer.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/MachO/Arch/X86_64.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Relocations.h
A lld/test/COFF/common-dedup.ll
A lld/test/ELF/riscv-vendor-relocations.s
M lld/test/MachO/invalid/invalid-relocation-length.yaml
M lld/test/MachO/x86-64-relocs.s
A lld/test/wasm/lto/cpu-string.ll
A lld/test/wasm/lto/relocation-model.ll
M lld/wasm/LTO.cpp
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/docs/use/tutorials/implementing-standalone-scripts.md
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Host/common/File.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/frame/var-dil/basics/GlobalVariableLookup/TestFrameVarDILGlobalVariableLookup.py
A lldb/test/API/lang/objc/synthesized-property-accessor/Makefile
A lldb/test/API/lang/objc/synthesized-property-accessor/TestSynthesizedPropertyAccessor.py
A lldb/test/API/lang/objc/synthesized-property-accessor/main.m
M lldb/test/API/lua_api/TestLuaAPI.py
M lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
A lldb/test/Shell/ExecControl/StopHook/stop-hook-list.test
M lldb/test/Shell/SymbolFile/NativePDB/simple-types.cpp
M lldb/test/Shell/SymbolFile/PDB/typedefs.test
A lldb/test/Shell/lldb-server/TestErrorMessages.test
R lldb/test/Shell/lldb-server/TestGdbserverErrorMessages.test
R lldb/test/Shell/lldb-server/TestPlatformErrorMessages.test
R lldb/test/Shell/lldb-server/TestPlatformHelp.test
R lldb/test/Shell/lldb-server/TestPlatformSuccessfulStartup.test
M lldb/tools/debugserver/source/MacOSX/arm64/sme_thread_status.h
M lldb/tools/lldb-server/CMakeLists.txt
R lldb/tools/lldb-server/PlatformOptions.td
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/DAP/Handler/DisconnectTest.cpp
M llvm/docs/CIBestPractices.rst
M llvm/docs/CommandGuide/lit.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ProgrammersManual.rst
M llvm/docs/Reference.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/Security.rst
M llvm/docs/YamlIO.rst
M llvm/include/llvm/ADT/Bitfields.h
M llvm/include/llvm/ADT/ConcurrentHashtable.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/DirectedGraph.h
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/include/llvm/ADT/IndexedMap.h
A llvm/include/llvm/ADT/RadixTree.h
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/include/llvm/ADT/ScopedHashTable.h
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/ADT/SparseMultiSet.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/ADT/StringSwitch.h
M llvm/include/llvm/Analysis/DDG.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/InteractiveModelRunner.h
M llvm/include/llvm/Analysis/MLInlineAdvisor.h
M llvm/include/llvm/Analysis/ReleaseModeModelRunner.h
M llvm/include/llvm/Analysis/StackSafetyAnalysis.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameAnalyzer.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/include/llvm/DWARFLinker/Parallel/DWARFLinker.h
M llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFAbbreviationDeclaration.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h
M llvm/include/llvm/DebugInfo/PDB/PDBTypes.h
M llvm/include/llvm/Debuginfod/BuildIDFetcher.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DroppedVariableStatsIR.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsHexagon.td
M llvm/include/llvm/IR/IntrinsicsHexagonDep.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCVXsf.td
M llvm/include/llvm/IR/OptBisect.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/MC/MCDXContainerWriter.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCGOFFObjectWriter.h
M llvm/include/llvm/MC/MCMachObjectWriter.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCWasmObjectWriter.h
M llvm/include/llvm/MC/MCWinCOFFObjectWriter.h
M llvm/include/llvm/MCA/HardwareUnits/LSUnit.h
M llvm/include/llvm/MCA/HardwareUnits/ResourceManager.h
M llvm/include/llvm/MCA/HardwareUnits/Scheduler.h
M llvm/include/llvm/MCA/View.h
M llvm/include/llvm/ObjCopy/ConfigManager.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/include/llvm/Object/MachO.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/include/llvm/Remarks/RemarkLinker.h
M llvm/include/llvm/SandboxIR/BasicBlock.h
M llvm/include/llvm/SandboxIR/PassManager.h
M llvm/include/llvm/Support/DataExtractor.h
M llvm/include/llvm/Support/Program.h
M llvm/include/llvm/Support/Recycler.h
M llvm/include/llvm/Support/SpecialCaseList.h
M llvm/include/llvm/Support/Timer.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TextAPI/SymbolSet.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/XRay/FDRRecords.h
M llvm/include/llvm/XRay/FDRTraceWriter.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/CodeGen/AsmPrinter/AddressPool.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/MC/XCOFFObjectWriter.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/LSP/Protocol.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Support/Timer.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMArchitectures.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMConstantPoolValue.h
M llvm/lib/Target/ARM/ARMFeatures.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMProcessors.td
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AVRRegisterInfo.td
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFTargetLoweringObjectFile.h
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.h
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Hexagon/HexagonDepArch.h
M llvm/lib/Target/Hexagon/HexagonDepArch.td
M llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
M llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
M llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsV65.td
M llvm/lib/Target/Hexagon/HexagonSchedule.td
A llvm/lib/Target/Hexagon/HexagonScheduleV81.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/P10InstrResources.td
M llvm/lib/Target/PowerPC/P9InstrResources.td
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCBack2BackFusion.def
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.h
M llvm/lib/Target/RISCV/RISCVConstantPoolValue.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/lib/Target/RISCV/RISCVScheduleXSf.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/TargetParser/ARMTargetParser.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/ARM/add-cast-vect.ll
M llvm/test/Analysis/CostModel/ARM/cast_ldst.ll
M llvm/test/Analysis/CostModel/ARM/freeshift.ll
M llvm/test/Analysis/CostModel/ARM/gep.ll
M llvm/test/Analysis/CostModel/ARM/immediates.ll
M llvm/test/Analysis/CostModel/ARM/insertelement.ll
M llvm/test/Analysis/CostModel/ARM/load-to-trunc.ll
M llvm/test/Analysis/CostModel/ARM/load_store.ll
M llvm/test/Analysis/CostModel/ARM/logicalop.ll
M llvm/test/Analysis/CostModel/ARM/mul-cast-vect.ll
M llvm/test/Analysis/CostModel/ARM/muls-in-smlal-patterns.ll
M llvm/test/Analysis/CostModel/ARM/muls-in-umull-patterns.ll
M llvm/test/Analysis/CostModel/ARM/select.ll
M llvm/test/Analysis/CostModel/ARM/shl-cast-vect.ll
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
M llvm/test/Analysis/CostModel/ARM/sub-cast-vect.ll
A llvm/test/Analysis/DependenceAnalysis/compute-absolute-value.ll
M llvm/test/Analysis/LoopAccessAnalysis/inbounds-gep-in-predicated-blocks.ll
A llvm/test/Assembler/metadata-annotations.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir
A llvm/test/CodeGen/AArch64/arm64-cvt-simd-fptoi.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
M llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing-gpr.ll
A llvm/test/CodeGen/AArch64/dup-ext-load-combine.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
A llvm/test/CodeGen/AArch64/ldst-prepost-uses.ll
M llvm/test/CodeGen/AArch64/load-zext-bitcast.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll
M llvm/test/CodeGen/AArch64/sme-support-routines-calling-convention.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-s64-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/load-combine-big-endian.ll
M llvm/test/CodeGen/ARM/load-combine.ll
M llvm/test/CodeGen/AVR/dynalloca.ll
A llvm/test/CodeGen/AVR/issue-163015.ll
M llvm/test/CodeGen/BPF/BTF/binary-format.ll
M llvm/test/CodeGen/BPF/BTF/builtin-btf-type-id.ll
M llvm/test/CodeGen/BPF/BTF/char-no-debuginfo.ll
M llvm/test/CodeGen/BPF/BTF/extern-builtin.ll
M llvm/test/CodeGen/BPF/BTF/extern-func-arg.ll
M llvm/test/CodeGen/BPF/BTF/extern-global-var.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/filename.ll
M llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll
M llvm/test/CodeGen/BPF/BTF/func-non-void.ll
M llvm/test/CodeGen/BPF/BTF/func-source.ll
M llvm/test/CodeGen/BPF/BTF/func-typedef.ll
M llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll
M llvm/test/CodeGen/BPF/BTF/func-void.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-1.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-2.ll
M llvm/test/CodeGen/BPF/BTF/local-var.ll
M llvm/test/CodeGen/BPF/BTF/pruning-const.ll
M llvm/test/CodeGen/BPF/BTF/pruning-typedef.ll
M llvm/test/CodeGen/BPF/BTF/static-func.ll
M llvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
M llvm/test/CodeGen/BPF/BTF/static-var-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
M llvm/test/CodeGen/BPF/BTF/static-var.ll
M llvm/test/CodeGen/BPF/BTF/struct-anon-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global.ll
M llvm/test/CodeGen/BPF/CORE/btf-id-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-enum-value.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-exist.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll
M llvm/test/CodeGen/BPF/CORE/no-elf-ama-symbol.ll
M llvm/test/CodeGen/BPF/CORE/no-narrow-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-access-str.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
M llvm/test/CodeGen/BPF/CORE/store-addr.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp2.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative1.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative2.ll
M llvm/test/CodeGen/BPF/callx.ll
M llvm/test/CodeGen/BPF/dwarfdump.ll
M llvm/test/CodeGen/BPF/i128.ll
M llvm/test/CodeGen/BPF/is_trunc_free.ll
M llvm/test/CodeGen/BPF/is_zext_free.ll
M llvm/test/CodeGen/BPF/objdump_two_funcs.ll
M llvm/test/CodeGen/BPF/optnone-1.ll
M llvm/test/CodeGen/BPF/reloc-btf-2.ll
M llvm/test/CodeGen/BPF/reloc-btf.ll
M llvm/test/CodeGen/BPF/simplifycfg.ll
M llvm/test/CodeGen/BPF/warn-stack.ll
M llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags2.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/metadata-stripping.ll
M llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll
M llvm/test/CodeGen/DirectX/strip-rootsignatures.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_scalarize_scatter.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather_SpVV.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vscatter.ll
A llvm/test/CodeGen/Hexagon/masked_gather.ll
A llvm/test/CodeGen/Hexagon/vector-gather.ll
M llvm/test/CodeGen/LoongArch/lasx/shufflevector-reverse.ll
M llvm/test/CodeGen/LoongArch/lsx/shufflevector-reverse.ll
A llvm/test/CodeGen/MIR/AArch64/parse-shufflemask-invalid-scalar.mir
M llvm/test/CodeGen/MIR/AArch64/parse-shufflemask.mir
M llvm/test/CodeGen/Mips/Fast-ISel/br1.ll
M llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
M llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
M llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll
M llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
M llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
M llvm/test/CodeGen/Mips/beqzc.ll
M llvm/test/CodeGen/Mips/beqzc1.ll
M llvm/test/CodeGen/Mips/brsize3.ll
M llvm/test/CodeGen/Mips/brsize3a.ll
M llvm/test/CodeGen/Mips/ci2.ll
M llvm/test/CodeGen/Mips/cmplarge.ll
M llvm/test/CodeGen/Mips/const1.ll
M llvm/test/CodeGen/Mips/const4a.ll
M llvm/test/CodeGen/Mips/const6.ll
M llvm/test/CodeGen/Mips/const6a.ll
M llvm/test/CodeGen/Mips/ctlz.ll
M llvm/test/CodeGen/Mips/delay-slot-fill-forward.ll
M llvm/test/CodeGen/Mips/f16abs.ll
M llvm/test/CodeGen/Mips/fp16instrinsmc.ll
M llvm/test/CodeGen/Mips/fpneeded.ll
M llvm/test/CodeGen/Mips/fpnotneeded.ll
M llvm/test/CodeGen/Mips/hf16call32.ll
M llvm/test/CodeGen/Mips/hf16call32_body.ll
M llvm/test/CodeGen/Mips/hfptrcall.ll
M llvm/test/CodeGen/Mips/l3mc.ll
M llvm/test/CodeGen/Mips/lcb2.ll
M llvm/test/CodeGen/Mips/lcb3c.ll
M llvm/test/CodeGen/Mips/lcb4a.ll
M llvm/test/CodeGen/Mips/lcb5.ll
M llvm/test/CodeGen/Mips/mbrsize4a.ll
M llvm/test/CodeGen/Mips/micromips-attr.ll
M llvm/test/CodeGen/Mips/mips16-hf-attr-2.ll
M llvm/test/CodeGen/Mips/mips16-hf-attr.ll
M llvm/test/CodeGen/Mips/mips16_32_1.ll
M llvm/test/CodeGen/Mips/mips16_32_10.ll
M llvm/test/CodeGen/Mips/mips16_32_3.ll
M llvm/test/CodeGen/Mips/mips16_32_4.ll
M llvm/test/CodeGen/Mips/mips16_32_5.ll
M llvm/test/CodeGen/Mips/mips16_32_6.ll
M llvm/test/CodeGen/Mips/mips16_32_7.ll
M llvm/test/CodeGen/Mips/mips16_32_8.ll
M llvm/test/CodeGen/Mips/mips16_32_9.ll
M llvm/test/CodeGen/Mips/nomips16.ll
M llvm/test/CodeGen/Mips/pbqp-reserved-physreg.ll
M llvm/test/CodeGen/Mips/powif64_16.ll
M llvm/test/CodeGen/Mips/s2rem.ll
M llvm/test/CodeGen/Mips/sel1c.ll
M llvm/test/CodeGen/Mips/sel2c.ll
M llvm/test/CodeGen/Mips/simplebr.ll
M llvm/test/CodeGen/Mips/sr1.ll
M llvm/test/CodeGen/Mips/tnaked.ll
A llvm/test/CodeGen/NVPTX/mbarrier_arr.ll
A llvm/test/CodeGen/NVPTX/mbarrier_arr_relaxed.ll
A llvm/test/CodeGen/NVPTX/mbarrier_tx.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm80_ptx70.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm80_ptx71.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm90_ptx78.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm90_ptx80.ll
A llvm/test/CodeGen/NVPTX/mbarrier_wait_sm90_ptx86.ll
M llvm/test/CodeGen/PowerPC/DisableHoistingDueToBlockHotnessProfileData.mir
M llvm/test/CodeGen/PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir
M llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
M llvm/test/CodeGen/PowerPC/addrfuncstr.ll
M llvm/test/CodeGen/PowerPC/asm-constraints.ll
M llvm/test/CodeGen/PowerPC/asym-regclass-copy.ll
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-R0-special-handling.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
M llvm/test/CodeGen/PowerPC/cr-spills.ll
M llvm/test/CodeGen/PowerPC/crypto_bifs.ll
M llvm/test/CodeGen/PowerPC/ctr-cleanup.ll
M llvm/test/CodeGen/PowerPC/ctrloop-do-not-duplicate-mi.mir
M llvm/test/CodeGen/PowerPC/ctrloop-intrin.ll
M llvm/test/CodeGen/PowerPC/div-e-32.ll
M llvm/test/CodeGen/PowerPC/div-e-all.ll
M llvm/test/CodeGen/PowerPC/extra-toc-reg-deps.ll
M llvm/test/CodeGen/PowerPC/fma-mutate-duplicate-vreg.ll
M llvm/test/CodeGen/PowerPC/frameaddr.ll
M llvm/test/CodeGen/PowerPC/glob-comp-aa-crash.ll
M llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
M llvm/test/CodeGen/PowerPC/isel-rc-nox0.ll
M llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
M llvm/test/CodeGen/PowerPC/mc-instrlat.ll
M llvm/test/CodeGen/PowerPC/negctr.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/ppc-empty-fs.ll
M llvm/test/CodeGen/PowerPC/ppc32-lshrti3.ll
M llvm/test/CodeGen/PowerPC/pr17168.ll
M llvm/test/CodeGen/PowerPC/pr17354.ll
M llvm/test/CodeGen/PowerPC/pr18663-2.ll
M llvm/test/CodeGen/PowerPC/pr24546.ll
M llvm/test/CodeGen/PowerPC/pr27350.ll
M llvm/test/CodeGen/PowerPC/pr28130.ll
M llvm/test/CodeGen/PowerPC/reloc-align.ll
M llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir
M llvm/test/CodeGen/PowerPC/setcr_bc.mir
M llvm/test/CodeGen/PowerPC/setcr_bc2.mir
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-regpressure-high.mir
M llvm/test/CodeGen/PowerPC/sjlj.ll
M llvm/test/CodeGen/PowerPC/stwu-sched.ll
M llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
M llvm/test/CodeGen/PowerPC/unal4-std.ll
M llvm/test/CodeGen/PowerPC/uwtables.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-add.ll
M llvm/test/CodeGen/PowerPC/zero-not-run.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vle.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vlm.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vlse.ll
A llvm/test/CodeGen/RISCV/rv32p.ll
A llvm/test/CodeGen/RISCV/rv64p.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfbfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp32e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa64e.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitch64.ll
M llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll
M llvm/test/CodeGen/X86/AMX/amx-combine-undef.ll
M llvm/test/CodeGen/X86/AMX/amx-combine.ll
M llvm/test/CodeGen/X86/AMX/amx-configO2toO0-lower.ll
M llvm/test/CodeGen/X86/AMX/amx-type.ll
M llvm/test/CodeGen/X86/AMX/lat-combine-amx-bitcast.ll
M llvm/test/CodeGen/X86/AMX/lat-transform-amx-bitcast.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
M llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir
M llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir
M llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O0.ll
M llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O2.ll
M llvm/test/CodeGen/X86/atom-fixup-lea4.ll
M llvm/test/CodeGen/X86/atomic-load-store.ll
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change2.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change3.mir
M llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
M llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
M llvm/test/CodeGen/X86/bit-piece-comment.ll
M llvm/test/CodeGen/X86/catchpad-regmask.ll
M llvm/test/CodeGen/X86/catchpad-weight.ll
M llvm/test/CodeGen/X86/clang-section-coff.ll
M llvm/test/CodeGen/X86/cleanuppad-inalloca.ll
M llvm/test/CodeGen/X86/combine-adc.ll
M llvm/test/CodeGen/X86/combine-sbb.ll
M llvm/test/CodeGen/X86/complex-fastmath.ll
M llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll
M llvm/test/CodeGen/X86/dag-optnone.ll
M llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen.ll
M llvm/test/CodeGen/X86/dbg-combine.ll
M llvm/test/CodeGen/X86/debug-loclists-lto.ll
M llvm/test/CodeGen/X86/debugloc-argsize.ll
M llvm/test/CodeGen/X86/early-cfi-sections.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
M llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
M llvm/test/CodeGen/X86/fdiv.ll
M llvm/test/CodeGen/X86/fma_patterns_wide.ll
M llvm/test/CodeGen/X86/fold-tied-op.ll
M llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
M llvm/test/CodeGen/X86/fp128-g.ll
M llvm/test/CodeGen/X86/fp128-i128.ll
M llvm/test/CodeGen/X86/frame-order.ll
M llvm/test/CodeGen/X86/fsafdo_test2.ll
M llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
M llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
A llvm/test/CodeGen/X86/issue163738.ll
M llvm/test/CodeGen/X86/label-annotation.ll
M llvm/test/CodeGen/X86/label-heapallocsite.ll
M llvm/test/CodeGen/X86/late-remat-update.mir
M llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
M llvm/test/CodeGen/X86/lifetime-alias.ll
M llvm/test/CodeGen/X86/limit-split-cost.mir
M llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll
M llvm/test/CodeGen/X86/misched-copy.ll
M llvm/test/CodeGen/X86/misched-matmul.ll
M llvm/test/CodeGen/X86/movpc32-check.ll
M llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll
M llvm/test/CodeGen/X86/nocf_check.ll
M llvm/test/CodeGen/X86/pr15705.ll
M llvm/test/CodeGen/X86/pr18846.ll
M llvm/test/CodeGen/X86/pr31045.ll
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M llvm/test/CodeGen/X86/pr34080-2.ll
M llvm/test/CodeGen/X86/pr34080.ll
M llvm/test/CodeGen/X86/pr34629.ll
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M llvm/test/CodeGen/X86/pr42727.ll
M llvm/test/CodeGen/X86/pr48064.mir
M llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll
M llvm/test/CodeGen/X86/recip-fastmath.ll
M llvm/test/CodeGen/X86/recip-fastmath2.ll
M llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
M llvm/test/CodeGen/X86/regparm.ll
M llvm/test/CodeGen/X86/seh-catchpad.ll
M llvm/test/CodeGen/X86/seh-except-finally.ll
M llvm/test/CodeGen/X86/seh-no-invokes.ll
M llvm/test/CodeGen/X86/shrinkwrap-hang.ll
M llvm/test/CodeGen/X86/sqrt-fastmath.ll
M llvm/test/CodeGen/X86/sse1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
M llvm/test/CodeGen/X86/stack-protector-3.ll
M llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
M llvm/test/CodeGen/X86/stack_guard_remat.ll
M llvm/test/CodeGen/X86/tail-merge-wineh.ll
M llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
A llvm/test/CodeGen/X86/trunc-srl-load.ll
M llvm/test/CodeGen/X86/unused_stackslots.ll
M llvm/test/CodeGen/X86/uwtables.ll
M llvm/test/CodeGen/X86/vec_int_to_fp.ll
M llvm/test/CodeGen/X86/vector-sqrt.ll
M llvm/test/CodeGen/X86/vector-width-store-merge.ll
M llvm/test/CodeGen/X86/win-cleanuppad.ll
M llvm/test/CodeGen/X86/win32-seh-catchpad.ll
M llvm/test/CodeGen/X86/win32-seh-nested-finally.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
M llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
M llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
M llvm/test/DebugInfo/ARM/multiple-constant-uses-drops-dbgloc.ll
M llvm/test/DebugInfo/BPF/extern-void.ll
M llvm/test/DebugInfo/COFF/array-odr-violation.ll
M llvm/test/DebugInfo/COFF/asan-module-ctor.ll
M llvm/test/DebugInfo/COFF/asm.ll
M llvm/test/DebugInfo/COFF/class-options-common.ll
M llvm/test/DebugInfo/COFF/comdat.ll
M llvm/test/DebugInfo/COFF/cpp-mangling.ll
M llvm/test/DebugInfo/COFF/defer-complete-type.ll
M llvm/test/DebugInfo/COFF/enum-co.ll
M llvm/test/DebugInfo/COFF/fpo-argsize.ll
M llvm/test/DebugInfo/COFF/fpo-csrs.ll
M llvm/test/DebugInfo/COFF/fpo-funclet.ll
M llvm/test/DebugInfo/COFF/fpo-realign-alloca.ll
M llvm/test/DebugInfo/COFF/fpo-realign-vframe.ll
M llvm/test/DebugInfo/COFF/fpo-shrink-wrap.ll
M llvm/test/DebugInfo/COFF/fpo-stack-protect.ll
M llvm/test/DebugInfo/COFF/frameproc-flags.ll
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global-constants.ll
M llvm/test/DebugInfo/COFF/global_visibility.ll
M llvm/test/DebugInfo/COFF/globals.ll
M llvm/test/DebugInfo/COFF/inheritance.ll
M llvm/test/DebugInfo/COFF/inlining-files.ll
M llvm/test/DebugInfo/COFF/inlining-header.ll
M llvm/test/DebugInfo/COFF/inlining-levels.ll
M llvm/test/DebugInfo/COFF/inlining-padding.ll
M llvm/test/DebugInfo/COFF/inlining.ll
M llvm/test/DebugInfo/COFF/lambda.ll
M llvm/test/DebugInfo/COFF/lexicalblock.ll
M llvm/test/DebugInfo/COFF/lines-difile.ll
M llvm/test/DebugInfo/COFF/local-constant.ll
M llvm/test/DebugInfo/COFF/local-variable-gap.ll
M llvm/test/DebugInfo/COFF/local-variables.ll
M llvm/test/DebugInfo/COFF/long-name.ll
M llvm/test/DebugInfo/COFF/multifile.ll
M llvm/test/DebugInfo/COFF/multifunction.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/parameter-order.ll
M llvm/test/DebugInfo/COFF/parent-type-scopes.ll
M llvm/test/DebugInfo/COFF/pieces.ll
M llvm/test/DebugInfo/COFF/purge-typedef-udts.ll
M llvm/test/DebugInfo/COFF/register-variables.ll
M llvm/test/DebugInfo/COFF/retained-types.ll
M llvm/test/DebugInfo/COFF/scopes.ll
M llvm/test/DebugInfo/COFF/simple.ll
M llvm/test/DebugInfo/COFF/static-methods.ll
M llvm/test/DebugInfo/COFF/tail-call-without-lexical-scopes.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-array.ll
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M llvm/test/DebugInfo/COFF/types-calling-conv.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-data-members.ll
M llvm/test/DebugInfo/COFF/types-method-ref-qualifiers.ll
M llvm/test/DebugInfo/COFF/types-recursive-struct.ll
M llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
M llvm/test/DebugInfo/COFF/udts.ll
M llvm/test/DebugInfo/COFF/unnamed.ll
M llvm/test/DebugInfo/COFF/vframe-csr.ll
M llvm/test/DebugInfo/COFF/vframe-fpo.ll
M llvm/test/DebugInfo/COFF/vftables.ll
M llvm/test/DebugInfo/COFF/virtual-method-kinds.ll
M llvm/test/DebugInfo/COFF/virtual-methods.ll
M llvm/test/DebugInfo/COFF/vtable-optzn-array.ll
M llvm/test/DebugInfo/Generic/PR20038.ll
M llvm/test/DebugInfo/Generic/block-asan.ll
M llvm/test/DebugInfo/Generic/constant-pointers.ll
M llvm/test/DebugInfo/Generic/cross-cu-inlining.ll
M llvm/test/DebugInfo/Generic/cross-cu-linkonce.ll
M llvm/test/DebugInfo/Generic/cu-range-hole.ll
M llvm/test/DebugInfo/Generic/cu-ranges.ll
M llvm/test/DebugInfo/Generic/dead-argument-order.ll
M llvm/test/DebugInfo/Generic/debug-info-always-inline.ll
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M llvm/test/DebugInfo/Generic/enum-types.ll
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M llvm/test/DebugInfo/Generic/global-sra-array.ll
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M llvm/test/DebugInfo/Generic/tu-composite.ll
M llvm/test/DebugInfo/Generic/unconditional-branch.ll
M llvm/test/DebugInfo/Generic/version.ll
M llvm/test/DebugInfo/Inputs/gmlt.ll
M llvm/test/DebugInfo/Inputs/line.ll
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M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
M llvm/test/DebugInfo/Sparc/gnu-window-save.ll
M llvm/test/DebugInfo/WebAssembly/dbg-loop-loc.ll
M llvm/test/DebugInfo/WebAssembly/debugtest-opt.ll
M llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
M llvm/test/DebugInfo/X86/DW_AT_stmt_list_sec_offset.ll
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M llvm/test/DebugInfo/X86/debug-loc-asan.mir
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M llvm/test/DebugInfo/X86/debug-ranges-offset.ll
M llvm/test/DebugInfo/X86/decl-derived-member.ll
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M llvm/test/DebugInfo/X86/discriminator3.ll
M llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
M llvm/test/DebugInfo/X86/dwarf-linkage-names.ll
M llvm/test/DebugInfo/X86/dwarf-pubnames-split.ll
M llvm/test/DebugInfo/X86/fission-inline.ll
M llvm/test/DebugInfo/X86/fission-no-inline-gsym.ll
M llvm/test/DebugInfo/X86/fission-no-inlining.ll
M llvm/test/DebugInfo/X86/fission-ranges.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/ghost-sdnode-dbgvalues.ll
M llvm/test/DebugInfo/X86/gmlt-empty-base-address.ll
M llvm/test/DebugInfo/X86/gnu-public-names-gmlt.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/inline-member-function.ll
M llvm/test/DebugInfo/X86/inline-seldag-test.ll
M llvm/test/DebugInfo/X86/lexical_block.ll
M llvm/test/DebugInfo/X86/line-info.ll
M llvm/test/DebugInfo/X86/low-pc-cu.ll
M llvm/test/DebugInfo/X86/mi-print.ll
M llvm/test/DebugInfo/X86/missing-abstract-variable.ll
M llvm/test/DebugInfo/X86/no_debug_ranges.ll
M llvm/test/DebugInfo/X86/nodebug.ll
M llvm/test/DebugInfo/X86/nodebug_with_debug_loc.ll
M llvm/test/DebugInfo/X86/objc-property-void.ll
M llvm/test/DebugInfo/X86/pieces-4.ll
M llvm/test/DebugInfo/X86/pr19307.mir
M llvm/test/DebugInfo/X86/pr28270.ll
M llvm/test/DebugInfo/X86/pr45181.ll
M llvm/test/DebugInfo/X86/safestack-byval.ll
M llvm/test/DebugInfo/X86/set.ll
M llvm/test/DebugInfo/X86/spill-nospill.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/tls.ll
M llvm/test/DebugInfo/X86/tu-to-non-named-type.ll
M llvm/test/DebugInfo/X86/void-typedef.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
M llvm/test/MC/AArch64/FP8/fmmla-diagnostics.s
A llvm/test/MC/AArch64/SME2p3/luti6-diagnostics.s
A llvm/test/MC/AArch64/SME2p3/luti6.s
M llvm/test/MC/AArch64/SVE/bfmmla-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/sdot-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/udot-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fmmla-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fmmla.s
A llvm/test/MC/AArch64/SVE2p3/arithmetic-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/arithmetic.s
A llvm/test/MC/AArch64/SVE2p3/bfmmla-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/bfmmla.s
A llvm/test/MC/AArch64/SVE2p3/cvt-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/cvt.s
A llvm/test/MC/AArch64/SVE2p3/directive-arch-negative.s
A llvm/test/MC/AArch64/SVE2p3/directive-arch_extension-negative.s
A llvm/test/MC/AArch64/SVE2p3/directive-cpu-negative.s
A llvm/test/MC/AArch64/SVE2p3/dot-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/dot.s
A llvm/test/MC/AArch64/SVE2p3/luti6-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/luti6.s
A llvm/test/MC/AArch64/SVE2p3/qshrn-diagnostics.s
A llvm/test/MC/AArch64/SVE2p3/qshrn.s
M llvm/test/MC/AArch64/armv8.4a-mpam.s
A llvm/test/MC/AArch64/armv9.7a-gcie-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-gcie.s
A llvm/test/MC/AArch64/armv9.7a-memsys.s
A llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-mpamv2.s
A llvm/test/MC/AArch64/armv9.7a-mtetc-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-mtetc.s
A llvm/test/MC/AArch64/armv9.7a-tlbid-diagnostics.s
A llvm/test/MC/AArch64/armv9.7a-tlbid.s
A llvm/test/MC/AArch64/neon-fdot-diagnostics.s
A llvm/test/MC/AArch64/neon-fdot.s
A llvm/test/MC/AArch64/neon-fmmla-HtoS-diagnostics.s
A llvm/test/MC/AArch64/neon-fmmla-HtoS.s
A llvm/test/MC/AArch64/neon-fmmla-diagnostics.s
A llvm/test/MC/AArch64/neon-fmmla.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/AMDGPU/literals.s
A llvm/test/MC/AsmParser/comments-x86-darwin-eol-dropped.s
M llvm/test/MC/Disassembler/AArch64/armv8.4a-mpam.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
A llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p9.txt
R llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p9vector.txt
M llvm/test/MC/Disassembler/Xtensa/debug.txt
A llvm/test/MC/ELF/cfi-sframe-cfi-escape-diagnostics.s
A llvm/test/MC/ELF/cfi-sframe-cfi-escape.s
M llvm/test/MC/Hexagon/arch-support.s
A llvm/test/MC/Hexagon/v81_arch.s
M llvm/test/MC/PowerPC/ppc64-encoding-ext.s
M llvm/test/MC/Xtensa/debug.s
M llvm/test/MachineVerifier/test_g_shuffle_vector.mir
A llvm/test/TableGen/intrinsic-manual-name.td
A llvm/test/Transforms/Attributor/range-and-constant-fold.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
A llvm/test/Transforms/InstCombine/constant-vector-insert.ll
A llvm/test/Transforms/InstCombine/ctlz-cttz.ll
M llvm/test/Transforms/InstCombine/ptrtoaddr.ll
M llvm/test/Transforms/InstCombine/scmp.ll
A llvm/test/Transforms/InstCombine/select_with_identical_phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/version-mem-access.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_muladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_submuladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/vectorizable-intrinsic.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_flop7.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr16899.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-last-instruction-different-parents.ll
M llvm/test/Transforms/SLPVectorizer/X86/vector_gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
M llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll
M llvm/test/Transforms/SafeStack/ARM/debug.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
M llvm/test/Transforms/SampleProfile/Inputs/profile-symbol-list.ll
M llvm/test/Transforms/SampleProfile/branch.ll
M llvm/test/Transforms/SampleProfile/csspgo-import-list.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline-debug.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline.ll
M llvm/test/Transforms/SampleProfile/csspgo-summary.ll
M llvm/test/Transforms/SampleProfile/csspgo-use-preinliner.ll
M llvm/test/Transforms/SampleProfile/entry_counts_cold.ll
M llvm/test/Transforms/SampleProfile/entry_counts_missing_dbginfo.ll
M llvm/test/Transforms/SampleProfile/fsafdo_test.ll
M llvm/test/Transforms/SampleProfile/gcc-simple.ll
M llvm/test/Transforms/SampleProfile/inline-act.ll
M llvm/test/Transforms/SampleProfile/misexpect.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-2.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-3.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-4.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp.ll
M llvm/test/Transforms/SampleProfile/offset.ll
M llvm/test/Transforms/SampleProfile/profile-context-order.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker.ll
M llvm/test/Transforms/SampleProfile/profile-topdown-order.ll
M llvm/test/Transforms/SampleProfile/propagate.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-discriminator.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-icp-factor.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-no-debug-info.ll
M llvm/test/Transforms/SampleProfile/remarks.ll
M llvm/test/Transforms/SampleProfile/uniqname.ll
M llvm/test/Transforms/Scalarizer/dbginfo.ll
M llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-cleanuppads.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch-of-powers-of-two.ll
M llvm/test/Transforms/SimplifyCFG/pr50060-constantfold-loopid.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/pr23975.ll
M llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
M llvm/test/Transforms/Util/PredicateInfo/condprop.ll
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-sve-instructions.s
A llvm/test/tools/llvm-profdata/input-wildcard.test
M llvm/tools/llvm-cov/llvm-cov.cpp
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-statistics.cpp
M llvm/tools/llvm-mca/Views/InstructionView.h
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/ADT/CMakeLists.txt
M llvm/unittests/ADT/DenseMapTest.cpp
A llvm/unittests/ADT/RadixTreeTest.cpp
M llvm/unittests/ADT/STLForwardCompatTest.cpp
M llvm/unittests/ADT/SmallVectorTest.cpp
M llvm/unittests/ADT/StringSwitchTest.cpp
M llvm/unittests/ADT/TrieRawHashMapTest.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
M llvm/unittests/CAS/CASTestConfig.h
M llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
M llvm/unittests/IR/ModuleTest.cpp
M llvm/unittests/MC/SystemZ/SystemZMCDisassemblerTest.cpp
M llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
M llvm/unittests/SandboxIR/PassTest.cpp
M llvm/unittests/Support/ScopedPrinterTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/GlobalISel/Patterns.h
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/RegisterBankEmitter.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/lldbDataFormatters.py
M llvm/utils/mlgo-utils/IR2Vec/generateTriplets.py
M llvm/utils/profcheck-xfail.txt
M llvm/utils/update_mc_test_checks.py
M mlir/docs/Bindings/Python.md
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/Affine/Passes.h
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/include/mlir/Dialect/SCF/IR/SCF.h
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensor.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
M mlir/lib/Dialect/OpenMP/Transforms/OpenMPOffloadPrivatizationPrepare.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/IterationGraphSorter.cpp
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir
A mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx11.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
R mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Dialect/AMDGPU/canonicalize.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Affine/unroll.mlir
A mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Vector/vector-mem-transforms.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Target/SPIRV/function-decorations.mlir
M mlir/test/Target/SPIRV/global-variable.mlir
M mlir/test/Transforms/scf-loop-unroll.mlir
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp
A mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/test/python/ir/operation.py
M mlir/tools/mlir-opt/mlir-opt.cpp
M offload/include/OffloadPolicy.h
M offload/include/OpenMP/InternalTypes.h
M offload/include/OpenMP/omp.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/OpenMP/InteropAPI.cpp
M openmp/tools/CMakeLists.txt
M openmp/tools/omptest/test/CMakeLists.txt
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/9307cf7b7ea3...7fce0ce2a552
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