[all-commits] [llvm/llvm-project] c07d30: [webkit.UncountedLambdaCapturesChecker] Add the su...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Fri Oct 24 22:01:13 PDT 2025
Branch: refs/heads/users/vitalybuka/spr/specialcaselist-filtering-globs-with-matching-prefix
Home: https://github.com/llvm/llvm-project
Commit: c07d305718744917ba5dc6693322e13a5c2314df
https://github.com/llvm/llvm-project/commit/c07d305718744917ba5dc6693322e13a5c2314df
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-10-23 (Thu, 23 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Add the support for WTF::ScopeExit and WTF::makeVisitor (#161926)
Lambda passed to WTF::ScopeExit / WTF::makeScopeExit and
WTF::makeVisitor should be ignored by the lambda captures checker so
long as its resulting object doesn't escape the current scope.
Unfortunately, recognizing this pattern generally is too hard to do so
directly hard-code these two function names to the checker.
Commit: 9681705fbc3e16810ed031ca9bdd4b78654a3058
https://github.com/llvm/llvm-project/commit/9681705fbc3e16810ed031ca9bdd4b78654a3058
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
M llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir
M llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir
M llvm/test/CodeGen/X86/atom-fixup-lea4.ll
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change2.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change3.mir
M llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
M llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
M llvm/test/CodeGen/X86/bit-piece-comment.ll
M llvm/test/CodeGen/X86/catchpad-regmask.ll
M llvm/test/CodeGen/X86/catchpad-weight.ll
M llvm/test/CodeGen/X86/clang-section-coff.ll
M llvm/test/CodeGen/X86/cleanuppad-inalloca.ll
M llvm/test/CodeGen/X86/complex-fastmath.ll
M llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll
M llvm/test/CodeGen/X86/dag-optnone.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen.ll
M llvm/test/CodeGen/X86/dbg-combine.ll
M llvm/test/CodeGen/X86/debug-loclists-lto.ll
M llvm/test/CodeGen/X86/debugloc-argsize.ll
M llvm/test/CodeGen/X86/early-cfi-sections.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
M llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
M llvm/test/CodeGen/X86/fdiv.ll
M llvm/test/CodeGen/X86/fma_patterns_wide.ll
M llvm/test/CodeGen/X86/fold-tied-op.ll
M llvm/test/CodeGen/X86/fp128-g.ll
M llvm/test/CodeGen/X86/fp128-i128.ll
M llvm/test/CodeGen/X86/frame-order.ll
M llvm/test/CodeGen/X86/fsafdo_test2.ll
M llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
M llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
M llvm/test/CodeGen/X86/label-annotation.ll
M llvm/test/CodeGen/X86/label-heapallocsite.ll
M llvm/test/CodeGen/X86/late-remat-update.mir
M llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
M llvm/test/CodeGen/X86/lifetime-alias.ll
M llvm/test/CodeGen/X86/limit-split-cost.mir
M llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll
M llvm/test/CodeGen/X86/misched-copy.ll
M llvm/test/CodeGen/X86/misched-matmul.ll
M llvm/test/CodeGen/X86/movpc32-check.ll
M llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll
M llvm/test/CodeGen/X86/nocf_check.ll
M llvm/test/CodeGen/X86/pr15705.ll
M llvm/test/CodeGen/X86/pr18846.ll
M llvm/test/CodeGen/X86/pr31045.ll
M llvm/test/CodeGen/X86/pr32610.ll
M llvm/test/CodeGen/X86/pr34080-2.ll
M llvm/test/CodeGen/X86/pr34080.ll
M llvm/test/CodeGen/X86/pr34629.ll
M llvm/test/CodeGen/X86/pr34634.ll
M llvm/test/CodeGen/X86/pr42727.ll
M llvm/test/CodeGen/X86/pr48064.mir
M llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll
M llvm/test/CodeGen/X86/recip-fastmath.ll
M llvm/test/CodeGen/X86/recip-fastmath2.ll
M llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
M llvm/test/CodeGen/X86/regparm.ll
M llvm/test/CodeGen/X86/seh-catchpad.ll
M llvm/test/CodeGen/X86/seh-except-finally.ll
M llvm/test/CodeGen/X86/seh-no-invokes.ll
M llvm/test/CodeGen/X86/shrinkwrap-hang.ll
M llvm/test/CodeGen/X86/sqrt-fastmath.ll
M llvm/test/CodeGen/X86/sse1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
M llvm/test/CodeGen/X86/stack-protector-3.ll
M llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
M llvm/test/CodeGen/X86/stack_guard_remat.ll
M llvm/test/CodeGen/X86/tail-merge-wineh.ll
M llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
M llvm/test/CodeGen/X86/unused_stackslots.ll
M llvm/test/CodeGen/X86/uwtables.ll
M llvm/test/CodeGen/X86/vec_int_to_fp.ll
M llvm/test/CodeGen/X86/vector-sqrt.ll
M llvm/test/CodeGen/X86/vector-width-store-merge.ll
M llvm/test/CodeGen/X86/win-cleanuppad.ll
M llvm/test/CodeGen/X86/win32-seh-catchpad.ll
M llvm/test/CodeGen/X86/win32-seh-nested-finally.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
M llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
Log Message:
-----------
[test][X86] Remove unsafe-fp-math uses (NFC) (#164814)
Post cleanup for #164534.
Commit: a1e59bdc173187ec47e6ede69c99316eaee9e375
https://github.com/llvm/llvm-project/commit/a1e59bdc173187ec47e6ede69c99316eaee9e375
Author: David Green <david.green at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
A llvm/test/CodeGen/MIR/AArch64/parse-shufflemask-invalid-scalar.mir
M llvm/test/CodeGen/MIR/AArch64/parse-shufflemask.mir
M llvm/test/MachineVerifier/test_g_shuffle_vector.mir
Log Message:
-----------
[GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (#140508)
I'm not sure if this is the best way forward or not, but we have a lot
of issues with forgetting that shuffle_vectors can be scalar again and
again. (There is another example from the recent known-bits code added
recently). As a scalar-dst shuffle vector is just an extract, and a
scalar-source shuffle vector is just a build vector, this patch makes
scalar shuffle vector illegal and adjusts the irbuilder to create the
correct node as required.
Most targets do this already through lowering or combines. Making scalar
shuffles illegal simplifies gisel as a whole, it just requires that
transforms that create shuffles of new sizes to account for the scalar
shuffle being illegal (mostly IRBuilder and LessElements).
Commit: 8ebec3d55123bf1c961df829f5529705004dacc2
https://github.com/llvm/llvm-project/commit/8ebec3d55123bf1c961df829f5529705004dacc2
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/constant-vector-insert.ll
Log Message:
-----------
[InstCombine] Constant fold binops through `vector.insert` (#164624)
This patch improves constant folding through `llvm.vector.insert`. It
does not change anything for fixed-length vectors (which can already be
folded to ConstantVectors for these cases), but folds scalable vectors
that otherwise would not be folded.
These folds preserve the destination vector (which could be undef or
poison), giving targets more freedom in lowering the operations.
Commit: 44331d25949302c3898b71fa5aceaea3d49248b5
https://github.com/llvm/llvm-project/commit/44331d25949302c3898b71fa5aceaea3d49248b5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__cxx03/__thread/support/pthread.h
M libcxx/include/__cxx03/cctype
M libcxx/include/__cxx03/cerrno
M libcxx/include/__cxx03/cfenv
M libcxx/include/__cxx03/cfloat
M libcxx/include/__cxx03/cinttypes
R libcxx/include/__cxx03/complex.h
M libcxx/include/__cxx03/cstddef
M libcxx/include/__cxx03/cstdio
R libcxx/include/__cxx03/ctype.h
M libcxx/include/__cxx03/cwctype
R libcxx/include/__cxx03/errno.h
M libcxx/include/__cxx03/ext/__hash
R libcxx/include/__cxx03/fenv.h
R libcxx/include/__cxx03/float.h
R libcxx/include/__cxx03/inttypes.h
R libcxx/include/__cxx03/stdbool.h
R libcxx/include/__cxx03/stddef.h
R libcxx/include/__cxx03/stdio.h
R libcxx/include/__cxx03/tgmath.h
M libcxx/include/__cxx03/wchar.h
R libcxx/include/__cxx03/wctype.h
M libcxx/include/complex.h
M libcxx/include/ctype.h
M libcxx/include/errno.h
M libcxx/include/fenv.h
M libcxx/include/float.h
M libcxx/include/inttypes.h
M libcxx/include/stdbool.h
M libcxx/include/stddef.h
M libcxx/include/stdio.h
M libcxx/include/tgmath.h
M libcxx/include/wctype.h
Log Message:
-----------
[libc++][C++03] Remove some of the C++03-specific C wrapper headers (#163772)
`include_next` doesn't work very well with the C++03 headers and
modules. Since these specific headers are very self-contained there
isn't much of a reason to split them into C++03/non-C++03 headers, so
let's just remove them. The few C wrapper headers that aren't as
self-contained will be refactored in a separate patch.
Commit: 6b30d2104084eda539278097b6b16215a7c908d7
https://github.com/llvm/llvm-project/commit/6b30d2104084eda539278097b6b16215a7c908d7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 44331d259493
Commit: ea2de9aaa64ac5e20a9c7898864760c1086e0f8c
https://github.com/llvm/llvm-project/commit/ea2de9aaa64ac5e20a9c7898864760c1086e0f8c
Author: Brandon <61314499+brandonxin at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-adc.ll
M llvm/test/CodeGen/X86/combine-sbb.ll
M llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
Log Message:
-----------
[X86] Fold generic ADD/SUB with constants to X86ISD::SUB/ADD (#164316)
Fix #163125
This PR enhances `combineX86AddSub` so that it can handle `X86ISD::SUB(X,Constant)` with `add(X,-Constant)` and other similar cases:
- `X86ISD::ADD(LHS, C)` will fold `sub(-C, LHS)`
- `X86ISD::SUB(LHS, C)` will fold `add(LHS, -C)`
- `X86ISD::SUB(C, RHS)` will fold `add(RHS, -C)`
`CodeGen/X86/dag-update-nodetomatch.ll` is updated because following IR is folded:
```llvm
for.body2:
; ......
; This generates `add t6, Constant:i64<1>`
%indvars.iv.next = add nsw i64 %indvars.iv, 1;
; This generates `X86ISD::SUB t6, Constant:i64<-1>` and folds the previous `add`
%cmp = icmp slt i64 %indvars.iv, -1;
br i1 %cmp, label %for.body2, label %for.cond1.for.inc3_crit_edge.loopexit
```
```diff
- ; CHECK-NEXT: movq (%r15), %rax
- ; CHECK-NEXT: movq %rax, (%r12,%r13,8)
- ; CHECK-NEXT: leaq 1(%r13), %rdx
- ; CHECK-NEXT: cmpq $-1, %r13
- ; CHECK-NEXT: movq %rdx, %r13
+ ; CHECK-NEXT: movq (%r12), %rax
+ ; CHECK-NEXT: movq %rax, (%r13,%r9,8)
+ ; CHECK-NEXT: incq %r9
```
Commit: 27453ce5215969a5e56b4dd5503361ffca3d8835
https://github.com/llvm/llvm-project/commit/27453ce5215969a5e56b4dd5503361ffca3d8835
Author: Ye Tian <939808194 at qq.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[Headers][X86] Allow SLLDQ/SRLDQ byte shift intrinsics to be used in constexpr (#164166)
Support constexpr usage for SLLDQ/SRLDQ byte shift intrinsics
This draft PR adds support for using the following SRLDQ intrinsics in
constant expressions:
- _mm_srli_si128
- _mm256_srli_si256
- _mm_slli_si128
- _mm256_slli_si256
Relevant tests are included.
Fixes #156494
Commit: fc7f34078cdaaecac0100a30cdbcdbcced76fef7
https://github.com/llvm/llvm-project/commit/fc7f34078cdaaecac0100a30cdbcdbcced76fef7
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/test/Dialect/Vector/vector-mem-transforms.mlir
Log Message:
-----------
[mlir][vector][nfc] Update tests for folding mem operations (#164255)
Tests in "fold_maskedload_to_load_all_true_dynamic" excercise folders
for:
* vector.maskedload, vector.maskedstore, vector.scatter,
vector.gather, vector.compressstore, vector.expandload.
This patch renames and documents these tests in accordance with:
* https://mlir.llvm.org/getting_started/TestingGuide/
Note: the updated tests are referenced in the Test Formatting Best
Practices section of the MLIR testing guide:
* https://mlir.llvm.org/getting_started/TestingGuide/#test-formatting-best-practices
Keeping them aligned with the guidelines ensures consistency and clarity
across MLIR’s test suite.
Commit: d522b1b3000f99337fd97059fae441476b000960
https://github.com/llvm/llvm-project/commit/d522b1b3000f99337fd97059fae441476b000960
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M libcxx/include/__config
M libcxx/test/std/depr/depr.c.headers/uchar_h.compile.pass.cpp
A libcxx/test/std/depr/depr.c.headers/uchar_h_char8_t.compile.pass.cpp
M libcxx/test/std/strings/c.strings/cuchar.compile.pass.cpp
A libcxx/test/std/strings/c.strings/cuchar_char8_t.compile.pass.cpp
R libcxx/test/std/strings/c.strings/no_c8rtomb_mbrtoc8.verify.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Define `_LIBCPP_HAS_C8RTOMB_MBRTOC8` to true if compiling with clang (#152724)
Define `_LIBCPP_HAS_C8RTOMB_MBRTOC8` to `1` if compiling with clang.
Some tests involving functionality from `uchar.h`/`cuchar` fail when the
platform or the supporting C library does not provide support for the
corresponding features. These have been xfailed.
This patch will enable the adoption of newer picolibc versions.
Commit: a1a37fedfecccd72fe2c3c8b03327819b9923c55
https://github.com/llvm/llvm-project/commit/a1a37fedfecccd72fe2c3c8b03327819b9923c55
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/global-init.cpp
Log Message:
-----------
[CIR] Support ExplicitCast for ConstantExpr (#164783)
Support the ExplicitCast for ConstantExpr
Commit: 86a2073b5bf5f0b44573b8f7e600040a8cdc8bc2
https://github.com/llvm/llvm-project/commit/86a2073b5bf5f0b44573b8f7e600040a8cdc8bc2
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
A mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
A mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][scf] Add parallelLoopUnrollByFactors() (#163806)
- In the SCF Utils, add the `parallelLoopUnrollByFactors()` function
to unroll scf::ParallelOp loops according to the specified unroll factors
- Add a test pass "TestParallelLoopUnrolling" and the related LIT test
- Expose `mlir::parallelLoopUnrollByFactors()`, `mlir::generateUnrolledLoop()`,
and `mlir::scf::computeUbMinusLb()` functions in the
mlir/Dialect/SCF/Utils/Utils.h header to make them available
to other passes.
- In `mlir::generateUnrolledLoop()`, add also an optional
`IRMapping *clonedToSrcOpsMap` argument to map the new cloned
operations to their original ones.
In the function body, change the default `AnnotateFn` type to
`static const` to silence potential warnings about dangling references
when a function_ref is assigned to a variable with automatic storage.
Signed-off-by: Fabrizio Indirli <Fabrizio.Indirli at arm.com>
Commit: ed87795aa6a0ea7bc49cd9257ff363e220f35872
https://github.com/llvm/llvm-project/commit/ed87795aa6a0ea7bc49cd9257ff363e220f35872
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
Log Message:
-----------
[llvm][docs] Correct description of %t lit substitution (#164397)
%t is currently documented as:
temporary file name unique to the test
https://llvm.org/docs/CommandGuide/lit.html#substitutions
Which I take to mean if the path is a/b/c/tempfile, then %t would be
tempfile. It is not, it's the whole path.
(which is hinted at by %basename_t, but why would you read that if you
didn't need to use it)
As seen in #164396 this can create confusion when people use it as if it
were just the file name.
Make it clear in the docs that this is a unique path, which can be used
to make files or folders.
Commit: 5f8b3c11ad7641e145d5bc79c21f7c0d9d589a59
https://github.com/llvm/llvm-project/commit/5f8b3c11ad7641e145d5bc79c21f7c0d9d589a59
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[AArch64][CostModel] Reduce cost of wider than legal get.active.lane.mask (#163786)
getIntrinsicInstrCost should halve the cost returned by getTypeLegalizationCost
when the return type requires splitting, but we know that the whilelo
(predicate pair) instruction can be used.
When splitting is still required, the cost get_active_lane_mask should also
reflect the additional saturating add required to increment the start value.
Commit: 4f53413ff0a5e33cf6e39f538d4103fe0e310bf4
https://github.com/llvm/llvm-project/commit/4f53413ff0a5e33cf6e39f538d4103fe0e310bf4
Author: SahilPatidar <sahilpatidar60 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp
A llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp
Log Message:
-----------
REAPPLY [ORC] Add automatic shared library resolver for unresolved symbols. #148410 (#164551)
This PR reapplies the changes previously introduced in #148410.
It introduces a redesigned and rebuilt Cling-based auto-loading
workaround that enables scanning libraries and resolving unresolved
symbols within those libraries.
Commit: 92e1be489a9a7a25857060872d6910573dfd41d5
https://github.com/llvm/llvm-project/commit/92e1be489a9a7a25857060872d6910573dfd41d5
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
R mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
R mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
Revert "[mlir][scf] Add parallelLoopUnrollByFactors()" (#164949)
Reverts llvm/llvm-project#163806 due to linking errors on the function
`mlir::scf::computeUbMinusLb`
Commit: fb925b5244012f42bfbd2f4566a6f01789d7412d
https://github.com/llvm/llvm-project/commit/fb925b5244012f42bfbd2f4566a6f01789d7412d
Author: Emilio Cota <ecg at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/Transforms/OpenMPOffloadPrivatizationPrepare.cpp
Log Message:
-----------
[flang][mlir] fix irreflexibility violation of strict weak ordering in #155348 (#164833)
This fixes strict weak ordering checks violations from #155348 when
running these two tests:
mlir/test/Dialect/OpenMP/omp-offload-privatization-prepare.mlir
mlir/test/Dialect/OpenMP/omp-offload-privatization-prepare-by-value.mlir
Sample error:
/stable/src/libcxx/include/__debug_utils/strict_weak_ordering_check.h:50: libc++ Hardening assertion !__comp(*__first + __a), *(__first + __b)) failed: Your comparator is not a valid strict-weak ordering
This is because (x < x) should be false, not true, to meet the
irreflexibility property. (Note that .dominates(x, x) returns true.)
I'm afraid that even after this commit we can't guarantee a strict weak
ordering, because we can't guarantee transitivity of equivalence by
sorting with a strict dominance function. However the tests are not
failing anymore, and I am not at all familiar with this code so I will
leave this concern up to the original author for consideration. (Ideas
without any further context: I would consider a topological sort or
walking a dominator tree.)
Reference on std::sort and strict weak ordering:
https://danlark.org/2022/04/20/changing-stdsort-at-googles-scale-and-beyond/
Commit: 5dfbe84da278126ac8017618af885ffc8581a728
https://github.com/llvm/llvm-project/commit/5dfbe84da278126ac8017618af885ffc8581a728
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 4f53413ff0a5
Commit: f362a4e7a0e587629fbb6f98469a2c6806c8f644
https://github.com/llvm/llvm-project/commit/f362a4e7a0e587629fbb6f98469a2c6806c8f644
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll
Log Message:
-----------
[AArch64] Optimized rdsvl followed by constant mul (#162853)
Currently when RDSVL is followed by constant multiplication, no specific
optimization exist which would leverage the immediate multiplication
operand to generate simpler assembly. This patch adds such optimization
and allow rewrites like these if certain conditions are met:
`(mul (srl (rdsvl 1), 3), x) -> (shl (rdsvl y), z) `
Commit: 2c6c2689c5d631f08fe52844a4b192521fd710d5
https://github.com/llvm/llvm-project/commit/2c6c2689c5d631f08fe52844a4b192521fd710d5
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
Log Message:
-----------
[VPlan] Extend tryToFoldLiveIns to fold binary intrinsics (#161703)
InstSimplifyFolder can fold binary intrinsics, so take the opportunity
to unify code with getOpcodeOrIntrinsicID, and handle the case. The
additional handling of WidenGEP is non-functional, as the GEP is
simplified before it is widened, as the included test shows.
Commit: 332f786a3597442f49a3f7531f3188c8cc14e8fb
https://github.com/llvm/llvm-project/commit/332f786a3597442f49a3f7531f3188c8cc14e8fb
Author: David Green <david.green at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/ldst-prepost-uses.ll
Log Message:
-----------
[DAG][AArch64] Ensure that ResNo is correct for uses of Ptr when considering postinc. (#164810)
We might be looking at a different use, for example in the uses of a
i32,i64,ch preindex load.
Fixes #164775
Commit: 86fd3af1637d64bfe329379ac4af330cfb27e449
https://github.com/llvm/llvm-project/commit/86fd3af1637d64bfe329379ac4af330cfb27e449
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add ext-int64 support (#164389)
This commit adds support for the EXT-INT64 extension added
to the specification here:
https://github.com/arm/tosa-specification/commit/1b690f8e120de2cc9b28a23b9f607225aedafdce
Commit: f8b81b45ba654d6768b98db5041046ba9231df1d
https://github.com/llvm/llvm-project/commit/f8b81b45ba654d6768b98db5041046ba9231df1d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_muladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_submuladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/vectorizable-intrinsic.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_flop7.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr16899.ll
M llvm/test/Transforms/SLPVectorizer/X86/vector_gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
M llvm/test/Transforms/SafeStack/ARM/debug.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
M llvm/test/Transforms/SampleProfile/Inputs/profile-symbol-list.ll
M llvm/test/Transforms/SampleProfile/branch.ll
M llvm/test/Transforms/SampleProfile/csspgo-import-list.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline-debug.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline.ll
M llvm/test/Transforms/SampleProfile/csspgo-summary.ll
M llvm/test/Transforms/SampleProfile/csspgo-use-preinliner.ll
M llvm/test/Transforms/SampleProfile/entry_counts_cold.ll
M llvm/test/Transforms/SampleProfile/entry_counts_missing_dbginfo.ll
M llvm/test/Transforms/SampleProfile/fsafdo_test.ll
M llvm/test/Transforms/SampleProfile/gcc-simple.ll
M llvm/test/Transforms/SampleProfile/inline-act.ll
M llvm/test/Transforms/SampleProfile/misexpect.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-2.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-3.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-4.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp.ll
M llvm/test/Transforms/SampleProfile/offset.ll
M llvm/test/Transforms/SampleProfile/profile-context-order.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker.ll
M llvm/test/Transforms/SampleProfile/profile-topdown-order.ll
M llvm/test/Transforms/SampleProfile/propagate.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-discriminator.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-icp-factor.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-no-debug-info.ll
M llvm/test/Transforms/SampleProfile/remarks.ll
M llvm/test/Transforms/SampleProfile/uniqname.ll
M llvm/test/Transforms/Scalarizer/dbginfo.ll
M llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-cleanuppads.ll
M llvm/test/Transforms/SimplifyCFG/pr50060-constantfold-loopid.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/pr23975.ll
M llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
Log Message:
-----------
[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787)
Post cleanup for #164534.
Commit: 89b18f0304c8a4f7e069fdba92a13d1b939a218f
https://github.com/llvm/llvm-project/commit/89b18f0304c8a4f7e069fdba92a13d1b939a218f
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
A llvm/test/CodeGen/AArch64/arm64-cvt-simd-fptoi.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
Log Message:
-----------
[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)
This is followup patch to #157680, which allows simd fpcvt instructions
to be generated from fptoi(_sat) nodes.
Commit: 9ef60ff7ff187f5d80e745d3047d0f0b1e684cac
https://github.com/llvm/llvm-project/commit/9ef60ff7ff187f5d80e745d3047d0f0b1e684cac
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
[llvm][utils] Improve the StringRef summary provider (#162298)
- check the length of data before casting as `char[N]` because the will
cause lldb to allocate `N` bytes of memory.
---------
Co-authored-by: Dave Lee <davelee.com at gmail.com>
Commit: 2db482d4ea97d4b2a690775655534c2b48695319
https://github.com/llvm/llvm-project/commit/2db482d4ea97d4b2a690775655534c2b48695319
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - Allow shufps/pd shuffles intrinsics to be used in constexpr (#164078)
Resolves #161208
Commit: 357b030f5e62a5891fd6120c02aa28d0874f0a06
https://github.com/llvm/llvm-project/commit/357b030f5e62a5891fd6120c02aa28d0874f0a06
Author: Owen Anderson <resistor at mac.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
A lld/test/riscv-vendor-relocations.s
Log Message:
-----------
[lld] Add infrastructure for handling RISCV vendor-specific relocations. (#159987)
Commit: a2f3811a3d252994c18957fb777c66bba129ccf8
https://github.com/llvm/llvm-project/commit/a2f3811a3d252994c18957fb777c66bba129ccf8
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Add dependency for 4f53413ff0a5e33cf6e39f538d4103fe0e310bf4
Commit: d34ead1ce493c0c1630468a1604764450ef41c77
https://github.com/llvm/llvm-project/commit/d34ead1ce493c0c1630468a1604764450ef41c77
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/test/Driver/aarch64-ptrauth.c
Log Message:
-----------
[PAC][clang] Handle pauthtest environment and ABI in Linux-specific code (#113151)
Since pauthtest is a Linux-specific ABI, it should not be handled in
common driver code.
Commit: 9e7a3ee5ff85a6c6838b20734822d658744e9bf3
https://github.com/llvm/llvm-project/commit/9e7a3ee5ff85a6c6838b20734822d658744e9bf3
Author: Owen Anderson <resistor at mac.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
A lld/test/ELF/riscv-vendor-relocations.s
R lld/test/riscv-vendor-relocations.s
Log Message:
-----------
[lld] Fix RISCV vendor relocation testcase to require RISCV
Fixes test issue introduced in 357b030f5e62a5891fd6120c02aa28d0874f0a06
Commit: c087b8048380e46834c73313bb5d5c4920f7d5a3
https://github.com/llvm/llvm-project/commit/c087b8048380e46834c73313bb5d5c4920f7d5a3
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/test/MC/Disassembler/Xtensa/debug.txt
M llvm/test/MC/Xtensa/debug.s
Log Message:
-----------
[Xtensa] Fix encoding of `break.n` (#155159)
According to the manual, bits 3...0 should be 1101. (1100 is `movi.n`.)
Commit: 7d4430bb7fd488344fba9ecf88f5cd34accaf3be
https://github.com/llvm/llvm-project/commit/7d4430bb7fd488344fba9ecf88f5cd34accaf3be
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add ext-mxfp support for const and cast ops (#163641)
This commit allows const and cast ops with MXFP datatypes through the
validation pass when specification version 1.1.draft is selected.
Note: it doesn't include support for the mxint8 datatype. This will be
added in a separate commit.
Note: this commit adds support as defined in the spec in
https://github.com/arm/tosa-specification/commit/063846a75b9687ab01e58cb3538472bffb3a03b0.
EXT_MXFP extension is considered experimental and subject to breaking
change.
Commit: f5a2e6bb8ff98cdccd0531e22fa3a7875d718fde
https://github.com/llvm/llvm-project/commit/f5a2e6bb8ff98cdccd0531e22fa3a7875d718fde
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
CodeGen: Remove overrides of getSSPStackGuardCheck (NFC) (#164044)
All 3 implementations are just checking if this has the
windows check function, so merge that as the only implementation.
Commit: 6c5770ddaa2769fbc9261d59b50e705a1f463a81
https://github.com/llvm/llvm-project/commit/6c5770ddaa2769fbc9261d59b50e705a1f463a81
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
Log Message:
-----------
RuntimeLibcalls: Avoid reporting __stack_chk_guard as available for msvc (#164133)
The predicate system is currently primitive and alternative call
predicates
should be mutually exclusive.
Commit: 26db21400d5bfe87e2b3d386c8589b56b965b158
https://github.com/llvm/llvm-project/commit/26db21400d5bfe87e2b3d386c8589b56b965b158
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
Log Message:
-----------
Fix link error with shared libraries
/usr/bin/ld: unittests/ExecutionEngine/Orc/CMakeFiles/OrcJITTests.dir/L
ibraryResolverTest.cpp.o: undefined reference to symbol '_ZN4llvm4yaml1
1convertYAMLERNS0_5InputERNS_11raw_ostreamENS_12function_refIFvRKNS_5Tw
ineEEEEjm'
/usr/bin/ld: lib/libLLVMObjectYAML.so.22.0git: error adding symbols: DS
O missing from command line
Commit: fe5f49942eb7b27989b04736bc91e14730dc478d
https://github.com/llvm/llvm-project/commit/fe5f49942eb7b27989b04736bc91e14730dc478d
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Lower G_FMINIMUM and G_FMAXIMUM (#151122)
Add GlobalISel lowering of G_FMINIMUM and G_FMAXIMUM following the same
logic as in SDag's expandFMINIMUM_FMAXIMUM.
Update AMDGPU legalization rules: Pre GFX12 now uses new lowering method
and make G_FMINNUM_IEEE and G_FMAXNUM_IEEE legal to match SDag.
Commit: 76b6399ca2bacd13e8bd0e26c95513c6036a8438
https://github.com/llvm/llvm-project/commit/76b6399ca2bacd13e8bd0e26c95513c6036a8438
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
Log Message:
-----------
DAG: Remove unused TargetLowering field (#164969)
This has been dead since 97bfb936af4077e8cb6c75664231f27a9989d563
Commit: c0b27cf9e5578aba68ac3fca7ad857ccef337f32
https://github.com/llvm/llvm-project/commit/c0b27cf9e5578aba68ac3fca7ad857ccef337f32
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
Revert "[bazel][lldb] Port #162730: tablegen for lldb-server platform ops" (#164981)
Reverts llvm/llvm-project#164832. The corresponding
[#162730](https://github.com/llvm/llvm-project/pull/162730) was reverted
in
https://github.com/llvm/llvm-project/commit/aac036a7f6730118f0d832150243d66b603c3af3.
Commit: f6d8f55a41094bdce401521c0ce31d1ffde7b87a
https://github.com/llvm/llvm-project/commit/f6d8f55a41094bdce401521c0ce31d1ffde7b87a
Author: Nathan Gauër <brioche at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Parse/ParseHLSL.cpp
Log Message:
-----------
[NFC][clang] cleanup dead code (#164977)
Dead code probably left-over of some PR refactoring.
Commit: 426d1fe548b6d10994862e309c169831fbba4c35
https://github.com/llvm/llvm-project/commit/426d1fe548b6d10994862e309c169831fbba4c35
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M offload/include/OffloadPolicy.h
M offload/include/OpenMP/InternalTypes.h
M offload/include/OpenMP/omp.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/OpenMP/InteropAPI.cpp
Log Message:
-----------
[OFFLOAD] Remove weak from __kmpc_* calls and gather them in one header (#164613)
Follow-up from #162652
---------
Co-authored-by: Michael Klemm <michael.klemm at amd.com>
Commit: ab9bdb7ecdac8900217917b80a74b551efd56e84
https://github.com/llvm/llvm-project/commit/ab9bdb7ecdac8900217917b80a74b551efd56e84
Author: David Green <david.green at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
Log Message:
-----------
[AArch64] Add an extra long-multiple test case. NFC
Commit: 26450db480761c0fedf319fc350178798ce7e547
https://github.com/llvm/llvm-project/commit/26450db480761c0fedf319fc350178798ce7e547
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
Log Message:
-----------
AArch64: Use RuntimeLibcallsInfo in SMEAttributes (NFC) (#164968)
Eventually this should be program state, and not part of TargetLowering
so avoid direct references to the libcall functions in it.
The usage of RuntimeLibcallsInfo here is not good though, particularly
the use through TargetTransformInfo. It would be better if the IR
attributes were directly encoded in the libcall definition (or at least made
consistent elsewhere). The parsing of the attributes should not also be
responsible for doing the libcall recognition, which is the only part pulling in
the dependency.
Commit: 83e852e4cf201048186e7cc2883d33ef696f45b4
https://github.com/llvm/llvm-project/commit/83e852e4cf201048186e7cc2883d33ef696f45b4
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsHexagon.td
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsV65.td
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
A llvm/test/CodeGen/Hexagon/autohvx/ripple_scalarize_scatter.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather_SpVV.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vscatter.ll
A llvm/test/CodeGen/Hexagon/masked_gather.ll
A llvm/test/CodeGen/Hexagon/vector-gather.ll
Log Message:
-----------
Add HVX vgather/vscatter Support (#164421)
This patch adds HVX vgather/vscatter genertion for i16, i32, and i8. It
also adds a flag to control generation of scatter/gather instructions
for HVX. Default to "disable".
Co-authored-by: Sergei Larin <slarin at codeaurora.org>
Co-authored-by: Sergei Larin <slarin at quicinc.com>
Co-authored-by: Maxime Schmitt <maxime.schmitt at qti.qualcomm.com>
Commit: 11a293aadb24376cdb627ead888bdddc5867b7aa
https://github.com/llvm/llvm-project/commit/11a293aadb24376cdb627ead888bdddc5867b7aa
Author: Timur Baydyusenov <t.baydyusenov at syntacore.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
A llvm/test/Assembler/metadata-annotations.ll
Log Message:
-----------
[llvm][llvm-dis] Fix 'llvm-dis' with '--materialize-metadata --show-annotations' crashes (#164819)
Commit: 3af73460bcf996862fb5626cb95b89194e77d9bd
https://github.com/llvm/llvm-project/commit/3af73460bcf996862fb5626cb95b89194e77d9bd
Author: Guy David <guyda96 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
A llvm/test/CodeGen/AArch64/dup-ext-load-combine.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/load-zext-bitcast.ll
Log Message:
-----------
[AArch64] Optimize splat of extending loads to avoid GPR->FPR transfer (#163067)
Loads the data into the SIMD register, thus sparing a physical register
and a potentially costly movement of data.
Commit: 986e0feb1d688409236832d9dac65fc900c2bf51
https://github.com/llvm/llvm-project/commit/986e0feb1d688409236832d9dac65fc900c2bf51
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for cast_from/to_block_scaled (#163436)
This commit adds support for the cast_from/to_block_scaled operations
from the ext-mxfp extension. This includes:
- Operation definition in TosaOps.td
- Micro-scaling supported types definition
- Shape inference and verifiers
- Validation pass checks to ensure usage is only valid when the target
environment includes ext-mxfp and at least v1.1.draft of the
specification.
Note: currently it excludes support for mxint8. This will be added in a
later commit.
Note: this commit adds support as defined in the spec in
https://github.com/arm/tosa-specification/commit/063846a75b9687ab01e58cb3538472bffb3a03b0.
EXT_MXFP extension is considered experimental and subject to breaking
change.
Co-authored-by: Tat Wai Chong <tatwai.chong at arm.com>
Commit: c18c3ccd0b48c4055dfdcdc2ff7514ca8ab3dfae
https://github.com/llvm/llvm-project/commit/c18c3ccd0b48c4055dfdcdc2ff7514ca8ab3dfae
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
Log Message:
-----------
Fix unused variable warning in release build
Commit: 202bcc4fa1c7d65b29978f063f5aa82010f1d99d
https://github.com/llvm/llvm-project/commit/202bcc4fa1c7d65b29978f063f5aa82010f1d99d
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-sve-instructions.s
Log Message:
-----------
[AArch64] Fix Neoverse-V2 scheduling information for STNT1 (#164780)
Fix 3 cases in the scheduler tables to match the current SWOG,
in section 3.29 SVE Store: change pipeline V to V01.
Commit: 9824930744d50667aad3539d7936571a6d148a11
https://github.com/llvm/llvm-project/commit/9824930744d50667aad3539d7936571a6d148a11
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M llvm/include/llvm/Support/Timer.h
M llvm/lib/Support/Timer.cpp
Log Message:
-----------
[NFC] Add PrintOnExit parameter to a llvm::TimerGroup (#164407)
Clean up AnalysisConsumer code from the timer-related branches that are
not used most of the time, and move this logic to Timer.cpp, which is a
more relevant place and allows for a cleaner implementation.
Commit: bdec5bf69c74a51ae9de53cc951a42d491d85987
https://github.com/llvm/llvm-project/commit/bdec5bf69c74a51ae9de53cc951a42d491d85987
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-s64-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Combine (or s64, zext(s32)) (#151519)
If we only deal with a one part of 64bit value we can just generate
merge and unmerge which will be either combined away or
selected into copy / mov_b32.
Commit: a1ae9001ebb04a43f15a063663be22b92c3d0eb6
https://github.com/llvm/llvm-project/commit/a1ae9001ebb04a43f15a063663be22b92c3d0eb6
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/test/CodeGen/BPF/BTF/binary-format.ll
M llvm/test/CodeGen/BPF/BTF/builtin-btf-type-id.ll
M llvm/test/CodeGen/BPF/BTF/char-no-debuginfo.ll
M llvm/test/CodeGen/BPF/BTF/extern-builtin.ll
M llvm/test/CodeGen/BPF/BTF/extern-func-arg.ll
M llvm/test/CodeGen/BPF/BTF/extern-global-var.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/filename.ll
M llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll
M llvm/test/CodeGen/BPF/BTF/func-non-void.ll
M llvm/test/CodeGen/BPF/BTF/func-source.ll
M llvm/test/CodeGen/BPF/BTF/func-typedef.ll
M llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll
M llvm/test/CodeGen/BPF/BTF/func-void.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-1.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-2.ll
M llvm/test/CodeGen/BPF/BTF/local-var.ll
M llvm/test/CodeGen/BPF/BTF/pruning-const.ll
M llvm/test/CodeGen/BPF/BTF/pruning-typedef.ll
M llvm/test/CodeGen/BPF/BTF/static-func.ll
M llvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
M llvm/test/CodeGen/BPF/BTF/static-var-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
M llvm/test/CodeGen/BPF/BTF/static-var.ll
M llvm/test/CodeGen/BPF/BTF/struct-anon-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global.ll
M llvm/test/CodeGen/BPF/CORE/btf-id-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-enum-value.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-exist.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll
M llvm/test/CodeGen/BPF/CORE/no-elf-ama-symbol.ll
M llvm/test/CodeGen/BPF/CORE/no-narrow-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-access-str.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
M llvm/test/CodeGen/BPF/CORE/store-addr.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp2.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative1.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative2.ll
M llvm/test/CodeGen/BPF/callx.ll
M llvm/test/CodeGen/BPF/dwarfdump.ll
M llvm/test/CodeGen/BPF/i128.ll
M llvm/test/CodeGen/BPF/is_trunc_free.ll
M llvm/test/CodeGen/BPF/is_zext_free.ll
M llvm/test/CodeGen/BPF/objdump_two_funcs.ll
M llvm/test/CodeGen/BPF/optnone-1.ll
M llvm/test/CodeGen/BPF/reloc-btf-2.ll
M llvm/test/CodeGen/BPF/reloc-btf.ll
M llvm/test/CodeGen/BPF/simplifycfg.ll
M llvm/test/CodeGen/BPF/warn-stack.ll
M llvm/test/CodeGen/BPF/xadd.ll
Log Message:
-----------
[test][BPF] Remove unsafe-fp-math uses (NFC) (#164784)
Post cleanup for #164534.
Also pick suggestion by nikic, remove redundant attributes.
Commit: 30984358ff94f3f71f4ac50ea58f6ab32ccc7c23
https://github.com/llvm/llvm-project/commit/30984358ff94f3f71f4ac50ea58f6ab32ccc7c23
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
A llvm/test/Analysis/DependenceAnalysis/compute-absolute-value.ll
Log Message:
-----------
[DA] Fix absolute value calculation (#164967)
This patch fixes the computation of the absolute value for SCEV.
Previously, it was calculated as `AbsX = SE->isKnownNonNegative(X) ? X :
-X`, which would incorrectly assume that `!isKnownNonNegative` implies
`isKnownNegative`. This assumption does not hold in general, for
example, when `X` is a `SCEVUnknown` and it can be an arbitrary value.
To compute the absolute value properly, we should use
ScalarEvolution::getAbsExpr instead.
Fix #149977
Commit: 22f29d61e50593c46945f100c9ca11fb9c5cca1b
https://github.com/llvm/llvm-project/commit/22f29d61e50593c46945f100c9ca11fb9c5cca1b
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
Log Message:
-----------
[AArch64][SME] Fix incorrect "attributes at callsite do not match" assert (#164991)
Clang always duplicates SME attributes to each callsite, which means
removing "ZA_State_Agnostic" from CalledFn before the assert resulted in
the assertion failing for IR emitted by clang.
I've updated the existing test to match the form emitted by clang (which
previously hit the assert).
Commit: 8a5f15330feb693bc2c3923c0e77ce808382491f
https://github.com/llvm/llvm-project/commit/8a5f15330feb693bc2c3923c0e77ce808382491f
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsHexagon.td
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Preprocessor/hexagon-predefines.c
M llvm/include/llvm/IR/IntrinsicsHexagonDep.td
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Hexagon/HexagonDepArch.h
M llvm/lib/Target/Hexagon/HexagonDepArch.td
M llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
M llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
M llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
M llvm/lib/Target/Hexagon/HexagonSchedule.td
A llvm/lib/Target/Hexagon/HexagonScheduleV81.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/test/MC/Hexagon/arch-support.s
A llvm/test/MC/Hexagon/v81_arch.s
Log Message:
-----------
[Hexagon] Add V81 support to compiler and assembler (#164922)
This patch introduces support for the Hexagon V81 architecture. It
includes instruction formats, definitions, encodings, scheduling
classes, and builtins/intrinsics.
Commit: 734d554fe6f22065e262c43111604c931f505004
https://github.com/llvm/llvm-project/commit/734d554fe6f22065e262c43111604c931f505004
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/test/Driver/fuchsia.c
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll
Log Message:
-----------
De-support SafeStack on non-x86 Fuchsia (#164855)
The Fuchsia Compiler ABI will no longer provide the unsafe stack
for SafeStack on machines other than x86-64. The x86_64-fuchsia
target still both supports -fsanitize=safe-stack and defaults to
it. Fuchsia targets that default to -fsanitize=shadow-call-stack
do not need SafeStack also to be available.
Commit: dc5f2745604d4c5a003e909574b531662b372355
https://github.com/llvm/llvm-project/commit/dc5f2745604d4c5a003e909574b531662b372355
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
A mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx11.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
R mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add explicit intrinsic shape to wmma (#164920)
This is in preparation for adding support for gfx1250 wmma intrinsics
that include much more possible shapes.
Instead of guessing the wave32/wave64 mode based on element types and
vector sizes, require the intrinsic shapes to be set explicitly as
attributes.
Commit: bf553338e5e1e4520d69ef5b34a8659bf3d92492
https://github.com/llvm/llvm-project/commit/bf553338e5e1e4520d69ef5b34a8659bf3d92492
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaObjCProperty.cpp
Log Message:
-----------
[clang][Sema][NFC] Adjust parameter name comment
The parameter is called `isSynthesizedAccessorStub`. This is the only callsite that sets it to `true`. So making it greppable is important.
I tried to find this callsite via `grep` but couldn't. This patch aligns the comment with all the other instances.
Commit: 6034ab3d98bf75fd6e6b231a6601d0536e44c222
https://github.com/llvm/llvm-project/commit/6034ab3d98bf75fd6e6b231a6601d0536e44c222
Author: Mihail Mihov <mihovmihailp+github at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/ctlz-cttz.ll
Log Message:
-----------
[InstCombine] Add CTLZ -> CTTZ simplification (#164733)
This PR adds the simplification `ctlz(~x & (x - 1)) -> bitwidth -
cttz(x, false)` ([Alive2](https://alive2.llvm.org/ce/z/vVDRCu)).
Closes issue #164436
Commit: 4a6c5c6ea845f1dcc32234355d4401659121b13c
https://github.com/llvm/llvm-project/commit/4a6c5c6ea845f1dcc32234355d4401659121b13c
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
Log Message:
-----------
[InstCombine] Fold shifts + selects with -1 to scmp(X, 0) (#164129)
This is because the sign function with 0 tends to be folded to ashr and
other things.
Alive2: https://alive2.llvm.org/ce/z/Q59KvH
Commit: 28e1628ff6b749fddca5fe50d1cc230fd3dce9dd
https://github.com/llvm/llvm-project/commit/28e1628ff6b749fddca5fe50d1cc230fd3dce9dd
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
Log Message:
-----------
[Hexagon] Fix unused variables for #164421 (#165012)
Commit: 8c4d6617d173f6ddde1f6c2866ff2cf19f165d78
https://github.com/llvm/llvm-project/commit/8c4d6617d173f6ddde1f6c2866ff2cf19f165d78
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/MCSFrame.cpp
A llvm/test/MC/ELF/cfi-sframe-cfi-escape-diagnostics.s
A llvm/test/MC/ELF/cfi-sframe-cfi-escape.s
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Sframe] Support cfi_escape directives compatibly with gnu-gas (#161927)
Some cfi_escape directives don't affect sframe unwind info, some do.
Detect those cases appropriately, following gnu-gas for most cases.
Using a full-blown dwarf expression parser allows for somewhat more
precise error detection than other sframe implementations. So this code
is less conservative for long and more involved expressions. It could be
made even more permissive.
Commit: 1297bf2974eea11f25ff4375253ad44e37987a7c
https://github.com/llvm/llvm-project/commit/1297bf2974eea11f25ff4375253ad44e37987a7c
Author: Tim Creech <timothy.m.creech at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
A llvm/test/tools/llvm-profdata/input-wildcard.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Reintroduce use of InitLLVM (#164736)
Before llvm-profdata participated in llvm-driver it directly called
InitLLVM, which takes care of wildcard argument expansion for tools on
Windows. When llvm-driver support was added to llvm-profdata this
InitLLVM call was effectively moved into the common llvm-driver wrapper
mechanism.
More recently, in #162191, llvm-driver support was temporarily backed
out of llvm-profdata due to an issue with `cl::opt` handling. This
change reintroduces the direct call to InitLLVM in order to restore
wildcard expansion and also adds a test for the wildcard expansion on
Windows.
Commit: ab1765d76502707c8c3082039775bcaf3c25f280
https://github.com/llvm/llvm-project/commit/ab1765d76502707c8c3082039775bcaf3c25f280
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
A clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
Log Message:
-----------
[CIR] Upstream trivial constructor const handling (#164849)
This adds handling for records with trivial constructors in CIR's
ConstExprEmitter.
Commit: a1dc546f7f2130b2a9b8c29f24ee57ad9002f5a3
https://github.com/llvm/llvm-project/commit/a1dc546f7f2130b2a9b8c29f24ee57ad9002f5a3
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/int_hk_t.h
A libc/include/llvm-libc-types/int_hr_t.h
A libc/include/llvm-libc-types/int_k_t.h
A libc/include/llvm-libc-types/int_lk_t.h
A libc/include/llvm-libc-types/int_lr_t.h
A libc/include/llvm-libc-types/int_r_t.h
R libc/include/llvm-libc-types/stdfix-types.h
A libc/include/llvm-libc-types/uint_uhk_t.h
A libc/include/llvm-libc-types/uint_uhr_t.h
A libc/include/llvm-libc-types/uint_uk_t.h
A libc/include/llvm-libc-types/uint_ulk_t.h
A libc/include/llvm-libc-types/uint_ulr_t.h
A libc/include/llvm-libc-types/uint_ur_t.h
M libc/include/stdfix.yaml
M libc/src/stdfix/CMakeLists.txt
M libc/src/stdfix/bitshk.cpp
M libc/src/stdfix/bitshk.h
M libc/src/stdfix/bitshr.cpp
M libc/src/stdfix/bitshr.h
M libc/src/stdfix/bitsk.cpp
M libc/src/stdfix/bitsk.h
M libc/src/stdfix/bitslk.cpp
M libc/src/stdfix/bitslk.h
M libc/src/stdfix/bitslr.cpp
M libc/src/stdfix/bitslr.h
M libc/src/stdfix/bitsr.cpp
M libc/src/stdfix/bitsr.h
M libc/src/stdfix/bitsuhk.cpp
M libc/src/stdfix/bitsuhk.h
M libc/src/stdfix/bitsuhr.cpp
M libc/src/stdfix/bitsuhr.h
M libc/src/stdfix/bitsuk.cpp
M libc/src/stdfix/bitsuk.h
M libc/src/stdfix/bitsulk.cpp
M libc/src/stdfix/bitsulk.h
M libc/src/stdfix/bitsulr.cpp
M libc/src/stdfix/bitsulr.h
M libc/src/stdfix/bitsur.cpp
M libc/src/stdfix/bitsur.h
M libc/src/stdfix/bitusk.cpp
M libc/src/stdfix/hkbits.h
M libc/src/stdfix/hrbits.h
M libc/src/stdfix/kbits.h
M libc/src/stdfix/lkbits.h
M libc/src/stdfix/lrbits.h
M libc/src/stdfix/rbits.h
M libc/src/stdfix/uhkbits.h
M libc/src/stdfix/uhrbits.h
M libc/src/stdfix/ukbits.h
M libc/src/stdfix/ulkbits.h
M libc/src/stdfix/ulrbits.h
M libc/src/stdfix/urbits.h
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/stdfix/FxBitsTest.h
M libc/test/src/stdfix/bitshk_test.cpp
M libc/test/src/stdfix/bitshr_test.cpp
M libc/test/src/stdfix/bitsk_test.cpp
M libc/test/src/stdfix/bitslk_test.cpp
M libc/test/src/stdfix/bitslr_test.cpp
M libc/test/src/stdfix/bitsr_test.cpp
M libc/test/src/stdfix/bitsuhk_test.cpp
M libc/test/src/stdfix/bitsuhr_test.cpp
M libc/test/src/stdfix/bitsuk_test.cpp
M libc/test/src/stdfix/bitsulk_test.cpp
M libc/test/src/stdfix/bitsulr_test.cpp
M libc/test/src/stdfix/bitsur_test.cpp
Log Message:
-----------
[libc] add missing headers in stdfix (#162078)
Fixes https://github.com/llvm/llvm-project/issues/129361
@michaelrj-google @PiJoules
---------
Signed-off-by: Shreeyash Pandey <shreeyash335 at gmail.com>
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: c576c6b41f574d7467acd84cb63c81509752cece
https://github.com/llvm/llvm-project/commit/c576c6b41f574d7467acd84cb63c81509752cece
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
Log Message:
-----------
[flang][cuda] Remove error check from allocation and free call (#165022)
As in https://github.com/llvm/llvm-project/pull/164463, do not do error
checking in the runtime itself but let error go through as user might
want to catch them for error recovery.
Commit: 704240125ddf17b9b4995871af3759c742a202ba
https://github.com/llvm/llvm-project/commit/704240125ddf17b9b4995871af3759c742a202ba
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/MC/PowerPC/ppc64-encoding-ext.s
Log Message:
-----------
[PowerPC][NFC] Add new mtpidr alias introduced in ISA3.0 (#163989)
Add new alias `m[tf]pidr` for `m[tf]spr 48` introduced in ISA3.0.
Commit: 621ed04e28787ade92b98e296332ac71d1b81678
https://github.com/llvm/llvm-project/commit/621ed04e28787ade92b98e296332ac71d1b81678
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[MLIR][XeGPU]Enhance Pack/Unpack for XeGPUUnroll (#163459)
This PR changes the pack/unpack method used for unrolling to allow for
lower rank slice to be extracted and inserted from and to src vector by
adding reshapes. It also removes leading unit dims from inst_data if
there are any.
Commit: 224f18e549c42233e1cc597873803a183927dfb3
https://github.com/llvm/llvm-project/commit/224f18e549c42233e1cc597873803a183927dfb3
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/delete.cpp
Log Message:
-----------
[CIR] Handle operator delete with virtual destructors (#165010)
This adds support for emitting operator delete when used with classes
that have a virtual destructor.
Commit: 6de1c25d6ba2a22167160ff80f4875b312e79dcd
https://github.com/llvm/llvm-project/commit/6de1c25d6ba2a22167160ff80f4875b312e79dcd
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/FileManager.h
M clang/lib/Basic/FileManager.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/tools/driver/cc1_main.cpp
Log Message:
-----------
[clang] Don't require `FileManager` for creating an output file (#164665)
Conceptually, the `CompilerInstance` doesn't need an instance of the
`FileManager` to create an output file. This PR enables that, removing
an edge-case in `cc1_main()`.
Commit: 1e84cb7de2e2e5d1b710521f55e75d4ff5e8fd0f
https://github.com/llvm/llvm-project/commit/1e84cb7de2e2e5d1b710521f55e75d4ff5e8fd0f
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCVXsf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/lib/Target/RISCV/RISCVScheduleXSf.td
A llvm/test/CodeGen/RISCV/rvv/sf_vfbfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp32e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa64e.ll
Log Message:
-----------
[RISCV] Add LLVM IR intrinsics and codegen for XSfvfexp* and XSfvfexpa* (#164499)
This patch adds LLVM IR intrinsics and basic codegen support for the
XSfvfexp* and XSfvfexpa* extensions.
---------
Co-authored-by: Jesse Huang <jesse.huang at sifive.com>
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 17abc16d7b76addee09d37dfd20247f0c890c3d8
https://github.com/llvm/llvm-project/commit/17abc16d7b76addee09d37dfd20247f0c890c3d8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
A llvm/test/CodeGen/RISCV/rv32p.ll
A llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Support codegen for some scalar P extension instructions. (#164359)
This includes sext.b, sext.h, min/max, rev8, clz(w), and abs.
Test cases copied from rv32zbb.ll and rv64zbb.ll and pruned to what was
needed for P. Eventually we should merge these back into a single test
file, but I wanted to keep P separated while it is experimental.
Commit: 4e7a8456b316bb20874cc1343747b36869eab7a2
https://github.com/llvm/llvm-project/commit/4e7a8456b316bb20874cc1343747b36869eab7a2
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
Log Message:
-----------
[lldb] Improve error logging in test (NFC)
Commit: 50eb8659340d4cf318ea208547fa3413caf5e76b
https://github.com/llvm/llvm-project/commit/50eb8659340d4cf318ea208547fa3413caf5e76b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Remove unused 'build_flang' variables (#164547)
Commit: fb87708317e28573151d588bd117701dd77f2e16
https://github.com/llvm/llvm-project/commit/fb87708317e28573151d588bd117701dd77f2e16
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/sifive_vector.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettk.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettm.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettn.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettnt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtdiscard.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_t_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_v_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtzero_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vtmv_t_v.c
A clang/test/Sema/sifive-xsfmm.c
A clang/test/Sema/sifive_sf_vset_invalid.c
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV] Support XSfmm C intrinsics (#143070)
In this version of intrinsics, users need to manage the life time of
tiles on their own, compiler doesn't have tile type for variables not
only for design simplicity but also preventing users to write bad
performance code that could potentially having tile spills which are
quite expensive in terms of cycles.
Intrinsics are specified at the end of this document
https://www.sifive.com/document-file/xsfmm-matrix-extensions-specification
stack on: https://github.com/llvm/llvm-project/pull/143068 and
https://github.com/llvm/llvm-project/pull/143069
Commit: dddcb84f152b99dfe7e117c02ab506c6c14b2f2b
https://github.com/llvm/llvm-project/commit/dddcb84f152b99dfe7e117c02ab506c6c14b2f2b
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
Log Message:
-----------
[scudo] Secondary release to OS uses LRU to scan. (#163691)
Before this change, the code would scan the entire set of cached entries
to find ones to be released. Now, it uses the LRUEntries list to iterate
over the live cached entries. In addition, remove the OldestTime
variable and replace it with OldestPresentEntry which will always be the
oldest entry in the LRU that has Time non-zero.
Commit: f7b4018748715aea536d3d266786ab0d895b335b
https://github.com/llvm/llvm-project/commit/f7b4018748715aea536d3d266786ab0d895b335b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
Log Message:
-----------
[OpenACC][CIR] Implement atomic update lowering (#164836)
This is the 3rd of 4 forms of the 'atomic' construct. This one allows
increment/decrement, compound-assign, and assign-to-bin-op(referencing
the original variable).
All of the above is enforced during Sema, but for our purposes, we ONLY
need to know the variable on the LHS and the expression, so this does
that.
The ACC dialect for acc.atomic.update uses a 'recipe' as well, which
takes the VALUE, and yields the value of the updated value.
To simplify the implementation, our lowering very simply creates an
alloca inside the recipe, stores the passed-in value, then loads/yields
it at the end.
Commit: d518f8e40e2b0318264ab45424e515862744b572
https://github.com/llvm/llvm-project/commit/d518f8e40e2b0318264ab45424e515862744b572
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Transforms/debug-assumed-size-array.fir
Log Message:
-----------
[flang] fix assumed-size debug info after #164452 (#164772)
I missed this case because the code was not explicitly looking for -1.
Commit: a377b8563428dd53cc33fdd4645d194db5f01397
https://github.com/llvm/llvm-project/commit/a377b8563428dd53cc33fdd4645d194db5f01397
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bug1491.f90
M flang/test/Semantics/null-init.f90
Log Message:
-----------
[flang] Adjust needless warning (#164500)
When an external procedure has an explicit interface in one scope, and
an implicit interface in another, and there's at least one call to it
from which dummy argument information can be inferred, don't emit a
warning about potential incompatibility if the only difference in their
characteristics is that one of their interfaces was implicit.
Commit: 1df7f2baa9a8f9fcec90de486686766cc2fd2bb1
https://github.com/llvm/llvm-project/commit/1df7f2baa9a8f9fcec90de486686766cc2fd2bb1
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/connection.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
Log Message:
-----------
[flang][runtime] Tweak GetNextNonBlank() performance (#164521)
When skipping blanks during input from an ASCII file, scan the buffered
characters directly when possible rather than using the more general
path. This adds complexity, but shaves a few percent off the runtime of
a code that reads in millions of list-directed integers (best time over
multiple runs goes from 17.56 to 16.84 sec).
Commit: 1e237b1785e77b472279f85455decc6ebe3eaf90
https://github.com/llvm/llvm-project/commit/1e237b1785e77b472279f85455decc6ebe3eaf90
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/func-proc-result.f90
Log Message:
-----------
[flang] Catch function result that is non-pointer procedure (#164664)
A function result that is a procedure must be a procedure pointer.
Commit: e34d603f185b55a0ef61b1008cdfd12d296a82ac
https://github.com/llvm/llvm-project/commit/e34d603f185b55a0ef61b1008cdfd12d296a82ac
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/include/flang/Evaluate/call.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/generic-error.f90
Log Message:
-----------
[flang] More information on generic resolution failures (#164738)
When a generic procedure reference does not match any of its specific
procedures, run through them and emit the errors for each attempted
match, so that the user has more information to resolve the problem by
adjusting the actual arguments.
Commit: af34890ef8f501cf758525f04b3e6f0e18a96b44
https://github.com/llvm/llvm-project/commit/af34890ef8f501cf758525f04b3e6f0e18a96b44
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/bug164727.cuf
Log Message:
-----------
[flang] Let !@acc and !@cuf conditional lines be continuations (#164892)
OpenMP conditional compilation lines (!$) work as continuation lines,
but OpenACC and CUDA conditional lines do not.
Fixes https://github.com/llvm/llvm-project/issues/164727 and
https://github.com/llvm/llvm-project/issues/164708.
Commit: 251edd122808f1849adb8000119ba9134793a294
https://github.com/llvm/llvm-project/commit/251edd122808f1849adb8000119ba9134793a294
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Initialization.h
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/AST/HLSL/matrix-constructors.hlsl
A clang/test/AST/HLSL/matrix-general-initializer.hlsl
A clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl
Log Message:
-----------
[HLSL] Add matrix constructors using initalizer lists (#162743)
fixes #159434
In HLSL matrices are matrix_type in all respects except that they
support a constructor style syntax for initializing matrices.
This change adds a translation of vector constructor arguments into
initializer lists.
This supports the following HLSL syntax:
(1) HLSL matrices support constructor syntax
(2) HLSL matrices are expanded to constituate components in constructor
using the same initalizer list behavior defined in transformInitList
allows us to support struct element initalization via
HLSLElementwiseCast
Commit: 0b01b96864983c4b150776b869a3d048b0d50e2c
https://github.com/llvm/llvm-project/commit/0b01b96864983c4b150776b869a3d048b0d50e2c
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Symbols.h
M lld/COFF/Writer.cpp
A lld/test/COFF/common-dedup.ll
Log Message:
-----------
[LLD][COFF] Deduplicate common chunks when linking COFF files. (#162553)
This fixes [issue
162148](https://github.com/llvm/llvm-project/issues/162148).
Common symbols are intended to have only a single version of the data
present in the final executable. The MSVC linker is able to successfully
deduplicate these chunks. If you have an application with a large number
of translation units with a large block of common data (this is
possible, for example, with Fortran code), then failing to deduplicate
these chunks can make the data size so large that the resulting
executable fails to load.
The logic in this patch doesn't catch all of the potential cases for
deduplication, but it should catch the most common ones.
Commit: 0fd330dfe3d0504f4143aea58e88d52e62bf7da7
https://github.com/llvm/llvm-project/commit/0fd330dfe3d0504f4143aea58e88d52e62bf7da7
Author: Finn Plummer <mail at inbelic.dev>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.h
M llvm/test/CodeGen/DirectX/legalize-module-flags.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags2.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/metadata-stripping.ll
M llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll
M llvm/test/CodeGen/DirectX/strip-rootsignatures.ll
Log Message:
-----------
[NFC][DirectX] Refactor `DXILPrepare`/`DXILTranslateMetadata` (#164285)
This pr updates `DXILPrepare` and `DXILTranslateMetadata` by moving all
the removal of metadata from `DXILPrepare` to `DXILTranslateMetadata` to
have a more consistent definition of what each pass is doing.
It restricts the `DXILPrepare` to only update function attributes and
insert bitcasts, and moves the removal of metadata to
`DXILTranslateMetadata` so that all manipulation of metadata is done in
a single pass.
Commit: b6e6a4dc6d494191a9665715b0d989876778a46d
https://github.com/llvm/llvm-project/commit/b6e6a4dc6d494191a9665715b0d989876778a46d
Author: Thurston Dang <thurston at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
Log Message:
-----------
[msan] Convert target("aarch64.svcount") from compile-time crash to MSan false negatives (#165028)
MSan currently crashes at compile-time when it encounters
target("aarch64.svcount") (e.g.,
https://github.com/llvm/llvm-project/pull/164315). This patch duct-tapes
MSan so that it won't crash at compile-time, and instead propagates a
clean shadow (resulting in false negatives but not false positives).
Commit: e07aef9dde4cc84af8b696b97c294b6497ce667a
https://github.com/llvm/llvm-project/commit/e07aef9dde4cc84af8b696b97c294b6497ce667a
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/Frontend/cfi-unchecked-callee-attribute.cpp
Log Message:
-----------
[clang][Sema] close IsStandardConversion hole when adding cfi_unchecked_callee (#164592)
Commit b194cf1e401a changed this function for the case where attribute
`cfi_unchecked_callee` is added in a function conversion. But this
introduces a hole (issue #162798), and it seems the change was
unnecessary: the preceding `TryFunctionConversion` will already allow
adding the `cfi_unchecked_callee` attribute, and will update `FromType`
if it succeeds. So we revert the changes to `IsStandardConversion`. We
also remove the helper function `AddingCFIUncheckedCallee` which is no
longer needed, and simplify the corresponding
`DiscardingCFIUncheckedCallee`.
Fixes: #162798
Commit: bd27abcceedfc60f4598124aa022cd0b766da3d8
https://github.com/llvm/llvm-project/commit/bd27abcceedfc60f4598124aa022cd0b766da3d8
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
Revert "Reapply "[clang-format] Annotate ::operator and Foo::operator… (#165038)
… correctly" (#164670)"
This reverts commit 50ca1f407801cd268a1c130b9576dfb51fe7f392.
Reverting because this leads to the bug on ToT described in
https://github.com/llvm/llvm-project/issues/164866. The original fix
addresses an old regression which we'd still like to land eventually.
See the discussion in https://github.com/llvm/llvm-project/pull/164670
for more context.
Commit: 8c29bce1e9f03a22b42d11604e7555e16306f2aa
https://github.com/llvm/llvm-project/commit/8c29bce1e9f03a22b42d11604e7555e16306f2aa
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Remove SCEVToExpansion mapping (NFC). (#164490)
VPlan::SCEVToExpansion isn't needed any longer, as SCEV expansion
de-duplication is handled locally in expandSCEVs.
PR: https://github.com/llvm/llvm-project/pull/164490
Commit: 825eefe856cb957adf33924a9232d3f7e947e7f4
https://github.com/llvm/llvm-project/commit/825eefe856cb957adf33924a9232d3f7e947e7f4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/program-parsers.cpp
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
M flang/test/Parser/cuf-sanity-common
M flang/test/Parser/cuf-sanity-tree.CUF
Log Message:
-----------
[flang][cuda] Accept scalar expression for bytes in kernel call (#165040)
Commit: fdcbf74a7da4fb074d5c408eb2ec4ed75fb74bf4
https://github.com/llvm/llvm-project/commit/fdcbf74a7da4fb074d5c408eb2ec4ed75fb74bf4
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
Log Message:
-----------
[Github][CI] Add default gha user for tooling containers (#164294)
This would solve
https://github.com/llvm/llvm-project/blob/c0073a9170aaa4f3504f7cdf20758176bcb14ac1/.github/workflows/pr-code-format.yml#L28-L34
Commit: 9b80fc39606f6f02b88a21ac29e98a74b0b7426a
https://github.com/llvm/llvm-project/commit/9b80fc39606f6f02b88a21ac29e98a74b0b7426a
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
Log Message:
-----------
[lldb] Add missing function call in test (NFC)
Commit: 4c52c454c0f266a5948b5ba48c597571d1a0040a
https://github.com/llvm/llvm-project/commit/4c52c454c0f266a5948b5ba48c597571d1a0040a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/IndexedMap.h
Log Message:
-----------
[ADT] Rename variable names in IndexedMap (NFC) (#164925)
This patch renames variable names to conform to the LLVM Coding
Standards. The public interface remains the same.
Commit: 30e77152961b2c560127cc8391ca79f002497a09
https://github.com/llvm/llvm-project/commit/30e77152961b2c560127cc8391ca79f002497a09
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/SparseSet.h
Log Message:
-----------
[ADT] Consolidate SparseSetValFunctor implementations (NFC) (#164926)
This patch consolidates the two implementations of SparseSetValFunctor
with "if constexpr". std::is_same_v<KeyT, ValueT> is more readable
than "KeyT, KeyT" in the template parameter list.
Commit: 8388a5b3403a4f711890a397ec577a11bb9d5fc3
https://github.com/llvm/llvm-project/commit/8388a5b3403a4f711890a397ec577a11bb9d5fc3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/include/llvm/ADT/SparseMultiSet.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/unittests/ADT/STLForwardCompatTest.cpp
Log Message:
-----------
[ADT] Rename identity_cxx20 to identity (#164927)
Now that the old llvm::identity has moved into IndexedMap.h under a
different name, this patch renames identity_cxx20 to identity. Note
that llvm::identity closely models std::identity from C++20.
Commit: b4d11c98917c3fd0e09f826a85232c322678299b
https://github.com/llvm/llvm-project/commit/b4d11c98917c3fd0e09f826a85232c322678299b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang] Proofread UsersManual.rst (#164928)
Commit: 7e76473d3fa90b954d8533f558274df1b95256fd
https://github.com/llvm/llvm-project/commit/7e76473d3fa90b954d8533f558274df1b95256fd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h
M llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp
Log Message:
-----------
[DebugInfo] Add "override" where appropriate (NFC) (#164929)
Note that "override" makes "virtual" redundant.
Identified with modernize-use-override.
Commit: 4448ff453d25e402aeab55749a99df5ff5ea81f1
https://github.com/llvm/llvm-project/commit/4448ff453d25e402aeab55749a99df5ff5ea81f1
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/coro-task.cpp
Log Message:
-----------
[CIR] Emit CIR builtins: coroAlloc, coroBegin, and coroSize (#164180)
This PR adds support for emitting the builtins coroAlloc, coroBegin, and
coroSize.
Commit: e68cf1ebcf8a059ea5f373340a854c15146a20dd
https://github.com/llvm/llvm-project/commit/e68cf1ebcf8a059ea5f373340a854c15146a20dd
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
Log Message:
-----------
[GitHub][CI] Remove 'Set Safe Directory' step (#165052)
Commit: 409c6544435395ac24d3efb92fd51841e9223315
https://github.com/llvm/llvm-project/commit/409c6544435395ac24d3efb92fd51841e9223315
Author: cmtice <cmtice at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Update Windows premerge testing to use clang-cl.exe (#164900)
Now that the Windows container contains clang, use it for building the
premerge tests. Measurements show this is significantly faster than
using msvc cl. Note we had to disable four warnings -Wc++98-compat,
-Wc++14-compat, -Wunsafe-buffer-usage, and -Wold-style-cast to make
this work with 'check-mlir' on Windows (clang generates a lot of warnings
that msvc cl does not).
Commit: 10a975be0f4c6337fe981c4086d90c582a970010
https://github.com/llvm/llvm-project/commit/10a975be0f4c6337fe981c4086d90c582a970010
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
A lldb/test/Shell/ExecControl/StopHook/stop-hook-list.test
Log Message:
-----------
[lldb] Introduce internal stop hooks (#164506)
Introduce the concept of internal stop hooks.
These are similar to LLDB's internal breakpoints:
LLDB itself will add them and users of LLDB will
not be able to add or remove them.
This change adds the following 3
independently-useful concepts:
* Maintain a list of internal stop hooks that will be populated by LLDB
and cannot be added to or removed from by users. They are managed in a
separate list in `Target::m_internal_stop_hooks`.
* `StopHookKind:CodeBased` and `StopHookCoded` represent a stop hook
defined by a C++ code callback (instead of command line expressions or a
Python class).
* Stop hooks that do not print any output can now also suppress the
printing of their header and description when they are hit via
`StopHook::GetSuppressOutput`.
Combining these 3 concepts we can model "internal
stop hooks" which serve the same function as
LLDB's internal breakpoints: executing built-in,
LLDB-defined behavior, leveraging the existing
mechanism of stop hooks.
This change also simplifies
`Target::RunStopHooks`. We already have to
materialize a new list for combining internal and
user stop hooks. Filter and only add active hooks to this list to avoid
the need for "isActive?"
checks later on.
Commit: 3a59407689da7a3f2f934a841ed32ffcbfaf24dc
https://github.com/llvm/llvm-project/commit/3a59407689da7a3f2f934a841ed32ffcbfaf24dc
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M .ci/utils.sh
Log Message:
-----------
[CI] Make Postcommit Testing Pass In Correct Flags to Premerge Advisor
Before this patch we were passing in the previous commit rather than the
current commit due to a copy and paste adjustment failure from the PR
flow. We want the base SHA to just be the commit SHA for postcommit. We
also were not attaching the run number which made the source ID the
first JUnit XML file rather than the buildbot run number.
Commit: 5fda2a5d9c1a0f90da5d0afc412c9ad613702823
https://github.com/llvm/llvm-project/commit/5fda2a5d9c1a0f90da5d0afc412c9ad613702823
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/docs/ProgrammersManual.rst
A llvm/include/llvm/ADT/RadixTree.h
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/RadixTreeTest.cpp
Log Message:
-----------
[NFC][ADT] Add RadixTree (#164524)
This commit introduces a RadixTree implementation to LLVM.
RadixTree, as a Trie, is very efficient by searching for prefixes.
A Radix Tree is more efficient implementation of Trie.
The tree will be used to optimize Glob matching in SpecialCaseList:
* https://github.com/llvm/llvm-project/pull/164531
* https://github.com/llvm/llvm-project/pull/164543
* https://github.com/llvm/llvm-project/pull/164545
---------
Co-authored-by: Kazu Hirata <kazu at google.com>
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: cc4f462ba46c288dc26aa155775444cd9a7c4d0e
https://github.com/llvm/llvm-project/commit/cc4f462ba46c288dc26aa155775444cd9a7c4d0e
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-10-25 (Sat, 25 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/issue163738.ll
Log Message:
-----------
[X86][ISel] Improve VPTERNLOG matching for negated logic trees (#164863)
This patch extends VPTERNLOG pattern matching to handle cases where an
outer NOT wraps a pure logical tree, such as `~(A | B | C)`. By
recognizing these negated logic trees, the instruction selector can now
emit a single vpternlog instruction.
The change preserves the match for patterns like `(x != C1) & (x !=
C2)`, which also have the xor-with-all-ones pattern outside. The patch
conservatively peels the outer XOR-with-all-ones only when it directly
wraps a foldable logical operator (AND, OR, XOR, or ANDNP).
Resolves #163738
Commit: 9161760123cd8b10694483a8f27d72ed134173b2
https://github.com/llvm/llvm-project/commit/9161760123cd8b10694483a8f27d72ed134173b2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M .ci/premerge_advisor_upload.py
Log Message:
-----------
[CI] Make Premerge Advisor Upload to Both Advisor Instances
So that we do not have to worry about synchronizing data between the two
clusters. This also enables this script to work on AArch64, although
we'll look at enabling that later.
Reviewers: cmtice
Reviewed By: cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/165058
Commit: c9a45d3fd777997f669ff6af9c1f27e60a0fa23f
https://github.com/llvm/llvm-project/commit/c9a45d3fd777997f669ff6af9c1f27e60a0fa23f
Author: Kees Cook <kees at kernel.org>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrInfo.td
Log Message:
-----------
[ARM][KCFI] Fix bundle sizes to reflect worst-case expansion (#164917)
The KCFI_CHECK pseudo-instruction size for ARM got miscalculated. These
should represent worst-case expansion to ensure correct branch range
calculations and code layout.
Update the Size field for each ARM sub-architecture:
- ARM: 28 → 40 bytes (10 instructions @ 4 bytes when r3 spill needed)
- Thumb2: 32 → 34 bytes (mixed 16/32-bit instructions with r3 spill)
- Thumb1: 50 → 38 bytes (19 instructions @ 2 bytes with r2+r3 spills)
The ARM and Thumb2 sizes were underestimating the case where the target
register is r12, requiring r3 to be used as scratch and
spilled/restored. The Thumb1 size was overestimated and has been
corrected to the actual worst-case of 19 instructions.
Commit: b39974c81615bb3c8c0f1ad20296f9ddf4df2e77
https://github.com/llvm/llvm-project/commit/b39974c81615bb3c8c0f1ad20296f9ddf4df2e77
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-10-24 (Fri, 24 Oct 2025)
Changed paths:
M .ci/monolithic-windows.sh
M .ci/premerge_advisor_upload.py
M .ci/utils.sh
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/release-binaries.yml
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/BuiltinsHexagon.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Headers/sifive_vector.h
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
A clang/test/AST/HLSL/matrix-constructors.hlsl
A clang/test/AST/HLSL/matrix-general-initializer.hlsl
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/delete.cpp
M clang/test/CIR/CodeGen/global-init.cpp
A clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
A clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettk.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettm.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettn.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vsettnt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtdiscard.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_t_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtmv_v_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_vtzero_t.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vlte8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste32.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste64.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vste8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_vtmv_t_v.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/Driver/aarch64-ptrauth.c
M clang/test/Driver/fuchsia.c
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Frontend/cfi-unchecked-callee-attribute.cpp
M clang/test/Preprocessor/hexagon-predefines.c
A clang/test/Sema/sifive-xsfmm.c
A clang/test/Sema/sifive_sf_vset_invalid.c
A clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl
M clang/tools/driver/cc1_main.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
M flang-rt/include/flang-rt/runtime/connection.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/cuda/allocator.cpp
M flang/include/flang/Evaluate/call.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/expression.cpp
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
M flang/test/Parser/cuf-sanity-common
M flang/test/Parser/cuf-sanity-tree.CUF
A flang/test/Preprocessing/bug164727.cuf
A flang/test/Semantics/bug1491.f90
A flang/test/Semantics/func-proc-result.f90
A flang/test/Semantics/generic-error.f90
M flang/test/Semantics/null-init.f90
M flang/test/Transforms/debug-assumed-size-array.fir
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/int_hk_t.h
A libc/include/llvm-libc-types/int_hr_t.h
A libc/include/llvm-libc-types/int_k_t.h
A libc/include/llvm-libc-types/int_lk_t.h
A libc/include/llvm-libc-types/int_lr_t.h
A libc/include/llvm-libc-types/int_r_t.h
R libc/include/llvm-libc-types/stdfix-types.h
A libc/include/llvm-libc-types/uint_uhk_t.h
A libc/include/llvm-libc-types/uint_uhr_t.h
A libc/include/llvm-libc-types/uint_uk_t.h
A libc/include/llvm-libc-types/uint_ulk_t.h
A libc/include/llvm-libc-types/uint_ulr_t.h
A libc/include/llvm-libc-types/uint_ur_t.h
M libc/include/stdfix.yaml
M libc/src/stdfix/CMakeLists.txt
M libc/src/stdfix/bitshk.cpp
M libc/src/stdfix/bitshk.h
M libc/src/stdfix/bitshr.cpp
M libc/src/stdfix/bitshr.h
M libc/src/stdfix/bitsk.cpp
M libc/src/stdfix/bitsk.h
M libc/src/stdfix/bitslk.cpp
M libc/src/stdfix/bitslk.h
M libc/src/stdfix/bitslr.cpp
M libc/src/stdfix/bitslr.h
M libc/src/stdfix/bitsr.cpp
M libc/src/stdfix/bitsr.h
M libc/src/stdfix/bitsuhk.cpp
M libc/src/stdfix/bitsuhk.h
M libc/src/stdfix/bitsuhr.cpp
M libc/src/stdfix/bitsuhr.h
M libc/src/stdfix/bitsuk.cpp
M libc/src/stdfix/bitsuk.h
M libc/src/stdfix/bitsulk.cpp
M libc/src/stdfix/bitsulk.h
M libc/src/stdfix/bitsulr.cpp
M libc/src/stdfix/bitsulr.h
M libc/src/stdfix/bitsur.cpp
M libc/src/stdfix/bitsur.h
M libc/src/stdfix/bitusk.cpp
M libc/src/stdfix/hkbits.h
M libc/src/stdfix/hrbits.h
M libc/src/stdfix/kbits.h
M libc/src/stdfix/lkbits.h
M libc/src/stdfix/lrbits.h
M libc/src/stdfix/rbits.h
M libc/src/stdfix/uhkbits.h
M libc/src/stdfix/uhrbits.h
M libc/src/stdfix/ukbits.h
M libc/src/stdfix/ulkbits.h
M libc/src/stdfix/ulrbits.h
M libc/src/stdfix/urbits.h
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/stdfix/FxBitsTest.h
M libc/test/src/stdfix/bitshk_test.cpp
M libc/test/src/stdfix/bitshr_test.cpp
M libc/test/src/stdfix/bitsk_test.cpp
M libc/test/src/stdfix/bitslk_test.cpp
M libc/test/src/stdfix/bitslr_test.cpp
M libc/test/src/stdfix/bitsr_test.cpp
M libc/test/src/stdfix/bitsuhk_test.cpp
M libc/test/src/stdfix/bitsuhr_test.cpp
M libc/test/src/stdfix/bitsuk_test.cpp
M libc/test/src/stdfix/bitsulk_test.cpp
M libc/test/src/stdfix/bitsulr_test.cpp
M libc/test/src/stdfix/bitsur_test.cpp
M libcxx/include/CMakeLists.txt
M libcxx/include/__config
M libcxx/include/__cxx03/__thread/support/pthread.h
M libcxx/include/__cxx03/cctype
M libcxx/include/__cxx03/cerrno
M libcxx/include/__cxx03/cfenv
M libcxx/include/__cxx03/cfloat
M libcxx/include/__cxx03/cinttypes
R libcxx/include/__cxx03/complex.h
M libcxx/include/__cxx03/cstddef
M libcxx/include/__cxx03/cstdio
R libcxx/include/__cxx03/ctype.h
M libcxx/include/__cxx03/cwctype
R libcxx/include/__cxx03/errno.h
M libcxx/include/__cxx03/ext/__hash
R libcxx/include/__cxx03/fenv.h
R libcxx/include/__cxx03/float.h
R libcxx/include/__cxx03/inttypes.h
R libcxx/include/__cxx03/stdbool.h
R libcxx/include/__cxx03/stddef.h
R libcxx/include/__cxx03/stdio.h
R libcxx/include/__cxx03/tgmath.h
M libcxx/include/__cxx03/wchar.h
R libcxx/include/__cxx03/wctype.h
M libcxx/include/complex.h
M libcxx/include/ctype.h
M libcxx/include/errno.h
M libcxx/include/fenv.h
M libcxx/include/float.h
M libcxx/include/inttypes.h
M libcxx/include/stdbool.h
M libcxx/include/stddef.h
M libcxx/include/stdio.h
M libcxx/include/tgmath.h
M libcxx/include/wctype.h
M libcxx/test/std/depr/depr.c.headers/uchar_h.compile.pass.cpp
A libcxx/test/std/depr/depr.c.headers/uchar_h_char8_t.compile.pass.cpp
M libcxx/test/std/strings/c.strings/cuchar.compile.pass.cpp
A libcxx/test/std/strings/c.strings/cuchar_char8_t.compile.pass.cpp
R libcxx/test/std/strings/c.strings/no_c8rtomb_mbrtoc8.verify.cpp
M libcxx/utils/libcxx/test/features.py
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Symbols.h
M lld/COFF/Writer.cpp
M lld/ELF/Arch/RISCV.cpp
A lld/test/COFF/common-dedup.ll
A lld/test/ELF/riscv-vendor-relocations.s
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
A lldb/test/Shell/ExecControl/StopHook/stop-hook-list.test
M llvm/docs/CommandGuide/lit.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/include/llvm/ADT/IndexedMap.h
M llvm/include/llvm/ADT/RadixTree.h
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/include/llvm/ADT/SparseMultiSet.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h
M llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolFilter.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h
M llvm/include/llvm/IR/IntrinsicsHexagon.td
M llvm/include/llvm/IR/IntrinsicsHexagonDep.td
M llvm/include/llvm/IR/IntrinsicsRISCVXsf.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/Support/Timer.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryResolver.cpp
A llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Support/Timer.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.h
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Hexagon/HexagonDepArch.h
M llvm/lib/Target/Hexagon/HexagonDepArch.td
M llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
M llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
M llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsV65.td
M llvm/lib/Target/Hexagon/HexagonSchedule.td
A llvm/lib/Target/Hexagon/HexagonScheduleV81.td
M llvm/lib/Target/Hexagon/HexagonSubtarget.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/lib/Target/RISCV/RISCVScheduleXSf.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
A llvm/test/Analysis/DependenceAnalysis/compute-absolute-value.ll
A llvm/test/Assembler/metadata-annotations.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-disjoint-mask.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector-undef-rhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
A llvm/test/CodeGen/AArch64/arm64-cvt-simd-fptoi.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
A llvm/test/CodeGen/AArch64/dup-ext-load-combine.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
A llvm/test/CodeGen/AArch64/ldst-prepost-uses.ll
M llvm/test/CodeGen/AArch64/load-zext-bitcast.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-s64-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/BPF/BTF/binary-format.ll
M llvm/test/CodeGen/BPF/BTF/builtin-btf-type-id.ll
M llvm/test/CodeGen/BPF/BTF/char-no-debuginfo.ll
M llvm/test/CodeGen/BPF/BTF/extern-builtin.ll
M llvm/test/CodeGen/BPF/BTF/extern-func-arg.ll
M llvm/test/CodeGen/BPF/BTF/extern-global-var.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-func.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-section.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-struct.ll
M llvm/test/CodeGen/BPF/BTF/extern-var-weak-section.ll
M llvm/test/CodeGen/BPF/BTF/filename.ll
M llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll
M llvm/test/CodeGen/BPF/BTF/func-non-void.ll
M llvm/test/CodeGen/BPF/BTF/func-source.ll
M llvm/test/CodeGen/BPF/BTF/func-typedef.ll
M llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll
M llvm/test/CodeGen/BPF/BTF/func-void.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-1.ll
M llvm/test/CodeGen/BPF/BTF/local-var-readonly-2.ll
M llvm/test/CodeGen/BPF/BTF/local-var.ll
M llvm/test/CodeGen/BPF/BTF/pruning-const.ll
M llvm/test/CodeGen/BPF/BTF/pruning-typedef.ll
M llvm/test/CodeGen/BPF/BTF/static-func.ll
M llvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
M llvm/test/CodeGen/BPF/BTF/static-var-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
M llvm/test/CodeGen/BPF/BTF/static-var.ll
M llvm/test/CodeGen/BPF/BTF/struct-anon-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global-2.ll
M llvm/test/CodeGen/BPF/BTF/weak-global.ll
M llvm/test/CodeGen/BPF/CORE/btf-id-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-duplicate.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-enum-value.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-exist.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll
M llvm/test/CodeGen/BPF/CORE/no-elf-ama-symbol.ll
M llvm/test/CodeGen/BPF/CORE/no-narrow-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-access-str.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-global-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-array.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
M llvm/test/CodeGen/BPF/CORE/store-addr.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp2.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative1.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative2.ll
M llvm/test/CodeGen/BPF/callx.ll
M llvm/test/CodeGen/BPF/dwarfdump.ll
M llvm/test/CodeGen/BPF/i128.ll
M llvm/test/CodeGen/BPF/is_trunc_free.ll
M llvm/test/CodeGen/BPF/is_zext_free.ll
M llvm/test/CodeGen/BPF/objdump_two_funcs.ll
M llvm/test/CodeGen/BPF/optnone-1.ll
M llvm/test/CodeGen/BPF/reloc-btf-2.ll
M llvm/test/CodeGen/BPF/reloc-btf.ll
M llvm/test/CodeGen/BPF/simplifycfg.ll
M llvm/test/CodeGen/BPF/warn-stack.ll
M llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags2.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/metadata-stripping.ll
M llvm/test/CodeGen/DirectX/strip-llvm-errno-tbaa.ll
M llvm/test/CodeGen/DirectX/strip-rootsignatures.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_scalarize_scatter.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vgather_SpVV.ll
A llvm/test/CodeGen/Hexagon/autohvx/ripple_vscatter.ll
A llvm/test/CodeGen/Hexagon/masked_gather.ll
A llvm/test/CodeGen/Hexagon/vector-gather.ll
A llvm/test/CodeGen/MIR/AArch64/parse-shufflemask-invalid-scalar.mir
M llvm/test/CodeGen/MIR/AArch64/parse-shufflemask.mir
A llvm/test/CodeGen/RISCV/rv32p.ll
A llvm/test/CodeGen/RISCV/rv64p.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfbfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp16e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexp32e.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa.ll
A llvm/test/CodeGen/RISCV/rvv/sf_vfexpa64e.ll
M llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
M llvm/test/CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir
M llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir
M llvm/test/CodeGen/X86/atom-fixup-lea4.ll
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change2.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change3.mir
M llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
M llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
M llvm/test/CodeGen/X86/bit-piece-comment.ll
M llvm/test/CodeGen/X86/catchpad-regmask.ll
M llvm/test/CodeGen/X86/catchpad-weight.ll
M llvm/test/CodeGen/X86/clang-section-coff.ll
M llvm/test/CodeGen/X86/cleanuppad-inalloca.ll
M llvm/test/CodeGen/X86/combine-adc.ll
M llvm/test/CodeGen/X86/combine-sbb.ll
M llvm/test/CodeGen/X86/complex-fastmath.ll
M llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll
M llvm/test/CodeGen/X86/dag-optnone.ll
M llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
M llvm/test/CodeGen/X86/dbg-changes-codegen.ll
M llvm/test/CodeGen/X86/dbg-combine.ll
M llvm/test/CodeGen/X86/debug-loclists-lto.ll
M llvm/test/CodeGen/X86/debugloc-argsize.ll
M llvm/test/CodeGen/X86/early-cfi-sections.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
M llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
M llvm/test/CodeGen/X86/fdiv.ll
M llvm/test/CodeGen/X86/fma_patterns_wide.ll
M llvm/test/CodeGen/X86/fold-tied-op.ll
M llvm/test/CodeGen/X86/fp128-g.ll
M llvm/test/CodeGen/X86/fp128-i128.ll
M llvm/test/CodeGen/X86/frame-order.ll
M llvm/test/CodeGen/X86/fsafdo_test2.ll
M llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
M llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
A llvm/test/CodeGen/X86/issue163738.ll
M llvm/test/CodeGen/X86/label-annotation.ll
M llvm/test/CodeGen/X86/label-heapallocsite.ll
M llvm/test/CodeGen/X86/late-remat-update.mir
M llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
M llvm/test/CodeGen/X86/lifetime-alias.ll
M llvm/test/CodeGen/X86/limit-split-cost.mir
M llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll
M llvm/test/CodeGen/X86/misched-copy.ll
M llvm/test/CodeGen/X86/misched-matmul.ll
M llvm/test/CodeGen/X86/movpc32-check.ll
M llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll
M llvm/test/CodeGen/X86/nocf_check.ll
M llvm/test/CodeGen/X86/pr15705.ll
M llvm/test/CodeGen/X86/pr18846.ll
M llvm/test/CodeGen/X86/pr31045.ll
M llvm/test/CodeGen/X86/pr32610.ll
M llvm/test/CodeGen/X86/pr34080-2.ll
M llvm/test/CodeGen/X86/pr34080.ll
M llvm/test/CodeGen/X86/pr34629.ll
M llvm/test/CodeGen/X86/pr34634.ll
M llvm/test/CodeGen/X86/pr42727.ll
M llvm/test/CodeGen/X86/pr48064.mir
M llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll
M llvm/test/CodeGen/X86/recip-fastmath.ll
M llvm/test/CodeGen/X86/recip-fastmath2.ll
M llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
M llvm/test/CodeGen/X86/regparm.ll
M llvm/test/CodeGen/X86/seh-catchpad.ll
M llvm/test/CodeGen/X86/seh-except-finally.ll
M llvm/test/CodeGen/X86/seh-no-invokes.ll
M llvm/test/CodeGen/X86/shrinkwrap-hang.ll
M llvm/test/CodeGen/X86/sqrt-fastmath.ll
M llvm/test/CodeGen/X86/sse1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll
M llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
M llvm/test/CodeGen/X86/stack-protector-3.ll
M llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
M llvm/test/CodeGen/X86/stack_guard_remat.ll
M llvm/test/CodeGen/X86/tail-merge-wineh.ll
M llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
M llvm/test/CodeGen/X86/unused_stackslots.ll
M llvm/test/CodeGen/X86/uwtables.ll
M llvm/test/CodeGen/X86/vec_int_to_fp.ll
M llvm/test/CodeGen/X86/vector-sqrt.ll
M llvm/test/CodeGen/X86/vector-width-store-merge.ll
M llvm/test/CodeGen/X86/win-cleanuppad.ll
M llvm/test/CodeGen/X86/win32-seh-catchpad.ll
M llvm/test/CodeGen/X86/win32-seh-nested-finally.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
M llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme-aarch64-svcount.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
M llvm/test/MC/Disassembler/Xtensa/debug.txt
A llvm/test/MC/ELF/cfi-sframe-cfi-escape-diagnostics.s
A llvm/test/MC/ELF/cfi-sframe-cfi-escape.s
M llvm/test/MC/Hexagon/arch-support.s
A llvm/test/MC/Hexagon/v81_arch.s
M llvm/test/MC/PowerPC/ppc64-encoding-ext.s
M llvm/test/MC/Xtensa/debug.s
M llvm/test/MachineVerifier/test_g_shuffle_vector.mir
A llvm/test/Transforms/InstCombine/constant-vector-insert.ll
A llvm/test/Transforms/InstCombine/ctlz-cttz.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_muladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/reduce_submuladd.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/vectorizable-intrinsic.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_flop7.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug_info.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr16899.ll
M llvm/test/Transforms/SLPVectorizer/X86/vector_gep.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
M llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll
M llvm/test/Transforms/SafeStack/ARM/debug.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
M llvm/test/Transforms/SampleProfile/Inputs/profile-symbol-list.ll
M llvm/test/Transforms/SampleProfile/branch.ll
M llvm/test/Transforms/SampleProfile/csspgo-import-list.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline-debug.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline.ll
M llvm/test/Transforms/SampleProfile/csspgo-summary.ll
M llvm/test/Transforms/SampleProfile/csspgo-use-preinliner.ll
M llvm/test/Transforms/SampleProfile/entry_counts_cold.ll
M llvm/test/Transforms/SampleProfile/entry_counts_missing_dbginfo.ll
M llvm/test/Transforms/SampleProfile/fsafdo_test.ll
M llvm/test/Transforms/SampleProfile/gcc-simple.ll
M llvm/test/Transforms/SampleProfile/inline-act.ll
M llvm/test/Transforms/SampleProfile/misexpect.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-2.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-3.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp-4.ll
M llvm/test/Transforms/SampleProfile/norepeated-icp.ll
M llvm/test/Transforms/SampleProfile/offset.ll
M llvm/test/Transforms/SampleProfile/profile-context-order.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll
M llvm/test/Transforms/SampleProfile/profile-context-tracker.ll
M llvm/test/Transforms/SampleProfile/profile-topdown-order.ll
M llvm/test/Transforms/SampleProfile/propagate.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-discriminator.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-icp-factor.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-no-debug-info.ll
M llvm/test/Transforms/SampleProfile/remarks.ll
M llvm/test/Transforms/SampleProfile/uniqname.ll
M llvm/test/Transforms/Scalarizer/dbginfo.ll
M llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-cleanuppads.ll
M llvm/test/Transforms/SimplifyCFG/pr50060-constantfold-loopid.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/pr23975.ll
M llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-sve-instructions.s
A llvm/test/tools/llvm-profdata/input-wildcard.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ADT/RadixTreeTest.cpp
M llvm/unittests/ADT/STLForwardCompatTest.cpp
M llvm/unittests/DebugInfo/LogicalView/CompareElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LocationRangesTest.cpp
M llvm/unittests/DebugInfo/LogicalView/LogicalElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/SelectElementsTest.cpp
M llvm/unittests/DebugInfo/LogicalView/WarningInternalTest.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/A/A_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/B/B_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/C/C_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/D/D_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_linux.yaml
A llvm/unittests/ExecutionEngine/Orc/Inputs/Z/Z_macho.yaml
A llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/lldbDataFormatters.py
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/OpenMP/Transforms/OpenMPOffloadPrivatizationPrepare.cpp
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
A mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx11.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
R mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Vector/vector-mem-transforms.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M offload/include/OffloadPolicy.h
M offload/include/OpenMP/InternalTypes.h
M offload/include/OpenMP/omp.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/OpenMP/InteropAPI.cpp
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/11bb012cdc3c...b39974c81615
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