[all-commits] [llvm/llvm-project] f362a4: [AArch64] Optimized rdsvl followed by constant mu...

[Lukacma via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f362a4e7a0e587629fbb6f98469a2c6806c8f644
      https://github.com/llvm/llvm-project/commit/f362a4e7a0e587629fbb6f98469a2c6806c8f644
  Author: Lukacma <Marian.Lukac at arm.com>
  Date:   2025-10-24 (Fri, 24 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll

  Log Message:
  -----------
  [AArch64]  Optimized rdsvl followed by constant mul (#162853)

Currently when RDSVL is followed by constant multiplication, no specific
optimization exist which would leverage the immediate multiplication
operand to generate simpler assembly. This patch adds such optimization
and allow rewrites like these if certain conditions are met:
`(mul (srl (rdsvl 1), 3), x) -> (shl (rdsvl y),  z) `



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