[all-commits] [llvm/llvm-project] cbfd1d: [X86] Manage atomic load of fp -> int promotion in...

[jofrn via All-commits]

  Branch: refs/heads/users/jofrn/gt/07-15-_x86_manage_atomic_load_of_fp_-_int_promotion_in_dag
  Home:   https://github.com/llvm/llvm-project
  Commit: cbfd1d066aa6133124f2c200d5ec75700b86e292
      https://github.com/llvm/llvm-project/commit/cbfd1d066aa6133124f2c200d5ec75700b86e292
  Author: jofrn <jofernau at amd.com>
  Date:   2025-10-23 (Thu, 23 Oct 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/atomic-load-store.ll

  Log Message:
  -----------
  [X86] Manage atomic load of fp -> int promotion in DAG

When lowering atomic <1 x T> vector types with floats, selection can fail since
this pattern is unsupported. To support this, floats can be casted to
an integer type of the same size.



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