[all-commits] [llvm/llvm-project] c70d08: [MIR2Vec] Handle Operands (#163281)

[S. VenkataKeerthy via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c70d0812ba17953b3e405eb2b01dd892b94585f1
      https://github.com/llvm/llvm-project/commit/c70d0812ba17953b3e405eb2b01dd892b94585f1
  Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
  Date:   2025-10-22 (Wed, 22 Oct 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/MIR2Vec.h
    M llvm/lib/Analysis/models/x86SeedEmbeddingVocab100D.json
    M llvm/lib/CodeGen/MIR2Vec.cpp
    M llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_dummy_2D_vocab.json
    M llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_dummy_3D_vocab.json
    M llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_inconsistent_dims.json
    M llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_zero_vocab.json
    M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
    M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
    M llvm/test/CodeGen/MIR2Vec/if-else.mir
    M llvm/test/CodeGen/MIR2Vec/mir2vec-basic-symbolic.mir
    M llvm/test/CodeGen/MIR2Vec/vocab-error-handling.ll
    M llvm/unittests/CodeGen/MIR2VecTest.cpp

  Log Message:
  -----------
  [MIR2Vec] Handle Operands (#163281)

Handling opcodes in embedding computation.

- Revamped MIR Vocabulary with four sections - `Opcodes`, `Common Operands`, `Physical Registers`, and `Virtual Registers`
- Operands broadly fall into 3 categories -- the generic MO types that are common across architectures, physical and virtual register classes. We handle these categories separately in MIR2Vec. (Though we have same classes for both physical and virtual registers, their embeddings vary).



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