[all-commits] [llvm/llvm-project] 5ac616: [AArch64] Improve lowering of GPR zeroing in copyP...

[Tomer Shafir via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5ac616f3327e0d5a7871b92c91b17fd021b35d0d
      https://github.com/llvm/llvm-project/commit/5ac616f3327e0d5a7871b92c91b17fd021b35d0d
  Author: Tomer Shafir <tomer.shafir8 at gmail.com>
  Date:   2025-10-20 (Mon, 20 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir

  Log Message:
  -----------
  [AArch64] Improve lowering of GPR zeroing in copyPhysReg (#163059)

This patch pivots GPR32 and GPR64 zeroing into distinct branches to
simplify the code an improve the lowering.

Zeroing GPR moves are now handled differently than non-zeroing ones.
Zero source registers WZR and XZR do not require register annotations of
undef, implicit and kill. The non-zeroing source now cannot process WZR
removing the ternary expression. This patch also moves GPR64 logic right
after GPR32 for better organization.



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