[all-commits] [llvm/llvm-project] 8fe71e: [support] Don't require VFS in `SourceMgr` for loa...

Alexey Bataev via All-commits all-commits at lists.llvm.org
Fri Oct 17 12:14:30 PDT 2025


  Branch: refs/heads/users/alexey-bataev/spr/slp-support-for-copyables-in-the-reduced-values
  Home:   https://github.com/llvm/llvm-project
  Commit: 8fe71e0bdfb9102c607001289010698e51e38711
      https://github.com/llvm/llvm-project/commit/8fe71e0bdfb9102c607001289010698e51e38711
  Author: Jan Svoboda <jan_svoboda at apple.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Support/SourceMgr.cpp

  Log Message:
  -----------
  [support] Don't require VFS in `SourceMgr` for loading includes (#163862)

This commit more gracefully handles situations where `SourceMgr` isn't
initialized with a VFS and tries to resolve an include. That's what
happens with the test case `clang -flto=thin -c test.c -o /dev/null`
where test.c contains `asm(" .incbin \"foo.i\" \n");`. Propagating the
actual VFS all the way is very difficult.

This is a follow-up to #162903.


  Commit: 212eb8107363c55de511c155dc3c4ad6337414c3
      https://github.com/llvm/llvm-project/commit/212eb8107363c55de511c155dc3c4ad6337414c3
  Author: Daniel Chen <cdchen at ca.ibm.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M flang/include/flang/Optimizer/Dialect/FIRType.h
    M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
    M flang/lib/Optimizer/Dialect/FIRType.cpp
    M flang/test/Lower/polymorphic-temp.f90

  Log Message:
  -----------
  To support unlimited polymorphic argument for intrinsic MERGE. (#163866)

This PR will allow unlimited polymorphic arguments `class(*)` for
intrinsics.

Fixes #143582


  Commit: a55c4c812ee84b2948db6bdd656bce57d7f5b55c
      https://github.com/llvm/llvm-project/commit/a55c4c812ee84b2948db6bdd656bce57d7f5b55c
  Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M libc/shared/math.h
    A libc/shared/math/exp2m1f.h
    M libc/src/__support/math/CMakeLists.txt
    A libc/src/__support/math/exp2m1f.h
    M libc/src/math/generic/CMakeLists.txt
    M libc/src/math/generic/exp2m1f.cpp
    M libc/test/shared/CMakeLists.txt
    M libc/test/shared/shared_math_test.cpp
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel

  Log Message:
  -----------
  [libc][math] Refactor exp2m1f implementation to header-only in src/__support/math folder. (#162017)

Part of #147386

in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450


  Commit: 997560090e791558ca41ff3e5f4eec717102046c
      https://github.com/llvm/llvm-project/commit/997560090e791558ca41ff3e5f4eec717102046c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/pr162812.ll

  Log Message:
  -----------
  [X86] combineSelect - remove X86ISD::BLENDV if the condition signbit is known (#163974)

Fixes part of #162812


  Commit: bde0a8cd632ec714ea26e04dea0b7bd0f3231cfa
      https://github.com/llvm/llvm-project/commit/bde0a8cd632ec714ea26e04dea0b7bd0f3231cfa
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/Sema.h
    M clang/lib/CodeGen/Targets/AMDGPU.cpp
    M clang/lib/Headers/__clang_hip_runtime_wrapper.h
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
    M clang/test/CodeGenCUDA/Inputs/cuda.h
    A clang/test/CodeGenCUDA/cluster_dims.cu
    M clang/test/Misc/pragma-attribute-supported-attributes-list.test
    M clang/test/SemaCUDA/Inputs/cuda.h
    A clang/test/SemaCUDA/cluster_dims.cu

  Log Message:
  -----------
  [Clang][HIP][CUDA] Add `__cluster_dims__` and `__no_cluster__` attribute (#156686)

This PR adds basic frontend support for `__cluster_dims__` and
`__no_cluster__` attribute.

In CUDA/HIP programming, the ``__cluster_dims__`` attribute can be
applied to a kernel function to set the dimensions of a thread block
cluster. The ``__no_cluster__`` attribute can be applied to a kernel
function to indicate that the thread block cluster feature will not be
enabled at both compile time and kernel launch time. Note that
`__no_cluster__` is a LLVM/Clang only attribute.

Co-authored-by: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Co-authored-by: Jay Foad <jay.foad at amd.com>


  Commit: c4ceb8d7e515859686ff6966a756c8c9b6ab089f
      https://github.com/llvm/llvm-project/commit/c4ceb8d7e515859686ff6966a756c8c9b6ab089f
  Author: Connector Switch <c8ef at outlook.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M libc/include/llvm-libc-macros/netinet-in-macros.h
    M libc/test/include/netinet_in_test.cpp

  Log Message:
  -----------
  [libc] add IPV6 related macros (#162219)


  Commit: 404099dcf23db0b093263aff46d6f9416e0d8a27
      https://github.com/llvm/llvm-project/commit/404099dcf23db0b093263aff46d6f9416e0d8a27
  Author: Connector Switch <c8ef at outlook.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M libc/test/src/arpa/inet/CMakeLists.txt

  Log Message:
  -----------
  [libc][NFC] Remove cpp20 requirement for arpa/inet test (#163983)

Address
https://github.com/llvm/llvm-project/pull/162651#discussion_r2417151569.


  Commit: f7a5264890fe050124cd576410695a7c90c4d8d8
      https://github.com/llvm/llvm-project/commit/f7a5264890fe050124cd576410695a7c90c4d8d8
  Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
    M mlir/test/Dialect/Vector/vector-warp-distribute.mlir

  Log Message:
  -----------
  [mlir][vector] Add support for yielding loop bounds in `scf.for` distribution.  (#163443)

In some cases, loop bounds (lower, upper and step) of `scf.for` can come
locally from the parent warp op the `scf.for`. Current logic will not
yield the loop bounds in the new warp op generated during lowering
causing sinked `scf.for` to have non dominating use.

In this PR, we have added logic to yield loop bounds by default (treat
them as other operands of `scf.for`) which fixes this bug.


  Commit: fcb5293ad0a13b665cbaee26edf33cbfaab6404d
      https://github.com/llvm/llvm-project/commit/fcb5293ad0a13b665cbaee26edf33cbfaab6404d
  Author: kper <kevin.per at protonmail.com>
  Date:   2025-10-18 (Sat, 18 Oct 2025)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/test/Transforms/InstCombine/icmp-trunc.ll

  Log Message:
  -----------
  [InstCombine]: Canonicalize to a mask when trunc nuw (#163628)

The canonicalize is also triggered when the `trunc` is `nuw`.

Proof: https://alive2.llvm.org/ce/z/eWvWe3
Fixes: https://github.com/llvm/llvm-project/issues/162451


  Commit: 7bbb03d516251a3dee09ee2fe2a37c0f15f1ddbc
      https://github.com/llvm/llvm-project/commit/7bbb03d516251a3dee09ee2fe2a37c0f15f1ddbc
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/SROA.cpp

  Log Message:
  -----------
  [NFC][SROA][DebugInfo] Reuse existing dbg_assigns where possible (#163938)

Addresses issue #145937

Without this patch SROA generates new dbg_assign for new stores. We can
simply steal the existing dbg_assigns linked to the old store when the
store is not being split.


  Commit: a99e32b23a1f074149ebdfafdcc735b8ceadd548
      https://github.com/llvm/llvm-project/commit/a99e32b23a1f074149ebdfafdcc735b8ceadd548
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M polly/docs/ReleaseNotes.rst
    M polly/include/polly/LinkAllPasses.h
    R polly/include/polly/ScopInliner.h
    M polly/lib/Support/PollyPasses.def
    M polly/lib/Support/RegisterPasses.cpp
    M polly/lib/Transform/ScopInliner.cpp
    M polly/test/ScopInliner/ignore-declares.ll
    M polly/test/ScopInliner/invariant-load-func.ll
    M polly/test/ScopInliner/simple-inline-loop.ll

  Log Message:
  -----------
  Revert "[Polly] Update ScopInliner for NPM (#125427)"

This reverts commit 0b9a7b80c0674c5c6f746139912111bea7eae63b.

This is causing test failures under LLVM:
1. Other/pass-pipeline-parsing.ll

This broke premerge. This was notably not caught by premerge testing on
the original PR because the original PR only touches polly, and premerge
does not test LLVM when only polly is touched.


  Commit: 1e78d332223415f35cc5ce24000eb6159b9a355e
      https://github.com/llvm/llvm-project/commit/1e78d332223415f35cc5ce24000eb6159b9a355e
  Author: Muzammil <55665739+Muzammiluddin-Syed-ECE at users.noreply.github.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td

  Log Message:
  -----------
  [mlir][arith][nfc] Adding examples to scaling_extf/truncf descriptions (#163980)

Signed-off-by: Muzammiluddin Syed <muzasyed at amd.com>


  Commit: df2ff3a1b2c231f8ec78c244950687cdc54b507b
      https://github.com/llvm/llvm-project/commit/df2ff3a1b2c231f8ec78c244950687cdc54b507b
  Author: don <122427011+donneypr at users.noreply.github.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp

  Log Message:
  -----------
  [clang][x86][bytecode] remove trailing returns type from interp__builtin_elementwise_int_unaryop callbacks (#163905)

Regarding the discussion in #162346, this PR is to remove the trailing type from the 'interp__builtin_elementwise_int_unaryop' callbacks.


  Commit: 92757f9de34a5f08873064be0e30d7cdeaae895f
      https://github.com/llvm/llvm-project/commit/92757f9de34a5f08873064be0e30d7cdeaae895f
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/test/CIR/IR/invalid-try-catch.cir

  Log Message:
  -----------
  [CIR] TryOp add arg default value and update diagnostic (#163856)

- Add a default value to handler_types to be able to construct TryOp,
then modify the handlers.
- Move empty region diagnostic from tablegen constraints to C++, because
we need the ability to add an empty region, then modify it later, for
example, in the handlers builder, but we need to report an error when we
find it in the IR while parsing.

Issue https://github.com/llvm/llvm-project/issues/154992


  Commit: 6b36cfaef8fc26fe0e9538c095fa0d1ee5703756
      https://github.com/llvm/llvm-project/commit/6b36cfaef8fc26fe0e9538c095fa0d1ee5703756
  Author: J. Ryan Stinnett <jryans at gmail.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/include/llvm/IR/Value.h
    M llvm/lib/IR/DebugInfo.cpp

  Log Message:
  -----------
  [NFC][IR][DebugInfo] Fix typos in comments (#163957)

This fixes a few typos noticed while browsing around IR-related files.


  Commit: d6191b8b23fc5c23c61bba0bccd61e7578ea1f6e
      https://github.com/llvm/llvm-project/commit/d6191b8b23fc5c23c61bba0bccd61e7578ea1f6e
  Author: Omar Hossam <moar.ahmed at gmail.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
    M clang/test/CIR/CodeGen/throws.cpp

  Log Message:
  -----------
  [CIR] Add VTable class name for enum type (#163612)

This commit adds the RTTI support for enum in the vtable.

Issue #163601


  Commit: a76c71b205db9e28ffe33432caef5efbea7f088f
      https://github.com/llvm/llvm-project/commit/a76c71b205db9e28ffe33432caef5efbea7f088f
  Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/include/mlir/IR/CommonTypeConstraints.td
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/test/Dialect/AMDGPU/invalid.mlir
    M mlir/test/Dialect/AMDGPU/ops.mlir

  Log Message:
  -----------
  [mlir][amdgpu] Add scaled_ext_packed{8,16} operations (#159830)


  Commit: 64c511f6a88f607798db29a1af59aab4dd13ff20
      https://github.com/llvm/llvm-project/commit/64c511f6a88f607798db29a1af59aab4dd13ff20
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/test/MC/AMDGPU/gfx1250_asm_vds_alias.s
    M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_alias.s

  Log Message:
  -----------
  [AMDGPU] Add additional aliases for load transpose instructions (#163900)


  Commit: 56ee43a863c1d09ec41e1a5260e42faa74e7f2a7
      https://github.com/llvm/llvm-project/commit/56ee43a863c1d09ec41e1a5260e42faa74e7f2a7
  Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  AMDGPU: Document address spaces as reserved (#163996)

They are going to be used for internal work downstream that we do expect
to upstream eventually.


  Commit: e29cf8e22aaa3a7d1a6d5061cc6c8e7763074c0b
      https://github.com/llvm/llvm-project/commit/e29cf8e22aaa3a7d1a6d5061cc6c8e7763074c0b
  Author: Ian Li <ian.li at intel.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M mlir/include/mlir/Conversion/Passes.td
    M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir

  Log Message:
  -----------
  [MLIR][MathToXeVM] Remove requirement for ModuleOp op type for MathToXeVM (#163619)

This dependency is not needed. This PR removes it and checks that
MathToXeVM works and respects pass pipelines specified by the user.


  Commit: 40d4ea6342c736cb1c71af350a0cf7953a3bbb80
      https://github.com/llvm/llvm-project/commit/40d4ea6342c736cb1c71af350a0cf7953a3bbb80
  Author: Alex Langford <alangford at apple.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M lldb/include/lldb/Utility/DataExtractor.h

  Log Message:
  -----------
  [lldb] Fix misaligned loads violation in DataExtractor (#163880)

The implementation of the templated `Get` function contains UB. For
example, the "GetDoubleUnaligned" unit test causes `Get` to perform an
unaligned 8 byte read. This violates the `double` alignment requirement.
Furthermore, it violates strict aliasing rules in C++. (We construct a
`const double *` from a `const uint8_t *` and perform a read on the
resulting double pointer).

DataExtractor should be able to read unaligned data to deal with
different data formats, but we need to be careful to not perform
unaligned reads/writes or violate strict aliasing rules.

rdar://160385383


  Commit: b8c70130607468e9ff8fbfd7e012bd1f1e23bf46
      https://github.com/llvm/llvm-project/commit/b8c70130607468e9ff8fbfd7e012bd1f1e23bf46
  Author: Jun Wang <jwang86 at yahoo.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    A llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx_nowarn.txt
    A llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c_nowarn.txt

  Log Message:
  -----------
  [AMDGPU][MC] Fix disassembler warning for v_cmpx instructions in GFX9 (#163825)

In GFX10+, the v_cmpx_* instructions use EXEC as the implicit dst and do
not have explicit dst. Therefore a warning is issued by the disassembler
when the dst is not EXEC. However, in GFX9 and earlier, those
instructions have EXEC as the implicit dst as well as an explicit dst.
The aforementioned warning should not be issued.


  Commit: 7be2d7598c29eb3ac62889d2051939a8ae3ed160
      https://github.com/llvm/llvm-project/commit/7be2d7598c29eb3ac62889d2051939a8ae3ed160
  Author: Sohaib Iftikhar <sohaib1692 at gmail.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [MLIR][BUILD]: Add deps after fbbffc11 (#163999)

[MLIR][BUILD]: Add deps after fbbffc11


  Commit: ac193bc20fac9ce203073bbe7326f232c4e81733
      https://github.com/llvm/llvm-project/commit/ac193bc20fac9ce203073bbe7326f232c4e81733
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
    M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
    M llvm/test/CodeGen/AMDGPU/frem.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
    M llvm/test/CodeGen/AMDGPU/select.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
    M llvm/test/CodeGen/AMDGPU/vector_rebroadcast.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll

  Log Message:
  -----------
  [AMDGPU][True16][CodeGen] S_PACK_XX_B32_B16 lowering for true16 mode (#162389)

S_PACK_XX_B32_B16 requires special lowering for true16 mode when it's
being lowered to VALU in fix-sgpr-copy pass.

Added test cases in fix-sgpr-copies-f16-true16.mir


  Commit: f5ed0b7d328cd87d56232e8a554704fc3c08d9dd
      https://github.com/llvm/llvm-project/commit/f5ed0b7d328cd87d56232e8a554704fc3c08d9dd
  Author: Nico Weber <thakis at chromium.org>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/utils/gn/secondary/lld/test/BUILD.gn

  Log Message:
  -----------
  [gn] port f5885de2cd49


  Commit: 783b050f88260c0d412c705110f00ce6c45bd7be
      https://github.com/llvm/llvm-project/commit/783b050f88260c0d412c705110f00ce6c45bd7be
  Author: Adam Nemet <anemet at apple.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
    A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-remainder-rm.ll
    A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-remainder.ll

  Log Message:
  -----------
  [LMI] Support non-power-of-2 types for the matmul remainder (#163987)

In the inner loop of matmul, instead of continuously halving the HW
vector register width, I just use the remainder vector directly if it's
legal.

We don't have in-tree targets that have this so I opted for adding a
hidden flag to simulate this for testing purposes:
-matrix-split-matmul-remainder-over-threshold

The tests are the vectorization-friendly 3x3x1 matrix-vector and 1x3x3
vector-matrix multiplies for CM, RM respectively.


  Commit: dc27696e9e252f318d978ced61865c72cb12c4d7
      https://github.com/llvm/llvm-project/commit/dc27696e9e252f318d978ced61865c72cb12c4d7
  Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/DeclSpec.cpp
    M clang/test/Parser/c2x-auto.c

  Log Message:
  -----------
  [Clang] disallow constexpr with auto and explicit type in C23 (#163469)

Fixes #163090

--- 

This PR addresses the issue of Clang not diagnosing the invalid
combination of `constexpr`,
`auto`, and an explicit type

```c
constexpr auto int x = 0
```


  Commit: 2f70482f32a9ffe2b4fc0f6291d1132cbcab4de3
      https://github.com/llvm/llvm-project/commit/2f70482f32a9ffe2b4fc0f6291d1132cbcab4de3
  Author: Muzammil <55665739+Muzammiluddin-Syed-ECE at users.noreply.github.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
    M mlir/test/Target/LLVMIR/rocdl.mlir

  Log Message:
  -----------
  [ROCDL] Add gfx1250 WMMA intrinsics (#162343)

Signed-off-by: Muzammiluddin Syed <muzasyed at amd.com>


  Commit: db2a75d082743d139ab93351b3639cbcda96fa84
      https://github.com/llvm/llvm-project/commit/db2a75d082743d139ab93351b3639cbcda96fa84
  Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    A flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
    A flang/test/Fir/OpenACC/recipe-populate-private.mlir
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

  Log Message:
  -----------
  [flang][acc] Add recipe populate testing through type interfaces (#163990)

This PR does the following:
- Updates createAndPopulate implementation so instead of first building
detached blocks it directly builds them in appropriate place - because
the MappableType implementation in FIR is relying on properly connected
regions in order to look up module
- Updates createAndPopulate to properly create destroy region with newly
introduced generatePrivateDestroy API for MappableType
- Adds recipe-populate-private.mlir test with comprehensive type
coverage including scalars, arrays (1D/3D), derived types, and extensive
box type tests (heap/ptr scalars, dynamic arrays in 1D/2D, ptr arrays,
and boxed derived types)
- Adds recipe-populate-firstprivate.mlir test with coverage for types
with well-supported copy operations (scalars, static arrays, derived
types); intentionally limits box type testing as copy implementation for
complex box types is not yet complete


  Commit: 024dd569223d00da55412bff8fffffebd1cb799b
      https://github.com/llvm/llvm-project/commit/024dd569223d00da55412bff8fffffebd1cb799b
  Author: Helena Kotas <hekotas at microsoft.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M clang/include/clang/Basic/Builtins.td
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
    M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
    M clang/lib/Sema/HLSLExternalSemaSource.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
    M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
    M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
    A clang/test/CodeGenHLSL/resources/ByteAddressBuffers-methods.hlsl
    M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-lib.hlsl
    M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
    M clang/test/CodeGenHLSL/resources/TypedBuffers-methods.hlsl

  Log Message:
  -----------
  [HLSL] GetDimensions methods for buffer resources (#161929)

Adds `GetDimensions` methods to all supported buffer resource classes (`{RW}Buffer`, `*StructuredBuffer`, `{RW}ByteAddressBuffer`). The method is implemented by calling one of both built-in functions `__builtin_hlsl_resource_getdimensions_x` and `__builtin_hlsl_resource_getstride` as described in proposal https://github.com/llvm/wg-hlsl/pull/350.

The `__builtin_hlsl_resource_getstride` is implemented directly by Clang codegen by setting the buffer stride to the output variable.

The `__building_hlsl_buffer_getdimensions` built-in function gets translated to LLVM intrinsic `@llvm.dx.resource.getdimensions.x`.

Closes #112984


  Commit: b212f20ff56b65eec9274db3bf3096f38722859a
      https://github.com/llvm/llvm-project/commit/b212f20ff56b65eec9274db3bf3096f38722859a
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/include/clang/Sema/Sema.h
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp
    M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/CodeGen/Targets/AMDGPU.cpp
    M clang/lib/Headers/__clang_hip_runtime_wrapper.h
    M clang/lib/Sema/DeclSpec.cpp
    M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
    M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
    M clang/lib/Sema/HLSLExternalSemaSource.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
    M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
    M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
    M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
    M clang/test/CIR/CodeGen/throws.cpp
    M clang/test/CIR/IR/invalid-try-catch.cir
    M clang/test/CodeGenCUDA/Inputs/cuda.h
    A clang/test/CodeGenCUDA/cluster_dims.cu
    A clang/test/CodeGenHLSL/resources/ByteAddressBuffers-methods.hlsl
    M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-lib.hlsl
    M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
    M clang/test/CodeGenHLSL/resources/TypedBuffers-methods.hlsl
    M clang/test/Misc/pragma-attribute-supported-attributes-list.test
    M clang/test/Parser/c2x-auto.c
    M clang/test/SemaCUDA/Inputs/cuda.h
    A clang/test/SemaCUDA/cluster_dims.cu
    M flang/include/flang/Optimizer/Dialect/FIRType.h
    M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
    M flang/lib/Optimizer/Dialect/FIRType.cpp
    A flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
    A flang/test/Fir/OpenACC/recipe-populate-private.mlir
    M flang/test/Lower/polymorphic-temp.f90
    M libc/include/llvm-libc-macros/netinet-in-macros.h
    M libc/shared/math.h
    A libc/shared/math/exp2m1f.h
    M libc/src/__support/math/CMakeLists.txt
    A libc/src/__support/math/exp2m1f.h
    M libc/src/math/generic/CMakeLists.txt
    M libc/src/math/generic/exp2m1f.cpp
    M libc/test/include/netinet_in_test.cpp
    M libc/test/shared/CMakeLists.txt
    M libc/test/shared/shared_math_test.cpp
    M libc/test/src/arpa/inet/CMakeLists.txt
    M lldb/include/lldb/Utility/DataExtractor.h
    M llvm/docs/AMDGPUUsage.rst
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/include/llvm/IR/Value.h
    M llvm/lib/IR/DebugInfo.cpp
    M llvm/lib/Support/SourceMgr.cpp
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
    M llvm/lib/Transforms/Scalar/SROA.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
    M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
    M llvm/test/CodeGen/AMDGPU/frem.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
    M llvm/test/CodeGen/AMDGPU/select.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
    M llvm/test/CodeGen/AMDGPU/vector_rebroadcast.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
    M llvm/test/CodeGen/X86/pr162812.ll
    M llvm/test/MC/AMDGPU/gfx1250_asm_vds_alias.s
    M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_alias.s
    A llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx_nowarn.txt
    A llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c_nowarn.txt
    M llvm/test/Transforms/InstCombine/icmp-trunc.ll
    A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-remainder-rm.ll
    A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-remainder.ll
    M llvm/utils/gn/secondary/lld/test/BUILD.gn
    M mlir/include/mlir/Conversion/Passes.td
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
    M mlir/include/mlir/IR/CommonTypeConstraints.td
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
    M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
    M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
    M mlir/test/Dialect/AMDGPU/invalid.mlir
    M mlir/test/Dialect/AMDGPU/ops.mlir
    M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
    M mlir/test/Target/LLVMIR/rocdl.mlir
    M polly/docs/ReleaseNotes.rst
    M polly/include/polly/LinkAllPasses.h
    R polly/include/polly/ScopInliner.h
    M polly/lib/Support/PollyPasses.def
    M polly/lib/Support/RegisterPasses.cpp
    M polly/lib/Transform/ScopInliner.cpp
    M polly/test/ScopInliner/ignore-declares.ll
    M polly/test/ScopInliner/invariant-load-func.ll
    M polly/test/ScopInliner/simple-inline-loop.ll
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  Added a comment

Created using spr 1.3.7


Compare: https://github.com/llvm/llvm-project/compare/132070ba5a8f...b212f20ff56b

To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications


More information about the All-commits mailing list