[all-commits] [llvm/llvm-project] f40451: [X86] addConstantComments - add vector constant pr...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f404517cb9d762e035f7bc2b5201990465b32853
      https://github.com/llvm/llvm-project/commit/f404517cb9d762e035f7bc2b5201990465b32853
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-10-17 (Fri, 17 Oct 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86MCInstLower.cpp
    M llvm/test/CodeGen/X86/combine-multiplies.ll
    M llvm/test/CodeGen/X86/combine-pmuldq.ll
    M llvm/test/CodeGen/X86/combine-rotates.ll
    M llvm/test/CodeGen/X86/combine-shl.ll
    M llvm/test/CodeGen/X86/dagcombine-shifts.ll
    M llvm/test/CodeGen/X86/funnel-shift.ll
    M llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
    M llvm/test/CodeGen/X86/known-pow2.ll
    M llvm/test/CodeGen/X86/madd.ll
    M llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
    M llvm/test/CodeGen/X86/sdiv-exact.ll
    M llvm/test/CodeGen/X86/shrink_vmul.ll
    M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
    M llvm/test/CodeGen/X86/udiv-exact.ll
    M llvm/test/CodeGen/X86/undo-mul-and.ll
    M llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
    M llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll
    M llvm/test/CodeGen/X86/urem-seteq-vec-tautological.ll
    M llvm/test/CodeGen/X86/vector-fshl-128.ll
    M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
    M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
    M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
    M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
    M llvm/test/CodeGen/X86/vector-fshr-128.ll
    M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
    M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
    M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
    M llvm/test/CodeGen/X86/vector-mul.ll
    M llvm/test/CodeGen/X86/vector-rotate-128.ll
    M llvm/test/CodeGen/X86/vector-rotate-256.ll
    M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
    M llvm/test/CodeGen/X86/vector-trunc-math.ll

  Log Message:
  -----------
  [X86] addConstantComments - add vector constant printing for (V)PMULDQ/(V)PMULUDQ instructions (#163958)



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