[all-commits] [llvm/llvm-project] 50aac2: [RISCV] Add XSfmm pseudo instruction and vset* ins...

[Brandon Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 50aac2cd9386e32355aedb2439af42e3b0709d24
      https://github.com/llvm/llvm-project/commit/50aac2cd9386e32355aedb2439af42e3b0709d24
  Author: Brandon Wu <songwu0813 at gmail.com>
  Date:   2025-10-13 (Mon, 13 Oct 2025)

  Changed paths:
    M llvm/include/llvm/TargetParser/RISCVTargetParser.h
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Target/RISCV/RISCVInstrFormats.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
    M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/lib/TargetParser/RISCVTargetParser.cpp
    A llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir

  Log Message:
  -----------
  [RISCV] Add XSfmm pseudo instruction and vset* insertion support (#143068)

This patch supports the naive vset* insertion. If the state(tm, tn, tk,
sew, widen) changes, it emits all of the vset* instructions that are
needed, partial compatibility is not supported yet.

This is follow up patch for:
https://github.com/llvm/llvm-project/pull/133031
Co-authored-by: Piyou Chen <piyou.chen at sifive.com>
Co-authored-by: Craig Topper <craig.topper at sifive.com>



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