[all-commits] [llvm/llvm-project] 8bb10c: [AArch64] Optimize DUP of extending loads to avoid...

[Guy David via All-commits]

  Branch: refs/heads/users/guy-david/aarch64-dup-zextload
  Home:   https://github.com/llvm/llvm-project
  Commit: 8bb10cfe3ddcb2d93bc24d4a833f1cea11828c86
      https://github.com/llvm/llvm-project/commit/8bb10cfe3ddcb2d93bc24d4a833f1cea11828c86
  Author: Guy David <guyda96 at gmail.com>
  Date:   2025-10-12 (Sun, 12 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/aarch64-smull.ll
    A llvm/test/CodeGen/AArch64/dup-ext-load-combine.ll
    M llvm/test/CodeGen/AArch64/dup.ll

  Log Message:
  -----------
  [AArch64] Optimize DUP of extending loads to avoid GPR->FPR transfer

Loads the data into the SIMD register, thus sparing a physical register
and a potentially costly movement of data.



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