[all-commits] [llvm/llvm-project] eace84: [RISCV] Prioritize Qualcomm uC Xqcics over Xqcicli...

[quic_hchandel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: eace84dd5d50831227b5863a3ae1ab68d71ea736
      https://github.com/llvm/llvm-project/commit/eace84dd5d50831227b5863a3ae1ab68d71ea736
  Author: quic_hchandel <hchandel at qti.qualcomm.com>
  Date:   2025-10-10 (Fri, 10 Oct 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
    M llvm/test/CodeGen/RISCV/xqcicli.ll
    M llvm/test/CodeGen/RISCV/xqcics.ll

  Log Message:
  -----------
  [RISCV] Prioritize Qualcomm uC Xqcics over Xqcicli (#162416)

In cases where both Xqcics and Xqcicli patterns can be used, Xqcics
should be used because some instructions in this extension are
commutable.



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