[all-commits] [llvm/llvm-project] 476a6e: AMDGPU: Track minNumAGPRs in MFI instead of mayUse...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 476a6ea9575f1a8498e080b4ace0700c3b91f9c1
      https://github.com/llvm/llvm-project/commit/476a6ea9575f1a8498e080b4ace0700c3b91f9c1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-10-07 (Tue, 07 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll
    A llvm/test/CodeGen/AMDGPU/smfmac_alloc_failure_no_agpr_O0.ll

  Log Message:
  -----------
  AMDGPU: Track minNumAGPRs in MFI instead of mayUseAGPRs (#161996)

Fix mfma agpr allocation failures with -O0. Previously we were getting
lucky
on cases that can use AV registers with the normal optimization
pipeline.

This logic needs to be consistent with getMaxNumVectorRegs,
as that is what getReservedRegs to determine the AGPR budget. In the
future we should directly check the minimum AGPR budget, and individual
selection patterns need to know the minimum budget required for them.

Start accounting for the number of AGPRs required to perform the
allocation. Refine the selection predicates to check this number is
available, and default to selecting the VGPR case if there aren't
enough. This also avoids register allocation failures for the largest
MFMAs with the default register budget.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications