[all-commits] [llvm/llvm-project] 98766d: [clang] Cleanup docs and code for legacy no_saniti...
Steven Wu via All-commits
all-commits at lists.llvm.org
Mon Oct 6 09:03:33 PDT 2025
Branch: refs/heads/users/cachemeifyoucan/spr/cas-rename-ondisktrierawhashmappointer-ondiskptr-nfc
Home: https://github.com/llvm/llvm-project
Commit: 98766d288f0d7cadcf34f355d36e4deaf233d046
https://github.com/llvm/llvm-project/commit/98766d288f0d7cadcf34f355d36e4deaf233d046
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
Log Message:
-----------
[clang] Cleanup docs and code for legacy no_sanitize attributes (NFC). (#161311)
Update generated docs for legacy attributes:
* no_sanitize_(address|thread|memory)
* no_address_safety_analysis
Those are older forms of no_sanitize("list", "of", "sanitizers")
attribute. They were previously as various spellings of the same
attribute, which made the auto-generated documentation confusing.
Fix this by explicitly making them three different attributes. This
would also allow to simplify the delegation to the new no_sanitize form
slightly, as we can instead rely on auto-generated code to check that
TSan and MSan can't be disabled for globals.
**HTML docs before:**
<img width="1004" height="1175" alt="rendered-docs-before"
src="https://github.com/user-attachments/assets/407b5fc1-799c-4882-8ff8-44a5ef3cf4f1"
/>
**HTML docs after:**
<img width="1098" height="1118" alt="rendered-docs-after"
src="https://github.com/user-attachments/assets/236ca93f-25f8-4d58-95ac-ede95ce18d01"
/>
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: 6caa0d05c2282feafa1479141c0009257639e48f
https://github.com/llvm/llvm-project/commit/6caa0d05c2282feafa1479141c0009257639e48f
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/vtt.cpp
Log Message:
-----------
[CIR] Upstream RTTI Builder & RTTI for VTable Definitions (#160002)
Upstream the RTTI builder with helpers and used them in the VTable
Definitions
Issue https://github.com/llvm/llvm-project/issues/154992
Commit: d884b55ea40e455bcef162d6c6e3176c078f41ef
https://github.com/llvm/llvm-project/commit/d884b55ea40e455bcef162d6c6e3176c078f41ef
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/MCInstUtils.h
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT] Introduce helpers to match `MCInst`s one at a time (NFC) (#138883)
Introduce a low-level instruction matching DSL to capture and/or match
the operands of MCInst, single instruction at a time. Unlike the
existing `MCPlusBuilder::MCInstMatcher` machinery, this DSL is intended
for the use cases when the precise control over the instruction order is
required. For example, when validating PtrAuth hardening, all registers
are usually considered unsafe after a function call, even though
callee-saved registers should preserve their old
values _under normal operation_.
Usage example:
// Bring the short names into the local scope:
using namespace LowLevelInstMatcherDSL;
// Declare the registers to capture:
Reg Xn, Xm;
// Capture the 0th and 1st operands, match the 2nd operand against the
// just captured Xm register, match the 3rd operand against literal 0:
if (!matchInst(MaybeAdd, AArch64::ADDXrs, Xm, Xn, Xm, Imm(0))
return AArch64::NoRegister;
// Match the 0th operand against Xm:
if (!matchInst(MaybeBr, AArch64::BR, Xm))
return AArch64::NoRegister;
// Manually check that Xm and Xn did not match the same register:
if (Xm.get() == Xn.get())
return AArch64::NoRegister;
// Return the matched register:
return Xm.get();
Commit: 3a8d771612c6d9d95c2e020aa37dd3674279432f
https://github.com/llvm/llvm-project/commit/3a8d771612c6d9d95c2e020aa37dd3674279432f
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Casting.h
Log Message:
-----------
[llvm][NFC] Simplify implementation of `isa` (#161403)
Using a fold instead of template recursion.
Commit: 5665b1bf9da5c0918f8babec13f2ff537078a233
https://github.com/llvm/llvm-project/commit/5665b1bf9da5c0918f8babec13f2ff537078a233
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachTask.mm
Log Message:
-----------
[lldb][NFC] Fix spelling of function in log message (#161261)
Fix spelling of `GetMemoryRegionInfo` function in
log message and comment and reformat code.
Commit: 280abaf9da0121011863ad095991c7d95fc504ae
https://github.com/llvm/llvm-project/commit/280abaf9da0121011863ad095991c7d95fc504ae
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Handle scalar-VF in transforms (NFC) (#161365)
Commit: 4064c0eab46e34fd07dbca4b2f665582f4528afb
https://github.com/llvm/llvm-project/commit/4064c0eab46e34fd07dbca4b2f665582f4528afb
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/fold-logical.cpp
A flang/test/Semantics/contiguous-warn.f90
Log Message:
-----------
[flang] Implemented a warning about contiguity of compile time constant values (#161084)
Implemented `common::UsageWarning::ConstantIsContiguous` to warn about
the
following case:
```
integer, parameter :: num = 3
integer, parameter :: arr(num)=[(i, i=1,num)]
logical, parameter :: result=is_contiguous(arr(num:1:-1))
end
```
Here, while array section is discontiguous, `arr` is a compile time
constant,
so array section created at compile time will end up being contiguous
and
`result` will be "true". If `arr` wasn't a constant, the result at
runtime
would have been "false".
Commit: 4e5928689f2399dc6aede8dde2536a98a96a1802
https://github.com/llvm/llvm-project/commit/4e5928689f2399dc6aede8dde2536a98a96a1802
Author: Jeaye Wilkerson <contact at jeaye.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
Fix `run_clang_repl` output when not present (#161412)
On the happy path, when `clang-repl` is present, we will invoke it in
order to determine if the host supports JIT features. That will return a
string containing "true". However, in cases where `clang-repl` is not
present or we fail to invoke it, we previously returned `False`, which
would then trigger a failure with our substring check. This PR updates
the function to return `""` instead, so the substring check is still
valid.
This is related to https://github.com/llvm/llvm-project/pull/157359,
where the original change was introduced.
Commit: fad2a4c00db68ee10b506b05531cdc6458d9be37
https://github.com/llvm/llvm-project/commit/fad2a4c00db68ee10b506b05531cdc6458d9be37
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M flang/lib/Evaluate/constant.cpp
Log Message:
-----------
[flang] Add #include to fix MSVC build (#161415)
flang/lib/Evaluate/constant.cpp apparently needs this #include for MSVC
builds but somehow not for others.
Commit: 67141c74272838919985ce1931c42365b1790c6a
https://github.com/llvm/llvm-project/commit/67141c74272838919985ce1931c42365b1790c6a
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
Log Message:
-----------
[NFC] Remove trailing whitespaces from `clang/include/clang/Basic/Attr.td`
Commit: 9d42c752569f3141ca42b75dd37f45e771ffa7a0
https://github.com/llvm/llvm-project/commit/9d42c752569f3141ca42b75dd37f45e771ffa7a0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
Log Message:
-----------
[LAA] Fix picking context instr in evaluatePtrAddRec for multiple preds.
A loop may have more than one predecessor out of the loop. In that case,
just pick the first non-phi instruction in the loop header.
Commit: 6ca835b7f4349ad55c8e8afdf0669927b6b284b4
https://github.com/llvm/llvm-project/commit/6ca835b7f4349ad55c8e8afdf0669927b6b284b4
Author: Yixuan Cao <caoyixuan2019 at email.szu.edu.cn>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_interceptors.h
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
A compiler-rt/test/asan/TestCases/wcscat.cpp
A compiler-rt/test/asan/TestCases/wcscpy.cpp
A compiler-rt/test/asan/TestCases/wcsncat.cpp
A compiler-rt/test/asan/TestCases/wcsncpy.cpp
Log Message:
-----------
[compiler-rt][asan] Add wcscpy/wcsncpy; enable wcscat/wcsncat on Windows (#160493)
Summary
- Add ASan interceptors for wcscpy/wcsncpy on all platforms.
- Enable wcscat/wcsncat on Windows (already enabled on POSIX via
sanitizer_common).
Motivation
- Use of wchar string APIs is common on Windows; improve parity with
char* string checks.
Changes
- Implement wcscpy/wcsncpy in asan_interceptors.cpp; check overlap and
mark read/write ranges in bytes.
- wcsncpy: compute write size in bytes (size * sizeof(wchar_t)) to avoid
missed overflows when sizeof(wchar_t) != 1.
- Use MaybeRealWcsnlen when available to bound reads.
- Register Windows static thunk for wcscpy/wcsncpy/wcscat/wcsncat; rely
on sanitizer_common interceptors for wcscat/wcsncat.
- Tests: add wcscpy/wcsncpy/wcscat/wcsncat; flush stdout before crash;
use resilient FileCheck patterns (reuse [[ADDR]], wildcard for function
suffixes and paths, flexible line numbers).
Testing
- AArch64 Linux: new tests pass with check-asan locally.
Follow-up to and based on prior work in PR #90909 (author: branh,
Microsoft); builds on that work and addresses review feedback. Thanks!
---------
Signed-off-by: Yixuan Cao <caoyixuan2019 at email.szu.edu.cn>
Commit: 8425004ce65abc34c6f55fbf751f101536e9c07d
https://github.com/llvm/llvm-project/commit/8425004ce65abc34c6f55fbf751f101536e9c07d
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang-tools-extra/test/clang-doc/long-name.cpp
Log Message:
-----------
[clang-doc] Suppress long-name test on windows (#161424)
This seems to have broken some buildbots for a long time, so just
suppress it for now until we determine how/why.
Commit: e27e9ca5d8cdf85f8c8466a792730ff1df313072
https://github.com/llvm/llvm-project/commit/e27e9ca5d8cdf85f8c8466a792730ff1df313072
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/constant.cpp
M flang/lib/Evaluate/tools.cpp
Log Message:
-----------
[flang] Attempt to work around MSVC build problem (#161426)
Move a function that seems to be running into an MSVC problem from the
source file where I created it to another one (tools.cpp) that is
already known to be able to access the semantics::Scope type.
Commit: 1ff3e2e2805fe4a8284a688fbd7b3863826d9629
https://github.com/llvm/llvm-project/commit/1ff3e2e2805fe4a8284a688fbd7b3863826d9629
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M mlir/test/Examples/standalone/lit.local.cfg
M mlir/test/Examples/standalone/test.wheel.toy
Log Message:
-----------
[MLIR][Standalone] gate wheel build behind MLIR_ENABLE_BINDINGS_PYTHON=ON (#161427)
If MLIR_ENABLE_BINDINGS_PYTHON=ON then
[StandalonePythonModules](https://github.com/llvm/llvm-project/blob/main/mlir/examples/standalone/pyproject.toml#L38)
isn't a valid target.
Commit: e83a3b8614afbb707a4f3492e0fccd7e4c1d99b7
https://github.com/llvm/llvm-project/commit/e83a3b8614afbb707a4f3492e0fccd7e4c1d99b7
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Introduce and use NotUseRealTrue16Insts. NFC. (#161373)
This removes ~2000 lines from both AMDGPUGenDAGISel.inc and
AMDGPUGenGlobalISel.inc.
Commit: fe9fba8d24f4e7a0cca26fceb621cfa4276d793b
https://github.com/llvm/llvm-project/commit/fe9fba8d24f4e7a0cca26fceb621cfa4276d793b
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
Log Message:
-----------
[OpenACC][CIR] Fix transform inclusive scan init parameter (#161428)
This fixes macos build, where otherwise the compilation yields an error: `no viable conversion from 'bool' to 'typename iterator_traits<const QualType *>::value_type`
Commit: a099c91eb8e275c385859f7b3ddee3f0b08db558
https://github.com/llvm/llvm-project/commit/a099c91eb8e275c385859f7b3ddee3f0b08db558
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
A llvm/test/Analysis/LoopAccessAnalysis/inbounds-gep-in-predicated-blocks.ll
Log Message:
-----------
[LAA] Add tests for using inbounds flags only used in predicated blocks.
Test for https://github.com/llvm/llvm-project/issues/160912.
Commit: f61be4352592639a0903e67a9b5d3ec664ad4d23
https://github.com/llvm/llvm-project/commit/f61be4352592639a0903e67a9b5d3ec664ad4d23
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Revert "[VPlan] Compute cost of more replicating loads/stores in ::computeCost. (#160053)"
This reverts commit b4be7ecaf06bfcb4aa8d47c4fda1eed9bbe4ae77.
See https://github.com/llvm/llvm-project/issues/161404 for a crash
exposed by the change. Revert while I investigate.
Commit: ca84f2aa3be6e46a4dccb1bec56b93f2bb3d8ef0
https://github.com/llvm/llvm-project/commit/ca84f2aa3be6e46a4dccb1bec56b93f2bb3d8ef0
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
A clang/lib/CIR/CodeGen/CIRGenDeclCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/global-init.cpp
Log Message:
-----------
[CIR] Upstream support for generating global ctor regions (#161298)
This adds support for handling global variables with non-trivial
constructors. The constructor call is emitted in CIR as a 'ctor' region
associated with the global definition. This form of global definition
cannot be lowered to LLVM IR yet.
A later change will add support in LoweringPrepare to move the ctor code
into a __cxx_global_var_init() function and add that function to the
list of global global ctors, but for now we must stop at the initial CIR
generation.
Commit: b6dfa3d47db74e72a566e0605fb573a8fcea1234
https://github.com/llvm/llvm-project/commit/b6dfa3d47db74e72a566e0605fb573a8fcea1234
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
A clang/include/clang/AST/HLSLResource.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[HLSL][NFC] Add helper struct to simplify dealing with resource binding attributes (#161254)
Add new `ResourceBindingAttrs` struct that holds resource binding attributes `HLSLResourceBindingAttr` and `HLSLVkBindingAttr` and provides helper methods to simplify dealing with resource bindings. This code is placed in the AST library to be shared between Sema and CodeGen.
This change has been done in preparation of a third binding attribute coming soon to represent `[[vk::counter_binding()]]`. This new attribute and more helper member functions will be added to `ResourceBindingAttrs` and will be used in both Sema and in CodeGen to implement resource counter initialization.
Commit: f57b60ad2a72b64b75bc5422f67b46c625debbc6
https://github.com/llvm/llvm-project/commit/f57b60ad2a72b64b75bc5422f67b46c625debbc6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/constant.cpp
M flang/lib/Evaluate/tools.cpp
Log Message:
-----------
[flang] Add missing #include for MSVC (#161437)
I moved a function to Evaluate/tools.cpp in an attempt to dodge some
MSVC compiler issue but didn't add an include directive for
Evaluate/tools.h to Evaluate/constant.cpp.
Commit: 96a1e559ccc472a9f8444c889bcfba3aee8c274d
https://github.com/llvm/llvm-project/commit/96a1e559ccc472a9f8444c889bcfba3aee8c274d
Author: CatherineMoore <catmoore at amd.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP] Update 6.1 implementation status. (#161449)
@jhuber6: Please review
Commit: 739425b1342d53d0314b4970b91ff7d334428105
https://github.com/llvm/llvm-project/commit/739425b1342d53d0314b4970b91ff7d334428105
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[NFC][LLVM] Use ListSeparator in AsmWriter (#161422)
Use `ListSeparator` instead of manual code when generating comma
separated lists. Also replace `FieldSeparator` with `ListSeparator` as
they both provide identical functionality.
Commit: 1c11f72344e8d2fdb29587572dd50db6b10fdd28
https://github.com/llvm/llvm-project/commit/1c11f72344e8d2fdb29587572dd50db6b10fdd28
Author: Florian Mayer <fmayer at google.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/test/Transforms/IndVarSimplify/X86/overflow-intrinsics.ll
Log Message:
-----------
[NFC] [IndVarSimplify] add overflowing tests (#159877)
Also use UTC for test instead.
Commit: b80b48d3e89eca606fde4443b603ba8fdd8f67c8
https://github.com/llvm/llvm-project/commit/b80b48d3e89eca606fde4443b603ba8fdd8f67c8
Author: David Salinas <dsalinas at amd.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Object/OffloadBundle.cpp
Log Message:
-----------
Fix memory leak in Offloading API (#161430)
Fix or the failing Sanitizer buildbots from PR:
https://github.com/llvm/llvm-project/pull/143342
Commit: 4e404d0e5135ae7d0d4e7cc4c9b04d456eb50a01
https://github.com/llvm/llvm-project/commit/4e404d0e5135ae7d0d4e7cc4c9b04d456eb50a01
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[CodingStandard] Require Unix line endings for all files (#161228)
Require all files to use Unix line endings, formalizing an already
followed convention.
Commit: 69b0a479ac57b6c7ce2228e1944e8fc0997260ae
https://github.com/llvm/llvm-project/commit/69b0a479ac57b6c7ce2228e1944e8fc0997260ae
Author: Jon Chesterfield <jon at spectralcompute.co.uk>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/lower-module-lds-precise-allocate-to-module-struct.ll
Log Message:
-----------
[AMDGPU] Precommit test for 160181
Commit: 0aa7da089aaab2b6e524c124701e645f2cdcab75
https://github.com/llvm/llvm-project/commit/0aa7da089aaab2b6e524c124701e645f2cdcab75
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/MustacheTest.cpp
M llvm/utils/llvm-test-mustache-spec/llvm-test-mustache-spec.cpp
Log Message:
-----------
[llvm][mustache] Fix failing StandaloneIndentation test (#159192)
When rendering partials, we need to use an indentation stream,
but when part of the partial is a unescaped sequence, we cannot
indent those. To address this, we build a common MustacheStream
interface for all the output streams to use. This allows us to
further customize the AddIndentationStream implementation
and opt it out of indenting the UnescapeSequence.
Commit: 9ce0dae54e7d34ef4e0266069c0d3f1ae5968612
https://github.com/llvm/llvm-project/commit/9ce0dae54e7d34ef4e0266069c0d3f1ae5968612
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Support/Mustache.cpp
Log Message:
-----------
[llvm][mustache] Simplify debug logging (#159193)
The existing logging was inconsistent, and we logged too many things.
This PR introduces a more principled schema, and eliminates many,
redundant log lines.
Commit: f29f1112f5cc467c0cdac05532770cdd15382c23
https://github.com/llvm/llvm-project/commit/f29f1112f5cc467c0cdac05532770cdd15382c23
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
Log Message:
-----------
[JITLink][MachO] Use Triple::isArm64e consistently.
Commit: d392563433316e310edacf35a40fb2f9aa477acc
https://github.com/llvm/llvm-project/commit/d392563433316e310edacf35a40fb2f9aa477acc
Author: ronlieb <ron.lieberman at amd.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Object/OffloadBundle.cpp
Log Message:
-----------
Revert "Fix memory leak in Offloading API" (#161465)
Reverts llvm/llvm-project#161430
Commit: 3e1d4d4144cc9d28ccd85cf49d6fc836c38ffbaa
https://github.com/llvm/llvm-project/commit/3e1d4d4144cc9d28ccd85cf49d6fc836c38ffbaa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Remove Zicntr from sifive-p450/p470/p670. (#161444)
These cores don't implement the `time` CSR. They require SBI to trap and
emulate it which is allowed by RVA20U.
Commit: 89ed5255b9ee88119e409a6d986eb1ad0e8f08e3
https://github.com/llvm/llvm-project/commit/89ed5255b9ee88119e409a6d986eb1ad0e8f08e3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
Log Message:
-----------
[RISCV] Rename BFloatVectors -> BF16Vectors in tablegen. NFC (#161469)
Part of this rename is taken from #161158, but applies it more
consistently to more variables.
I think using BF16 makes it easier to not confuse BFloat and Float when
reading.
Commit: fd4e77cf333855a495a09277f951c0ccef557772
https://github.com/llvm/llvm-project/commit/fd4e77cf333855a495a09277f951c0ccef557772
Author: Shunsuke Watanabe <watanabe.shu-06 at fujitsu.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/docs/ComplexOperations.md
M flang/docs/FlangDriver.md
M flang/test/Driver/complex-range.f90
Log Message:
-----------
[flang][driver] Accelerate complex division when `-ffast-math` is specified (#159689)
This patch accelerates complex division by passing
`-complex-range=basic` to the frontend when the `-ffast-math` option is
specified. This behavior is the same as `-fcomplex-arithmetic=basic`. A
warning is issued if a different value is specified for
`-fcomplex-arithmetic=`. The warning conditions will be unified with
clang.
Commit: 133406e3d9afb845426898154ecf532a75056d37
https://github.com/llvm/llvm-project/commit/133406e3d9afb845426898154ecf532a75056d37
Author: Un1q32 <joey.t.reinhart at gmail.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/test/CodeGen/ARM/inline-asm-clobber.ll
Log Message:
-----------
Reserve R9 on armv6 iOS 2.x (#150835)
The iOS 2.x ABI had R9 as a reserved register, 3.0 made it available,
but support for the 2.x ABI was never added to LLVM. We only use the 2.x
ABI on armv6 since before 3.0 armv6 was the only architecture supported
by iOS.
Commit: 079d589f5a389d18b6277b31a61e471ec56b5b7e
https://github.com/llvm/llvm-project/commit/079d589f5a389d18b6277b31a61e471ec56b5b7e
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/include/clang/AST/HLSLResource.h
Log Message:
-----------
[HLSL][NFC] Add missing includes for standalone header compilation (#161473)
HLSLResource.h added by #161254 builds in the context of a .cpp file
(e.g. CGHLSLRuntime.cpp) but not when doing a header compilation, e.g.:
```
clang/include/clang/AST/Attrs.inc:12:45: error: unknown type name 'raw_ostream'; did you mean 'clang::raw_ostream'?
12 | static inline void DelimitAttributeArgument(raw_ostream& OS, bool& IsFirst) {
```
Commit: a414c22f32fa08ab91d9d6fe06d6949b526bedb3
https://github.com/llvm/llvm-project/commit/a414c22f32fa08ab91d9d6fe06d6949b526bedb3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/lib/Support/Mustache.cpp
Log Message:
-----------
[Support] Fix warnings
This patch fixes:
llvm/lib/Support/Mustache.cpp:332:20: error: unused function
'tagKindToString' [-Werror,-Wunused-function]
llvm/lib/Support/Mustache.cpp:344:20: error: unused function
'jsonKindToString' [-Werror,-Wunused-function]
Commit: 6e0d519b3937a2f96179e40f417bc5cc79f3adba
https://github.com/llvm/llvm-project/commit/6e0d519b3937a2f96179e40f417bc5cc79f3adba
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-30 (Tue, 30 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
Log Message:
-----------
[ADT] Consolidate uninitialized_copy in SmallVector (NFC) (#161043)
This patch consolidates two implementations of uninitialized_copy into
a single template function.
Commit: d62776d03323e709abb8e4734e0ae36f76dba815
https://github.com/llvm/llvm-project/commit/d62776d03323e709abb8e4734e0ae36f76dba815
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
A llvm/test/Transforms/CorrelatedValuePropagation/pr161367.ll
Log Message:
-----------
[LVI] Handle constant value lattice in `getEdgeValueLocal` (#161410)
Closes https://github.com/llvm/llvm-project/issues/161367.
In https://github.com/llvm/llvm-project/pull/157614, we ignored cases
where OpLatticeVal might be a constant or notconstant. Directly
returning the result causes a type mismatch. I apologize for the
oversight in the previous code review.
This patch applies the cast op to constants. For notconstant value
lattices, I'd leave it as a todo (it is similar to the constant case,
except for trunc without nsw/nuw).
Commit: 63ca8483d0efc544c5b8c4484d36a64c3b3ff210
https://github.com/llvm/llvm-project/commit/63ca8483d0efc544c5b8c4484d36a64c3b3ff210
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
A llvm/test/Verifier/captures-metadata.ll
Log Message:
-----------
[IR] Introduce !captures metadata (#160913)
This introduces `!captures` metadata on stores, which looks like this:
```
store ptr %x, ptr %y, !captures !{!"address", !"read_provenance"}
```
The semantics are the same as replacing the store with a call like this:
```
call void @llvm.store(ptr captures(address, read_provenance) %x, ptr %y)
```
This metadata is intended for annotation by frontends -- it's not
something we can feasibly infer at this point, as it would require
analyzing uses of the pointer stored in memory.
The motivating use case for this is Rust's `println!()` machinery, which
involves storing a reference to the value inside a structure. This means
that printing code (including conditional debugging code), can inhibit
optimizations because the pointer escapes. With the new metadata we can
annotate this as a read-only capture, which has less impact on
optimizations.
Commit: 1098a5cefd764eb58e8530e821eaa5d5a6c42310
https://github.com/llvm/llvm-project/commit/1098a5cefd764eb58e8530e821eaa5d5a6c42310
Author: quic_hchandel <hchandel at qti.qualcomm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqcics.ll
Log Message:
-----------
[RISCV] Add commutative support for Qualcomm uC Xqcics extension (#161328)
This is a follow-up to #160653 doing similar changes for Xqcics.
Commit: 8c5c37582e909232dc5810c4809c2bd1a22fbe1b
https://github.com/llvm/llvm-project/commit/8c5c37582e909232dc5810c4809c2bd1a22fbe1b
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/unittests/Optimizer/Builder/FIRBuilderTest.cpp
Log Message:
-----------
[flang] add helper to create descriptor with new base address (#161347)
There is currently no helper to create a descriptor for a copy of a
Fortran entity based on the descriptor of the original entity and the
base address of the copy (most places that are doing this currently are
also doing allocation of the copy at the same time or using the
runtime).
Add a helper for this with a unit test.
Commit: 332b4deb0dfe9f4d11325513d4122e69024beea9
https://github.com/llvm/llvm-project/commit/332b4deb0dfe9f4d11325513d4122e69024beea9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/source/Expression/IRExecutionUnit.cpp
A lldb/test/API/lang/cpp/function-call-from-object-file/Makefile
A lldb/test/API/lang/cpp/function-call-from-object-file/TestFunctionCallFromObjectFile.py
A lldb/test/API/lang/cpp/function-call-from-object-file/common.h
A lldb/test/API/lang/cpp/function-call-from-object-file/lib1.cpp
A lldb/test/API/lang/cpp/function-call-from-object-file/lib2.cpp
A lldb/test/API/lang/cpp/function-call-from-object-file/main.cpp
Log Message:
-----------
[lldb][IRExecutionUnit] Return error on failure to resolve function address (#161363)
Starting with https://github.com/llvm/llvm-project/pull/148877 we
started encoding the module ID of the function DIE we are currently
parsing into its `AsmLabel` in the AST. When the JIT asks LLDB to
resolve our special mangled name, we would locate the module and resolve
the function/symbol we found in it.
If we are debugging with a `SymbolFileDWARFDebugMap`, the module ID we
encode is that of the `.o` file that is tracked by the debug-map. To
resolve the address of the DIE in that `.o` file, we have to ask
`SymbolFileDWARFDebugMap::LinkOSOAddress` to turn the address of the
`.o` DIE into a real address in the linked executable. This will only
work if the `.o` address was actually tracked by the debug-map. However,
if the function definition appears in multiple `.o` files (which is the
case for functions defined in headers), the linker will most likely
de-deuplicate that definition. So most `.o`'s definition DIEs for that
function won't have a contribution in the debug-map, and thus we fail to
resolve the address.
When debugging Clang on Darwin, e.g., you'd see:
```
(lldb) expr CXXDecl->getName()
error: Couldn't look up symbols:
$__lldb_func::0x1:0x4000d000002359da:_ZNK5clang9NamedDecl7getNameEv
Hint: The expression tried to call a function that is not present in the target, perhaps because it was optimized out by the compiler.
```
unless you were stopped in the `.o` file whose definition of `getName`
made it into the final executable.
The fix here is to error out if we fail to resolve the address, causing
us to fall back on the old flow which did a lookup by mangled name,
which the `SymbolFileDWARFDebugMap` will handle correctly.
An alternative fix to this would be to encode the
`SymbolFileDWARFDebugMap`'s module-id. And implement
`SymbolFileDWARFDebugMap::ResolveFunctionCallLabel` by doing a mangled
name lookup. The proposed approach doesn't stop us from implementing
that, so we could choose to do it in a follow-up.
rdar://161393045
Commit: 3c0f7b184d265281dfcd4fab73348bc0e72c9902
https://github.com/llvm/llvm-project/commit/3c0f7b184d265281dfcd4fab73348bc0e72c9902
Author: Hendrik_Klug <43926224+Jimmy2027 at users.noreply.github.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/python/mlir/dialects/transform/structured.py
A mlir/test/Dialect/Transform/test-promote-tensors.mlir
Log Message:
-----------
[mlir][transform] Add PromoteTensorOp (#158318)
Transform op to request a tensor value to live in a specific memory
space after bufferization
Co-authored-by: Nicolas Vasilache <Nico.Vasilache at amd.com>
Co-authored-by: Alex Zinenko <ftynse at gmail.com>
Commit: f2f0963f303be3b4b274a24aca70b51f10ea5112
https://github.com/llvm/llvm-project/commit/f2f0963f303be3b4b274a24aca70b51f10ea5112
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/LoongArch/vararg-loongarch64.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll
Log Message:
-----------
[MemorySanitizer] Generate check lines for some vararg tests (NFC)
Use UTC_ARGS: --disable to skip the tests with many arguments.
Commit: b0de7a6a53d7f3153ba5f6a74e379a96857c8692
https://github.com/llvm/llvm-project/commit/b0de7a6a53d7f3153ba5f6a74e379a96857c8692
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Integration/debug-complex-1.f90
M flang/test/Integration/debug-local-var-2.f90
M flang/test/Transforms/debug-complex-1.fir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-ref-type.fir
M flang/test/Transforms/debug-tuple-type.fir
M flang/test/Transforms/debug-vector-type.fir
Log Message:
-----------
[flang][debug] Change type*N to type(kind=N). (#161432)
It was discussed in https://github.com/llvm/llvm-project/pull/161361.
Commit: 5baf1c14640cf580f4e65375a3f9b49420dad9c6
https://github.com/llvm/llvm-project/commit/5baf1c14640cf580f4e65375a3f9b49420dad9c6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
Log Message:
-----------
[MemorySanitizer] Generate test checks for kmsan test (NFC)
Commit: 69586331e868cef99fbcea74a061bd44f57c1904
https://github.com/llvm/llvm-project/commit/69586331e868cef99fbcea74a061bd44f57c1904
Author: mikael-nilsson-arm <mikael.nilsson at arm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/in-freeze-phi.ll
Log Message:
-----------
[InstCombine] Opt phi(freeze(undef), C) -> phi(C, C) (#161181)
Try to choose a value for freeze that enables the PHI to be replaced
with its input constants if they are equal.
Commit: 6c032fa60037cb995db87b956d172480ffb54723
https://github.com/llvm/llvm-project/commit/6c032fa60037cb995db87b956d172480ffb54723
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/exp10m1f16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/exp10m1f16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/exp10m1f16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor exp10m1f16 implementation to header-only in src/__support/math folder. (#161119)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 57b1b254297ed2d2fd9560e6a5eef0c44918223a
https://github.com/llvm/llvm-project/commit/57b1b254297ed2d2fd9560e6a5eef0c44918223a
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/aapcs-volatile-bitfields.c
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/CodeGen/binassign.c
M clang/test/CIR/CodeGen/binop.c
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/builtin_bit.cpp
M clang/test/CIR/CodeGen/builtin_call.cpp
M clang/test/CIR/CodeGen/builtin_printf.cpp
M clang/test/CIR/CodeGen/cast.cpp
M clang/test/CIR/CodeGen/cmp.cpp
M clang/test/CIR/CodeGen/comma.c
M clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/cxx-default-init.cpp
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/delete.cpp
M clang/test/CIR/CodeGen/destructors.cpp
M clang/test/CIR/CodeGen/finegrain-bitfield-access.cpp
M clang/test/CIR/CodeGen/if.cpp
M clang/test/CIR/CodeGen/int-to-bool.cpp
M clang/test/CIR/CodeGen/loop.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-prototype.c
M clang/test/CIR/CodeGen/opaque.c
M clang/test/CIR/CodeGen/opaque.cpp
M clang/test/CIR/CodeGen/pointers.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CIR/CodeGen/variable-decomposition.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/wait.c
M clang/test/CIR/IR/alloca.cir
M clang/test/CIR/IR/binassign.cir
M clang/test/CIR/IR/cast.cir
M clang/test/CIR/IR/cmp.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/cast.cir
M clang/test/CIR/Lowering/if.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/canonicalize.cir
M clang/test/CIR/Transforms/if.cir
M clang/test/CIR/Transforms/switch.cir
Log Message:
-----------
[CIR] Refactor cir.cast to use uniform assembly form w/o parens, commas (#161431)
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1922
Commit: f80e7e139e3e677638233037499f8cba50c66b9e
https://github.com/llvm/llvm-project/commit/f80e7e139e3e677638233037499f8cba50c66b9e
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/fastcc.ll
Log Message:
-----------
[GlobalOpt] Check if users are CallBase when changing CC (#161399)
Fixes https://github.com/llvm/llvm-project/issues/156656
`hasChangeableCCImpl` guarantees the address of the function is not
taken, but it ignores assume-like calls.
This patch ignores assume-like calls when changing CC.
Commit: 14fcd81861aa1576d204b9146345c4426d81fc49
https://github.com/llvm/llvm-project/commit/14fcd81861aa1576d204b9146345c4426d81fc49
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU][InsertWaitCnts] Refactor some helper functions, NFC (#161160)
- Remove one-line wrappers around a simple function call when they're
only used once or twice.
- Move very generic helpers into SIInstrInfo
- Delete unused functions
The goal is simply to reduce the noise in SIInsertWaitCnts without
hiding functionality. I focused on moving trivial helpers, or helpers
with very descriptive/verbose names (so it doesn't hide too much logic
away from the pass), and that have some reusability potential.
I'm also trying to make the code style more consistent. It doesn't make
sense to see a function call `TII->isXXX` then suddenly call a random
`isY` method that just wraps around `TII->isY`.
The context of this work is that I'm trying to learn how this pass
works, and while going through the code I noticed some little things
here and there that I thought would be good to fix.
Commit: 88c668d050aceb27c161f82474efa0004eced9b2
https://github.com/llvm/llvm-project/commit/88c668d050aceb27c161f82474efa0004eced9b2
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU][SIInsertWaitCnts] De-duplicate code (NFC) (#161161)
I'm reading through the pass over and over again to try and learn how it works. I noticed some code duplication here and there while doing that.
Commit: e86b3386fda91c17add6ae25710399b832b8cb9e
https://github.com/llvm/llvm-project/commit/e86b3386fda91c17add6ae25710399b832b8cb9e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
Log Message:
-----------
[DAGCombine] Support (shl %x, constant) in foldPartialReduceMLAMulOp. (#160663)
Support shifts in foldPartialReduceMLAMulOp by treating (shl %x, %c) as
(mul %x, (shl 1, %c)).
PR: https://github.com/llvm/llvm-project/pull/160663
Commit: da1eabd238d27c19ecc05580dff6361e5a0190d4
https://github.com/llvm/llvm-project/commit/da1eabd238d27c19ecc05580dff6361e5a0190d4
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU] Remove duplicate definition of isGFX12CacheInvOrWBInst
Commit: 8c2cece14deaaa175bc665e20228280fbe6d019d
https://github.com/llvm/llvm-project/commit/8c2cece14deaaa175bc665e20228280fbe6d019d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/CAS/OnDiskTrieRawHashMap.cpp
Log Message:
-----------
Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC. (#161496)
Commit: 5c50bdcea3977672d1183ee69cb840498f2fcf15
https://github.com/llvm/llvm-project/commit/5c50bdcea3977672d1183ee69cb840498f2fcf15
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/include/lldb/Core/Mangled.h
M lldb/source/Core/Mangled.cpp
Log Message:
-----------
[lldb][Mangled][NFC] Remove redundant const-qualifier on llvm::StringRef argument
Commit: a3f667bc08cb2f547ff2139c975dd684cf005885
https://github.com/llvm/llvm-project/commit/a3f667bc08cb2f547ff2139c975dd684cf005885
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitCnts] Remove redundant TII/TRI/MRI arguments (NFC) (#161357)
WaitCntBrackets already has a pointer to its SIInsertWaitCnt instance.
With a small change, it can directly access TII/TRI/MRI that way.
This simplifies a lot of call sites which make the code easier to
follow.
Commit: 0a0d4979935cc13ecafdb8c9b00dd74779651781
https://github.com/llvm/llvm-project/commit/0a0d4979935cc13ecafdb8c9b00dd74779651781
Author: Timur Golubovich <timur.golubovich at syntacore.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
A lldb/test/API/lang/cpp/floating-types-specialization/Makefile
A lldb/test/API/lang/cpp/floating-types-specialization/TestCppFloatingTypesSpecialization.py
A lldb/test/API/lang/cpp/floating-types-specialization/main.cpp
M lldb/test/API/lang/cpp/template-arguments/TestCppTemplateArguments.py
Log Message:
-----------
[lldb][TypeSystemClang] Added unique builtins types for __bf16 and _Float16 (#157674)
During debugging applization with __bf16 and _Float16 float types it was
discovered that lldb creates the same CompilerType for them. This can
cause an infinite recursion error, if one tries to create two struct
specializations with these types and then inherit one specialization
from another.
Commit: e95ed3352e5001a038d5fbf2989f2161fc526384
https://github.com/llvm/llvm-project/commit/e95ed3352e5001a038d5fbf2989f2161fc526384
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in OpenMPDialect.cpp (NFC)
Commit: 55bd45852cde2eeb0132767f54f48589d87ce2ad
https://github.com/llvm/llvm-project/commit/55bd45852cde2eeb0132767f54f48589d87ce2ad
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M bolt/lib/Passes/PAuthGadgetScanner.cpp
M bolt/test/binary-analysis/AArch64/cmdline-args.test
M bolt/test/binary-analysis/AArch64/gs-pauth-authentication-oracles.s
M bolt/test/binary-analysis/AArch64/gs-pauth-calls.s
M bolt/test/binary-analysis/AArch64/gs-pauth-debug-output.s
M bolt/test/binary-analysis/AArch64/gs-pauth-signing-oracles.s
M bolt/test/binary-analysis/AArch64/gs-pauth-tail-calls.s
Log Message:
-----------
[BOLT] Gadget scanner: optionally assume auth traps on failure (#139778)
On AArch64 it is possible for an auth instruction to either return an
invalid address value on failure (without FEAT_FPAC) or generate an
error (with FEAT_FPAC). It thus may be possible to never emit explicit
pointer checks, if the target CPU is known to support FEAT_FPAC.
This commit implements an --auth-traps-on-failure command line option,
which essentially makes "safe-to-dereference" and "trusted" register
properties identical and disables scanning for authentication oracles
completely.
Commit: f7f37fb71ebe12721b9ad22f21ecd7e0823210d4
https://github.com/llvm/llvm-project/commit/f7f37fb71ebe12721b9ad22f21ecd7e0823210d4
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M bolt/lib/Passes/PAuthGadgetScanner.cpp
M bolt/test/binary-analysis/AArch64/gs-pauth-debug-output.s
Log Message:
-----------
[BOLT] Gadget scanner: make use of C++17 features and LLVM helpers (#141665)
Perform trivial syntactical cleanups:
- make use of structured binding declarations
- use LLVM utility functions when appropriate
- omit braces around single expression inside single-line LLVM_DEBUG()
This patch is NFC aside from minor debug output changes.
Commit: 65829ffd3eb92a1b2da2d204059da035c1a75197
https://github.com/llvm/llvm-project/commit/65829ffd3eb92a1b2da2d204059da035c1a75197
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineMinMax.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for performance-move-const-arg in SimplifyAffineMinMax.cpp (NFC)
Commit: fef7753454a51f00d1300f30d1991696c00ba6f7
https://github.com/llvm/llvm-project/commit/fef7753454a51f00d1300f30d1991696c00ba6f7
Author: David Green <david.green at arm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/cbz_wzr.mir
M llvm/test/CodeGen/AArch64/tbz-tbnz.ll
Log Message:
-----------
[AArch64] Some tests for cbz/tbz with wzr. NFC
Commit: 0d0cc06afe07f288ae18cf26e8a66bcb204146cd
https://github.com/llvm/llvm-project/commit/0d0cc06afe07f288ae18cf26e8a66bcb204146cd
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/lib/Bindings/Python/Rewrite.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for performance-unnecessary-value-param in Rewrite.cpp (NFC)
Commit: d5f98f3b01d8cece369d62366c180a5deb89e42f
https://github.com/llvm/llvm-project/commit/d5f98f3b01d8cece369d62366c180a5deb89e42f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for performance-unnecessary-copy-initialization in InferIntRangeCommon.cpp (NFC)
Commit: 93c830597cd1c68059a165de3eabea3a0b8f4526
https://github.com/llvm/llvm-project/commit/93c830597cd1c68059a165de3eabea3a0b8f4526
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Fix integral cast edge case (#161506)
We were converting the `ASInt` to as sign-less `APInt` too early and
losing the sign information.
Commit: a374017bbcc8191fa6b7b2939ffcb9bb831df419
https://github.com/llvm/llvm-project/commit/a374017bbcc8191fa6b7b2939ffcb9bb831df419
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/MemRef/ops.mlir
Log Message:
-----------
[mlir][memref] Introduce `memref.distinct_objects` op (#156913)
The `distinct_objects` operation takes a list of memrefs and returns a
list of memrefs of the same types, with the additional assumption that
accesses to these memrefs will never alias with each other. This means
that loads and stores to different memrefs in the list can be safely
reordered.
The discussion
https://discourse.llvm.org/t/rfc-introducing-memref-aliasing-attributes/88049
Commit: 2a96d19ab01a4b5d992f492233f6a21d1e7cc4e0
https://github.com/llvm/llvm-project/commit/2a96d19ab01a4b5d992f492233f6a21d1e7cc4e0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
Log Message:
-----------
[lldb][CPlusPlusLanguage] Avoid redundant const char* -> StringRef roundtrip (#161499)
We've been seen (very sporadic) lifetime issues around this area. Here's
an example backtrace:
```
[ 8] 0x0000000188e56743 libsystem_platform.dylib`_sigtramp + 55
[ 9] 0x00000001181e041f LLDB`lldb_private::CPlusPlusLanguage::SymbolNameFitsToLanguage(lldb_private::Mangled) const [inlined] unsigned long std::1::constexpr_strlen[abi:nn200100]<char>(char const*) + 7 at constexpr_c_functions.h:63:10
[ 9] 0x00000001181e0418 LLDB`lldb_private::CPlusPlusLanguage::SymbolNameFitsToLanguage(lldb_private::Mangled) const [inlined] std::__1::char_traits<char>::length[abi:nn200100](char const*) at char_traits.h:232:12
[ 9] 0x00000001181e0418 LLDB`lldb_private::CPlusPlusLanguage::SymbolNameFitsToLanguage(lldb_private::Mangled) const [inlined] llvm::StringRef::StringRef(char const*) at StringRef.h:90:33
[ 9] 0x00000001181e0418 LLDB`lldb_private::CPlusPlusLanguage::SymbolNameFitsToLanguage(lldb_private::Mangled) const [inlined] llvm::StringRef::StringRef(char const*) at StringRef.h:92:38
[ 9] 0x00000001181e0418 LLDB`lldb_private::CPlusPlusLanguage::SymbolNameFitsToLanguage(lldb_private::Mangled) const + 20 at CPlusPlusLanguage.cpp:68:62
```
Looks like we're calling `strlen` on a nullptr. I stared at this
codepath for a while but am still not sure how that could happen unless
the underlying `ConstString` somehow pointed to corrupted data.
But `SymbolNameFitsToLanguage` does some roundtripping through a `const
char*` before calling `GetManglingScheme`. No other callsite does this
and it just seems redundant.
This patch cleans this up.
rdar://161128180
Commit: da160574e0b28e279de4e06edfc66ff3c0a06c9a
https://github.com/llvm/llvm-project/commit/da160574e0b28e279de4e06edfc66ff3c0a06c9a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR] Remove unused debug macros (NFC)
Commit: 3a34710157a14d2ea3375322f259ff4f5cf4dac8
https://github.com/llvm/llvm-project/commit/3a34710157a14d2ea3375322f259ff4f5cf4dac8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[NFC][LLVM][AsmWriter] Move type printing to `WriteAsOperandInternal` (#161456)
Add option to `WriteAsOperandInternal` to print the type and use that to
eliminate explicit type printing code in several places.
Commit: 372d3fb10c9dd0ff4e780d68b86220e30fd00b27
https://github.com/llvm/llvm-project/commit/372d3fb10c9dd0ff4e780d68b86220e30fd00b27
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[CodeGen] Remove `shouldExpandPartialReductionIntrinsic()` hook (NFC) (#161498)
This is unused. Targets can lower/expand the `PARTIAL_REDUCE_*` ISD
nodes.
Commit: b413ac1af3b884af98925a9b422582ca7ebcbecd
https://github.com/llvm/llvm-project/commit/b413ac1af3b884af98925a9b422582ca7ebcbecd
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[NFC][AArch64][ISEL] Remove unnecessary predicates from partial_reduce_*mla patterns.
Commit: a33544b83c80dcaa851fabd2979def6f68dd6e7a
https://github.com/llvm/llvm-project/commit/a33544b83c80dcaa851fabd2979def6f68dd6e7a
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
Log Message:
-----------
[OpenACC][CIR] Implement 'alloca copying' for private lowering (#161382)
The previous patch ensured that we correctly got the allocas put in
place. This patch takes the address of each element of each alloca, and
copies it to the previous one. This allows us to re-form the
pointer-structure for a recipe.
Commit: f4d18c0ef8e3207b8ee2363fea60f21d4fa325bc
https://github.com/llvm/llvm-project/commit/f4d18c0ef8e3207b8ee2363fea60f21d4fa325bc
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Transform/TuneExtension/TuneExtensionOps.h
M mlir/include/mlir/Dialect/Transform/TuneExtension/TuneExtensionOps.td
M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
M mlir/python/mlir/dialects/transform/tune.py
M mlir/test/Dialect/Transform/test-tune-extension-invalid.mlir
M mlir/test/Dialect/Transform/test-tune-extension.mlir
M mlir/test/python/dialects/transform_tune_ext.py
Log Message:
-----------
[MLIR][Transform][Tune] Introduce `transform.tune.alternatives` op (#160724)
This op enables expressing uncertainty regarding what should be
happening at particular places in transform-dialect schedules. In
particular, it enables representing a choice among alternative regions.
This choice is resolved through providing a `selected_region` argument.
When this argument is provided, the semantics are such that it is valid
to rewrite the op through substituting in the selected region -- with
the op's interpreted semantics corresponding to exactly this.
This op represents another piece of the puzzle w.r.t. a toolkit for
expressing autotuning problems with the transform dialect. Note that
this goes beyond tuning knobs _on_ transforms, going further by making
it tunable which (sequences of) transforms are to be applied.
Commit: 8df0575125c6f7575aff05a8a9effa07bedc7e92
https://github.com/llvm/llvm-project/commit/8df0575125c6f7575aff05a8a9effa07bedc7e92
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
Log Message:
-----------
AMDGPU: Add peephole opt baseline tests (#161309)
Add tests which show missed folds of subregister extracts with
intermediate full copies.
Commit: 2e5a5fdd329073e3d4b174743dfc7fca655e9491
https://github.com/llvm/llvm-project/commit/2e5a5fdd329073e3d4b174743dfc7fca655e9491
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
A llvm/test/CodeGen/X86/combine-pack.ll
Log Message:
-----------
[X86] Add test showing failure to remove sign splats from PACKSS intrinsics (#161518)
PACKSS intrinsic calls are only expanded to X86ISD::PACKSS nodes during
legalisation, after which time we fail to handle cases where ASHR sign
splats (now lowered to X86ISD::VSRAI) are unnecessary.
Add additional example of FREEZE(PACKSS()) as that's an issue as well.
Commit: c09054866a1ad6c250e6c972d369b9023abb4b3b
https://github.com/llvm/llvm-project/commit/c09054866a1ad6c250e6c972d369b9023abb4b3b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/funnel.ll
Log Message:
-----------
[InstCombine] Drop poison-generating flags when reusing existing or instruction (#161504)
Closes https://github.com/llvm/llvm-project/issues/161493.
Commit: 73d9974c91413f5a6dbe6f76f4b73ad226b6276b
https://github.com/llvm/llvm-project/commit/73d9974c91413f5a6dbe6f76f4b73ad226b6276b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/freeze.ll
Log Message:
-----------
[InstCombine] Avoid self-replacing in `getUndefReplacement` (#161500)
Self-replacing has a different meaning in InstCombine. It will replace
all uses with poison.
Closes https://github.com/llvm/llvm-project/issues/161492.
Commit: a05e004b285af92f9bcef12d5ab5537c36002c13
https://github.com/llvm/llvm-project/commit/a05e004b285af92f9bcef12d5ab5537c36002c13
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
M llvm/test/Transforms/DFAJumpThreading/dfa-unfold-select.ll
Log Message:
-----------
[DFAJumpThreading] Unfold select to the incoming block of phi user (#160987)
Fixes #160250
We previously assumed the select to unfold is defined in the incoming
block of phi user, as `isValidSelectInst` filters other cases at the
initial stage. However, the selects not defined in the incoming block
may occur after unfolding the arms of the unfolded select.
This patch sinks the select into the incoming block of the phi user and
unfolds it at the incoming block.
Commit: ca1ff80a16f135306282cb8ef33d0af6ce20fa69
https://github.com/llvm/llvm-project/commit/ca1ff80a16f135306282cb8ef33d0af6ce20fa69
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Math/Transforms/Passes.td
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Math/Transforms/SincosFusion.cpp
A mlir/test/Dialect/Math/sincos-fusion.mlir
Log Message:
-----------
[MLIR] Add sincos fusion pass (#161413)
We see performance improvements from using sincos to reuse calculations
in hot loops that compute sin() and cos() of the same operand. Add a
pass to identify sin() and cos() calls in the same block with the same
operand and fast-math flags, and fuse them into a sincos op.
Follow-up to:
* #160561
* #160772
Commit: 58c959b4f79b0b0ea901c1e7b5051a16f598631e
https://github.com/llvm/llvm-project/commit/58c959b4f79b0b0ea901c1e7b5051a16f598631e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
Log Message:
-----------
[AMDGPU] Use common allUsesAvailableAt implementation [nfc] (#161418)
Replace the target specific copy with a call to the generic routine. I
don't spot any differences by eye, and there's nothing in the original
review discussion (#124327) which makes it clear why this was
duplicated.
Commit: cd0f560cc7e88bffedc4c34e3eb3efbf00dcb3ef
https://github.com/llvm/llvm-project/commit/cd0f560cc7e88bffedc4c34e3eb3efbf00dcb3ef
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/pr161420.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4-lane-x4.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4.ll
Log Message:
-----------
[AArch64][SME] Precommit tests for LUT4I `Chain` issues (NFC) (#161505)
These tests show that `luti4` intrinsics are currently incorrectly
CSD'd.
Commit: 8f77621574176387f906b8ceef9e1abb90bf22f6
https://github.com/llvm/llvm-project/commit/8f77621574176387f906b8ceef9e1abb90bf22f6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/builtin-assume-aligned.cpp
Log Message:
-----------
[clang] Convert second arg of __builtin_assume_aligned to ConstantExpr (#161314)
Since the second argument must be a constant integer, we can as well
convert it to a `ConstantExpr` in Sema.
Fixes https://github.com/llvm/llvm-project/issues/161272
Commit: 50c8e5d730ac55454ef5c1f58fbc9096e946240c
https://github.com/llvm/llvm-project/commit/50c8e5d730ac55454ef5c1f58fbc9096e946240c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-pack.ll
Log Message:
-----------
[X86] SimplifyDemandedBitsForTargetNode - generalize X86ISD::VSRAI handling when only demanding 'known signbits' (#161523)
If we only demand bits that already match the signbit then we don't need to shift.
Generalizes an existing pattern that just handled signbit-only demanded bits to match what we do for ISD::SRA.
Commit: 13ce5f249ed911971fe899e318d08765399d8ce1
https://github.com/llvm/llvm-project/commit/13ce5f249ed911971fe899e318d08765399d8ce1
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
Log Message:
-----------
[OpenACC] Remove unnecessary uses of `getResult`, fix cast tests (#161526)
A previous review comment pointed out that operations with only a single
result implicitly convert to `mlir::Value`. This patch removes the
explicit use of `getResult` where it is unnecessary in OpenACC lowering.
However, there ARE a few cases where it is necessary where the
`mlir::ValueRange` implicit constructor from a single value is being
used, so those are untouched.
Additionally, while the previous patch was being committed (#161382), a
second patch (#161431) changed the format of cir.casts, so this patch
fixes the additional test lines for that as well.
Commit: 9e0c0a09392ff7d3b196b17c77595e921e35d765
https://github.com/llvm/llvm-project/commit/9e0c0a09392ff7d3b196b17c77595e921e35d765
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
Log Message:
-----------
[LLVM][SCEV] udiv (mul nuw a, vscale), (mul nuw b, vscale) -> udiv a, b (#157836)
Commit: edb80a8d7fb2e1e29a4cb792148b4ffd441eb114
https://github.com/llvm/llvm-project/commit/edb80a8d7fb2e1e29a4cb792148b4ffd441eb114
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/test/API/lang/cpp/floating-types-specialization/TestCppFloatingTypesSpecialization.py
M lldb/test/API/lang/cpp/template-arguments/TestCppTemplateArguments.py
Log Message:
-----------
[lldb][test] Fix bf16 test cases on Arm 32-bit (#161528)
Fixes #157674
On ARM, the presence of a specific bf16 type in the AST is gated by:
```
bool ARMTargetInfo::hasBFloat16Type() const {
// The __bf16 type is generally available so long as we have any fp registers.
return HasBFloat16 || (FPU && !SoftFloat);
}
```
And the target we use when evaluating symbols (derived from the program
file, I think, haven't found it yet) does not enable any of this.
This means that we fall back to __fp16.
So for parts of the testing we just need to expect __fp16 instead, and
others we need to skip because now a class looks like it inherits from
itself.
There's a proper fix here somewhere but I don't know what it is yet.
Commit: 664b227089a2d3a72b15018018c5e8e4e639f944
https://github.com/llvm/llvm-project/commit/664b227089a2d3a72b15018018c5e8e4e639f944
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
Log Message:
-----------
[LV] Keep duplicate recipes in VPExpressionRecipe (#156976)
The VPExpressionRecipe class uses a set to store its bundled recipes. If
repeated recipes are bundled then the duplicates will be lost, causing
the following recipes to not be at the expected place in the set.
When printing a reduce.add(mul(ext, ext)) bundle, for example, if the
extends are the same then the 3rd element of the set will be the
reduction, rather than the expected mul, causing a cast error. With this
change, the recipes are at the expected index in the set.
Fixes #156464
Commit: 7ae3eca6572fe463ed51e82e63890eb7d77096d7
https://github.com/llvm/llvm-project/commit/7ae3eca6572fe463ed51e82e63890eb7d77096d7
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/test/Shell/lit.cfg.py
Log Message:
-----------
[lldb][test] Allow '.c' files to be used as shell tests (#161520)
Required for https://github.com/llvm/llvm-project/pull/161521
Commit: f33564b9afaa34ffd92b754db7a5ff8ff5e60897
https://github.com/llvm/llvm-project/commit/f33564b9afaa34ffd92b754db7a5ff8ff5e60897
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/include/lldb/Core/Mangled.h
Log Message:
-----------
[lldb][NFCI] Remove the non-const reference Mangled::GetMangledName accessor (#161495)
We've been seen (very sporadic) lifetime issues around this area. We
noticed that `GetMangledName` has two accessors, one of which returns a
non-const reference. I audited all the callsites and no users of this
overload actually mutate the `ConstString` itself (which is a suspicious
thing to do anyway since it's just a wrapper around a `const char*`).
This patch removes the redundant overload.
rdar://161128180
Commit: 0e17fb52da131a21ec5ad4878ee3b54b8deb5b59
https://github.com/llvm/llvm-project/commit/0e17fb52da131a21ec5ad4878ee3b54b8deb5b59
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/test/CIR/CodeGen/struct.cpp
Log Message:
-----------
[CIR] Implement GenericSelectionExpr for AggregateExpr (#161003)
Implement the GenericSelectionExpr for AggregateExpr
Commit: 1c7f40bf832222ed6b5435a6a19b4ef3c652bd9f
https://github.com/llvm/llvm-project/commit/1c7f40bf832222ed6b5435a6a19b4ef3c652bd9f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-pack.ll
Log Message:
-----------
[X86] X86ISD::PACKSS/US do not create undef/poison (#161534)
Commit: 825d82d0515d7d40c280547f6dcbf0aba9255289
https://github.com/llvm/llvm-project/commit/825d82d0515d7d40c280547f6dcbf0aba9255289
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[NFC][LLVM] Misc code cleanup in AsmWriter.cpp (#161522)
- Change function/variable names to follow LLVM coding standard.
- Use `auto` for variables initialized using `dyn_cast`.
- Use `ArrayRef` instead of const vector references for function
arguments.
- Use `interleaved` to print comma separated lists of integers.
- Inline some instances of `incorporateFunction` lambda that have a
single use.
Commit: 9f7e7f7d9c9f46cfe83481b1e79d7c8a3e11580e
https://github.com/llvm/llvm-project/commit/9f7e7f7d9c9f46cfe83481b1e79d7c8a3e11580e
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
A lldb/test/Shell/Expr/TestGlobalSymbolObjCConflict.c
Log Message:
-----------
[lldb][MachO] Fix inspection of global variables that start with 'O' (#161521)
On Darwin C-symbols are prefixed with a '_'. The LLDB Macho-O parses
handles Objective-C metadata symbols starting with '_OBJC' specially.
Previously global symbols starting with a '_O' prefix were lost because
of incorrectly scoped if-guards. This patch removes those checks.
There is more cleanup that can be done in this file because there's a
bunch of duplicated checks for these ObjC symbols. I decided to leave
that for an NFC follow-up.
Depends on https://github.com/llvm/llvm-project/pull/161520
rdar://158159242
Commit: aee99e8015daa9f53ab1fd4e5b24cc4c694bdc4a
https://github.com/llvm/llvm-project/commit/aee99e8015daa9f53ab1fd4e5b24cc4c694bdc4a
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/wasm/__c_longjmp.S
A compiler-rt/lib/builtins/wasm/__cpp_exception.S
Log Message:
-----------
[WebAssembly] Define llvm-internal WasmEH tags in compiler-rt (#160959)
The `__c_longjmp` and `__cpp_exceptions` tags are used internally by
llvm to implement setjmp/longjmp and C++ exception handling
respectively.
These symbols were previously defined weakly in each object file but
were recently converted to external references in #159143. They now need
to be defined somewhere in the runtime libraries. I think compiler-rt is
likely the most sensible place for them.
Commit: 23e081524fd9f64fb3430822e879b6dc36a1d3f1
https://github.com/llvm/llvm-project/commit/23e081524fd9f64fb3430822e879b6dc36a1d3f1
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
[lldb][MachO][NFC] Extract ObjC metadata symbol parsing into helper function (#161536)
Just a simple de-duplication of the same code. We saw a bug here
recently (https://github.com/llvm/llvm-project/pull/161521). Might as
well isolate this all in one place.
rdar://158159242
Commit: 59fe8401f473dc77825b7bdfc82dc1628ddb82cc
https://github.com/llvm/llvm-project/commit/59fe8401f473dc77825b7bdfc82dc1628ddb82cc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
[LV] Use StringRef::consume_front. NFC (#161454)
Commit: 0e124b9586b862e749a3c9ee8b43cf18ad9c2812
https://github.com/llvm/llvm-project/commit/0e124b9586b862e749a3c9ee8b43cf18ad9c2812
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
M llvm/lib/Support/StringMap.cpp
Log Message:
-----------
[ADT] Use "if constexpr" with shouldReverseIterate (#161477)
This patch uses "if constexpr" whenever we call shouldReverseIterate
in "if" conditions. Note that shouldReverseIterate is a constexpr
function.
Commit: 190826c5df1ee34bf04823ba3b9d448e18b877ed
https://github.com/llvm/llvm-project/commit/190826c5df1ee34bf04823ba3b9d448e18b877ed
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/IntervalTree.h
M llvm/include/llvm/Support/FormatProviders.h
M llvm/include/llvm/Support/FormatVariadicDetails.h
M llvm/include/llvm/Support/HashBuilder.h
Log Message:
-----------
[ADT, Support] Drop extraneous std::bool_constant (NFC) (#161478)
This patch drops extraneous std::bool_constant, replacing:
std::bool_constant<std::is_foo_v<...>>
with:
std::is_foo<...>
Commit: 09dbb3e25444ec93b45320061932a1328f0d1ed8
https://github.com/llvm/llvm-project/commit/09dbb3e25444ec93b45320061932a1328f0d1ed8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/Format.h
Log Message:
-----------
[Support] Use a C++17 fold expression in a static_assert (NFC) (#161479)
This patch simplifies a recursive use of a type trait to a C++17 fold
expression.
Commit: 515660d843b04d62eed816e9fb191f31af805e4b
https://github.com/llvm/llvm-project/commit/515660d843b04d62eed816e9fb191f31af805e4b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/InstructionCost.h
Log Message:
-----------
[Support] Make getMaxValue and getMinValue constexpr variables (NFC) (#161480)
This patch makes getMaxValue and getMinValue constexpr variables and
"inlines" the calls to getMaxValue and getMinValue.
We could probably make InstructionCost constexpr also, but that's left
for another day.
Commit: a6bf271ffec9b4b68e5b1f5270b8d8d6f28dac79
https://github.com/llvm/llvm-project/commit/a6bf271ffec9b4b68e5b1f5270b8d8d6f28dac79
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/docs/DirectXUsage.rst
Log Message:
-----------
[llvm] Proofread DirectXUsage.rst (#161481)
Commit: bb16c56019f16998235e8a8c43dc072b03fe1dc0
https://github.com/llvm/llvm-project/commit/bb16c56019f16998235e8a8c43dc072b03fe1dc0
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
A llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check-dl.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[LoopIdiom] Fix a DL-related crash in optimizeCRCLoop (#161509)
Commit: cbaf3c60184da7e89e0c6c342d04e94746bf72f0
https://github.com/llvm/llvm-project/commit/cbaf3c60184da7e89e0c6c342d04e94746bf72f0
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
A clang/test/OpenMP/amdgcn_save_temps.c
Log Message:
-----------
Add test to show save-temps is broken for amdgcn target. (#161472)
In response to request here
https://github.com/llvm/llvm-project/pull/160935
by @jansvoboda11
Commit: 91c35d6378910ae76b8e8644825d8458f5d44ca1
https://github.com/llvm/llvm-project/commit/91c35d6378910ae76b8e8644825d8458f5d44ca1
Author: Nico Weber <thakis at chromium.org>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
Log Message:
-----------
[gn] port aee99e8015da
Commit: a9b8dfe7b5f224e2d442352979cf2e0c1c0b539b
https://github.com/llvm/llvm-project/commit/a9b8dfe7b5f224e2d442352979cf2e0c1c0b539b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
A libcxx/utils/find-rerun-candidates
M libcxx/utils/visualize-historical
Log Message:
-----------
[libc++] Add a script to find outliers and re-run candidates in LNT results
This allows selectively re-running benchmarks that are suspected to contain
a lot of noise.
Commit: 8907b6d39371d439461cdd3475d5590f87821377
https://github.com/llvm/llvm-project/commit/8907b6d39371d439461cdd3475d5590f87821377
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/struct-return-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/remark-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/scalar-steps-with-users-demanding-all-lanes-and-first-lane-only.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/pr34438.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scev-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/constantfolder-infer-correct-gepty.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/flags.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction-multiple-uses-in-same-instruction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-neg-off.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pr154045-dont-fold-extractelement-livein.ll
M llvm/test/Transforms/LoopVectorize/pr32859.ll
M llvm/test/Transforms/LoopVectorize/pr36983-multiple-lcssa.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reverse-induction-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-neg-cond.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-hint.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/strided-accesses-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-loads-p16.ll
M llvm/test/Transforms/LoopVectorize/trunc-reductions.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LoopVectorize/widen-intrinsic.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
Log Message:
-----------
[VPlan] Remove original loop blocks if dead. (#155497)
Build on top of https://github.com/llvm/llvm-project/pull/154510 to
completely remove the blocks of dead scalar loops.
Depends on https://github.com/llvm/llvm-project/pull/154510.
PR: https://github.com/llvm/llvm-project/pull/155497
Commit: 240b73e10f5c6549776cfd3847db2be14dc42776
https://github.com/llvm/llvm-project/commit/240b73e10f5c6549776cfd3847db2be14dc42776
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/ProfDataUtils.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[SimplifyCFG][PGO] Reuse existing `setBranchWeights` (#160629)
The main difference between SimplifyCFG's `setBranchWeights` and the ProfDataUtils' is that the former doesn't propagate all-zero weights. That seems like a sensible thing to do, so updated the latter accordingly, and added a flag to control the behavior.
Also moved to ProfDataUtils the logic fitting 64-bit weights to 32-bit.
As side-effect, this fixes some profcheck failures.
Commit: 42ab473f518c5f180455c674cbaba70a0b2634b7
https://github.com/llvm/llvm-project/commit/42ab473f518c5f180455c674cbaba70a0b2634b7
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/xqcicli.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
Log Message:
-----------
[RISCV] Xqci with Short Forward Branches (#161407)
This change implements support for the combination of Xqci and the Short
Forward Branch optimisation.
In particular, we want to prioritise `Branch+ALU` (short forward
branches) over the equivalent `ALU+CMov`, when the compared values are
both registers, and the selected values come from registers (as this is
what `PseudoCCMOVGPR` supports).
However, when expanding `PseudoCCMOVGPR` (i.e., `Branch+MV`), we instead
want to expand it to a conditional move (for code size reasons), so I
have added `RISCVExpandPseudo::expandCCOpToCMov` to try to do so. This
mostly works, except if `PseudoCCMOVGPR` is comparing against zero and
gets commuted - as can be seen in one example in `foo` in
`select-cc.ll`.
This change:
- updates the attributes used for the XQCI RUN lines for the select
tests.
- modifies the CodeGen patterns and predicates to prioritise selecting
the SFB Pseudo.
- adds CodeGen patterns for MVLTI/MVLTUI/MVGEI/MVGEUI with imm=zero, to
prioritise over the equivalent `Select_GPR_Using_CC_GPR` patterns for
rhs=X0.
- adds a hook to attempt to turn the predicated-mov Pseudo back into a
Conditional Move from Xqcicm (which matches the pseudo in terms of tied
register operands).
Commit: 57a9f79336abebbdfffd52270bb615f7189758d2
https://github.com/llvm/llvm-project/commit/57a9f79336abebbdfffd52270bb615f7189758d2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/freeze-phi.ll
Log Message:
-----------
[ValueTracking] Take PHI's poison-generating flags into account (#161530)
ninf/nnan in the phi node may produce poison values. They should be
considered in `isGuaranteedNotToBeUndefOrPoison`.
Closes https://github.com/llvm/llvm-project/issues/161524.
Commit: e1bd9afd648f7d697da64775a79b5bd0d434b909
https://github.com/llvm/llvm-project/commit/e1bd9afd648f7d697da64775a79b5bd0d434b909
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CAS/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CAS/BUILD.gn
Log Message:
-----------
[gn build] Port 2936a2c882d7
Commit: 03cb514abe018985387d3e39e9e78bcfe339e874
https://github.com/llvm/llvm-project/commit/03cb514abe018985387d3e39e9e78bcfe339e874
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Core/BUILD.gn
Log Message:
-----------
[gn build] Port da315a352880
Commit: 5a80fb9177e3c831c9c574400a13d77393397f2a
https://github.com/llvm/llvm-project/commit/5a80fb9177e3c831c9c574400a13d77393397f2a
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
Revert "[lldb][MachO][NFC] Extract ObjC metadata symbol parsing into helper function (#161536)"
This reverts commit 23e081524fd9f64fb3430822e879b6dc36a1d3f1.
Commit: 65fd44eb0d9211035c4aaee85bc78e49c4682fab
https://github.com/llvm/llvm-project/commit/65fd44eb0d9211035c4aaee85bc78e49c4682fab
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[clang-linker-wrapper][NFC] Invert condition for readability (#161557)
I find the positive expressions easier to read than negative.
Commit: 2d6e7ef567a80b887904221c4eb1320b4d5684b9
https://github.com/llvm/llvm-project/commit/2d6e7ef567a80b887904221c4eb1320b4d5684b9
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
A llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
[LV] Add additional tests for replicating load/store costs.
Includes test for https://github.com/llvm/llvm-project/issues/161404
Commit: fc6cc4009ff2dabd8e47d48009ca18609765c872
https://github.com/llvm/llvm-project/commit/fc6cc4009ff2dabd8e47d48009ca18609765c872
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[AsmPrinter] Remove unnecessary casts. NFC
Commit: 62c50fd7955a1b2b0678b97038832a155ca97723
https://github.com/llvm/llvm-project/commit/62c50fd7955a1b2b0678b97038832a155ca97723
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Retrieve canonical IV directly in preparePlanForEpilogue (NFCI).
Move code handling canonical IV out of the loop, simplifying the loop
body. Preparation for follow-up changes
Commit: 37637120af80672002a97c330077e31df7432261
https://github.com/llvm/llvm-project/commit/37637120af80672002a97c330077e31df7432261
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Update ComplexRealOp to work on scalar type (#161080)
Update cir::CreateRealOp to make it visible on scalars
Issue #160568
Commit: e84dcba9246d696715fe1daa4ddb218182580a70
https://github.com/llvm/llvm-project/commit/e84dcba9246d696715fe1daa4ddb218182580a70
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/lib/IR/Builders.cpp
Log Message:
-----------
[MLIR] Remove leftover debug print code
This was incorrectly left and merged with #160615
Commit: 9e04291fd20489882259625ec327b87ecef6fa8c
https://github.com/llvm/llvm-project/commit/9e04291fd20489882259625ec327b87ecef6fa8c
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Log Message:
-----------
[InstCombine] linearize complexity of `findDemandedEltsByAllUsers()` (#161436)
Each call to `findemandedEltsBySingleUser()` returns a new APInt that
must be OR'd with the current APInt. For large vectors with many uses
this can be slow, if the total number of operations is `{# uses} x {size
of vector}`. Instead or OR'ing, use `setBit()` on the passed-in APInt.
Commit: 78c65545d4694e043b593e4cca7c7281a639247b
https://github.com/llvm/llvm-project/commit/78c65545d4694e043b593e4cca7c7281a639247b
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/include/clang/AST/CharUnits.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/StaticAnalyzer/Core/Store.cpp
Log Message:
-----------
[AST] Give `CharUnits::operator%` a consistent type. NFC (#160781)
Update the `operator%` overload that accepts `CharUnits` to return
`CharUnits` to match the other `operator%`. This is more logical than
returning an `int64` and cleans up users that want to continue to do
math with the result.
Many users of this were explicitly comparing against 0. I considered
updating these to compare against `CharUnits::Zero` or even introducing
an `explicit operator bool()`, but they all feel clearer if we update
them to use the existing `isMultipleOf()` function instead.
Commit: 0e14973f3cff922549b472aebc4c3b0dc1fc4d76
https://github.com/llvm/llvm-project/commit/0e14973f3cff922549b472aebc4c3b0dc1fc4d76
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/CMakeLists.txt
A llvm/test/Unit/CMakeLists.txt
Log Message:
-----------
[NFC][LLVM-Tests] Specialize test suite for LLVM unit tests (#161442)
Remove `UnitTests` from LLVM_TEST_DEPENDS_COMMON and create a
specialized lit suite for unit-tests and that depends only on
`UnitTests`.
Commit: ec982fac1d1d9968f5167c6dce244428bb590318
https://github.com/llvm/llvm-project/commit/ec982fac1d1d9968f5167c6dce244428bb590318
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLPVectorizer] Change arguments of 'isStridedLoad' (NFC) (#160401)
This is needed to reduce the diff for the future work on widening
strided loads. Also, with this change we'll be able to re-use this for
the case when each pointer represents a start of a group of contiguous
loads.
Commit: 15dc80fda748b094c28942e0b360a8fc2db8fd20
https://github.com/llvm/llvm-project/commit/15dc80fda748b094c28942e0b360a8fc2db8fd20
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
Log Message:
-----------
[SLPVectorizer][NFC] A test for widening constant strided loads. (#160552)
Precommit a test.
Commit: 9a30ada53d5ef8d651c75795af2f6e9c48a1eecb
https://github.com/llvm/llvm-project/commit/9a30ada53d5ef8d651c75795af2f6e9c48a1eecb
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
Log Message:
-----------
[CIR][NFC] Fix CIR build (#161577)
This fixes the CIR build after recent changes to CharUnits.
Commit: 71365c0b6b95eb6874b08f32fe58b5419979ff4c
https://github.com/llvm/llvm-project/commit/71365c0b6b95eb6874b08f32fe58b5419979ff4c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
Log Message:
-----------
[CIR][NFC] Fix CIR build after CharUnits change (#161580)
My previous attempt to fix this missed one case.
Commit: 56ca23c46dfd3b4a8cfd5cff05680ffcb20dde44
https://github.com/llvm/llvm-project/commit/56ca23c46dfd3b4a8cfd5cff05680ffcb20dde44
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/test/CodeGenHLSL/RootSignature.hlsl
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-AddressU.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-AddressV.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-AddressW.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-BorderColor.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-ComparisonFunc.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-Filter.ll
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-Flag.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MaxAnisotropy.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MaxLod.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MinLod.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MinLopBias.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-RegisterSpace.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-ShaderRegister.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-ShaderVisibility.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers.ll
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers_V3.ll
M llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler.ll
M llvm/test/CodeGen/DirectX/rootsignature-validation-fail-static-sampler-range.ll
Log Message:
-----------
[DirectX] Updating Root Signature Metadata to contain Static Sampler flags (#160210)
Root Signature 1.2 adds flags to static samplers. This requires us to
change the metadata representation to account for it when being
generated. This patch focus on the metadata changes required in the
backend, frontend changes will come in a future PR.
Commit: c4788bff8266497aafd526f887722982127a2e11
https://github.com/llvm/llvm-project/commit/c4788bff8266497aafd526f887722982127a2e11
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Support/ScopedPrinter.cpp
Log Message:
-----------
[NFC][LLVM][Support] Misc code cleanup in ScopedPrinter (#161462)
Add missing file header to ScopedPrinter.cpp and adjust the code to
conform to LLVM coding standards.
Commit: b389adf56a1610cbdf0aa0a7b0b70b2c6b049f83
https://github.com/llvm/llvm-project/commit/b389adf56a1610cbdf0aa0a7b0b70b2c6b049f83
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Log Message:
-----------
[RISCV] Allow non-canonicalized splats in isProfitableToSinkOperands (#161586)
This isn't an optimization change - IR transforms should have remove the
operands and replaced them with poison. However, I noticed the
non-canonical splat structure in a couple of llvm-reduce outputs. This
results in us creating extremely atypical IR which is quite misleading
about the true cause of what's going on. (Because the non-canonical
splat doesn't get sunk, we then prone whatever was actually holding it
outside the loop in the original example, eliminating insight as to the
true cause of whatever issue we're debugging.)
Commit: 94b2617590c11b372a2161ccdfe52ecd73d58ec1
https://github.com/llvm/llvm-project/commit/94b2617590c11b372a2161ccdfe52ecd73d58ec1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Remove VPIRPhis in exit blocks when deleting scalar loop BBs.
DeleteDeadBlocks will remove single-entry phis. Remove them from the exit
VPIRBBs in VPlan as well, otherwise we would retain references to deleted
IR instructions.
Fixes MSan failures after 8907b6d39
https://lab.llvm.org/buildbot/#/builders/164/builds/14013
Commit: ba5141d27c66136d0dda866d30a495940474c528
https://github.com/llvm/llvm-project/commit/ba5141d27c66136d0dda866d30a495940474c528
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/declare-simd.f90
Log Message:
-----------
[flang][OpenMP] Check contatining scoping unit in DECLARE_SIMD (#161556)
Check if the name on DECLARE_SIMD is the name of the containing scoping
unit.
Fixes https://github.com/llvm/llvm-project/issues/161516
Commit: b66dfa7273f0d7953965e00af3999315a015a563
https://github.com/llvm/llvm-project/commit/b66dfa7273f0d7953965e00af3999315a015a563
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/include/lldb/Target/Statistics.h
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Target/Statistics.cpp
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
A lldb/test/API/functionalities/stats_api/arm64-minidump-build-ids.yaml
Log Message:
-----------
[LLDB] Add load core time to target metrics (#161581)
This patch adds a load core time, right now we don't have much insight
into the performance of load core, especially for large coredumps. To
start collecting information on this I've added some minor
instrumentation code to measure the two call sites of `LoadCore`.
I've also added a test to validate the new metric is output in
statistics dump
Commit: f1986d9d4467108859cc7e5061b7ca9c48e2ec24
https://github.com/llvm/llvm-project/commit/f1986d9d4467108859cc7e5061b7ca9c48e2ec24
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Fix real and fake true16 v_cvt_f32_bf16 disasm (#161578)
Commit: f2c8c42821a8c6de8984a1e7a932233cf221d5c1
https://github.com/llvm/llvm-project/commit/f2c8c42821a8c6de8984a1e7a932233cf221d5c1
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/HLSLRootSignatureTokenKinds.def
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/test/AST/HLSL/RootSignature-Target-AST.hlsl
M clang/test/AST/HLSL/RootSignatures-AST.hlsl
M clang/test/CodeGenHLSL/RootSignature.hlsl
M clang/test/SemaHLSL/RootSignature-err.hlsl
M clang/test/SemaHLSL/RootSignature-flags-err.hlsl
M clang/unittests/Lex/LexHLSLRootSignatureTest.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/unittests/Frontend/HLSLRootSignatureDumpTest.cpp
Log Message:
-----------
[HLSL] Update Frontend to support version 1.2 of root signature (#160616)
This patch updates the frontend to support version 1.2 of root
signatures, it adds parsing, metadata generation and a few tests.
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 69a53b8d54a6876dd322923a148d47749b76c5fc
https://github.com/llvm/llvm-project/commit/69a53b8d54a6876dd322923a148d47749b76c5fc
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/wsloop-collapse-continue.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do13.f90
Log Message:
-----------
[Flang] Fix perfect loop nest detection (#161554)
PR #160283 uses `Unwrap` to detect a `continue` statement, but it
applied it on the loop body itelf which sometimes finds a trailing
continue statement, but not always. Apply `Unwrap` on the last body
statement instead, where the `continue` is expected.
Fixes #161529
Commit: 1a850279c5a6e3662f3a7b40a9ea097838c2aca0
https://github.com/llvm/llvm-project/commit/1a850279c5a6e3662f3a7b40a9ea097838c2aca0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
[LV] Re-compute cost of scalarized load users.
If there are direct memory op users of the newly scalarized load,
their cost may have changed because there's no scalarization
overhead for the operand. Update it.
This ensures assigning consistent costs to scalarized memory
instructions that themselves have scalarized memory instructions as
operands.
Commit: 39410dff52d813ccfc7efc6fc0c6afd4583e14a6
https://github.com/llvm/llvm-project/commit/39410dff52d813ccfc7efc6fc0c6afd4583e14a6
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/test/OpenMP/amdgcn_save_temps.c
Log Message:
-----------
[clang] Invert condition refactored in #160935 (#161583)
The PR #160935 incorrectly replaced `llvm::sys::fs::getUniqueID()` with
`llvm::vfs::FileSystem::exists()` in a condition. That's incorrect,
since the first function returns `std::error_code` that evaluates to
`true` when there is an error (file doesn't exist), while the new code
does the opposite. This PR fixes that issue by inverting the
conditional.
Co-authored-by: ronlieb <ron.lieberman at amd.com>
Commit: f122484b998d8dbfdaf2e6b9c222438c71e90d86
https://github.com/llvm/llvm-project/commit/f122484b998d8dbfdaf2e6b9c222438c71e90d86
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M clang-tools-extra/clang-apply-replacements/lib/Tooling/ApplyReplacements.cpp
M clang-tools-extra/clang-move/Move.cpp
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/SystemIncludeExtractor.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/Path.h
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/tools/llvm-config/llvm-config.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-opt-report/OptReport.cpp
M llvm/unittests/Support/Path.cpp
Log Message:
-----------
[llvm][support] Move `make_absolute` from `sys::fs` to `sys::path` (#161459)
The `llvm::sys::fs::make_absolute(const Twine &, SmallVectorImpl<char>
&)` functions doesn't perform any FS access - it only modifies the
second parameter via path/string operations. This function should live
in the `llvm::sys::path` namespace for consistency and for making it
easier to spot function calls that perform IO.
Commit: 103d2cae80160ebe79a91e4b4239140e2cd52283
https://github.com/llvm/llvm-project/commit/103d2cae80160ebe79a91e4b4239140e2cd52283
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
Log Message:
-----------
[alpha.webkit.RetainPtrCtorAdoptChecker] Allow leakRef in copy methods (#160986)
Allow leakRef() in the return statement of an Objective-C copy method
and other methods which return +1.
Commit: e2f8bfc55079143e955c08da2b4d20ef3e97a332
https://github.com/llvm/llvm-project/commit/e2f8bfc55079143e955c08da2b4d20ef3e97a332
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[clang-sycl-linker][NFC] Remove dead includes (#161564)
These includes are not used by ClangSYCLLinker.cpp directly.
Explicitly include FormatVariadic.h for formatv declaration, which was implicitly included by removed headers.
Commit: 1e4d4bb584a1c35c5f7801c68b9dfccd6130caab
https://github.com/llvm/llvm-project/commit/1e4d4bb584a1c35c5f7801c68b9dfccd6130caab
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/ExprCXX.h
M clang/lib/AST/Decl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
Log Message:
-----------
[Clang][NFC] Refactor operator delete argument handling (#160554)
This change moves the getUsualDeleteParams function into the
FunctionDecl class so that it can be shared between LLVM IR and CIR
codegen.
Commit: 780f69cd922d8925648e11e771e77f0b46190e5b
https://github.com/llvm/llvm-project/commit/780f69cd922d8925648e11e771e77f0b46190e5b
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/CMakeLists.txt
A clang/cmake/caches/BOLT-CSSPGO.cmake
M clang/cmake/caches/BOLT-PGO.cmake
A clang/cmake/caches/CSSPGO.cmake
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[Clang][CMake] Add CSSPGO support to LLVM_BUILD_INSTRUMENTED (#79942)
Build on Clang-BOLT infrastructure to collect sample profile for CSSPGO.
Add CSSPGO.cmake and BOLT-CSSPGO.cmake to automate CSSPGO/+BOLT
Clang builds.
Note that `CLANG_PGO_TRAINING_DATA_SOURCE_DIR` is required as built-in
training set is inadequate for collecting sampled profile.
Hardware compatibility: CSSPGO requires synchronized (0-skid) call
and branch stacks, which is only available with Intel PEBS (Sandy
Bridge+),
AMD Zen3 with BRS, Zen4 with LBRv2+LBR_PMC_FREEZE, and Zen5 with LBRv2.
This patch adds support for Intel `br_inst_retired.near_taken:uppp`
event.
Test Plan:
Added BOLT-CSSPGO.cmake with same use as BOLT-PGO.cmake,
e.g. for bootstrapped ThinLTO+CSSPGO+BOLT, with CSSPGO profile collected
from LLVM build, and BOLT profile collected from Hello World
(instrumentation):
```
cmake -B clang-csspgo-bolt -S /path/to/llvm-project/llvm \
-DLLVM_ENABLE_LLD=ON -DBOOTSTRAP_LLVM_ENABLE_LLD=ON \
-DBOOTSTRAP_BOOTSTRAP_LLVM_ENABLE_LLD=ON \
-DPGO_INSTRUMENT_LTO=Thin \
-DBOOTSTRAP_CLANG_PGO_TRAINING_DATA_SOURCE_DIR=/path/to/llvm-project/llvm \
-GNinja -C /path/to/llvm-project/clang/cmake/caches/BOLT-CSSPGO.cmake
ninja stage2-clang-bolt
...
warning: Sample PGO is estimated to optimize better with 19.5x more samples. Please consider increasing sampling rate or profiling for longer duration to get more samples.
...
[2800/2801] Optimizing Clang with BOLT
BOLT-INFO: 8189 out of 106942 functions in the binary (7.7%) have non-empty execution profile
13776393 : taken branches (-42.1%)
```
Performance testing with Clang:
- Setup: Clang-BOLT testing harness
https://github.com/aaupov/llvm-devmtg-2022/commit/9f2b46f67a1930a51c58a0e4894637a8c64c570e
- CSSPGO training: building LLVM,
- InstrPGO training: building Hello World,
- BOLT training: building Hello World, instrumentation,
- benchmark: building small LLVM tool (not),
- 2S Intel SKX Xeon 6138 with 40C/80T and 256GB RAM, using 20C/40T for
build,
- Results, wall time, lower is better
- Baseline (bootstrapped build): 10.36s,
- InstrPGO + ThinLTO: 9.34s,
- CSSPGO + ThinLTO: 8.85s.
- BOLT results, for reference:
- Baseline: 9.09s,
- InstrPGO + ThinLTO: 9.09s,
- CSSPGO + ThinLTO: 8.58s.
---------
Co-authored-by: Matthias Braun <matze at braunis.de>
Commit: bdd98a01478ddcb99b05d9d2eb20bf4985a21683
https://github.com/llvm/llvm-project/commit/bdd98a01478ddcb99b05d9d2eb20bf4985a21683
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
A llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
A llvm/docs/AMDGPU/gfx12_addr.rst
A llvm/docs/AMDGPU/gfx12_attr.rst
A llvm/docs/AMDGPU/gfx12_clause.rst
A llvm/docs/AMDGPU/gfx12_data0_56f215.rst
A llvm/docs/AMDGPU/gfx12_data0_6802ce.rst
A llvm/docs/AMDGPU/gfx12_data0_e016a1.rst
A llvm/docs/AMDGPU/gfx12_data0_fd235e.rst
A llvm/docs/AMDGPU/gfx12_data1_6802ce.rst
A llvm/docs/AMDGPU/gfx12_data1_731030.rst
A llvm/docs/AMDGPU/gfx12_data1_e016a1.rst
A llvm/docs/AMDGPU/gfx12_data1_fd235e.rst
A llvm/docs/AMDGPU/gfx12_delay.rst
A llvm/docs/AMDGPU/gfx12_hwreg.rst
A llvm/docs/AMDGPU/gfx12_imm16.rst
A llvm/docs/AMDGPU/gfx12_ioffset.rst
A llvm/docs/AMDGPU/gfx12_label.rst
A llvm/docs/AMDGPU/gfx12_literal_1f74c7.rst
A llvm/docs/AMDGPU/gfx12_literal_81e671.rst
A llvm/docs/AMDGPU/gfx12_m.rst
A llvm/docs/AMDGPU/gfx12_rsrc_5fe6d8.rst
A llvm/docs/AMDGPU/gfx12_rsrc_c9f929.rst
A llvm/docs/AMDGPU/gfx12_saddr_cdc95c.rst
A llvm/docs/AMDGPU/gfx12_saddr_d42b64.rst
A llvm/docs/AMDGPU/gfx12_samp.rst
A llvm/docs/AMDGPU/gfx12_sbase_453b95.rst
A llvm/docs/AMDGPU/gfx12_sbase_47adb7.rst
A llvm/docs/AMDGPU/gfx12_sdata_0974a4.rst
A llvm/docs/AMDGPU/gfx12_sdata_354189.rst
A llvm/docs/AMDGPU/gfx12_sdata_4585b8.rst
A llvm/docs/AMDGPU/gfx12_sdata_5c7b50.rst
A llvm/docs/AMDGPU/gfx12_sdata_6c003b.rst
A llvm/docs/AMDGPU/gfx12_sdata_836716.rst
A llvm/docs/AMDGPU/gfx12_sdata_d725ab.rst
A llvm/docs/AMDGPU/gfx12_sdata_dd9dd8.rst
A llvm/docs/AMDGPU/gfx12_sdst_006c40.rst
A llvm/docs/AMDGPU/gfx12_sdst_20064d.rst
A llvm/docs/AMDGPU/gfx12_sdst_354189.rst
A llvm/docs/AMDGPU/gfx12_sdst_836716.rst
A llvm/docs/AMDGPU/gfx12_sdst_ced58d.rst
A llvm/docs/AMDGPU/gfx12_sdst_e701cc.rst
A llvm/docs/AMDGPU/gfx12_sendmsg.rst
A llvm/docs/AMDGPU/gfx12_sendmsg_rtn.rst
A llvm/docs/AMDGPU/gfx12_simm16_15ccdd.rst
A llvm/docs/AMDGPU/gfx12_simm16_218bea.rst
A llvm/docs/AMDGPU/gfx12_simm16_39b593.rst
A llvm/docs/AMDGPU/gfx12_simm16_3d2a4f.rst
A llvm/docs/AMDGPU/gfx12_simm16_730a13.rst
A llvm/docs/AMDGPU/gfx12_simm16_7ed651.rst
A llvm/docs/AMDGPU/gfx12_simm16_81e671.rst
A llvm/docs/AMDGPU/gfx12_simm16_c98889.rst
A llvm/docs/AMDGPU/gfx12_simm16_cc1716.rst
A llvm/docs/AMDGPU/gfx12_simm16_ee8b30.rst
A llvm/docs/AMDGPU/gfx12_soffset_8ec073.rst
A llvm/docs/AMDGPU/gfx12_soffset_c5b88c.rst
A llvm/docs/AMDGPU/gfx12_soffset_ec005a.rst
A llvm/docs/AMDGPU/gfx12_src0_5727cf.rst
A llvm/docs/AMDGPU/gfx12_src0_5cae62.rst
A llvm/docs/AMDGPU/gfx12_src0_6802ce.rst
A llvm/docs/AMDGPU/gfx12_src0_85aab6.rst
A llvm/docs/AMDGPU/gfx12_src0_c4593f.rst
A llvm/docs/AMDGPU/gfx12_src0_e016a1.rst
A llvm/docs/AMDGPU/gfx12_src0_fd235e.rst
A llvm/docs/AMDGPU/gfx12_src1_5727cf.rst
A llvm/docs/AMDGPU/gfx12_src1_5cae62.rst
A llvm/docs/AMDGPU/gfx12_src1_6802ce.rst
A llvm/docs/AMDGPU/gfx12_src1_731030.rst
A llvm/docs/AMDGPU/gfx12_src1_977794.rst
A llvm/docs/AMDGPU/gfx12_src1_c4593f.rst
A llvm/docs/AMDGPU/gfx12_src1_e016a1.rst
A llvm/docs/AMDGPU/gfx12_src1_fd235e.rst
A llvm/docs/AMDGPU/gfx12_src2_2797bc.rst
A llvm/docs/AMDGPU/gfx12_src2_5727cf.rst
A llvm/docs/AMDGPU/gfx12_src2_5cae62.rst
A llvm/docs/AMDGPU/gfx12_src2_6802ce.rst
A llvm/docs/AMDGPU/gfx12_src2_7b936a.rst
A llvm/docs/AMDGPU/gfx12_src2_96fbd3.rst
A llvm/docs/AMDGPU/gfx12_src2_c4593f.rst
A llvm/docs/AMDGPU/gfx12_src2_e016a1.rst
A llvm/docs/AMDGPU/gfx12_srcx0.rst
A llvm/docs/AMDGPU/gfx12_srcy0.rst
A llvm/docs/AMDGPU/gfx12_ssrc0_007f9c.rst
A llvm/docs/AMDGPU/gfx12_ssrc0_1a9ca5.rst
A llvm/docs/AMDGPU/gfx12_ssrc0_245536.rst
A llvm/docs/AMDGPU/gfx12_ssrc0_2797bc.rst
A llvm/docs/AMDGPU/gfx12_ssrc0_bbb4c6.rst
A llvm/docs/AMDGPU/gfx12_ssrc0_c4593f.rst
A llvm/docs/AMDGPU/gfx12_ssrc1_bbb4c6.rst
A llvm/docs/AMDGPU/gfx12_ssrc1_c4593f.rst
A llvm/docs/AMDGPU/gfx12_tgt.rst
A llvm/docs/AMDGPU/gfx12_vaddr_a972b9.rst
A llvm/docs/AMDGPU/gfx12_vaddr_c12f43.rst
A llvm/docs/AMDGPU/gfx12_vaddr_c8b8d4.rst
A llvm/docs/AMDGPU/gfx12_vaddr_d82160.rst
A llvm/docs/AMDGPU/gfx12_vaddr_f2b449.rst
A llvm/docs/AMDGPU/gfx12_vcc.rst
A llvm/docs/AMDGPU/gfx12_vdata_2eda77.rst
A llvm/docs/AMDGPU/gfx12_vdata_48e42f.rst
A llvm/docs/AMDGPU/gfx12_vdata_69a144.rst
A llvm/docs/AMDGPU/gfx12_vdata_89680f.rst
A llvm/docs/AMDGPU/gfx12_vdata_aac3e8.rst
A llvm/docs/AMDGPU/gfx12_vdata_bdb32f.rst
A llvm/docs/AMDGPU/gfx12_vdst_006c40.rst
A llvm/docs/AMDGPU/gfx12_vdst_227281.rst
A llvm/docs/AMDGPU/gfx12_vdst_2eda77.rst
A llvm/docs/AMDGPU/gfx12_vdst_47d3bc.rst
A llvm/docs/AMDGPU/gfx12_vdst_48e42f.rst
A llvm/docs/AMDGPU/gfx12_vdst_69a144.rst
A llvm/docs/AMDGPU/gfx12_vdst_7de8e7.rst
A llvm/docs/AMDGPU/gfx12_vdst_836716.rst
A llvm/docs/AMDGPU/gfx12_vdst_89680f.rst
A llvm/docs/AMDGPU/gfx12_vdst_bdb32f.rst
A llvm/docs/AMDGPU/gfx12_vdstx.rst
A llvm/docs/AMDGPU/gfx12_vdsty.rst
A llvm/docs/AMDGPU/gfx12_version.rst
A llvm/docs/AMDGPU/gfx12_vsrc0.rst
A llvm/docs/AMDGPU/gfx12_vsrc1_6802ce.rst
A llvm/docs/AMDGPU/gfx12_vsrc1_fd235e.rst
A llvm/docs/AMDGPU/gfx12_vsrc2.rst
A llvm/docs/AMDGPU/gfx12_vsrc3.rst
A llvm/docs/AMDGPU/gfx12_vsrc_56f215.rst
A llvm/docs/AMDGPU/gfx12_vsrc_6802ce.rst
A llvm/docs/AMDGPU/gfx12_vsrc_89fd7b.rst
A llvm/docs/AMDGPU/gfx12_vsrc_e016a1.rst
A llvm/docs/AMDGPU/gfx12_vsrc_fd235e.rst
A llvm/docs/AMDGPU/gfx12_vsrcx1.rst
A llvm/docs/AMDGPU/gfx12_vsrcy1.rst
A llvm/docs/AMDGPU/gfx12_waitcnt.rst
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUOperandSyntax.rst
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Add documentation files for GFX12. (#157151)
This patch adds documentation files for GFX12.
Commit: 11a4b2d950baa4ddb31505b71a1736fa1f3242b6
https://github.com/llvm/llvm-project/commit/11a4b2d950baa4ddb31505b71a1736fa1f3242b6
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/IndirectCallPromotionAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
M llvm/lib/CodeGen/MachineRegionInfo.cpp
M llvm/lib/CodeGen/RegAllocScore.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/ProfileData/MemProfCommon.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Instrumentation/ValueProfilePlugins.inc
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/CodeGen/RegAllocScoreTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
Cleanup the LLVM exported symbols namespace (#161240)
There's a pattern throughout LLVM of cl::opts being exported. That in
itself is probably a bit unfortunate, but what's especially bad about it
is that a lot of those symbols are in the global namespace. Move them
into the llvm namespace.
While doing this, I noticed some other variables in the global namespace
and moved them as well.
Commit: b181c22c54bd8c3f6d8a3071661572c5782a7a30
https://github.com/llvm/llvm-project/commit/b181c22c54bd8c3f6d8a3071661572c5782a7a30
Author: Georgiy Samoylov <g.samoylov at syntacore.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M lldb/test/API/functionalities/json/symbol-file/Makefile
Log Message:
-----------
[lldb][RISCV] Fixed TestSymbolFileJSON for RISC-V (#161497)
This test failed during testing on the RISC-V target because we couldn't
strip the main label from the binary. main is dynamically linked when
the -fPIC flag is enabled. The RISC-V ABI requires that executables
support loading at arbitrary addresses to enable shared libraries and
secure loading (ASLR). In PIC mode, function addresses cannot be
hardcoded in the code. Instead, code is generated to load addresses from
the GOT/PLT tables, which are initialized by the dynamic loader. The
reference to main thus ends up in .dynsym and is dynamically bound. We
cannot strip main or any other dynamically linked functions because
these functions are referenced indirectly via dynamic linking tables
(.plt and .got). Removing these symbols would break the dynamic linking
mechanism needed to resolve function addresses at runtime, causing the
executable to fail to correctly call them.
Commit: 9ba1121e3c200bd7935ced3f33d161a0f488609b
https://github.com/llvm/llvm-project/commit/9ba1121e3c200bd7935ced3f33d161a0f488609b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV] Remove break after return in RISCVVEmitter.cpp. NFC (#161599)
Commit: aeffd3645aae854d0dabc8ed45168fb696e6ee39
https://github.com/llvm/llvm-project/commit/aeffd3645aae854d0dabc8ed45168fb696e6ee39
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
[Docs] Add CIR related meetings to GettingInvolved page (#157181)
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: 52b185075919a3d8ec9dc6b7d7da365e28532735
https://github.com/llvm/llvm-project/commit/52b185075919a3d8ec9dc6b7d7da365e28532735
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/lib/Analysis/IR2Vec.cpp
M llvm/test/Analysis/IR2Vec/Inputs/dummy_2D_vocab.json
M llvm/test/Analysis/IR2Vec/Inputs/dummy_3D_nonzero_arg_vocab.json
M llvm/test/Analysis/IR2Vec/Inputs/dummy_3D_nonzero_opc_vocab.json
M llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt
M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt
M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt
M llvm/test/Analysis/IR2Vec/if-else.ll
M llvm/test/Analysis/IR2Vec/unreachable.ll
M llvm/test/tools/llvm-ir2vec/entities.ll
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/unittests/Analysis/IR2VecTest.cpp
Log Message:
-----------
[IR2Vec] Add support for Cmp predicates in vocabulary and embeddings (#156952)
Comparison predicates (equal, not equal, greater than, etc.) provide important semantic information about program behavior. Previously, IR2Vec only captured that a comparison was happening but not what kind of comparison it was. This PR extends the IR2Vec vocabulary to include comparison predicates (ICmp and FCmp) as part of the embedding space.
Following are the changes:
1. Expand the vocabulary slot layout to include predicate entries after opcodes, types, and operands
2. Add methods to handle predicate embedding lookups and conversions
3. Update the embedder implementations to include predicate information when processing CmpInst instructions
4. Update test files to include the new predicate entries in the vocabulary
(Tracking issues: #141817, #141833)
Commit: 4fccaaef700b64db06b7438802ccc58c3bb5b970
https://github.com/llvm/llvm-project/commit/4fccaaef700b64db06b7438802ccc58c3bb5b970
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M flang-rt/lib/runtime/derived-api.cpp
Log Message:
-----------
[flang][runtime] fix intrinsics case of extends_type_of (#161466)
Fixes https://github.com/llvm/llvm-project/issues/155459 by making sure
the cases are considered in the right order. Previously intrinsics types
where overriding the pointer cases which have higher precedence in the
specification.
Also passes the following
[tests](https://github.com/llvm/llvm-test-suite/pull/287).
Commit: 4aaf6d1b8cc655f37a1a4ab8f7a7988dbef4eeae
https://github.com/llvm/llvm-project/commit/4aaf6d1b8cc655f37a1a4ab8f7a7988dbef4eeae
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M libunwind/test/configs/cmake-bridge.cfg.in
M libunwind/test/eh_frame_fde_pc_range.pass.cpp
Log Message:
-----------
[libunwind][test] Add check for objcopy to improve test compatibility (#161112)
Previously, we only used `objcopy`, which is not available for some
build configurations. With this patch, we not only try to use `objcopy`,
but also try to use `llvm-objcopy` if available.
This is a follow-up of https://github.com/llvm/llvm-project/pull/156383.
Commit: ed1d9548b5c08142dab82bcfdd9875177d8223a5
https://github.com/llvm/llvm-project/commit/ed1d9548b5c08142dab82bcfdd9875177d8223a5
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/lib/Analysis/IR2Vec.cpp
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp
M llvm/unittests/Analysis/IR2VecTest.cpp
Log Message:
-----------
[IR2Vec] Refactor vocabulary to use section-based storage (#158376)
Refactored IR2Vec vocabulary and introduced IR (semantics) agnostic `VocabStorage`
- `Vocabulary` *has-a* `VocabStorage`
- `Vocabulary` deals with LLVM IR specific entities. This would help in efficient reuse of parts of the logic for MIR.
- Storage uses a section-based approach instead of a flat vector, improving organization and access patterns.
Commit: 5f0f4972c46707d46145f713c20a442bef8379d8
https://github.com/llvm/llvm-project/commit/5f0f4972c46707d46145f713c20a442bef8379d8
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M libc/src/__support/macros/attributes.h
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/aarch64/inline_strlen.h
M libc/src/string/memory_utils/generic/inline_strlen.h
M libc/src/string/memory_utils/x86_64/inline_strlen.h
M libc/src/string/string_utils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Unify and extend no_sanitize attributes for strlen. (#161316)
Fast strlen implementations (naive wide-reads, SIMD-based, and
x86_64/aarch64-optimized versions) all may perform
technically-out-of-bound reads, which leads to reports under ASan,
HWASan (on ARM machines), and also TSan (which also has the capability
to detect heap out-of-bound reads). So, we need to explicitly disable
instrumentation in all three cases.
Tragically, Clang didn't support `[[gnu::no_sanitize]]` syntax until
recently, and since we're supporting both GCC and Clang, we have to
revert to `__attribute__` syntax.
Commit: bdea159093ae2e4482dedb32bca5e03a212fc44f
https://github.com/llvm/llvm-project/commit/bdea159093ae2e4482dedb32bca5e03a212fc44f
Author: David Salinas <dsalinas at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Object/OffloadBundle.cpp
Log Message:
-----------
Revert "Revert "Fix memory leak in Offloading API" (#161465)" (#161573)
This reverts commit d392563433316e310edacf35a40fb2f9aa477acc.
Commit: 640644d68adbd2b5eaf8cd715237631057658059
https://github.com/llvm/llvm-project/commit/640644d68adbd2b5eaf8cd715237631057658059
Author: Gang Chen <gangc at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll
Log Message:
-----------
[AMDGPU] Move LowerBufferFatPointers after LoadStoreVectorizer and remove the fixme (#161531)
Move LowerBufferFatPointers pass after CodegenPrepare and
LoadStoreVectorizer pass, and remove the fixme about that.
Commit: 3f3a20f654f913f7e251e3bf4bd5a63e73e5571a
https://github.com/llvm/llvm-project/commit/3f3a20f654f913f7e251e3bf4bd5a63e73e5571a
Author: hjagasiaAMD <harsha.jagasia at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[PATCH] offload-tunnel-cmake with proper escape (#161552)
Co-authored-by: ronlieb <ron.lieberman at amd.com>
Commit: e37a9732e1d1b55347df1ad33cf941d22ed8ab9b
https://github.com/llvm/llvm-project/commit/e37a9732e1d1b55347df1ad33cf941d22ed8ab9b
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/JumpTableToSwitch.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
Log Message:
-----------
[JTS][NFC] Optimize guid fetching (#161612)
It's unnecessary to build the whole symtable, and on top of everything,
un-optimal to do so for every function. All we really need is the
instrumented PGO name - considering also LTO-ness - and then we can
compute the function name.
Commit: 8b9e208448009814b12200ae7c06ef760f957ac7
https://github.com/llvm/llvm-project/commit/8b9e208448009814b12200ae7c06ef760f957ac7
Author: Jim Lin <jim at andestech.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Log Message:
-----------
[RISCV] Add helper function getVecPolicyOpNum in RISCVInsertVSETVLI.cpp. NFC. (#161476)
Commit: 9f4b6375b4fc12d5ed9b4713ac70682825ec4b20
https://github.com/llvm/llvm-project/commit/9f4b6375b4fc12d5ed9b4713ac70682825ec4b20
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M bolt/lib/Core/Relocation.cpp
A bolt/test/AArch64/tls-desc-call.s
Log Message:
-----------
[BOLT][AArch64] Skip R_AARCH64_TLSDESC_CALL relocation (#161610)
R_AARCH64_TLSDESC_CALL is a relocation emitted as a hint for a linker to
replace `blr r` instruction with nop. BOLT does not currently require
any special handling for it.
Note that previously existing extraction of the relocated value was
incorrect.
Commit: a2330a398db398e33687a6bed71092a85312e481
https://github.com/llvm/llvm-project/commit/a2330a398db398e33687a6bed71092a85312e481
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/const-eval.c
M clang/test/Sema/const-eval.c
M clang/test/Sema/integer-overflow.c
M clang/test/Sema/unbounded-array-bounds.c
M clang/test/SemaCXX/array-bounds.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/integer-overflow.cpp
Log Message:
-----------
[Clang][Sema] Switch diagnostics from toString to operator<< for APSInt/APInt (#161474)
Commit: 2d0637494936be3742750ab95b856e3cb86d1198
https://github.com/llvm/llvm-project/commit/2d0637494936be3742750ab95b856e3cb86d1198
Author: Xiang Li <python3kgae at outlook.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Add mulf(x, 0) -> 0 to mulf folder (#161395)
Fold `mulf(x, 0) -> 0` when (nnan | nsz)
Commit: 129d5ce14c4fd094799b50e6ebe6c8f9ca5003f1
https://github.com/llvm/llvm-project/commit/129d5ce14c4fd094799b50e6ebe6c8f9ca5003f1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll
Log Message:
-----------
[RISCV][GISel] Use LBU for anyext i8 atomic_load. (#161588)
This matches what we do for regular i8 extload due to the lack of c.lb
in Zbc.
This only affects global isel because SelectionDAG won't create an
anyext i8 atomic_load today.
Commit: ac0e99e19124ab720e8837d1500f0c000559a0ef
https://github.com/llvm/llvm-project/commit/ac0e99e19124ab720e8837d1500f0c000559a0ef
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/lib/Analysis/IR2Vec.cpp
Log Message:
-----------
[Analysis] Fix a warning
This patch fixes:
llvm/lib/Analysis/IR2Vec.cpp:289:14: error: unused variable
'allSameDim' [-Werror,-Wunused-variable]
Commit: c6e280e7ed9e120ba5e8c141bd5c4fd116d076a2
https://github.com/llvm/llvm-project/commit/c6e280e7ed9e120ba5e8c141bd5c4fd116d076a2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/ARM/llvm.exp10.ll
M llvm/test/CodeGen/ARM/llvm.frexp.ll
M llvm/test/CodeGen/Mips/no-odd-spreg-msa.ll
M llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nontemporal-vp-scalable.ll
M llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
Log Message:
-----------
PeepholeOpt: Fix losing subregister indexes on full copies (#161310)
Previously if we had a subregister extract reading from a
full copy, the no-subregister incoming copy would overwrite
the DefSubReg index of the folding context.
There's one ugly rvv regression, but it's a downstream
issue of this; an unnecessary same class reg-to-reg full copy
was avoided.
Commit: a88c83950be540f608587a4c68e0b0651e3b199b
https://github.com/llvm/llvm-project/commit/a88c83950be540f608587a4c68e0b0651e3b199b
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Volunteer myself and Usman Nadeem as DFAJumpThreading maintainers (#161491)
Both Usman Nadeem and I have constantly contributed to the
DFAJumpThreading pass so far. To push DFAJumpThreading forwards and make
it enabled by default, I volunteer myself and Usman Nadeem as
DFAJumpThreading maintainers.
Commit: fea2cca4d6364f66a5f663d95141c9cab53dbfd2
https://github.com/llvm/llvm-project/commit/fea2cca4d6364f66a5f663d95141c9cab53dbfd2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[MLIR][Python] expose Operation::setLoc (#161594)
Commit: 9323fbbc4ebca57f7332ec84f7efc41eb88eca6e
https://github.com/llvm/llvm-project/commit/9323fbbc4ebca57f7332ec84f7efc41eb88eca6e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
Log Message:
-----------
RegisterCoalescer: Avoid return after else (#161622)
Commit: d39095b19357b35bda5e874d66343499985e91bf
https://github.com/llvm/llvm-project/commit/d39095b19357b35bda5e874d66343499985e91bf
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Remove unused parameter. NFC (#161617)
`Skip` parameter not used/set inside `analyzeRelocation()`.
Commit: bcc85f76700d3f0aebc14bf8b981476c94892ef8
https://github.com/llvm/llvm-project/commit/bcc85f76700d3f0aebc14bf8b981476c94892ef8
Author: Yixuan Cao <caoyixuan2019 at email.szu.edu.cn>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/wcscat.cpp
M compiler-rt/test/asan/TestCases/wcscpy.cpp
M compiler-rt/test/asan/TestCases/wcsncat.cpp
M compiler-rt/test/asan/TestCases/wcsncpy.cpp
Log Message:
-----------
[compiler-rt][asan][tests] Stabilize wchar tests on Darwin/Android (#161624)
### Summary
Stabilize ASan wchar tests across Darwin and Android. NFC: test-only.
Follow-up to PR #160493 (adds wchar interceptors/tests).
### Motivation
- Darwin: The top frame often resolves to `libclang_rt.asan_*` rather
than a source file, so strict checks that include file/line can fail.
See Chromium issue
[448631142](https://g-issues.chromium.org/issues/448631142).
- Android: The “ERROR:” header can go to logcat instead of stderr, so
FileCheck may not see it; stdout/stderr reordering also makes pre-crash
markers racy. See Android Buildbot
[186/12821](https://lab.llvm.org/buildbot/#/builders/186/builds/12821).
### Changes
- Android:
- Force reports to stderr via `%env_asan_opts=log_to_stderr=1`, avoiding
the “ERROR:” header going to logcat.
- Print the pre-crash “Good so far.” to stderr and `fflush(stderr)` to
avoid stdout/stderr reordering.
- Darwin:
- Relax the stack-frame check to only require the function name
(`wcscpy/wcsncpy/wcscat/wcsncat`) to tolerate `libclang_rt.asan_*`
frames.
- Common:
- Reuse FileCheck var `[[ADDR]]` instead of redefining.
- Make wide string literals `const wchar_t*` to silence
`-Wwritable-strings`.
### Risk
- NFC: test-only; no change to runtime behavior.
### References
- Follow-up to PR #160493.
- Chromium: [448631142](https://g-issues.chromium.org/issues/448631142)
(Darwin failures).
- Android Buildbot:
[186/12821](https://lab.llvm.org/buildbot/#/builders/186/builds/12821).
Signed-off-by: Yixuan Cao <caoyixuan2019 at email.szu.edu.cn>
Commit: 17f6888d1771c9f61378a0a58725f3359277ddda
https://github.com/llvm/llvm-project/commit/17f6888d1771c9f61378a0a58725f3359277ddda
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/ValueMap.h
Log Message:
-----------
[IR] clang-format ValueMap.h
I'm planning to modify this file.
Commit: eedfbbe986467b6d3b968f3af4ab7424af0303a7
https://github.com/llvm/llvm-project/commit/eedfbbe986467b6d3b968f3af4ab7424af0303a7
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
Log Message:
-----------
[AMDGPU] Update gfx1250 VOP1 tests to t16 syntax. NFC (#161603)
Commit: bd0f9db06ab5b4e62bd298834e933d9fac5105ed
https://github.com/llvm/llvm-project/commit/bd0f9db06ab5b4e62bd298834e933d9fac5105ed
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
Log Message:
-----------
[AMDGPU] Update gfx1250 vop3_from_vop1 tests to t16 syntax. NFC (#161609)
Commit: 912a92a8098a425c63be3cf3251f3cab68d229c4
https://github.com/llvm/llvm-project/commit/912a92a8098a425c63be3cf3251f3cab68d229c4
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-10-01 (Wed, 01 Oct 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
Log Message:
-----------
[AMDGPU] Update VOP3 gfx1250 tests to t16 syntax. NFC (#161611)
Commit: a4767e63eebfa1ae0065bdd8813df3839f62b461
https://github.com/llvm/llvm-project/commit/a4767e63eebfa1ae0065bdd8813df3839f62b461
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-smaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-sminv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_lane.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_origins.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-tbl.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vaddv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmovn.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vshift.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_float.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/ARM32/vararg-arm32.ll
M llvm/test/Instrumentation/MemorySanitizer/LoongArch/vararg-loongarch64.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mips.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mipsel.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/kernel-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppc.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/RISCV32/vararg-riscv32.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2_512ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-gfni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-vl-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avxvnniint16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avxvnniint8-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/f16c-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/vararg-too-large.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/vararg_call.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
M llvm/test/Instrumentation/MemorySanitizer/array_types.ll
M llvm/test/Instrumentation/MemorySanitizer/bmi.ll
M llvm/test/Instrumentation/MemorySanitizer/byval-alignment.ll
M llvm/test/Instrumentation/MemorySanitizer/byval.ll
M llvm/test/Instrumentation/MemorySanitizer/expand-experimental-reductions.ll
M llvm/test/Instrumentation/MemorySanitizer/funnel_shift.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/msan_i386intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse41-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg-too-large.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg_call.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_eager.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/opaque-ptr.ll
M llvm/test/Instrumentation/MemorySanitizer/or.ll
M llvm/test/Instrumentation/MemorySanitizer/overflow.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
M llvm/test/Instrumentation/MemorySanitizer/saturating.ll
M llvm/test/Instrumentation/MemorySanitizer/scmp.ll
M llvm/test/Instrumentation/MemorySanitizer/ucmp.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-reduce-fadd.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-reduce-fmul.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Instrumentation/MemorySanitizer/vscale.ll
Log Message:
-----------
[MemorySanitizer] Use getelementptr instead of ptrtoint+add+inttoptr (#161392)
MemorySanitizer currently does a lot of pointer arithmetic using
ptrtoint+add+inttoptr instead of using getelementptr. As far as I can
tell, there is no need to use this pattern -- msan is not trying to
synthesize pointers with different provenance here. The pointers in
question stay within one object (like the TLS parameter area).
I suspect that this is just a leftover from pre-opaque-pointer types
where this was a natural way to perform offset arithmetic. Nowadays we
should just emit a getelementptr i8, aka ptradd.
Commit: e5b8c24cc0d0d2ccf44e0c5e155fdfa4b2cf7720
https://github.com/llvm/llvm-project/commit/e5b8c24cc0d0d2ccf44e0c5e155fdfa4b2cf7720
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/freeze.ll
Log Message:
-----------
[DAG] Add ComputeNumSignBits(FREEZE(X)) handling (#161507)
If X is known never under/poison then skip the freeze and return ComputeNumSignBits(X)
Commit: 662f56f4281cd42af98a3d809cc443ddce8ce5dd
https://github.com/llvm/llvm-project/commit/662f56f4281cd42af98a3d809cc443ddce8ce5dd
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/unittests/Optimizer/Builder/FIRBuilderTest.cpp
Log Message:
-----------
[flang] handle scalars in getDescriptorWithNewBaseAddress (#161515)
Follow up on #161347 to allow scalar fir.box/class reconstruction (at
least required for polymorphic types).
The assert in genDimInfoFromBox was rejecting scalars while there is no
functional reason for that (only assumed-rank are an issue there).
Commit: 0b0dcf856abd6435d94d3108fa1386eebccce5d6
https://github.com/llvm/llvm-project/commit/0b0dcf856abd6435d94d3108fa1386eebccce5d6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/docs/index.rst
M libcxx/test/std/language.support/support.exception/propagation/make_exception_ptr.objc.pass.mm
Log Message:
-----------
[libc++] Upgrade Xcode to 26.0 (#160097)
Commit: 5f5a84e8509d4f274bcd63e37225c23d97555094
https://github.com/llvm/llvm-project/commit/5f5a84e8509d4f274bcd63e37225c23d97555094
Author: Alejandro Álvarez Ayllón <alejandro.alvarez at sonarsource.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
Log Message:
-----------
[clang][analyzer] Clear `ObjCMethodCall`'s cache between runs (#161327)
`lookupRuntimeDefinition` assumed that a process would handle only one
TU. This is not true for unit tests, for instance. Multiple snippets of
code get parsed, and their AST are unloaded each time.
Since the cache relies on pointers as keys, if the same address happens
to be reused between runs, the cache would return a stale pointer,
potentially causing a segmentation fault. This is not that unlikely if
the snippets are similar, which would trigger similar allocation
patterns.
CPP-4889
Commit: 66558d70dc11fd04ce908ac94424ed7c6bd9e35b
https://github.com/llvm/llvm-project/commit/66558d70dc11fd04ce908ac94424ed7c6bd9e35b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M libcxx/include/__algorithm/find.h
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/utils/libcxx/test/params.py
Log Message:
-----------
[libc++] Fix <__algorithm/find.h> when using -flax-vector-conversions=none (#161362)
Commit: bf847a8b9d54643c457eaaad7f5dc60e6454cd2e
https://github.com/llvm/llvm-project/commit/bf847a8b9d54643c457eaaad7f5dc60e6454cd2e
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-mubuf.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-undef-poison.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
Log Message:
-----------
[AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (#146076)
Also removes the command line option to control this feature.
There seem to be mainly two kinds of test changes:
- Some operands of addition instructions are swapped; that is to be expected
since PTRADD is not commutative.
- Improvements in code generation, probably because the legacy lowering enabled
some transformations that were sometimes harmful.
For SWDEV-516125.
Commit: 6e52e538cd6e7912058f73f244a45aeea153d05c
https://github.com/llvm/llvm-project/commit/6e52e538cd6e7912058f73f244a45aeea153d05c
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
Log Message:
-----------
[LAA] Test different-type-sizes in safe-dep-dist (#161244)
The isSafeDependenceDistance routine is guarded by a HasSameSize check
which can be removed, as the test demonstrates.
Commit: 031fb7414fd6edf20e0cd7f7783666313169a0d2
https://github.com/llvm/llvm-project/commit/031fb7414fd6edf20e0cd7f7783666313169a0d2
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/test/CodeGen/AArch64/pr161420.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4-lane-x4.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4.ll
Log Message:
-----------
[AArch64][SME] Preserve `Chain` when selecting multi-vector LUT4Is (#161494)
Previously, the `Chain` was dropped meaning LUTI4 nodes that only
differed in the chain operand would be incorrectly CSE'd.
Fixes: #161420
Commit: 8aa64edb34ec6b30e1e7d0dbcc86236a6290eb0c
https://github.com/llvm/llvm-project/commit/8aa64edb34ec6b30e1e7d0dbcc86236a6290eb0c
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Support/LangOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Driver/fast-real-mod.f90
A flang/test/Lower/Intrinsics/fast-real-mod.f90
Log Message:
-----------
[Flang] Add -ffast-real-mod and direct code for MOD on REAL types (#160660)
This patch adds direct code-gen support for a faster MOD intrinsic for
REAL types. Flang has maintained and keeps maintaining a high-precision
implementation of the MOD intrinsic as part of the Fortran runtime. With
the -ffast-real-mod flag, users can opt to avoid calling into the
Fortran runtime, but instead trigger code-gen that produces faster code
by avoiding the runtime call, at the expense of potentially risking bit
cancelation by having the compiler use the MOD formula a specified by
ISO Fortran.
Commit: 20e0e80a540223194e06d5e593634f65e1ee0de8
https://github.com/llvm/llvm-project/commit/20e0e80a540223194e06d5e593634f65e1ee0de8
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract.ll
Log Message:
-----------
[AArch64] Combine PTEST_FIRST(PTRUE, CONCAT(A, B)) -> PTEST_FIRST(PTRUE, A) (#161384)
When the input to ptest_first is a vector concat and the mask is all active,
performPTestFirstCombine returns a ptest_first using the first operand
of the concat, looking through any reinterpret casts.
This allows optimizePTestInstr to later remove the ptest when the first
operand is a flag setting instruction such as whilelo.
Commit: 55803b8af1e4ddde1c0c43a9cd283133205c295d
https://github.com/llvm/llvm-project/commit/55803b8af1e4ddde1c0c43a9cd283133205c295d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__tree
A libcxx/include/__type_traits/is_generic_transparent_comparator.h
A libcxx/include/__type_traits/make_transparent.h
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
Log Message:
-----------
Reapply "[libc++] Avoid constructing additional objects when using map::at" (#160738) (#161485)
This reverts commit b86aaacf28b358b187071bc87075f1faa2d65c4e.
The issue in LLVM has been fixed now.
Commit: 04c01ff144a172230c053d73eb15831a4120db81
https://github.com/llvm/llvm-project/commit/04c01ff144a172230c053d73eb15831a4120db81
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 55803b8af1e4
Commit: eb803df5029d08321102d59ead4c61d03ddc8a7a
https://github.com/llvm/llvm-project/commit/eb803df5029d08321102d59ead4c61d03ddc8a7a
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/GlobalISel/select-modf.mir
M llvm/test/CodeGen/AArch64/llvm.modf.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
Log Message:
-----------
[AArch64][GlobalISel] Add `G_FMODF` instruction (#160061)
This commit adds the intrinsic `G_FMODF` to GMIR & enables its
translation, legalization and instruction selection in AArch64.
Commit: 2cb530868ca1d6e66e950f4b247b0905ee95d7eb
https://github.com/llvm/llvm-project/commit/2cb530868ca1d6e66e950f4b247b0905ee95d7eb
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86FixupSetCC.cpp
A llvm/test/DebugInfo/X86/x86fixupsetcc-debug-instr-num.mir
Log Message:
-----------
[DebugInfo][InstrRef] Copy instr-ref to replacement instrs in X86FixupSetCCPass (#159777)
...to preserve variable location coverage.
Fixes missing variable location coverage in #49818 reproducer
Commit: 3c391877c10b5fea24b4c44cb8631a15d4cb809c
https://github.com/llvm/llvm-project/commit/3c391877c10b5fea24b4c44cb8631a15d4cb809c
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/Object/ELF.h
M llvm/unittests/Object/ELFTest.cpp
Log Message:
-----------
[ELF]Add overflow check to ELF note iterator (#160451)
Add overflow check to ELF note iterator to handle large `p_filesz` or
`sh_size`, avoid accessing invalid memory.
---------
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Commit: 7ccb5c08f0685d4787f12c3224a72f0650c5865e
https://github.com/llvm/llvm-project/commit/7ccb5c08f0685d4787f12c3224a72f0650c5865e
Author: Marco Elver <elver at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
Log Message:
-----------
Thread Safety Analysis: Optimize LocalVariableMap's canonical reference computation (#161600)
We observed slowdowns in auto-generated million+ line C++ source files
due to recent fixes to LocalVariableMap.
Rather than recompute the canonical underlying non-reference
VarDefinition every time we need to perform variable definition
intersection at CFG merge points, pre-compute the canonical references
once on construction. Ensure to
maintain the invariant that if both the direct and canonical reference
are being invalidated, both become 0.
Reported-by: Bogdan Graur <bgraur at google.com>
Commit: 0db784ed3cc9b60b98a6de878ab5a940509a3d22
https://github.com/llvm/llvm-project/commit/0db784ed3cc9b60b98a6de878ab5a940509a3d22
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-else-after-return in TransformOps.cpp (NFC)
Commit: 2daa2f1538b7d0b4fa874ffc16940460da77767b
https://github.com/llvm/llvm-project/commit/2daa2f1538b7d0b4fa874ffc16940460da77767b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
Log Message:
-----------
[Clang] Fix a crash when using ctad with a template template parameter. (#161488)
This fixes the crash reported in #130604.
It does not try to improve diagnostics or resolve CWG3003 (this will be
explored separately).
Fixes #130604
Commit: 2165aa4c9dc828f18fe792551ed42799e65e0507
https://github.com/llvm/llvm-project/commit/2165aa4c9dc828f18fe792551ed42799e65e0507
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/Error.h
Log Message:
-----------
[orc-rt] Tidy up some type_traits uses. NFC.
Commit: 7c4f188f27ee7c562c2aa11b2384fd0ef918be94
https://github.com/llvm/llvm-project/commit/7c4f188f27ee7c562c2aa11b2384fd0ef918be94
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
Log Message:
-----------
[LV] Support multiplies by constants when forming scaled reductions. (#161092)
We can create partial reductions for multiplies with constants, if the
constant is small enough to be extended from source to destination type
w/o changing the value.
This only handles constant on the right side of a multiply, relying on
other passes to canonicalize the input.
Alive2 Proofs: https://alive2.llvm.org/ce/z/iWRMr6
PR: https://github.com/llvm/llvm-project/pull/161092
Commit: 6382bb5dda106a4bae0f0a17e88396036969784b
https://github.com/llvm/llvm-project/commit/6382bb5dda106a4bae0f0a17e88396036969784b
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/test/Shell/Expr/TestGlobalSymbolObjCConflict.c
Log Message:
-----------
[lldb][test] XFAIL TestGlobalSymbolObjCConflict.c on Windows
Failing with:
```
error: command failed with exit status: 1
executed command: 'c:\buildbot\as-builder-10\lldb-x86-64\build\bin\filecheck.exe' 'C:\buildbot\as-builder-10\lldb-x86-64\llvm-project\lldb\test\Shell\Expr\TestGlobalSymbolObjCConflict.c'
.---command stderr------------
| C:\buildbot\as-builder-10\lldb-x86-64\llvm-project\lldb\test\Shell\Expr\TestGlobalSymbolObjCConflict.c:30:11: error: CHECK: expected string not found in input
| // CHECK: (lldb) p OglobalVar
| ^
| <stdin>:1:1: note: scanning from here
| (lldb) command source -s 0 'C:/buildbot/as-builder-10/lldb-x86-64/build/tools/lldb\test\Shell\lit-lldb-init-quiet'
| ^
| <stdin>:4:1: note: possible intended match here
| (lldb) target create "C:\\buildbot\\as-builder-10\\lldb-x86-64\\build\\tools\\lldb\\test\\Shell\\Expr\\Output\\TestGlobalSymbolObjCConflict.c.tmp.out"
| ^
|
| Input file: <stdin>
| Check file: C:\buildbot\as-builder-10\lldb-x86-64\llvm-project\lldb\test\Shell\Expr\TestGlobalSymbolObjCConflict.c
|
| -dump-input=help explains the following input dump.
|
| Input was:
| <<<<<<
| 1: (lldb) command source -s 0 'C:/buildbot/as-builder-10/lldb-x86-64/build/tools/lldb\test\Shell\lit-lldb-init-quiet'
| check:30'0 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
| 2: Executing commands in 'C:\buildbot\as-builder-10\lldb-x86-64\build\tools\lldb\test\Shell\lit-lldb-init-quiet'.
| check:30'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| 3: (lldb) command source -C --silent-run true lit-lldb-init
| check:30'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| 4: (lldb) target create "C:\\buildbot\\as-builder-10\\lldb-x86-64\\build\\tools\\lldb\\test\\Shell\\Expr\\Output\\TestGlobalSymbolObjCConflict.c.tmp.out"
| check:30'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| check:30'1 ? possible intended match
| 5: Current executable set to 'C:\buildbot\as-builder-10\lldb-x86-64\build\tools\lldb\test\Shell\Expr\Output\TestGlobalSymbolObjCConflict.c.tmp.out' (x86_64).
| check:30'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| 6: (lldb) b 27
| check:30'0 ~~~~~~~~~~~~
| >>>>>>
`-----------------------------
error: command failed with exit status: 1
```
We probably need to use LLD here or something. But I don't have a Windows machine to test this on. So XFAILing for now.
Commit: 2eb63375912b5c6585c1fde2e49860d0d78d4fee
https://github.com/llvm/llvm-project/commit/2eb63375912b5c6585c1fde2e49860d0d78d4fee
Author: Lucie Choi <clucie at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UniqueImplicitBindingNumber.ll
Log Message:
-----------
[SPIR-V] Prevent adding duplicate binding instructions for implicit binding (#161299)
Prevent adding duplicate instructions for implicit bindings when they
are from the same resource. The fix is to store and check if the binding
number is already assigned for each `OrderId`.
Resolves https://github.com/llvm/llvm-project/issues/160716
Commit: f3f9e7b928c2fb3828498e328c83bac14a9b46fe
https://github.com/llvm/llvm-project/commit/f3f9e7b928c2fb3828498e328c83bac14a9b46fe
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/test/CIR/IR/alloca.cir
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/array.cir
M clang/test/CIR/IR/atomic.cir
M clang/test/CIR/IR/binassign.cir
M clang/test/CIR/IR/bitfield_info.cir
M clang/test/CIR/IR/call.cir
M clang/test/CIR/IR/cast.cir
M clang/test/CIR/IR/cmp.cir
M clang/test/CIR/IR/complex.cir
M clang/test/CIR/IR/copy.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global-init.cir
M clang/test/CIR/IR/global-var-linkage.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/label.cir
M clang/test/CIR/IR/module.cir
M clang/test/CIR/IR/stack-save-restore.cir
M clang/test/CIR/IR/struct.cir
M clang/test/CIR/IR/switch-flat.cir
M clang/test/CIR/IR/switch.cir
M clang/test/CIR/IR/ternary.cir
M clang/test/CIR/IR/throw.cir
M clang/test/CIR/IR/unary.cir
M clang/test/CIR/IR/vector.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtable-attr.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
Log Message:
-----------
[CIR] Make all opt tests verify roundtrip (#161439)
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1923
Commit: 8cf43aebc67b8e88fe54cfd3371fc3777205ec4a
https://github.com/llvm/llvm-project/commit/8cf43aebc67b8e88fe54cfd3371fc3777205ec4a
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
M llvm/test/CodeGen/VE/Vector/vec_divrem.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Remove failure cases when widening vector load/store ops. (#160515)
When unable to widen a vector load/store we can replace the operation
with a masked variant. Support for extending loads largely came for free
hence its inclusion, but truncating stores require more work.
Fixes https://github.com/llvm/llvm-project/issues/159995
Commit: 39d0e41a5f3e13b127caea16988d7c69371de6cf
https://github.com/llvm/llvm-project/commit/39d0e41a5f3e13b127caea16988d7c69371de6cf
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
Log Message:
-----------
[NFC][Clang Improve performance of `DoMarkVarDeclReferenced` (#161648)
Address post commit feedback from #161231
Commit: dbf44c28234670361017429871286324ced1e5f3
https://github.com/llvm/llvm-project/commit/dbf44c28234670361017429871286324ced1e5f3
Author: David Green <david.green at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
Log Message:
-----------
[AArch64] Remove unused tablegen classes and code cleanup. NFC
Commit: 8dd2846fcf7b0ad254f3768149d28fe87af9b15d
https://github.com/llvm/llvm-project/commit/8dd2846fcf7b0ad254f3768149d28fe87af9b15d
Author: Marco Borgeaud <marco.borgeaud at sonarsource.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/initializer.cpp
Log Message:
-----------
[analyzer] Harden RegionStoreManager::bindArray (#153177)
Fixes https://github.com/llvm/llvm-project/issues/147686 by handling
symbolic values similarly to bindStruct and handling constant values.
The latter is actually more of a workaround: bindArray should not have
to deal with such constants.
CPP-6688
Commit: 3537e8abfa067013f01b53259fb2cc854d587dee
https://github.com/llvm/llvm-project/commit/3537e8abfa067013f01b53259fb2cc854d587dee
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/SystemZ/fp-cmp-04.ll
M llvm/test/CodeGen/X86/fshl.ll
M llvm/test/CodeGen/X86/fshr.ll
Log Message:
-----------
RegAllocGreedy: Check if copied lanes are live in trySplitAroundHintReg (#160424)
For subregister copies, do a subregister live check instead of checking
the main range. Doesn't do much yet, the split analysis still does not
track live ranges.
Commit: 86ba1986a29478681ddc64af7d08fdff390b00e8
https://github.com/llvm/llvm-project/commit/86ba1986a29478681ddc64af7d08fdff390b00e8
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/TestDataFormatterStdUnorderedMap.py
Log Message:
-----------
[lldb][test] Un-XFAIL TestDataFormatterStdUnorderedMap.py for older Clang versions
Fixed in https://github.com/llvm/llvm-project/pull/156033
Commit: 7e6d277d3bd10bacc121962637c3c646866e2ca3
https://github.com/llvm/llvm-project/commit/7e6d277d3bd10bacc121962637c3c646866e2ca3
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/test/API/lang/cpp/structured-binding/TestStructuredBinding.py
Log Message:
-----------
[lldb][test] TestStructuredBinding.py: adjust assertion to check for compatible compiler version
Requires a compiler with the changes in https://github.com/llvm/llvm-project/pull/122265
Commit: db39ef9d566529000a1edcd58108f2df7b323bf5
https://github.com/llvm/llvm-project/commit/db39ef9d566529000a1edcd58108f2df7b323bf5
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/Transforms/GVN/condprop.ll
Log Message:
-----------
[GVN] Add additional tests for inverted condition propagation (NFC)
Commit: 9583b399d85cacdfa0a41f798ab44abaa3981bbf
https://github.com/llvm/llvm-project/commit/9583b399d85cacdfa0a41f798ab44abaa3981bbf
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/include/clang/Sema/Template.h
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/AST/ast-dump-concepts.cpp
M clang/test/AST/ast-dump-ctad-alias.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.id/p3.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/compound-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/nested-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/simple-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/cxx2c-template-template-param.cpp
M clang/test/SemaCXX/invalid-requirement-requires-expr.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaHLSL/BuiltIns/Buffers.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaTemplate/concepts-recovery-expr.cpp
M clang/test/SemaTemplate/concepts-recursive-inst.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/instantiate-abbreviated-template.cpp
M clang/test/SemaTemplate/instantiate-expanded-type-constraint.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
M clang/test/SemaTemplate/instantiate-template-argument.cpp
M clang/test/SemaTemplate/pr52970.cpp
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
Log Message:
-----------
[Clang] Normalize constraints before checking for satisfaction (#141776)
In the standard, constraint satisfaction checking is done on the
normalized form of a constraint.
Clang instead substitutes on the non-normalized form, which causes us to
report substitution failures in template arguments or concept ids, which
is non-conforming but unavoidable without a parameter mapping
This patch normalizes before satisfaction checking. However, we preserve
concept-id nodes in the normalized form, solely for diagnostics
purposes.
This addresses #61811 and related concepts conformance bugs, ideally to
make the remaining implementation of concept template parameters easier
Fixes #135190
Fixes #61811
Co-authored-by: Younan Zhang <zyn7109 at gmail.com>
Commit: 99ce20624629921771de2674946bbb2f9707ca5a
https://github.com/llvm/llvm-project/commit/99ce20624629921771de2674946bbb2f9707ca5a
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/Error.h
M orc-rt/unittests/ErrorTest.cpp
Log Message:
-----------
[orc-rt] Add support for constructing Expected<Error> values. (#161656)
These will be used in upcoming RPC support patches where the outer
Expected value captures any RPC-infrastructure errors, and the inner
Error is returned from the romet call (i.e. the remote handler's return
type is Error).
Commit: 82b3057a5ec552d5e42bb595c8243e4fac0c70b4
https://github.com/llvm/llvm-project/commit/82b3057a5ec552d5e42bb595c8243e4fac0c70b4
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/test/API/lang/cpp/abi_tag_structors/TestAbiTagStructors.py
Log Message:
-----------
[lldb][test] TestAbiTagStructors.py adjust test to account for older compiler versions
Skip tests that require `-gstructor-decl-linkage-names` on Clang
versions that don't support it.
Don't pass `-gno-structor-decl-linkage-names` on Clang versions where it
the flag didn't exist but it was the default behaviour of the compiler
anyway.
Commit: 0cb9d402f369723ef2c80c140a49145b99365450
https://github.com/llvm/llvm-project/commit/0cb9d402f369723ef2c80c140a49145b99365450
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M orc-rt/unittests/ErrorTest.cpp
Log Message:
-----------
[orc-rt] Fix typo in comment. NFC.
Commit: c2159f2d3a45e9309f1a6abd201812b6b00cdcb4
https://github.com/llvm/llvm-project/commit/c2159f2d3a45e9309f1a6abd201812b6b00cdcb4
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/CMakeLists.txt
Log Message:
-----------
[LLVM-Test] Fix a regression in test dependencies introduced by 0e14973 (#161623)
Add `UnitTests` as an explicit dependency for `check-llvm` and
`llvm-test-depends`. In
https://github.com/llvm/llvm-project/pull/161442, the intent was to
remove `UnitTests` as a dependency for the individual per-directory
`check-llvm-*` test suites created but not to drop it from `check-llvm`
or `llvm-test-depends`. This missing dependency will cause LLVM unit
tests to be not rebuilt and resulting in either `warning: test suite
'LLVM-Unit' contained no tests` or running stale running versions of the
unit tests when running `check-llvm`.
Commit: e7839eed6b9f48609f536f55b277eeb544d41c78
https://github.com/llvm/llvm-project/commit/e7839eed6b9f48609f536f55b277eeb544d41c78
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/limit-coalesce.mir
Log Message:
-----------
AMDGPU: Switch test to generated checks (#161658)
Commit: faf070f062ac7f3861092ab110982a613d7dfe1b
https://github.com/llvm/llvm-project/commit/faf070f062ac7f3861092ab110982a613d7dfe1b
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/test/API/lang/cpp/expr-definition-in-dylib/TestExprDefinitionInDylib.py
Log Message:
-----------
[lldb][test] TestExprDefinitionInDylib.py adjust test to account for older compiler versions
Skip tests that require `-gstructor-decl-linkage-names` on Clang versions that don't support it.
Don't pass `-gno-structor-decl-linkage-names` on Clang versions where it the flag didn't exist but it was the default behaviour of the compiler anyway.
Drive-by:
- We used to run `self.expect("Bar()")` which would always fail. So the `error=True` would be true even if we didn't pass the `-gno-structor-linkage-names`. So it wasn't testing the behaviour properly. This patch changes these to `self.expect("expr Bar()")`.
Commit: 2ece31bb9f31ea48f456bab339e63f38673c94e5
https://github.com/llvm/llvm-project/commit/2ece31bb9f31ea48f456bab339e63f38673c94e5
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M .clang-format
M clang/.clang-format
M llvm/.clang-format
M mlir/.clang-format
Log Message:
-----------
Enforce Unix line endings for Clang/LLVM/MLIR projects (#161460)
Change top-level and LLVM/MLIR/Clang `.clang-format` files to enforce
Unix line ending.
Commit: 119cdf7e1b70493148daa9f51d88d6595a680dc0
https://github.com/llvm/llvm-project/commit/119cdf7e1b70493148daa9f51d88d6595a680dc0
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
Log Message:
-----------
[OpenACC][CIR] Finish 'private' recipe lowering by doing 'init' (#161540)
Private only does 'init' when a constructor needs to be called, so this
patch adds that. The logic of what to init is caused by Sema, but the
tests show that types that are pointers or non-class-types or class
types without a constructor aren't actually initialized.
Commit: 1c1d525bf2535d3ce8ba28179a1b577215fe5e1c
https://github.com/llvm/llvm-project/commit/1c1d525bf2535d3ce8ba28179a1b577215fe5e1c
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/cli-canonical_loop.mlir
M mlir/test/Dialect/OpenMP/cli-unroll-heuristic.mlir
Log Message:
-----------
[mlir][omp] Improve canonloop/iv naming (#159773)
Improve the automatic naming of variables defined by the
`omp.canonical_loop` operation:
1. The iteration variable gets a name consistent with the cli variable
2. Instead of appending `_s0` for each nesting level, shorten it to
`_d<num>` for a perfectly nested loop at depth `<num>`
3. Do not add any suffix to the top-level loop if it is the only
top-level loop
Commit: e48fe7627732162683245f712eb84d1155ffcd58
https://github.com/llvm/llvm-project/commit/e48fe7627732162683245f712eb84d1155ffcd58
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Log Message:
-----------
[InstCombine] Remove foldSelectWithFrozenICmp() fold (#161659)
After https://github.com/llvm/llvm-project/pull/154336 this fold no
longer triggers, as the freeze will be pushed through to the icmp
operands, and generic handling will take care of it.
Commit: c4e1bca407f4cca7644937c117890fad157fec4b
https://github.com/llvm/llvm-project/commit/c4e1bca407f4cca7644937c117890fad157fec4b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
Log Message:
-----------
Greedy: Move physreg check when trying to recolor vregs (NFC) (#160484)
Instead of checking if the recoloring candidate is a virtual register,
avoid adding it to the candidates in the first place.
Commit: 9f5abd38dd1782a6fd3b8ed1c2f76aa62dc850b1
https://github.com/llvm/llvm-project/commit/9f5abd38dd1782a6fd3b8ed1c2f76aa62dc850b1
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir
M llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir
M llvm/test/CodeGen/AArch64/framelayout-sve.mir
M llvm/test/CodeGen/AArch64/spillfill-sve.mir
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
Log Message:
-----------
[Codegen] Add a separate stack ID for scalable predicates (#142390)
This splits out "ScalablePredicateVector" from the "ScalableVector"
StackID this is primarily to allow easy differentiation between vectors
and predicates (without inspecting instructions).
This new stack ID is not used in many places yet, but will be used in a
later patch to mark stack slots that are known to contain predicates.
Co-authored-by: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Commit: 047f8c8ee08e6efc51c552b910a6fbec2baca189
https://github.com/llvm/llvm-project/commit/047f8c8ee08e6efc51c552b910a6fbec2baca189
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/include/clang/Sema/Template.h
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/AST/ast-dump-concepts.cpp
M clang/test/AST/ast-dump-ctad-alias.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.id/p3.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/compound-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/nested-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/simple-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/cxx2c-template-template-param.cpp
M clang/test/SemaCXX/invalid-requirement-requires-expr.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaHLSL/BuiltIns/Buffers.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaTemplate/concepts-recovery-expr.cpp
M clang/test/SemaTemplate/concepts-recursive-inst.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/instantiate-abbreviated-template.cpp
M clang/test/SemaTemplate/instantiate-expanded-type-constraint.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
M clang/test/SemaTemplate/instantiate-template-argument.cpp
M clang/test/SemaTemplate/pr52970.cpp
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
Log Message:
-----------
Revert "[Clang] Normalize constraints before checking for satisfaction" (#161669)
Reverts llvm/llvm-project#141776
CI failures
https://lab.llvm.org/buildbot/#/builders/202/builds/3591
https://lab.llvm.org/buildbot/#/builders/55/builds/18066
https://lab.llvm.org/buildbot/#/builders/85/builds/14103
Commit: 706b79002e21b571888db7f275bf5ed00e7cce41
https://github.com/llvm/llvm-project/commit/706b79002e21b571888db7f275bf5ed00e7cce41
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
Log Message:
-----------
Greedy: Merge VirtRegMap queries into one use (NFC) (#160485)
Commit: b147019f8b11cd491f331bd707f764786792665e
https://github.com/llvm/llvm-project/commit/b147019f8b11cd491f331bd707f764786792665e
Author: Alejandro Álvarez Ayllón <alejandro.alvarez at sonarsource.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDecl.cpp
A clang/test/Parser/recovery-after-expected-unqualified-id.cpp
Log Message:
-----------
[clang] Preserve `externs` following broken declarations (#161641)
Treat them as namespaces: if they are at the beginning of the line, they
are likely a good recovery point.
For instance, in
```cpp
1.3.0
extern "C" {
extern int foo();
extern "C++" {
namespace bar {
void baz();
};
}
}
namespace {}
```
Everything until `namespace`... is gone from the AST. Headers (like
libc's C++ `math.h`) can be included from an `extern "C"` context, and
they do an `extern "C++"` back again before including C++ headers (like
`__type_traits`).
However, a malformed declaration just before the include (as the orphan
`1.3.0` in the example) causes everything from these standard headers to
go missing. This patch updates the heuristic to try to recover from the
first `extern` keyword seen, pretty much as it is done for `namespace`.
CPP-4478
Commit: b92ff6b2099fa5103a0350028c6752ad953b9b8d
https://github.com/llvm/llvm-project/commit/b92ff6b2099fa5103a0350028c6752ad953b9b8d
Author: ravil-mobile <ravil.aviva.com at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[ROCDL] Added `rocdl.cvt.scale.pk8` ops (#161411)
This patch introduces some missing FP conversion instructions in the
ROCDL dialect
Specifically:
- Downscaling 8x packed F16, Bf16, Fp32 values to Fp8, Bf8, Fp4
Tests:
- Added lit-tests to check MLIR -> LLVM lowering
Commit: f98735f1264c9214a2efa2b05d48871e44cfd245
https://github.com/llvm/llvm-project/commit/f98735f1264c9214a2efa2b05d48871e44cfd245
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
Log Message:
-----------
Greedy: Use initializer list for recoloring candidates (NFC) (#160486)
Commit: 11b0cf8fbeaf8b2384f3ab4d7f6fe97bc7d3db63
https://github.com/llvm/llvm-project/commit/11b0cf8fbeaf8b2384f3ab4d7f6fe97bc7d3db63
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/X86/shift-i128.ll
Log Message:
-----------
Greedy: Take hints from copy to physical subreg (#160467)
Previously this took hints from subregister extract of physreg,
like %vreg.sub = COPY $physreg
This now also handles the rarer case:
$physreg_sub = COPY %vreg
Also make an accidental bug here before explicit; this was
only using the superregister as a hint if it was already
in the copy, and not if using the existing assignment. There are
a handful of regressions in that case, so leave that extension
for a future change.
Commit: daa4e57ccf38ff6ac22243e98a035c87b9f9f3ae
https://github.com/llvm/llvm-project/commit/daa4e57ccf38ff6ac22243e98a035c87b9f9f3ae
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/unaligned-vec-store.ll
Log Message:
-----------
[Hexagon] Add opcode V6_vS32Ub_npred_ai for offset validity check (#161618)
Check for a valid offset for unaligned vector store V6_vS32Ub_npred_ai.
isValidOffset() is updated to evaluate offset of this instruction.
Fixes #160647
Commit: c242aff2452fb662a7ea23954abe654b51182b8e
https://github.com/llvm/llvm-project/commit/c242aff2452fb662a7ea23954abe654b51182b8e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M flang/include/flang/Lower/OpenACC.h
M flang/include/flang/Lower/SymbolMap.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/SymbolMap.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/OpenACC/acc-host-data-cuda-device.f90
Log Message:
-----------
[flang][cuda][openacc] Create new symbol in host_data region for CUDA Fortran interop (#161613)
Commit: 197e77b33d344c162b8c87de8aa7ddd942f50874
https://github.com/llvm/llvm-project/commit/197e77b33d344c162b8c87de8aa7ddd942f50874
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/sbb.ll
Log Message:
-----------
[X86] Create special case for (a-b) - (a<b) -> sbb a, b (#161388)
Commit: a3594cd6442ee988c18249d96b8331f0a5331df7
https://github.com/llvm/llvm-project/commit/a3594cd6442ee988c18249d96b8331f0a5331df7
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/Bindings/Python/MainModule.cpp
Log Message:
-----------
[MLIR][Python] fixup Context and Location stubs and NanobindAdaptors (#161433)
add correct names for `NB_TYPE_CASTER(..., name)` so users of
`NanobindAdaptors.h` can generate the correct hints. Also fix a few
straggler stubs.
Commit: 32d03f3991bb03e976a25a3fa311f9a4e172dc5e
https://github.com/llvm/llvm-project/commit/32d03f3991bb03e976a25a3fa311f9a4e172dc5e
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
Log Message:
-----------
[Clang][Sema] Fix crash in CheckUsingDeclQualifier due to diagnostic missing an argument (#161277)
Crash report came in and it was pretty obvious the diagnostic line was
just missing an argument. I supplied the argument and added a test.
Fixes: https://github.com/llvm/llvm-project/issues/161072
Commit: 6632b2f377674864bd4bc05278bf90805d30665a
https://github.com/llvm/llvm-project/commit/6632b2f377674864bd4bc05278bf90805d30665a
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
M llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
Log Message:
-----------
[AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (#142391)
This patch attempts to refactor AArch64FrameLowering to allow the size
of the ZPR and PPR areas to be calculated separately. This will be used
by a subsequent patch to support allocating ZPRs and PPRs to separate
areas. This patch should be an NFC and is split out to make later
functional changes easier to spot.
Co-authored-by: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Commit: f646d766de4e7978feeced765b414dc7f905c5f1
https://github.com/llvm/llvm-project/commit/f646d766de4e7978feeced765b414dc7f905c5f1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
Log Message:
-----------
[LV] Extend test coverage for tail-folding with recurrences.
Add additional test coverage for tail-folding loops with first-order
recurrences and users outside the loop. Test a combination of
vectorization factors and interleave counts.
Also update check lines in reduction-order.ll and adjust naming for
clarity.
This adds extra test coverage for
https://github.com/llvm/llvm-project/pull/149042.
Commit: e3e0f69fca744f357d45c04d06038f6b566a0b90
https://github.com/llvm/llvm-project/commit/e3e0f69fca744f357d45c04d06038f6b566a0b90
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[NFC][clang-sycl-linker] Avoid ambiguous call to CallingConv (#161682)
both llvm and clang namespace have CallingConv.
Add namespace prefix to avoid ambiguous call .
Commit: 235cd75c1429ad51cc3ad9728ccd8ffdc10742e3
https://github.com/llvm/llvm-project/commit/235cd75c1429ad51cc3ad9728ccd8ffdc10742e3
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
Log Message:
-----------
[AMDGPU] s_quadmask* implicitly defines SCC (#161582)
Fix s_quadmask* instruction description so that it defines SCC.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 5bbf72400cfeb8f4e205e9ff1c98d34d2997796c
https://github.com/llvm/llvm-project/commit/5bbf72400cfeb8f4e205e9ff1c98d34d2997796c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/test/CodeGen/X86/avx512ifma-builtins.c
M clang/test/CodeGen/X86/avx512ifmavl-builtins.c
M clang/test/CodeGen/X86/avxifma-builtins.c
Log Message:
-----------
[X86] Add bytecode / -fexperimental-new-constant-interpreter VPMADD52 intrinsics test coverage (#161684)
Inspired by test problems encountered on #161056
Commit: afb262855e755b499a733c2b84b6a1cb789b3b1f
https://github.com/llvm/llvm-project/commit/afb262855e755b499a733c2b84b6a1cb789b3b1f
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
A llvm/test/Transforms/LoopUnroll/peel-branch-weights-freq.ll
M llvm/test/Transforms/LoopUnroll/peel-branch-weights.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-pgo.ll
M llvm/test/Transforms/LoopUnroll/scev-invalidation-lcssa.ll
Log Message:
-----------
[LoopPeel] Fix branch weights' effect on block frequencies (#128785)
[LoopPeel] Fix branch weights' effect on block frequencies
This patch implements the LoopPeel changes discussed in [[RFC] Fix Loop
Transformations to Preserve Block
Frequencies](https://discourse.llvm.org/t/rfc-fix-loop-transformations-to-preserve-block-frequencies/85785).
In summary, a loop's latch block can have branch weight metadata that
encodes an estimated trip count that is derived from application profile
data. Initially, the loop body's block frequencies agree with the
estimated trip count, as expected. However, sometimes loop
transformations adjust those branch weights in a way that correctly
maintains the estimated trip count but that corrupts the block
frequencies. This patch addresses that problem in LoopPeel, which it
changes to:
- Maintain branch weights consistently with the original loop for the
sake of preserving the total frequency of the original loop body.
- Store the new estimated trip count in the
`llvm.loop.estimated_trip_count` metadata, introduced by PR #148758.
Commit: ed12dc5e306c6d062c71e89f47756e771792f4fb
https://github.com/llvm/llvm-project/commit/ed12dc5e306c6d062c71e89f47756e771792f4fb
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Lower/OpenMP/declare-mapper.f90
A offload/test/offloading/fortran/target-declare-mapper-parent-allocatable.f90
Log Message:
-----------
[Flang][OpenMP] Implicitly map nested allocatable components in derived types (#160766)
This PR adds support for nested derived types and their mappers to the
MapInfoFinalization pass.
- Generalize MapInfoFinalization to add child maps for arbitrarily
nested allocatables when a derived object is mapped via declare mapper.
- Traverse HLFIR designates rooted at the target block arg and build
full coordinate_of chains; append members with correct membersIndex.
This fixes #156461.
Commit: 5ed678a1d9b428780744098078dc52387b1e7a79
https://github.com/llvm/llvm-project/commit/5ed678a1d9b428780744098078dc52387b1e7a79
Author: Fred Tingaud <95592999+frederic-tingaud-sonarsource at users.noreply.github.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/include/clang/Analysis/CFG.h
M clang/lib/Analysis/CFG.cpp
M clang/unittests/Analysis/CFGTest.cpp
Log Message:
-----------
[CFG] Add a BuildOption to consider default branch of switch on covered enumerations (#161345)
By default, the `default:` branch (or the successor if there is no
`default` and cases return) of a switch on fully covered enumerations is
considered as "Unreachable". It is a sane assumption in most cases, but
not always. That commit allows to change such behavior when needed.
Commit: 407ecfe6a3278968519628956484b546621ff545
https://github.com/llvm/llvm-project/commit/407ecfe6a3278968519628956484b546621ff545
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
Log Message:
-----------
[CIR][NFC] Cleanup MissingFeature asserts in RecordLayoutBuilder (#161605)
This change cleans up some cir::MissingFeature asserts in
CIRGenRecordLayoutBuilder.cpp. In a couple of cases the asserts were
stale markers that we failed to remove when the correspond support was
implemented.
In one case, a cir::MissingFeature::bitfields() assert was ambiguous in
meaning and has been replaced by a comment and something more specific.
The missing feature in this case is just a bit of debug code to verify
certain bitfield-related conditions. This check should be added, but it
is not functionally required.
Commit: 3c8c500a191e81044beeb6ec566f6aebd202c3c3
https://github.com/llvm/llvm-project/commit/3c8c500a191e81044beeb6ec566f6aebd202c3c3
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
Log Message:
-----------
[LLDB][NFC] Fix variable casing issue (#161691)
Fixes some casing mistakes I added in #161581
Commit: c2ef022aa7413ddc9aba48fa6fbe6fbd0cb14e19
https://github.com/llvm/llvm-project/commit/c2ef022aa7413ddc9aba48fa6fbe6fbd0cb14e19
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/test/DebugInfo/X86/dynamic-bitfield.ll
Log Message:
-----------
Omit member size from DWARF when desired (#161423)
Commit: 18997b5a8fafe3b176529b83700d00d5b5876335
https://github.com/llvm/llvm-project/commit/18997b5a8fafe3b176529b83700d00d5b5876335
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[ADT] Fix a bug in DoubleAPFloat::frexp (#161625)
Without this patch, we call APFloat::makeQuiet() in frexp like so:
Quiet.getFirst().makeQuiet();
The problem is that makeQuiet returns a new value instead of modifying
"*this" in place, so we end up discarding the newly returned value.
This patch fixes the problem by assigning the result back to
Quiet.getFirst().
We should put [[nodiscard]] on APFloat::makeQuiet, but I'll do that in
another patch.
Commit: b43648818768620b615ee06517d58b6fc5d39583
https://github.com/llvm/llvm-project/commit/b43648818768620b615ee06517d58b6fc5d39583
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/BitVector.h
Log Message:
-----------
[ADT] Use a C++17 fold expression in BitVector.h (NFC) (#161626)
This patch simplifies the assertion by replacing the std::all_of check
with a more direct C++17 fold expression.
Commit: 0dd8f322c1b40bdac469eec248e3b2b4e1043754
https://github.com/llvm/llvm-project/commit/0dd8f322c1b40bdac469eec248e3b2b4e1043754
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/ConcurrentHashtable.h
Log Message:
-----------
[ADT] Use structured bindings (NFC) (#161627)
Both Size and Count are just integers, so I am not using & here.
Commit: 7eb5c08ac3a5bc524a5fe4e2e91db3a5b1ffe3cd
https://github.com/llvm/llvm-project/commit/7eb5c08ac3a5bc524a5fe4e2e91db3a5b1ffe3cd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/DirectedGraph.h
Log Message:
-----------
[ADT] Use "= default" in DirectedGraph.h (#161628)
This patch drops user copy/move constructors and assignment operators
of DirectedGraph to adhere to the Rule of Zero.
Now, the original code:
DGraphType &operator=(const DGraphType &&G)
is most likely unintended -- a move assignment operator with const
r-value reference. This patch fixes that.
Commit: c0a2bead5b471497c42966a73548f7690de2f301
https://github.com/llvm/llvm-project/commit/c0a2bead5b471497c42966a73548f7690de2f301
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/docs/TableGen/ProgRef.rst
Log Message:
-----------
[llvm] Proofread TableGen/ProgRef.rst (#161629)
Commit: 25126117b5781e96453e5c5b1a9a6a6f8aa3989c
https://github.com/llvm/llvm-project/commit/25126117b5781e96453e5c5b1a9a6a6f8aa3989c
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/remat.ll
Log Message:
-----------
[RegAlloc] Add coverage leading to revert of pr160765 (#161614)
Essentially what happened is the following series of events:
1) We rematerialized the vmv.v.x into the loop.
2) As this was the last use of the instruction, we deleted the
instruction, and removed it from the original live range.
3) We split the live range for the remat.
4) We tried to rematerialize the uses of that split interval, and
crashed because the assert about the def being available in
the original live interval does not hold.
Commit: e394df39c63152d9ba6f81262d8a9eb82e7c7814
https://github.com/llvm/llvm-project/commit/e394df39c63152d9ba6f81262d8a9eb82e7c7814
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
Log Message:
-----------
[NFC] Rename members in AutoVarEmission (#161668)
It was brought up by Andy in a different review that AutoVarEmission's
member variables didn't follow our naming standard. This patch corrects
that and fixes all references.
Commit: 758fd7a0279021d51492848b30c0c5faf5f90cfe
https://github.com/llvm/llvm-project/commit/758fd7a0279021d51492848b30c0c5faf5f90cfe
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
Log Message:
-----------
[AArch64][SME] Reshuffle emit[prologue|epilogue]() for splitSVEObjects (NFCI) (#161217)
Requested in
https://github.com/llvm/llvm-project/pull/142392#discussion_r2207880079
Commit: 419594230f952a37dd2751056f3b92b0a9f80dee
https://github.com/llvm/llvm-project/commit/419594230f952a37dd2751056f3b92b0a9f80dee
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpBase.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Dialect/OpenMP/cli-tile.mlir
A mlir/test/Dialect/OpenMP/invalid-tile.mlir
A mlir/test/Target/LLVMIR/openmp-cli-tile01.mlir
A mlir/test/Target/LLVMIR/openmp-cli-tile02.mlir
M mlir/test/mlir-tblgen/op-format-invalid.td
M mlir/test/mlir-tblgen/op-format-spec.td
M mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
M mlir/tools/mlir-tblgen/FormatGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[mlir][omp] Add omp.tile operation (#160292)
Add the `omp.tile` loop transformations for the OpenMP dialect. Used for
lowering a standalone `!$omp tile` in Flang.
Commit: 5843ffb14940920f72516dfe18ed657bee23d1c5
https://github.com/llvm/llvm-project/commit/5843ffb14940920f72516dfe18ed657bee23d1c5
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Improve code using m_One (NFC) (#161686)
Commit: d68f0c2e1c1fafea983f92233e8ef9bcfe2a410a
https://github.com/llvm/llvm-project/commit/d68f0c2e1c1fafea983f92233e8ef9bcfe2a410a
Author: Andrew Ng <andrew.ng at sony.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
M lld/ELF/Driver.cpp
M lld/ELF/Options.td
Log Message:
-----------
[DTLTO][LLD] Tidy up DTLTO related options (NFC) (#161675)
Change LLD DTLTO option definitions to match actual option name.
Commit: 6bfa56a29aeeb70af0039cbba25cfc7d7b2a5f6a
https://github.com/llvm/llvm-project/commit/6bfa56a29aeeb70af0039cbba25cfc7d7b2a5f6a
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
Log Message:
-----------
[NFC][DwarfLowLevel] Make getRelocatedValueImpl public (#160618)
Without this, the class is useless.
Commit: c4709823bb82cb4b6ca2675ef69b1a0e02e3f58e
https://github.com/llvm/llvm-project/commit/c4709823bb82cb4b6ca2675ef69b1a0e02e3f58e
Author: Michael Jones <michaelrj at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M libc/fuzzing/stdlib/strtointeger_differential_fuzz.cpp
Log Message:
-----------
[libc] Fix issue with fuzz input too short for atoi diff fuzz (#161705)
The string to integer differential fuzzer assumes at least one byte of
meaningful input, but wasn't explicitly checking that. Now it does.
Commit: 0b7129afccc8e79fb88bb686466211f3bcad142e
https://github.com/llvm/llvm-project/commit/0b7129afccc8e79fb88bb686466211f3bcad142e
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fcmp.ll
Log Message:
-----------
[InstCombine] Fix FMF propagation in `foldFCmpFSubIntoFCmp` (#161539)
Proof: https://alive2.llvm.org/ce/z/orSP-S
Closes https://github.com/llvm/llvm-project/issues/161525.
Commit: 67c000efb7bb7858f9fb6e577f2c9d1f24291ba0
https://github.com/llvm/llvm-project/commit/67c000efb7bb7858f9fb6e577f2c9d1f24291ba0
Author: Steven Perron <stevenperron at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/Attr.td
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/CodeGenHLSL/resources/RWStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/resources/RasterizerOrderedStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-lib.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
Log Message:
-----------
[HLSL] [SPIR-V] Add counter member for typed buffer (#161414)
This is part 1 of implementing the typed buffer counters proposal:
https://github.com/llvm/wg-hlsl/blob/main/proposals/0023-typed-buffer-counters.md
This patch adds the initial plumbing for supporting counter variables
associated with structured buffers for the SPIR-V backend. It introduces
an `IsCounter` attribute to `HLSLAttributedResourceType` and threads it
through the AST, type printing, and mangling. It also adds a
`__counter_handle` member to the relevant buffer types in
`HLSLBuiltinTypeDeclBuilder`.
Contributes to https://github.com/llvm/llvm-project/issues/137032
Commit: 99d85906c542c3801a24137ba6d6f2c367308563
https://github.com/llvm/llvm-project/commit/99d85906c542c3801a24137ba6d6f2c367308563
Author: Jeremy Kun <jkun at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDecl.txt
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDef.txt
M mlir/test/lib/Dialect/TestIRDLToCpp/CMakeLists.txt
M mlir/test/lib/Dialect/TestIRDLToCpp/TestIRDLToCppDialect.cpp
M mlir/test/lib/Dialect/TestIRDLToCpp/test_conversion.testd.mlir
M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp.irdl.mlir
M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp_invalid_unsupported_types.irdl.mlir
Log Message:
-----------
[mlir] [irdl] Add support for regions in irdl-to-cpp (#158540)
Fixes https://github.com/llvm/llvm-project/issues/158034
For the input
```mlir
irdl.dialect @conditional_dialect {
// A conditional operation with regions
irdl.operation @conditional {
// Create region constraints
%r0 = irdl.region // Unconstrained region
%r1 = irdl.region() // Region with no entry block arguments
%v0 = irdl.any
%r2 = irdl.region(%v0) // Region with one i1 entry block argument
irdl.regions(cond: %r2, then: %r0, else: %r1)
}
}
```
This produces the following cpp:
https://gist.github.com/j2kun/d2095f108efbd8d403576d5c460e0c00
Summary of changes:
- The op class and adaptor get named accessors to the regions `Region
&get<RegionName>()` and `getRegions()`
- The op now gets `OpTrait::NRegions<3>` and `OpInvariants` to trigger
the region verification
- Support for region block argument constraints is added, but not
working for all constraints until codegen for `irdl.is` is added (filed
https://github.com/llvm/llvm-project/issues/161018 and left a TODO).
- Helper functions for the individual verification steps are added,
following mlir-tblgen's format (in the above gist,
`__mlir_irdl_local_region_constraint_ConditionalOp_cond` and similar),
and `verifyInvariantsImpl` that calls them.
- Regions are added in the builder
## Questions for the reviewer
### What is the "correct" interface for verification?
I used `mlir-tblgen` on an analogous version of the example
`ConditionalOp` in this PR, and I see an `::mlir::OpTrait::OpInvariants`
trait as well as
```cpp
::llvm::LogicalResult ConditionalOp::verifyInvariantsImpl() {
{
unsigned index = 0; (void)index;
for (auto ®ion : ::llvm::MutableArrayRef((*this)->getRegion(0)))
if (::mlir::failed(__mlir_ods_local_region_constraint_test1(*this, region, "cond", index++)))
return ::mlir::failure();
for (auto ®ion : ::llvm::MutableArrayRef((*this)->getRegion(1)))
if (::mlir::failed(__mlir_ods_local_region_constraint_test1(*this, region, "then", index++)))
return ::mlir::failure();
for (auto ®ion : ::llvm::MutableArrayRef((*this)->getRegion(2)))
if (::mlir::failed(__mlir_ods_local_region_constraint_test1(*this, region, "else", index++)))
return ::mlir::failure();
}
return ::mlir::success();
}
::llvm::LogicalResult ConditionalOp::verifyInvariants() {
if(::mlir::succeeded(verifyInvariantsImpl()) && ::mlir::succeeded(verify()))
return ::mlir::success();
return ::mlir::failure();
}
```
However, `OpInvariants` only seems to need `verifyInvariantsImpl`, so
it's not clear to me what is the purpose of the `verifyInvariants`
function, or, if I leave out `verifyInvariants`, whether I need to call
`verify()` in my implementation of `verifyInvariantsImpl`. In this PR, I
omitted `verifyInvariants` and generated `verifyInvariantsImpl`.
### Is testing sufficient?
I am not certain I implemented the builders properly, and it's unclear
to me to what extent the existing tests check this (which look like they
compile the generated cpp, but don't actually use it). Did I omit some
standard function or overload?
---------
Co-authored-by: Jeremy Kun <j2kun at users.noreply.github.com>
Commit: b86ddae1da651f921125a9864b45a5b11bc3b1c0
https://github.com/llvm/llvm-project/commit/b86ddae1da651f921125a9864b45a5b11bc3b1c0
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/Frontend/ChainedIncludesSource.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Log Message:
-----------
[clang] NFCI: Clean up `CompilerInstance::create{File,Source}Manager()` (#160748)
The `CompilerInstance::createSourceManager()` function currently accepts
the `FileManager` to be used. However, all clients call
`CompilerInstance::createFileManager()` prior to creating the
`SourceManager`, and it never makes sense to use a `FileManager` in the
`SourceManager` that's different from the rest of the compiler. Passing
the `FileManager` explicitly is redundant, error-prone, and deviates
from the style of other `CompilerInstance` initialization APIs.
This PR therefore removes the `FileManager` parameter from
`createSourceManager()` and also stops returning the `FileManager`
pointer from `createFileManager()`, since that was its primary use. Now,
`createSourceManager()` internally calls `getFileManager()` instead.
Commit: 8f67cdd9b7f4ffa3cca552b00d58e72dba66b924
https://github.com/llvm/llvm-project/commit/8f67cdd9b7f4ffa3cca552b00d58e72dba66b924
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
A llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
M llvm/test/CodeGen/AArch64/spill-fill-zpr-predicates.mir
A llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
Log Message:
-----------
[AArch64][SME] Support split ZPR and PPR area allocation (#142392)
For a while we have supported the `-aarch64-stack-hazard-size=<size>`
option, which adds "hazard padding" between GPRs and FPR/ZPRs. However,
there is currently a hole in this mitigation as PPR and FPR/ZPR accesses
to the same area also cause streaming memory hazards (this is noted by
`-pass-remarks-analysis=sme -aarch64-stack-hazard-remark-size=<val>`),
and the current stack layout places PPRs and ZPRs within the same area.
Which looks like:
```
------------------------------------ Higher address
| callee-saved gpr registers |
|---------------------------------- |
| lr,fp (a.k.a. "frame record") |
|-----------------------------------| <- fp(=x29)
| <hazard padding> |
|-----------------------------------|
| callee-saved fp/simd/SVE regs |
|-----------------------------------|
| SVE stack objects |
|-----------------------------------|
| local variables of fixed size |
| <FPR> |
| <hazard padding> |
| <GPR> |
------------------------------------| <- sp
| Lower address
```
With this patch the stack (and hazard padding) is rearranged so that
hazard padding is placed between the PPRs and ZPRs rather than within
the (fixed size) callee-save region. Which looks something like this:
```
------------------------------------ Higher address
| callee-saved gpr registers |
|---------------------------------- |
| lr,fp (a.k.a. "frame record") |
|-----------------------------------| <- fp(=x29)
| callee-saved PPRs |
| PPR stack objects | (These are SVE predicates)
|-----------------------------------|
| <hazard padding> |
|-----------------------------------|
| callee-saved ZPR regs | (These are SVE vectors)
| ZPR stack objects | Note: FPRs are promoted to ZPRs
|-----------------------------------|
| local variables of fixed size |
| <FPR> |
| <hazard padding> |
| <GPR> |
------------------------------------| <- sp
| Lower address
```
This layout is only enabled if:
* SplitSVEObjects are enabled (`-aarch64-split-sve-objects`)
- (This may be enabled by default in a later patch)
* Streaming memory hazards are present
- (`-aarch64-stack-hazard-size=<val>` != 0)
* PPRs and FPRs/ZPRs are on the stack
* There's no stack realignment or variable-sized objects
- This is left as a TODO for now
Additionally, any FPR callee-saves that are present will be promoted to
ZPRs. This is to prevent stack hazards between FPRs and GRPs in the
fixed size callee-save area (which would otherwise require more hazard
padding, or moving the FPR callee-saves).
This layout should resolve the hole in the hazard padding mitigation,
and is not intended change codegen for non-SME code.
Commit: 1f225676f4859842d0a1ee74c2318c01d34b571b
https://github.com/llvm/llvm-project/commit/1f225676f4859842d0a1ee74c2318c01d34b571b
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Improve code using VPlan::getFalse (NFC) (#161681)
Commit: 9133fc8cb04f8e45c9b46de85a8de99bf01e55c7
https://github.com/llvm/llvm-project/commit/9133fc8cb04f8e45c9b46de85a8de99bf01e55c7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[LAA,LV] Add early-exit tests with deref assumes and nofree via context.
Add tests with early exits and dereferenceable assumptions that need
proving no-free via the context.
Commit: 68b143d968f8fe97bf6d3a80b3a73d48e7b655cb
https://github.com/llvm/llvm-project/commit/68b143d968f8fe97bf6d3a80b3a73d48e7b655cb
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Use operand layouts for store scatter (#161447)
The PR adds a change to use the layouts from the operands since store
doesn't have a result
Commit: 5be4fc24a748514a0e51c408da11d0544ebf3811
https://github.com/llvm/llvm-project/commit/5be4fc24a748514a0e51c408da11d0544ebf3811
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/test/Dialect/Arith/emulate-unsupported-floats.mlir
Log Message:
-----------
[mlir][Arith] arith.select doesn't need to be emulated for small floats (#161707)
arith.select isn't an arithmetic operation in the sense of things like
addf or mulf, which the emulate-unsupported-floats rewrites using extf
and truncf.
This patch adds select as a legal operation to prevent a pointless
conversion aronud conditional moves.
Fixes https://github.com/iree-org/iree/issues/22181
Commit: 847e1e18902d1bedb9d7df8cbec84dbda8042e47
https://github.com/llvm/llvm-project/commit/847e1e18902d1bedb9d7df8cbec84dbda8042e47
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/MacroExpander.cpp
M clang/lib/Format/NamespaceEndCommentsFixer.cpp
M clang/lib/Format/ObjCPropertyAttributeOrderFixer.cpp
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/lib/Format/SortJavaScriptImports.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/WhitespaceManager.cpp
Log Message:
-----------
[clang-format][NFC] Introduce isNoneOf (#161021)
And apply throughout the code base.
Commit: 819f34a6e047754276320235dfe014b71c64d7da
https://github.com/llvm/llvm-project/commit/819f34a6e047754276320235dfe014b71c64d7da
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/lib/AST/StmtProfile.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[NFC][OpenACC] Remove 'initExpr' from AST/etc. (#161674)
I originally expected that we were going to need the initExpr stored
separately from the allocaDecl when doing arrays/pointers, however after
implementing it, we found that the idea of having the allocaDecl just
store its init directly still works perfectly. This patch removes the
extra field from the AST.
Commit: f1650cf91b01470ce44f47797663d59f00828493
https://github.com/llvm/llvm-project/commit/f1650cf91b01470ce44f47797663d59f00828493
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/builtin-assume-aligned.cpp
Log Message:
-----------
Revert "[clang] Convert second arg of __builtin_assume_aligned to ConstantExpr (#161314)" (#161719)
This reverts commit 8f77621574176387f906b8ceef9e1abb90bf22f6 (#161314).
Reason: Causing crashes when building https://github.com/google/highway.
See the original PR for details.
Commit: 49603bd9b8c75666f8337b63a6c75a50aa618d4b
https://github.com/llvm/llvm-project/commit/49603bd9b8c75666f8337b63a6c75a50aa618d4b
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
Revert "[MemProf] Add ambigous memprof attribute" (#161717)
Reverts llvm/llvm-project#157204
This caused issues in ThinLTO binaries because of the checking here,
that didn't expect allocations needing cloning to have memprof metadata:
https://github.com/llvm/llvm-project/blob/9133fc8cb04f8e45c9b46de85a8de99bf01e55c7/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp#L5572-L5582
I need to move the assert into the if check and guard by that condition.
And add a more thorough test.
Commit: 1d7ec60e8f8a659ad9a8da8a53c31ce1ef491dd5
https://github.com/llvm/llvm-project/commit/1d7ec60e8f8a659ad9a8da8a53c31ce1ef491dd5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Improve formatting in RISCVInstrInfoVPseudos.td. NFC (#161470)
Primarily focused on changes from RISCVVPseudo recently inheriting from
Pseudo.
Commit: 44d471e70679c3056fb68d2fc826bbaa41f4df3a
https://github.com/llvm/llvm-project/commit/44d471e70679c3056fb68d2fc826bbaa41f4df3a
Author: Marcell Leleszi <59964679+mleleszi at users.noreply.github.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/linux/fcntl-macros.h
M libc/include/sys/syscall.h.def
M libc/include/unistd.yaml
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/faccessat.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/access.cpp
A libc/src/unistd/linux/faccessat.cpp
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/faccessat_test.cpp
Log Message:
-----------
[libc] Implement faccessat (#161065)
#160404
- Implement POSIX function "faccessat"
- Remove redundant param in facessat syscall in access implementation,
faccessat syscall does not take a flags arg
Commit: 8779ab6b218ee9372be7758b2c9a0cf92e2b5046
https://github.com/llvm/llvm-project/commit/8779ab6b218ee9372be7758b2c9a0cf92e2b5046
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td
Log Message:
-----------
[RISCV] Always use XLenVT for pointer operand in PatLAQ and PatSRL. NFC (#161709)
The vt argument is not used today so it always gets the default XLenVT
which is why this is NFC. I plan to use it in a future patch.
Commit: 902fe02e8722b8f51cb3897226c97fbff353c890
https://github.com/llvm/llvm-project/commit/902fe02e8722b8f51cb3897226c97fbff353c890
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M offload/libomptarget/OpenMP/InteropAPI.cpp
M offload/libomptarget/exports
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[OFFLOAD] Restore interop functionality (#161429)
This implements two pieces to restore the interop functionality (that I
broke) when the 6.0 interfaces were added:
* A set of wrappers that support the old interfaces on top of the new
ones
* The same level of interop support for the CUDA amd AMD plugins
Commit: 694390679ac1351a8d471d39db85400eb21a9035
https://github.com/llvm/llvm-project/commit/694390679ac1351a8d471d39db85400eb21a9035
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
Log Message:
-----------
[RISCV][GISel] Share an atomic load isel pattern GISel RV64 and SDAG RV32. NFC (#161721)
Use stricter type for RV64 only patterns.
Stores are different because atomic_store doesn't differentiate
truncating and non-truncating stores.
Commit: 11faf88d8fea4d221e826e4e9827864f38d246fb
https://github.com/llvm/llvm-project/commit/11faf88d8fea4d221e826e4e9827864f38d246fb
Author: Brandon <61314499+brandonxin at users.noreply.github.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
A llvm/test/Transforms/InstCombine/icmp-clamp.ll
Log Message:
-----------
[InstCombine] Fold icmp with clamp into unsigned bound check (#161303)
Fix #157315
alive2: https://alive2.llvm.org/ce/z/TEnuFV
The equality comparison of `min(max(X, Lo), Hi)` and `X` is actually a
range check on `X`. This PR folds this into an unsigned bound check `(X
- Lo) u< (Hi - Lo + 1)`.
---------
Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>
Commit: 6048c2f0c752d6f9963bc47a10f208c62882c8d6
https://github.com/llvm/llvm-project/commit/6048c2f0c752d6f9963bc47a10f208c62882c8d6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M flang/lib/Parser/parsing.cpp
M flang/lib/Parser/prescan.cpp
A flang/test/Semantics/OpenACC/acc-sentinel.f90
Log Message:
-----------
[flang][openacc] Suppport !@acc compiler sentinel (#161706)
Commit: a2b6602aa46827cd0a3a379980dfbe1688f4049e
https://github.com/llvm/llvm-project/commit/a2b6602aa46827cd0a3a379980dfbe1688f4049e
Author: Artem Belevich <tra at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/f32x2-convert-i32x2.ll
Log Message:
-----------
[NVPTX] expand trunc/ext on v2i32 (#161715)
#153478 made v2i32 legal on newer GPUs, but we can not lower all
operations yet. Expand the `trunc/ext` operation until we implement
efficient lowering.
Commit: 0ebd4334021e7579bfba7a92b692e0e4ece56cb9
https://github.com/llvm/llvm-project/commit/0ebd4334021e7579bfba7a92b692e0e4ece56cb9
Author: Jon Chesterfield <jon at spectralcompute.co.uk>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/test/CodeGen/AMDGPU/lower-module-lds-precise-allocate-to-module-struct.ll
Log Message:
-----------
[AMDGPU] Be less optimistic when allocating module scope lds (#161464)
Make the test for when additional variables can be added to the struct
allocated at address zero more stringent. Previously, variables can be
added to it (for faster access) even when that increases the lds
requested by a kernel. This corrects that oversight.
Test case diff shows the change from all variables being allocated into
the module lds to only some being, in particular the introduction of
uses of the offset table and that some kernels now use less lds than
before.
Alternative to PR 160181
Commit: fd9a1dcc01766c71932898e9643ce28bf2801bad
https://github.com/llvm/llvm-project/commit/fd9a1dcc01766c71932898e9643ce28bf2801bad
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after 99d85906c542c3801a24137ba6d6f2c367308563 (#161728)
Commit: a035ef478b921250190f63854852d2b03fec6e7d
https://github.com/llvm/llvm-project/commit/a035ef478b921250190f63854852d2b03fec6e7d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td
Log Message:
-----------
[RISCV] Use i64 instead of XLenVT in some RV64 only isel patterns. NFC
Commit: 2b2bc6320f7037bdbad912fe3cd8003988e6c0ae
https://github.com/llvm/llvm-project/commit/2b2bc6320f7037bdbad912fe3cd8003988e6c0ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
Log Message:
-----------
[LV] Add tests with multiple F(Max|Min)Num reductions w/o fast-math.
Pre-commits extra test coverage for loops with multiple F(Max|Min)Num
reductions w/o fast-math-flags for follow-up PR.
Commit: ea443d528d1a6687c2f5ecfe3de62e5c9d2ca42c
https://github.com/llvm/llvm-project/commit/ea443d528d1a6687c2f5ecfe3de62e5c9d2ca42c
Author: Brad Smith <brad at comstyle.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/fmv/hwcap.inc
R compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
Log Message:
-----------
[FMV][AArch64] Remove last of MRS bits and rename file (#161585)
474f5d2aefb44430b89ed72774a3c1d26a0adfb1 removed the last
bits reading from system registers so remove the last bits
utilizing MRS and rename the file to hwcap as the
code is now only decoding the hwcap flags.
Commit: dbffd0aeaf3484fe3d846a10b3c3b1e48ccdf7ef
https://github.com/llvm/llvm-project/commit/dbffd0aeaf3484fe3d846a10b3c3b1e48ccdf7ef
Author: Alex Langford <alangford at apple.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/test/Shell/SymbolFile/NativePDB/symtab.cpp
Log Message:
-----------
[lldb] Add lld requirement to NativePDB test (#161731)
The cpp file fails to build without `lld-link`.
Commit: f4370fb801aa221d7a56f88ebdd9451cce653a68
https://github.com/llvm/llvm-project/commit/f4370fb801aa221d7a56f88ebdd9451cce653a68
Author: David Green <david.green at arm.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/test/CodeGen/ARM/llrint-conv.ll
M llvm/test/CodeGen/ARM/lrint-conv.ll
M llvm/test/CodeGen/ARM/vector-lrint.ll
Log Message:
-----------
[ARM] Update and cleanup lrint/llrint tests. NFC
Most of the fp16 cases still do not work properly. See #161088.
Commit: f4784fd13fb77a609920a06af99c3602bdec530f
https://github.com/llvm/llvm-project/commit/f4784fd13fb77a609920a06af99c3602bdec530f
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/cpu_feature.py
A lldb/test/API/macosx/mte/Makefile
A lldb/test/API/macosx/mte/TestDarwinMTE.py
A lldb/test/API/macosx/mte/main.c
A lldb/test/API/macosx/mte/mte-entitlements.plist
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/DNBDefs.h
M lldb/tools/debugserver/source/MacOSX/MachTask.h
M lldb/tools/debugserver/source/MacOSX/MachTask.mm
M lldb/tools/debugserver/source/MacOSX/MachVMMemory.cpp
M lldb/tools/debugserver/source/MacOSX/MachVMMemory.h
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.cpp
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.h
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
Log Message:
-----------
[debugserver] Support for `qMemTags` packet (#160952)
Support for `qMemTags` packet in debugserver which allows usage of
LLDB's `memory tag read` on Darwin.
Commit: 8f2466bc72a5ab163621cb1bf4bf53a27f1cefe7
https://github.com/llvm/llvm-project/commit/8f2466bc72a5ab163621cb1bf4bf53a27f1cefe7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Reapply "[VPlan] Compute cost of more replicating loads/stores in ::computeCost. (#160053)" (#161724)
This reverts commit f61be4352592639a0903e67a9b5d3ec664ad4d23.
Recommit a small fix handling scalarization overhead consistently with
legacy cost model if a load is used directly as operand of another
memory operation, which fixes
https://github.com/llvm/llvm-project/issues/161404.
Original message:
Update VPReplicateRecipe::computeCost to compute costs of more
replicating loads/stores.
There are 2 cases that require extra checks to match the legacy cost
model:
1. If the pointer is based on an induction, the legacy cost model passes
its SCEV to getAddressComputationCost. In those cases, still fall back
to the legacy cost. SCEV computations will be added as follow-up
2. If a load is used as part of an address of another load, the legacy
cost model skips the scalarization overhead. Those cases are currently
handled by a usedByLoadOrStore helper.
Note that getScalarizationOverhead also needs updating, because when the
legacy cost model computes the scalarization overhead, scalars have not
been collected yet, so we can't each for replicating recipes to skip
their cost, except other loads. This again can be further improved by
modeling inserts/extracts explicitly and consistently, and compute costs
for those operations directly where needed.
PR: https://github.com/llvm/llvm-project/pull/160053
Commit: 3757fa6aa9eaa5a8c99bcfc75426bafddb613b10
https://github.com/llvm/llvm-project/commit/3757fa6aa9eaa5a8c99bcfc75426bafddb613b10
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M orc-rt/unittests/ErrorTest.cpp
Log Message:
-----------
[orc-rt] Add testcase for Expected<Expected<T>> support. (#161660)
Follows addition of Expected<Error> support (99ce2062462), and has
essentially the same motivation: supporting RPC calls to functions
returning Expected<T>, where the RPC infrastructure wants to be able to
wrap that result in its own Expected.
Commit: b3e2d6d4b4069bdfe9dd1ad832d7358cfd36f3ad
https://github.com/llvm/llvm-project/commit/b3e2d6d4b4069bdfe9dd1ad832d7358cfd36f3ad
Author: wjristow <warren.ristow at sony.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/X86/avx-cxx-record.cpp
Log Message:
-----------
Suppress returning larger CXX records in mem on PlayStation (#161732)
In commit e8a486ea9789, a change was made so that certain 256-bit and
512-bit CXX records would be returned in memory, fixing a violation of
the x86-64 psABI (where they had been incorrectly returned in AVX
registers). For compatibility reasons, we want to suppress that ABI-fix
on PlayStation. This commit suppresses that change for PlayStation, and
updates the test to include checking the 512-bit case.
Commit: 07974fe2b14a7601b5658deb9c41597db54e842f
https://github.com/llvm/llvm-project/commit/07974fe2b14a7601b5658deb9c41597db54e842f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
Reland "[lldb][MachO][NFC] Extract ObjC metadata symbol parsing into helper function" (#161655)
This reverts `5a80fb9177e3c831c9c574400a13d77393397f2a`. The original
change got reverted because of failing tests on macOS.
The issue was that I changed the scope of setting `type =
eSymbolTypeData` during the cleanup. This patch relands the original
patch but doesn't change the `else` branch to an `else if` branch.
Tested that macOS test-suite passes.
Commit: ab2c4a0ee1b4710c0f610292b6e9dcb45839c25f
https://github.com/llvm/llvm-project/commit/ab2c4a0ee1b4710c0f610292b6e9dcb45839c25f
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
Log Message:
-----------
[clang-scan-deps] Remove unused OutputsPaths from FullDependencyConsumer (NFC) (#155523)
The OutputPaths field of FullDependencyConsumer is not used, and the
resulting TranslationUnitDeps has no corresponding field. This change
removes the unused member.
It was added in commit f978ea4, and this comment in the Differential
Revision suggests it was intended to be removed before landing:
https://reviews.llvm.org/D70268#1772032
Commit: 9345b597e90ad99dbe2749cbb20692c0c881fd71
https://github.com/llvm/llvm-project/commit/9345b597e90ad99dbe2749cbb20692c0c881fd71
Author: Michael Jones <michaelrj at google.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
Log Message:
-----------
[libc][NFC] Turn off faccessat on aarch64 (#161740)
The SYS_faccessat2 syscall isn't available on the aarch64 buildbot, so
disable this entrypoint for now.
Commit: 66feafd4bef17df6d4b5f2674b979797d5e1c516
https://github.com/llvm/llvm-project/commit/66feafd4bef17df6d4b5f2674b979797d5e1c516
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/unittests/Frontend/CMakeLists.txt
Log Message:
-----------
[HLSL] Add missing dependency to Frontend unittest (#161738)
Recently, a bot fails on `DefinedStaticSamplerDump` unittest. After some
debugging, we come to the conclusion that the issue might because due to
a missing dependency when compiling. This adds that dependency that was
idenfied missing
Commit: 3960ff6ca03b0441087f9042850199583d9e11d2
https://github.com/llvm/llvm-project/commit/3960ff6ca03b0441087f9042850199583d9e11d2
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorGather.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShuffle.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorStep.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateMaskedLoadStore.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Simplify op rewrite pattern inheriting constructors. NFC. (#161670)
Use the `Base` type alias from
https://github.com/llvm/llvm-project/pull/158433.
Commit: 79d1524bde4c0253b349304e70716c3fb4f7193e
https://github.com/llvm/llvm-project/commit/79d1524bde4c0253b349304e70716c3fb4f7193e
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/lib/Analysis/IR2Vec.cpp
Log Message:
-----------
[NFC][IR2Vec] Moving `parseVocabSection()` to `VocabStorage` (#161711)
Commit: 487cdf14f67e95f61a42389bd168b32c00995ea4
https://github.com/llvm/llvm-project/commit/487cdf14f67e95f61a42389bd168b32c00995ea4
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll
Log Message:
-----------
[X86][AMX] Combine constant zero vector and AMX cast to tilezero (#92384)
Found this problem when investigating #91207
Commit: 40fce3250110b196fa351235d25f143b21e97957
https://github.com/llvm/llvm-project/commit/40fce3250110b196fa351235d25f143b21e97957
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
A orc-rt/include/orc-rt/CallableTraitsHelper.h
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/CallableTraitsHelperTest.cpp
Log Message:
-----------
[orc-rt] Add CallableTraitsHelper, refactor WrapperFunction to use it. (#161761)
CallableTraitsHelper identifies the return type and argument types of a
callable type and passes those to an implementation class template to
operate on.
The CallableArgInfo utility uses CallableTraitsHelper to provide
typedefs for the return type and argument types (as a tuple) of a
callable type.
In WrapperFunction.h, the detail::WFCallableTraits utility is rewritten
in terms of CallableTraitsHandler (and renamed to WFHandlerTraits).
Commit: d0e15f99ead47a077eb9c574e9614dd11a8f1ec1
https://github.com/llvm/llvm-project/commit/d0e15f99ead47a077eb9c574e9614dd11a8f1ec1
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/WrapperFunction.h
Log Message:
-----------
[orc-rt] Refactor WrapperFunction to simplify Serializer classes. (#161763)
Serializers only need to provide two methods now, rather than four. The
first method should return an argument serializer / deserializer, the
second a result value serializer / deserializer. The interfaces for
these are now more uniform (deserialize now returns a tuple, rather than
taking its output location(s) by reference). The intent is to simplify
Serializer helper code. NFCI.
Commit: c64d4cee657020a65723604ff4f0f81dbcb620e3
https://github.com/llvm/llvm-project/commit/c64d4cee657020a65723604ff4f0f81dbcb620e3
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
A clang/test/SemaTemplate/GH161657.cpp
Log Message:
-----------
[clang] fix lambda dependency issue with late parse attributes (#161765)
This fixes a regression introduced in #147835
When parsing a lambda where the call operator has a late parsed
attribute, we would try to build a 'this' type for the lambda, but in a
lambda 'this' never refers to the lambda class itself.
This late parsed attribute can be added implicitly by the
-ftrapping-math flag.
This patch patch makes it so CXXThisScopeRAII ignores lambdas.
This became observable in #147835 because that made clang lazily create
tag types, and it removed a workaround for a lambda dependency bug where
any previously created tag type for the lambda is discarded after its
dependency is recalculated.
But the 'this' scope created above would defeat this laziness and create
the lambda type too soon, before its dependency was updated.
Since this regression was never released, there are no release notes.
Fixes #161657
Commit: 715e0fab00fc7c6cbbbf84c1309f36dc9c613553
https://github.com/llvm/llvm-project/commit/715e0fab00fc7c6cbbbf84c1309f36dc9c613553
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Add transparent SPS conversion for error/expected types. (#161768)
This commit aims to reduce boilerplate by adding transparent conversion
between Error/Expected types and their SPS-serializable counterparts
(SPSSerializableError/SPSSerializableExpected). This allows
SPSWrapperFunction calls and handles to be written in terms of
Error/Expected directly.
This functionality can also be extended to transparently convert between
other types. This may be used in the future to provide conversion
between ExecutorAddr and native pointer types.
Commit: 874428708f3bcf2fc8402b2aa0ca720c1b6cd3a6
https://github.com/llvm/llvm-project/commit/874428708f3bcf2fc8402b2aa0ca720c1b6cd3a6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-02 (Thu, 02 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV][GISel] Use relaxed_load/store in GISel atomic patterns. NFC (#161712)
We have additional patterns for GISel because we need to make s16 and
s32 legal for load/store. GISel does not distinquish integer and FP
scalar types in LLT. We only know whether the load should be integer or
FP after register bank selection.
These patterns should have been updated to use relaxed_load/store when
the patterns in RISCVInstrInfoA.td were updated. Without this we will
miscompile loads/stores with strong memory ordering when Zalasr is
enabled.
This patch just fixes the miscompile, Zalasr will now cause a GISel
abort in some cases. A follow up patch will add additional GISel
patterns for Zalasr.
Commit: 065699b34316f5dca74ed7e88c3958d488869bec
https://github.com/llvm/llvm-project/commit/065699b34316f5dca74ed7e88c3958d488869bec
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/test/SemaTemplate/GH161657.cpp
Log Message:
-----------
[clang] fix #161765 test triple dependency (#161769)
Fixes the new test introduced in #161765, so that it always uses a
triple which supports floating point exceptions.
Otherwise, some post-commit bots fail.
Commit: d7f1cc885a75cf51e8f695e847d856d75fb05dd0
https://github.com/llvm/llvm-project/commit/d7f1cc885a75cf51e8f695e847d856d75fb05dd0
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang-rt/lib/runtime/character.cpp
Log Message:
-----------
[flang] use specialized scan/verify version for char (#161767)
The specialized version has a time complexity of `O(n)`.
Commit: a7016c43daa30b9517042b4f87b11787fa76ae30
https://github.com/llvm/llvm-project/commit/a7016c43daa30b9517042b4f87b11787fa76ae30
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call_rvc.s
Log Message:
-----------
[JITLink] Add LinkGraph name / triple to debugging output. (#161772)
Adds the name and triple of the graph to LinkGraph::dump output before
the rest of the graph content. Calls from JITLinkGeneric.cpp to dump the
graph are updated to avoid redundantly naming the graph.
Commit: e0eb7c25cbb5b5b80f023b1e3cc0b31e1bdaa8f0
https://github.com/llvm/llvm-project/commit/e0eb7c25cbb5b5b80f023b1e3cc0b31e1bdaa8f0
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
Log Message:
-----------
[Clang] Ensure initialized NTTP expressions when building CTAD for type aliases (#161035)
We missed calling CheckTemplateArgument when building CTAD deduction
guides. That ensures some InitExprs are correctly initialized, as in the
test that crashed due to incorrect NTTP initialization.
I don't use CheckTemplateArguments because, in CTAD synthesis, template
parameter packs don't always appear at the end of the parameter list,
unlike user-written ones mandated by the standard. This makes it
difficult for CheckTemplateArguments to determine how many arguments a
pack in middle should match, leading to unnecessary complexity.
On the other hand, since we substitute non-deduced template parameters
with deduced ones, we need to fold the packs midway through
substitution, where CheckTemplateArgument is more convenient.
As a drive-by this also removes some dead code in SemaInit.
Fixes #131408
Commit: dd668aafdedffadb4cb6d8a3657c653fd55e2c6d
https://github.com/llvm/llvm-project/commit/dd668aafdedffadb4cb6d8a3657c653fd55e2c6d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr161693.ll
Log Message:
-----------
[X86] combineBitcastvxi1 - bail out on soft-float targets (#161704)
combineBitcastvxi1 is sometimes called pre-legalization, so don't
introduce X86ISD::MOVMSK nodes when vector types aren't legal
Fixes #161693
Commit: 90582ad28466f439f42a8d676699c246d454a0ad
https://github.com/llvm/llvm-project/commit/90582ad28466f439f42a8d676699c246d454a0ad
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.h
A llvm/test/CodeGen/ARM/and-mask-variable.ll
A llvm/test/CodeGen/ARM/extract-bits.ll
A llvm/test/CodeGen/ARM/extract-lowbits.ll
Log Message:
-----------
[ARM] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158070)
For ARM, we want to do this up to 32-bits. Otherwise the code ends up
bigger and bloated.
Commit: fa57ce980a77a0da222e56ca833ff2bc0a73623c
https://github.com/llvm/llvm-project/commit/fa57ce980a77a0da222e56ca833ff2bc0a73623c
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
Log Message:
-----------
[AMDGPU] Define VS_128*. NFCI (#161798)
Needed for future patch.
Commit: e9972debc98ce5d00db47409248bbcf06fafaf73
https://github.com/llvm/llvm-project/commit/e9972debc98ce5d00db47409248bbcf06fafaf73
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/include/clang/Sema/Template.h
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/AST/ast-dump-concepts.cpp
M clang/test/AST/ast-dump-ctad-alias.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.id/p3.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/compound-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/nested-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/simple-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/cxx2c-template-template-param.cpp
M clang/test/SemaCXX/invalid-requirement-requires-expr.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaHLSL/BuiltIns/Buffers.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaTemplate/concepts-recovery-expr.cpp
M clang/test/SemaTemplate/concepts-recursive-inst.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/instantiate-abbreviated-template.cpp
M clang/test/SemaTemplate/instantiate-expanded-type-constraint.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
M clang/test/SemaTemplate/instantiate-template-argument.cpp
M clang/test/SemaTemplate/pr52970.cpp
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
Log Message:
-----------
[Clang] Normalize constraints before checking for satisfaction (#161671)
In the standard, constraint satisfaction checking is done on the
normalized form of a constraint.
Clang instead substitutes on the non-normalized form, which causes us to
report substitution failures in template arguments or concept ids, which
is non-conforming but unavoidable without a parameter mapping
This patch normalizes before satisfaction checking. However, we preserve
concept-id nodes in the normalized form, solely for diagnostics
purposes.
This addresses https://github.com/llvm/llvm-project/issues/61811 and
related concepts conformance bugs, ideally to make the remaining
implementation of concept template parameters easier
Fixes https://github.com/llvm/llvm-project/issues/135190
Fixes https://github.com/llvm/llvm-project/issues/61811
Co-authored-by: Younan Zhang
[zyn7109 at gmail.com](mailto:zyn7109 at gmail.com)
---------
Co-authored-by: Younan Zhang <zyn7109 at gmail.com>
Commit: 05a49dac85e94f9c05f0ec1549cdc812443491e5
https://github.com/llvm/llvm-project/commit/05a49dac85e94f9c05f0ec1549cdc812443491e5
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/x-0.s
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/x-1.s
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_universal_slice_selection.s
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Use MachOObjectFile::getArchTriple for triple identifi… (#161799)
…cation.
Replaces a call to ObjectFile::makeTriple (still used for ELF and COFF)
with a call to MachOObjectFile::getArchTriple. The latter knows how to
build correct triples for different MachO CPU subtypes, e.g. arm64 vs
arm64e, which is important for selecting the right slice from universal
archives.
Commit: 441f0c7c9a5e6ae18ecacb0dee4e32e037bf4b1c
https://github.com/llvm/llvm-project/commit/441f0c7c9a5e6ae18ecacb0dee4e32e037bf4b1c
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Rewrite/MetadataRewriters.h
M bolt/lib/Rewrite/CMakeLists.txt
A bolt/lib/Rewrite/GNUPropertyRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/Inputs/property-note-bti.yaml
A bolt/test/AArch64/Inputs/property-note-nobti.yaml
A bolt/test/AArch64/bti-note.test
A bolt/test/AArch64/no-bti-note.test
Log Message:
-----------
[BOLT] Add GNUPropertyRewriter and warn on AArch64 BTI note (#161206)
This commit adds the GNUPropertyRewriter, which parses features from the
.note.gnu.property section.
Currently we only read the bit indicating BTI support
(GNU_PROPERTY_AARCH64_FEATURE_1_BTI).
As BOLT does not add BTI landing pads to targets of indirect
branches/calls, we have to emit a warning that the output binary may be
corrupted.
Commit: a1db40fef857cc11a38fdec1395b2731e73ca085
https://github.com/llvm/llvm-project/commit/a1db40fef857cc11a38fdec1395b2731e73ca085
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Rewrite/BUILD.gn
Log Message:
-----------
[gn build] Port 441f0c7c9a5e
Commit: 19cd5bd350b730da35629de5095764861f70ecee
https://github.com/llvm/llvm-project/commit/19cd5bd350b730da35629de5095764861f70ecee
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
Log Message:
-----------
[AMDGPU] Account for implicit XCNT insertion (#160812)
Hardware inserts an implicit `S_WAIT_XCNT 0` between
alternate SMEM and VMEM instructions, so there are
never outstanding address translations for both SMEM
and VMEM at the same time.
Commit: 224a7176dc6afaec83bfcfdb7542d30a130997cc
https://github.com/llvm/llvm-project/commit/224a7176dc6afaec83bfcfdb7542d30a130997cc
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M bolt/include/bolt/Passes/SplitFunctions.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/test/AArch64/unsupported-passes.test
Log Message:
-----------
[BOLT][AArch64] Refuse to run CDSplit pass (#159351)
LongJmp does not support warm blocks.
On builds without assertions, this may lead to unexpected crashes.
This patch exits with a clear message.
Commit: ff4aec5d3cd466c72ebad7401a3b49b13426e845
https://github.com/llvm/llvm-project/commit/ff4aec5d3cd466c72ebad7401a3b49b13426e845
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
Log Message:
-----------
[VPlan] Deref VPlanPtr when passing to transform (NFC) (#161369)
For uniformity with other transforms.
Commit: 5cd3db3bed62c07790c17bf1947e98bc903472a9
https://github.com/llvm/llvm-project/commit/5cd3db3bed62c07790c17bf1947e98bc903472a9
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Object/BuildID.cpp
M llvm/test/DebugInfo/symbolize-build-id.test
A llvm/unittests/Object/BuildIDTest.cpp
M llvm/unittests/Object/CMakeLists.txt
Log Message:
-----------
[llvm][ELF]Add Shdr check for getBuildID (#126537)
Add Section Header check for getBuildID, fix crash with invalid Program
Header.
Fixes: #126418
---------
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Signed-off-by: Ruoyu Qiu <qiuruoyu at xiaomi.com>
Co-authored-by: Ruoyu Qiu <qiuruoyu at xiaomi.com>
Co-authored-by: James Henderson <James.Henderson at sony.com>
Commit: cc9c64d525ece2167a6fae657578a7379541ac6e
https://github.com/llvm/llvm-project/commit/cc9c64d525ece2167a6fae657578a7379541ac6e
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
Log Message:
-----------
[AArch64] Refactor and refine cost-model for partial reductions (#158641)
This cost-model takes into account any type-legalisation that would
happen on vectors such as splitting and promotion. This results in wider
VFs being chosen for loops that can use partial reductions.
The cost-model now also assumes that when SVE is available, the SVE dot
instructions for i16 -> i64 dot products can be used for fixed-length
vectors. In practice this means that loops with non-scalable VFs are
vectorized using partial reductions where they wouldn't before, e.g.
```
int64_t foo2(int8_t *src1, int8_t *src2, int N) {
int64_t sum = 0;
for (int i=0; i<N; ++i)
sum += (int64_t)src1[i] * (int64_t)src2[i];
return sum;
}
```
These changes also fix an issue where previously a partial reduction
would be used for mixed sign/zero-extends (USDOT), even when +i8mm was
not available.
Commit: 6c40c76c21266e1f6c20111317041cfbf7e9b4e7
https://github.com/llvm/llvm-project/commit/6c40c76c21266e1f6c20111317041cfbf7e9b4e7
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Transforms/debug-module-3.fir
Log Message:
-----------
[flang][debug] Avoid redundant module info. (#161542)
Fixes https://github.com/llvm/llvm-project/issues/160907.
When a module is just being used and not defined, we generate it with
decl=true. But if the file/line fields are valid, the module is not
merged with the original and is considered different. This patch avoids
setting file/line/scope in such cases.
Commit: 4647cd7344f3683a6a0e094c4f751a846b4bcfb4
https://github.com/llvm/llvm-project/commit/4647cd7344f3683a6a0e094c4f751a846b4bcfb4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Object/BUILD.gn
Log Message:
-----------
[gn build] Port 5cd3db3bed62
Commit: e83c3c58878111af29dee3ead196a5c315d3f7e9
https://github.com/llvm/llvm-project/commit/e83c3c58878111af29dee3ead196a5c315d3f7e9
Author: Mahesh-Attarde <mahesh.attarde at intel.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/test/CodeGen/X86/isel-fpclass.ll
Log Message:
-----------
[X86][GlobalIsel] Enable gisel run for fpclass isel (#160741)
X86 Gisel has all necessary opcodes supported to expand/lower isfpclass
intrinsic, enabling test prior fpclass patch. This patch enables runs
for isel-fpclass.ll tests
Commit: 72679c8e0e26df15f8d36a53be63d33384d54b69
https://github.com/llvm/llvm-project/commit/72679c8e0e26df15f8d36a53be63d33384d54b69
Author: Mahesh-Attarde <mahesh.attarde at intel.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/test/CodeGen/X86/isel-smax.ll
M llvm/test/CodeGen/X86/isel-smin.ll
M llvm/test/CodeGen/X86/isel-umax.ll
M llvm/test/CodeGen/X86/isel-umin.ll
Log Message:
-----------
[X86][GlobalIsel] Adds support for G_UMIN/G_UMAX/G_SMIN/G_SMAX (#161783)
Original PR broke in rebase
https://github.com/llvm/llvm-project/pull/160247. Continuing here
This patch adds support for G_[U|S][MIN|MAX] opcodes into X86 Target.
This PR addressed review comments
1. About Widening to next power of 2
https://github.com/llvm/llvm-project/pull/160247#discussion_r2371655478
2. clamping scalar
https://github.com/llvm/llvm-project/pull/160247#discussion_r2374748440
Commit: 30c578a051c7842e44bdd1106fc8d46175f568cb
https://github.com/llvm/llvm-project/commit/30c578a051c7842e44bdd1106fc8d46175f568cb
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/masked-load-store-no-mem-dep.ll
M llvm/test/Transforms/GVN/masked-load-store.ll
Log Message:
-----------
[GVN] Teach GVN simple masked load/store forwarding (#157689)
This patch teaches GVN how to eliminate redundant masked loads and
forward previous loads or instructions with a select. This is possible
when the same mask is used for masked stores/loads that write to the
same memory location
Commit: 1a07e67f7ae84bf51e6be6f9009a1842838d9e72
https://github.com/llvm/llvm-project/commit/1a07e67f7ae84bf51e6be6f9009a1842838d9e72
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/ssve-stack-hazard-remarks.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
Log Message:
-----------
[AArch64][SME] Enable `aarch64-split-sve-objects` with hazard padding (#161714)
This enables `aarch64-split-sve-objects` by default. Note: This option
only has an effect when used in conjunction with hazard padding
(`aarch64-stack-hazard-size` != 0).
See https://github.com/llvm/llvm-project/pull/142392 for more details.
Commit: a549555722eb9864ce1280407b3300970e4dc050
https://github.com/llvm/llvm-project/commit/a549555722eb9864ce1280407b3300970e4dc050
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in ElementwiseOpFusion.cpp (NFC)
Commit: fd1d157f2bf7c3ca1480f708004f35a882b639e9
https://github.com/llvm/llvm-project/commit/fd1d157f2bf7c3ca1480f708004f35a882b639e9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/tools/mlir-rewrite/mlir-rewrite.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in mlir-rewrite.cpp (NFC)
Commit: 2da3658c9c3a8df281bd9c747c52c9b54a502a3c
https://github.com/llvm/llvm-project/commit/2da3658c9c3a8df281bd9c747c52c9b54a502a3c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/unittests/TableGen/PassGenTest.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in PassGenTest.cpp (NFC)
Commit: e4f7ce11bfcf8a5abc567c5aaf55f04b31056b2f
https://github.com/llvm/llvm-project/commit/e4f7ce11bfcf8a5abc567c5aaf55f04b31056b2f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/lib/CAPI/Transforms/Rewrite.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in Rewrite.cpp (NFC)
Commit: 35530f4b65d04c79d3c9fb68272b82772c665823
https://github.com/llvm/llvm-project/commit/35530f4b65d04c79d3c9fb68272b82772c665823
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
Log Message:
-----------
[NFC][AMDGPU] Replace size & set_is_subset by operator== (#161813)
Commit: c2765b74ed2bb71bebe96c7dd49f69ade714e5a8
https://github.com/llvm/llvm-project/commit/c2765b74ed2bb71bebe96c7dd49f69ade714e5a8
Author: ronlieb <ron.lieberman at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
Revert "[PATCH] offload-tunnel-cmake with proper escape" (#161727)
Reverts llvm/llvm-project#161552
Commit: 4d32ea87673adaa5252545ca82fa6cd58b134ff9
https://github.com/llvm/llvm-project/commit/4d32ea87673adaa5252545ca82fa6cd58b134ff9
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/IR/Assumptions.cpp
M llvm/lib/IR/DiagnosticHandler.cpp
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/IR/PassInstrumentation.cpp
M llvm/lib/IR/ProfDataUtils.cpp
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/VFABIDemangler.cpp
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[NFC][LLVM][IR] Fix namespace usage in several files (#161756)
- Move standalone functions/variables out of anonymous namespace and
make them static.
- Use `using namespace llvm` instead of wrapping all the code in a file
in `namespace llvm { }`.
- Restrict anonymous namespace to just class/struct/enum declarations.
Commit: 2a39d8be87e0ee7124078e9ebed8749a0e735e52
https://github.com/llvm/llvm-project/commit/2a39d8be87e0ee7124078e9ebed8749a0e735e52
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Remove dead code trying to constrain a physical register (#161790)
This constrainRegClass check would never pass for a physical
register.
Commit: 5601c4080abfdd362415cb0406de64c685edca67
https://github.com/llvm/llvm-project/commit/5601c4080abfdd362415cb0406de64c685edca67
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Stop trying to constrain register class of post-RA-pseudos (#161792)
This is trying to constrain the register class of a physical register,
which makes no sense.
Commit: e3d23f85737863c1ffc7b757b729df1903ca30b7
https://github.com/llvm/llvm-project/commit/e3d23f85737863c1ffc7b757b729df1903ca30b7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Log Message:
-----------
AMDGPU: Fix trying to constrain physical registers in spill handling (#161793)
It's nonsensical to call constrainRegClass on a physical register,
and we should not see virtual registers here.
Commit: 80fd3eda25c63a7198137661ff7505d75de3e6f7
https://github.com/llvm/llvm-project/commit/80fd3eda25c63a7198137661ff7505d75de3e6f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
Log Message:
-----------
AMDGPU: Fix constrain register logic for physregs (#161794)
We do not need to reconstrain physical registers. Enables an
additional fold for constant physregs.
Commit: 2ff635dde236308073bd50ec11490c604492e438
https://github.com/llvm/llvm-project/commit/2ff635dde236308073bd50ec11490c604492e438
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
Log Message:
-----------
CodeGen: Stop checking for physregs in constrainRegClass (#161795)
It's nonsensical to call this function on a physical register.
Commit: 2e1fab93467ec8c37a236ae6e059300ebaa0c986
https://github.com/llvm/llvm-project/commit/2e1fab93467ec8c37a236ae6e059300ebaa0c986
Author: Koakuma <koachan at protonmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
Log Message:
-----------
[SPARC] Prevent meta instructions from being inserted into delay slots (#161111)
Do not move meta instructions like `FAKE_USE`/`@llvm.fake.use` into
delay slots, as they don't correspond to real machine instructions.
This should fix crashes when compiling with, for example, `clang -Og`.
Commit: 3c5c82d09c691a83fec5d09df2f6a308a789ead1
https://github.com/llvm/llvm-project/commit/3c5c82d09c691a83fec5d09df2f6a308a789ead1
Author: Martin Storsjö <martin at martin.st>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/lib/Headers/avx10_2bf16intrin.h
Log Message:
-----------
[clang] [Headers] Don't use unreserved names in avx10_2bf16intrin.h (#161824)
This can cause breakage with user code that does "#define A ...".
This fixes issue https://github.com/llvm/llvm-project/issues/161808.
Commit: 4845b3e3eb3759cb87ab52a0ac6836ed1df4f57e
https://github.com/llvm/llvm-project/commit/4845b3e3eb3759cb87ab52a0ac6836ed1df4f57e
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
A clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
Log Message:
-----------
[OpenACC][CIR] Impl reduction recipe pointer/array bound lowering (#161726)
Just like with private, the lowering for these bounds are all pretty
trivial. This patch enables them for reduction, which has everything in
common except the init pattern, but that is handled/managed by Sema.
This also adds sufficient testing to spot-check the
allocation/initialization/destruction/etc.
Commit: bbae6a460c9fe41bdbf1f93f36928301d53c7db0
https://github.com/llvm/llvm-project/commit/bbae6a460c9fe41bdbf1f93f36928301d53c7db0
Author: Valery Dmitriev <valeryd at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
A flang/test/HLFIR/simplify-hlfir-intrinsics-index.fir
Log Message:
-----------
[flang] Simplify hlfir.index in a few limited cases. (#161558)
Primarily targeted simplification case of substring being
a singleton by inlining a search loop (with an exception
where runtime function performs better).
Few trivial simplifications also covered.
This is a reapply of #157883 with additional fix to avoid generation of
new ops during
analysis that mess up greedy rewriter if we end up bailing out without
any simplification
but just leaving few stranded new ops. For technical reasons this patch
comes as a new PR.
Commit: 6bdf2cb2024e3a1f9596189f567b13665a19d1b1
https://github.com/llvm/llvm-project/commit/6bdf2cb2024e3a1f9596189f567b13665a19d1b1
Author: Markus Böck <markus.boeck02 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
Log Message:
-----------
[mlir][NFC] Remove redundant insertion point changes (#161837)
These insertion points were added in
https://github.com/llvm/llvm-project/pull/146551 and
https://github.com/llvm/llvm-project/pull/146908 to support the one-shot
dialect conversion driver which performs changes to the IR immediately
and would otherwise invalidate previous insertion points.
Since then, the insertion point has been made resilient against op
erasure (https://github.com/llvm/llvm-project/pull/146955) making the
changes now redundant.
Commit: 9e3bbbb049ea9ca2abcbf8e4b3ea39a8deb7c1e2
https://github.com/llvm/llvm-project/commit/9e3bbbb049ea9ca2abcbf8e4b3ea39a8deb7c1e2
Author: Aditya Chaudhari <98672108+AdityaC4 at users.noreply.github.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/BuiltinsX86_64.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
Log Message:
-----------
[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow element extraction/insertion intrinsics to be used in constexpr #159753 (#161302)
FIXES: #159753
Enable constexpr evaluation for X86 vector element extract/insert builtins. and adds corresponding tests
Index is masked with `(Idx & (NumElts - 1))`, matching existing CodeGen.
Commit: 13c83c0a785179d51d673e86dddc86801c16c079
https://github.com/llvm/llvm-project/commit/13c83c0a785179d51d673e86dddc86801c16c079
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/test/Analysis/csv2json.py
Log Message:
-----------
[analyzer][NFC] Simplify Analysis/csv2json.py (#161665)
Commit: 173063cf054645a7f72e0ca1d0f2dfe87346d65c
https://github.com/llvm/llvm-project/commit/173063cf054645a7f72e0ca1d0f2dfe87346d65c
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
Log Message:
-----------
[AMDGPU][Disassembler] Use target feature for `.amdhsa_reserve_xnack_mask` instead of hard code zero (#161771)
There is no test change at this moment because we don't have a target
that has this feature by default yet.
Commit: ffc503edd0a2d07121232fe204e480fc29631a90
https://github.com/llvm/llvm-project/commit/ffc503edd0a2d07121232fe204e480fc29631a90
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-options.hip
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
A llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/ThreadPool.h
M llvm/include/llvm/Support/Threading.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/Jobserver.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/ThreadPool.cpp
M llvm/lib/Support/Threading.cpp
A llvm/lib/Support/Unix/Jobserver.inc
A llvm/lib/Support/Windows/Jobserver.inc
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/JobserverTest.cpp
Log Message:
-----------
[LLVM] Add GNU make jobserver support (#145131)
This patch introduces support for the jobserver protocol to control
parallelism for device offloading tasks.
When running a parallel build with a modern build system like `make -jN`
or `ninja -jN`, each Clang process might also be configured to use
multiple threads for its own tasks (e.g., via `--offload-jobs=4`). This
can lead to an explosion of threads (N * 4), causing heavy system load,
CPU contention, and ultimately slowing down the entire build.
This patch allows Clang to act as a cooperative client of the build
system's jobserver. It extends the `--offload-jobs` option to accept the
value 'jobserver'. With the recent addition of jobserver support to the
Ninja build system, this functionality now benefits users of both Make
and Ninja.
When `--offload-jobs=jobserver` is specified, Clang's thread pool will:
1. Parse the MAKEFLAGS environment variable to find the jobserver
details.
2. Before dispatching a task, acquire a job slot from the jobserver. If
none are available, the worker thread will block.
3. Release the job slot once the task is complete.
This ensures that the total number of active offload tasks across all
Clang processes does not exceed the limit defined by the parent build
system, leading to more efficient and controlled parallel builds.
Implementation:
- A new library, `llvm/Support/Jobserver`, is added to provide a
platform-agnostic client for the jobserver protocol, with backends for
Unix (FIFO) and Windows (semaphores).
- `llvm/Support/ThreadPool` and `llvm/Support/Parallel` are updated with
a `jobserver_concurrency` strategy to integrate this logic.
- The Clang driver and linker-wrapper are modified to recognize the
'jobserver' argument and enable the new thread pool strategy.
- New unit and integration tests are added to validate the feature.
Commit: 296fddc89e23b33055ff3f7ccb55de6c47dac757
https://github.com/llvm/llvm-project/commit/296fddc89e23b33055ff3f7ccb55de6c47dac757
Author: Tom Tromey <tromey at adacore.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
A llvm/test/Bitcode/DW_OP_rot_neg_abs.ll
Log Message:
-----------
Allow DW_OP_rot, DW_OP_neg, and DW_OP_abs in DIExpression (#160757)
The Ada front end can emit somewhat complicated DWARF expressions for
the offset of a field. While working in this area I found that I needed
DW_OP_rot (to implement a branch-free computation -- it looked more
difficult to add support for branching); and DW_OP_neg and DW_OP_abs
(just basic functionality).
Commit: 7ceef762c8c914270cfa49ad5794227b270c8223
https://github.com/llvm/llvm-project/commit/7ceef762c8c914270cfa49ad5794227b270c8223
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[LAA] Check if Ptr can be freed between Assume and CtxI. (#161725)
When using information from dereferenceable assumptions, we need to make
sure that the memory is not freed between the assume and the specified
context instruction. Instead of just checking canBeFreed, check if there
any calls that may free between the assume and the context instruction.
This patch introduces a willNotFreeBetween to check for calls that may
free between an assume and a context instructions, to also be used in
https://github.com/llvm/llvm-project/pull/161255.
PR: https://github.com/llvm/llvm-project/pull/161725
Commit: 375f48942b9a3f3fbd82133390af25b6c96f1460
https://github.com/llvm/llvm-project/commit/375f48942b9a3f3fbd82133390af25b6c96f1460
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/tile01.f90
A flang/test/Lower/OpenMP/tile02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
A flang/test/Parser/OpenMP/tile-fail.f90
M flang/test/Parser/OpenMP/tile.f90
A flang/test/Semantics/OpenMP/tile01.f90
A flang/test/Semantics/OpenMP/tile02.f90
A flang/test/Semantics/OpenMP/tile03.f90
A flang/test/Semantics/OpenMP/tile04.f90
A flang/test/Semantics/OpenMP/tile05.f90
A flang/test/Semantics/OpenMP/tile06.f90
A flang/test/Semantics/OpenMP/tile07.f90
A flang/test/Semantics/OpenMP/tile08.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M mlir/test/Target/LLVMIR/openmp-cli-tile01.mlir
M mlir/test/Target/LLVMIR/openmp-cli-tile02.mlir
A openmp/runtime/test/transform/tile/intfor.f90
A openmp/runtime/test/transform/tile/intfor_2d.f90
A openmp/runtime/test/transform/tile/intfor_2d_varsizes.F90
Log Message:
-----------
[Flang] Add standalone tile support (#160298)
Add support for the standalone OpenMP tile construct:
```f90
!$omp tile sizes(...)
DO i = 1, 100
...
```
This is complementary to #143715 which added support for the tile
construct as part of another loop-associated construct such as
worksharing-loop, distribute, etc.
Commit: ab9611e7353be46351b9ce52836e56431ac5a45c
https://github.com/llvm/llvm-project/commit/ab9611e7353be46351b9ce52836e56431ac5a45c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx2-vector-shifts.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/logic-shift.ll
M llvm/test/CodeGen/X86/prefer-avx256-shift.ll
M llvm/test/CodeGen/X86/shuffle-as-shifts.ll
M llvm/test/CodeGen/X86/sshl_sat_vec.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
Log Message:
-----------
[X86] Fold ADD(x,x) -> X86ISD::VSHLI(x,1) (#161843)
Now that #161007 will attempt to fold this back to ADD(x,x) in
X86FixupInstTunings, we can more aggressively create X86ISD::VSHLI nodes
to avoid missed optimisations due to oneuse limits, avoids unnecessary
freezes and allows AVX512 to fold to mi memory folding variants.
I've currently limited SSE targets to cases where ADD is the only user
of x to prevent extra moves - AVX shift patterns benefit from breaking
the ADD+ADD+ADD chains into shifts, but its not so beneficial on SSE
with the extra moves.
Commit: df6549403525dd3bca864d65bb168956ef946d12
https://github.com/llvm/llvm-project/commit/df6549403525dd3bca864d65bb168956ef946d12
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/test/CodeGen/Hexagon/isel-inttofp-v32i1tov32f32.ll
R llvm/test/CodeGen/Hexagon/isel-uinttofp-v32i1tov32f32.ll
Log Message:
-----------
[Hexagon] Added lowering for sint_to_fp from v32i1 to v32f32 (#159507)
The transformation pattern is identical to the uint_to_fp
conversion from v32i1 to v32f32.
Commit: ef4471edfa6d72e13c8f8e90bef521caee6f4b1f
https://github.com/llvm/llvm-project/commit/ef4471edfa6d72e13c8f8e90bef521caee6f4b1f
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/docs/analyzer/developer-docs/DebugChecks.rst
M clang/include/clang/CrossTU/CrossTranslationUnit.h
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
A clang/test/Analysis/analyzeOneFunction.cpp
Log Message:
-----------
[analyzer] Teach -analyze-function about USRs, extend documentation (#161666)
This flag is really convinient in most cases.
It's easy to figure out what value to pass for most cases. However, it
can sometimes match too many times, like for template functions that has
non-decuded (aka. explicitly specified) template parameters - because
they don't appear in the parameter list, thus they are not accounted for
in the current logic.
It would be nice to improve `getFunctionName` but I'd say to just settle
on using USRs. So this PR enables passing USRs to the flag, while
keeping previous behavior.
Commit: cf86ef925d75ef08526fc399a2888673338298b3
https://github.com/llvm/llvm-project/commit/cf86ef925d75ef08526fc399a2888673338298b3
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/EntryPointStats.h
M clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/test/Analysis/analyzer-stats/entry-point-stats.cpp
Log Message:
-----------
[clang][analyzer] Make per-entry-point metric rows uniquely identifiable
Also remove the gratuitous spaces after "," that break strict CSV
compliance.
As the debug function name does not uniquely identify an entry point,
add the main-TU name and the USR values for each entry point snapshot to
reduce the likelihood of collisions between declarations across large
projects.
While adding a filename to each row increases the file size
substantially, the difference in size for the compressed is acceptable.
I evaluated it on our set of 200+ open source C and C++ projects with 3M
entry points, and got the following results when adding these two
columns:
- Raw CSV file increased from 530MB to 1.1GB
- Compressed file (XZ) increased from 54 MB to 78 MB
--
CPP-7098
---------
Co-authored-by: Balazs Benics <balazs.benics at sonarsource.com>
Commit: c75ae01233b0965d48e3770160119c162eb5c2ee
https://github.com/llvm/llvm-project/commit/c75ae01233b0965d48e3770160119c162eb5c2ee
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/test/Analysis/analyze-function-guide.cpp
Log Message:
-----------
[analyzer] Fix -analyze-function debug warning to account for syntax checkers (#161664)
Previously, when using `-analyze-function` to target a specific
function, the analyzer would incorrectly report "Every top-level
function was skipped" even when the function was successfully analyzed
by syntax-only checkers.
This happened because `NumFunctionsAnalyzed` only counted path-sensitive
analysis, not syntax-only analysis. The misuse detection logic would see
0 functions analyzed and incorrectly conclude the function wasn't found.
Commit: f8f6c0b6ecb9d87ead48246d4fadf6048207375d
https://github.com/llvm/llvm-project/commit/f8f6c0b6ecb9d87ead48246d4fadf6048207375d
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-options.hip
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
R llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/ThreadPool.h
M llvm/include/llvm/Support/Threading.h
M llvm/lib/Support/CMakeLists.txt
R llvm/lib/Support/Jobserver.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/ThreadPool.cpp
M llvm/lib/Support/Threading.cpp
R llvm/lib/Support/Unix/Jobserver.inc
R llvm/lib/Support/Windows/Jobserver.inc
M llvm/unittests/Support/CMakeLists.txt
R llvm/unittests/Support/JobserverTest.cpp
Log Message:
-----------
Revert "[LLVM] Add GNU make jobserver support (#145131)"
revert this patch due to failure in unittests/Support, e.g.
https://lab.llvm.org/buildbot/#/builders/33/builds/24178/steps/6/logs/FAIL__LLVM-Unit__SupportTests_61
This reverts commit ffc503edd0a2d07121232fe204e480fc29631a90.
Commit: 83c135cad3bec97947e1635b6d8de9ec883041dd
https://github.com/llvm/llvm-project/commit/83c135cad3bec97947e1635b6d8de9ec883041dd
Author: Matthias Springer <me at m-sp.org>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir] Dialect conversion: Print note when replacement types do not match legalized types (#161802)
When running with `-debug`, print a note when the replacement types
(during a `ConversionPatternRewriter::replaceOp`) do not match the
legalized types of the current type converter. That's not an API
violation, but it could indicate a bug in user code.
Example output:
```
[dialect-conversion:1] ** Replace : 'test.multiple_1_to_n_replacement'(0x56b745f99470)
[dialect-conversion:1] Note: Replacing op result of type f16 with value(s) of type (f16, f16), but the legalized type(s) is/are (f16)
```
Commit: 5d3b3eaaa02b52dcf4a0a4ed409c683972377c96
https://github.com/llvm/llvm-project/commit/5d3b3eaaa02b52dcf4a0a4ed409c683972377c96
Author: Martin Storsjö <martin at martin.st>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M libcxx/test/libcxx/system_reserved_names.gen.py
Log Message:
-----------
[libcxx] Mark system_reserved_names.gen.py unsupported on clang-20 && msvc (#161811)
Clang 20 (and early 21 versions; let's hope it can be fixed before the
later versions before such versions become relevant for libcxx CI) have
got an issue with its intrinsics headers, where they use unreserved
names, that users are allowed to override.
See https://github.com/llvm/llvm-project/issues/161808 for the issue
report.
This only crops up in the MSVC build configurations, as recent versions
of some MSVC/UCRT headers include `<intrin.h>`, which ends up pulling in
most intrinsics headers, exposing this issue in the Clang headers.
This should unblock https://github.com/llvm/llvm-project/pull/161736
from being merged.
Commit: 3d810086d1e16e2de57634d7eb5ecf25a5227e4c
https://github.com/llvm/llvm-project/commit/3d810086d1e16e2de57634d7eb5ecf25a5227e4c
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/include/lldb/Target/Language.h
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Target/Language.cpp
Log Message:
-----------
[lldb][Lanugage][NFC] Adapt Language::ForEach to IterationAction (#161830)
Commit: 952b12394ecffce6cf2430aa29b193dd7dc897a8
https://github.com/llvm/llvm-project/commit/952b12394ecffce6cf2430aa29b193dd7dc897a8
Author: Nagraj Gaonkar <nagrajgaonkarmumbai749 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[X86] Allow PSHUFD/PSHUFLW/PSHUFW intrinsics in constexpr. (#161210)
The i16/i32 shuffle intrinsics (`pshufw`, `pshuflw`, `pshufhw`,
`pshufd`) currently cannot be used in constant expressions. This patch
adds support in both bytecode interpreter (InterpBuiltin.cpp) and
constant evaluator
(ExprConstant.cpp) for pshuf intrinsics, enabling their use in constant
expressions.
## Intrinsics covered
- `_mm_shuffle_pi16` (MMX `pshufw`)
- `_mm_shufflelo_epi16` / `_mm_shufflehi_epi16`
- `_mm_shuffle_epi32`
- Their AVX2/AVX512 vector-width variants
- Masked and maskz forms (handled indirectly via
`__builtin_ia32_select*`)
Fixes #156611
Commit: f4a39a838ad4b21825be0f54f1f2bf0aad7700e1
https://github.com/llvm/llvm-project/commit/f4a39a838ad4b21825be0f54f1f2bf0aad7700e1
Author: Martin Wehking <martin.wehking at arm.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve-int-mul-neg.ll
Log Message:
-----------
Fold SVE mul and mul_u to neg during isel (#160828)
Replace mul and mul_u ops with a neg operation if their second operand
is a splat value -1.
Apply the optimization also for mul_u ops if their first operand is a
splat value -1 due to their commutativity.
Commit: 78739ff84a5986623684235e1f29e55b754a1594
https://github.com/llvm/llvm-project/commit/78739ff84a5986623684235e1f29e55b754a1594
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
Log Message:
-----------
[llvm][HashRecognize] Fix compiler warning on Arm 32-bit (#161821)
```
/home/david.spickett/llvm-project/llvm/lib/Analysis/HashRecognize.cpp:100:54: warning: comparison of integers of different signs:
'typename iterator_traits<ilist_iterator_w_bits<node_options<Instruction, true, false, void, true, BasicBlock>, false, false>>::difference_type' (aka 'int') and 'size_type' (aka 'unsigned int') [-Wsign-compare]
100 | return std::distance(Latch->begin(), Latch->end()) != Visited.size();
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~
```
By using Latch->size() instead.
Commit: e7f47e70e75512aa73116fbafaf09dfb2b881672
https://github.com/llvm/llvm-project/commit/e7f47e70e75512aa73116fbafaf09dfb2b881672
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.flat.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/load-store-opt-scale-offset.mir
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx1250.s
Log Message:
-----------
[AMDGPU] Enable XNACK on gfx1250 (#161457)
This should be always on.
Fixes SWDEV-555931.
Commit: 0efc083c4a59bf10aaaf82d81c645fefeb15843d
https://github.com/llvm/llvm-project/commit/0efc083c4a59bf10aaaf82d81c645fefeb15843d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/fp128.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
Log Message:
-----------
[RISCV] Support scalar llvm.fmodf intrinsic. (#161743)
Commit: fee840deb75842ec80ff9aed1c35e6c60d095d29
https://github.com/llvm/llvm-project/commit/fee840deb75842ec80ff9aed1c35e6c60d095d29
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
Log Message:
-----------
AMDGPU: Fix broken register class IDs in mir tests (#161832)
Commit: 3c6cd732eb59b50fa2394f659763f5d216b76703
https://github.com/llvm/llvm-project/commit/3c6cd732eb59b50fa2394f659763f5d216b76703
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/TableGen/RegisterClassCopyCost.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
CodeGen: Do not store RegisterClass copy costs as a signed value (#161786)
Tolerate setting negative values in tablegen, and store them as a
saturated uint8_t value. This will allow naive uses of the copy cost
to directly add it as a cost without considering the degenerate negative
case. The degenerate negative cases are only used in InstrEmitter / DAG
scheduling, so leave the special case processing there. There are also
fixmes about this system already there.
This is the expedient fix for an out of tree target regression
after #160084. Currently targets can set a negative copy cost to mark
copies as "impossible". However essentially all the in-tree uses only
uses this for non-allocatable condition registers. We probably should
replace the InstrEmitter/DAG scheduler uses with a more direct check
for a copyable register but that has test changes.
Commit: b4f54bf548839ebe3308b1979b448403c2ba2a81
https://github.com/llvm/llvm-project/commit/b4f54bf548839ebe3308b1979b448403c2ba2a81
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
Log Message:
-----------
[llvm][LoongArch] Fix compiler warning produced by assert
Fixes #154918
tion ‘llvm::SDValue fillSubVectorFromBuildVector(llvm::BuildVectorSDNode*, llvm::SelectionDAG&, llvm::SDLoc, const llvm::LoongArchSubtarget&, llvm::EVT, unsigned int)’:
/home/davspi01/work/open_source/llvm-project/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp:2863:16: warning: comparison of unsigned expression in ‘>= 0’ is always true [-Wtype-limits]
2863 | assert(first >= 0 &&
| ~~~~~~^~~~
first is unsigned so this part of the expression is redundant.
Commit: 69b8d6d4ead01b88fb8d6642914ca7492e32fdb6
https://github.com/llvm/llvm-project/commit/69b8d6d4ead01b88fb8d6642914ca7492e32fdb6
Author: Hans Wennborg <hans at hanshq.net>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/arm64-delayimport.yaml
M lld/test/COFF/arm64x-delayimport.test
Log Message:
-----------
[LLD][COFF] Fix tailMergeARM64 delayload thunk 128 MB range limitation (#161844)
lld would fail with "error: relocation out of range" if the thunk was
laid out more than 128 MB away from __delayLoadHelper2.
This patch changes the call sequence to load the offset into a register
and call through that, allowing for 32-bit offsets.
Fixes #161812
Commit: 5537b9a16734fd0633cd9aa1f8b6427a7be68154
https://github.com/llvm/llvm-project/commit/5537b9a16734fd0633cd9aa1f8b6427a7be68154
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/CMakeLists.txt
Log Message:
-----------
[FIX] Add `clangIndex` as a dependence for `clangStaticAnalyzerCore`
This was introduced by #161663.
Commit: 73651ba9bcb94faded230a8d9bb682250c3c9327
https://github.com/llvm/llvm-project/commit/73651ba9bcb94faded230a8d9bb682250c3c9327
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
M llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-zext.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[x86] lowerV4I32Shuffle - don't adjust PSHUFD splat masks to match UNPCK (#161846)
Allow getV4X86ShuffleImm8ForMask to create a pure splat mask, helping to reduce demanded elts.
Commit: 2d67cb1a1f2a5e4864c84470454b287d4061fbb2
https://github.com/llvm/llvm-project/commit/2d67cb1a1f2a5e4864c84470454b287d4061fbb2
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-attributor-flat-scratch-init-asan.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
Log Message:
-----------
[AMDGPU][Attributor] Stop inferring amdgpu-no-flat-scratch-init in sanitized functions. (#161319)
This PR stops the attributor pass to infer `amdgpu-no-flat-scratch-init`
for functions marked with `sanitize_*` attribute.
Commit: 36b543ab20277596edbeb46a402a8e1bd6c2ddb1
https://github.com/llvm/llvm-project/commit/36b543ab20277596edbeb46a402a8e1bd6c2ddb1
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/masked_intrinsics.ll
M llvm/test/Transforms/InstCombine/pr83947.ll
Log Message:
-----------
[InstComb] Handle undef in simplifyMasked(Store|Scatter) (#161825)
Commit: 62791b43774615b24d565130c8c3f1e6e5145dd8
https://github.com/llvm/llvm-project/commit/62791b43774615b24d565130c8c3f1e6e5145dd8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
Log Message:
-----------
[RISCV] Replace uses of RISCV::NoRegister with Register() or isValid. NFC (#161781)
Commit: 78c5d9100f718fe380eeea6ca6236f3505a6c3a6
https://github.com/llvm/llvm-project/commit/78c5d9100f718fe380eeea6ca6236f3505a6c3a6
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
Log Message:
-----------
[lldb][test] Disable TestLldbGdbServer.py on Linux temporarily (#161868)
While #161510 is dealt with.
Commit: 2a73a79e36fd388057c14dd9ef56cdf7602a345e
https://github.com/llvm/llvm-project/commit/2a73a79e36fd388057c14dd9ef56cdf7602a345e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
Log Message:
-----------
DAG: Remove TargetLowering::checkForPhysRegDependency (#161787)
I have no idea why this was here. The only implementation was AMDGPU,
which was essentially repeating the generic logic but for one specific
case.
Commit: bd7e228fa43d7da93aef19892cd8a7de3350835e
https://github.com/llvm/llvm-project/commit/bd7e228fa43d7da93aef19892cd8a7de3350835e
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
M llvm/lib/TableGen/Error.cpp
M llvm/lib/TableGen/Main.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/InfoByHwMode.cpp
M llvm/utils/TableGen/Common/PredicateExpander.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/ExegesisEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerShared.h
M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/TableGen/X86MnemonicTables.cpp
M llvm/utils/TableGen/X86ModRMFilters.h
M llvm/utils/TableGen/X86RecognizableInstr.h
Log Message:
-----------
[NFC][TableGen] Fix namespace usage in various files (#161839)
- Move standalone functions and variables out of anonymous namespace and
make them static.
- Eliminate `namespace llvm {}` wrapping all code in .cpp files, and
instead use namespace qualifier to define such functions
(https://llvm.org/docs/CodingStandards.html#use-namespace-qualifiers-to-implement-previously-declared-functions)
- Add namespace for X86DisassemblerShared.h.
Commit: 3add28bf3f53c01d1f321ae061ecbfdc83b1172e
https://github.com/llvm/llvm-project/commit/3add28bf3f53c01d1f321ae061ecbfdc83b1172e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/test/CodeGen/Hexagon/isel-fold-shl-zext.ll
Log Message:
-----------
[Hexagon] isel-fold-shl-zext.ll - regenerate test checks (#161869)
Improves codegen diff in an upcoming patch
Commit: d0e98909d28be377408b1e52fa35423a2236036c
https://github.com/llvm/llvm-project/commit/d0e98909d28be377408b1e52fa35423a2236036c
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/docs/ReleaseNotes.rst
A lld/test/MachO/cstring-tailmerge-objc.s
A lld/test/MachO/cstring-tailmerge.s
A lld/test/MachO/order-file-cstring-tailmerge.s
Log Message:
-----------
[lld][MachO] Tail merge strings (#161262)
Add the flag `--tail-merge-strings` to enable tail merging of cstrings.
For example, if we have strings `mystring\0` and `ring\0`, we could
place `mystring\0` at address `0x1000` and `ring\0` at address `0x1004`
and have them share the same underlying data.
It turns out that many ObjC method names can be tail merged. For
example, `error:` and `doFoo:error:`. On a large iOS binary, we saw
nearly a 15% size improvement in the `__TEXT__objc_methname` section and
negligible impact on link time.
```
$ bloaty --domain=vm merged.o.stripped -- base.o.stripped
VM SIZE
--------------
+95% +5.85Ki [__TEXT]
-2.4% -239Ki __TEXT,__cstring
-14.5% -710Ki __TEXT,__objc_methname
-1.0% -944Ki TOTAL
```
Tail merging for MachO was originally removed in
https://github.com/llvm/llvm-project/commit/7c269db779ff3950bac2e25ea78b14b4e2b8b247.
The previous implementation used `StringTableBuilder`, but that was
removed in
https://github.com/llvm/llvm-project/commit/4308f031cd0c679c539914608134b9c8046743b3
to ensure deduplicated strings are aligned correctly. This
implementation ensures that tail merged strings are also aligned
correctly.
Special thanks to nocchijiang for pointing this out in
https://github.com/llvm/llvm-project/pull/158720#issuecomment-3310416030.
Depends on https://github.com/llvm/llvm-project/pull/161253.
Commit: 74180eb024f3e45c4e0ebeb5dd07f34f85ff6539
https://github.com/llvm/llvm-project/commit/74180eb024f3e45c4e0ebeb5dd07f34f85ff6539
Author: modiking <mmo at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/extrema.cpp
M flang-rt/lib/runtime/findloc.cpp
Log Message:
-----------
[flang][rt] Add noinline attributes for CUDA compile path for successful compilation (#161760)
NVCC does more aggressive inlining than Clang/GCC causing the exported
functions in extrema.cpp and findloc.cpp to become extremely large from
function specializations leading to compilation timeouts. Marking the 2
functions in this change as noinline for NVCC alleviates this problem as
it removes the worst of the cross-matrix argument specializations.
Also remove the workaround in
https://github.com/llvm/llvm-project/pull/156542 that opted out
findloc.cpp from the CUDA flang-rt build
Testing:
ninja flang-rt builds in ~30 minutes, these 2 files build in ~3 minutes
Commit: 1af8ed1988289ee4555cc75d1f6750a1098b6919
https://github.com/llvm/llvm-project/commit/1af8ed1988289ee4555cc75d1f6750a1098b6919
Author: Derek Schuff <dschuff at chromium.org>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
Fix filename in wasm build of compiler-rt (#161875)
Commit: c54d0d7a9630f5a554cd9cc9d14262cad216efed
https://github.com/llvm/llvm-project/commit/c54d0d7a9630f5a554cd9cc9d14262cad216efed
Author: Alan Zhao <ayzhao at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-and-cmp.ll
M llvm/test/Transforms/InstCombine/select-or-cmp.ll
Log Message:
-----------
[InstCombine] Preserve profile after folding select instructions with conditionals (#159666)
If `select` simplification produces the transform:
```
(select A && B, T, F) -> (select A, T, F)
```
or
```
(select A || B, T, F) -> (select A, T, F)
```
it stands to reason that if the branches are the same, then the branch
weights remain the same since the net effect is a simplification of the
conditional.
There are also cases where InstCombine negates the conditional (and
therefore reverses the branches); this PR asserts that the branch
weights are reversed in this case.
Tracking issue: #147390
Commit: d6449b55cd8f5e40da91b8495e4766e845295946
https://github.com/llvm/llvm-project/commit/d6449b55cd8f5e40da91b8495e4766e845295946
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/test/CIR/CodeGen/predefined-expr.c
Log Message:
-----------
[CIR] Add support for emitting predefined expressions (#161757)
This adds support for emitting pseudo-macro expressions that represent
some form of the name of a function (such as `__func__` or
`__PRETTY_FUNCTION__`) as l-values.
Commit: 572b579632fb79ea6eb562a537c9ff1280b3d4f5
https://github.com/llvm/llvm-project/commit/572b579632fb79ea6eb562a537c9ff1280b3d4f5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-and-cmp.ll
M llvm/test/Transforms/InstCombine/select-or-cmp.ll
Log Message:
-----------
Revert "[InstCombine] Preserve profile after folding select instructions with conditionals" (#161885)
Reverts llvm/llvm-project#159666
Many bots are broken right now.
Commit: 436f9f39cb259d28381aad87b777236c7cb94d02
https://github.com/llvm/llvm-project/commit/436f9f39cb259d28381aad87b777236c7cb94d02
Author: Yi Zhang <cathyzhyi at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after cf86ef925d75ef08526fc399a2888673338298b3 (#161884)
Commit: d682f61c1272ac28de06aa47d580f040ba54cd4b
https://github.com/llvm/llvm-project/commit/d682f61c1272ac28de06aa47d580f040ba54cd4b
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/test/Driver/dxc_frs.hlsl
M clang/test/Driver/dxc_rootsignature_target.hlsl
Log Message:
-----------
[HLSL][TEST] Fix root signature driver test on WSL (#161566)
Running those test with validation enabled, causes emitting an
additional intermediary object, which causes the checks to fail, since
it will emit 2 `obj`, instead of one `obj` and one `dxo`. This patch
changes the test to make sure validation is disabled, making the test
consistent across environments.
Commit: 8fd8fb4d40bf382c7ae1c00b729a0e8cb80733e7
https://github.com/llvm/llvm-project/commit/8fd8fb4d40bf382c7ae1c00b729a0e8cb80733e7
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/docs/DirectX/DXContainer.rst
Log Message:
-----------
[Documentation][DirectX] Updating RTS0 structs to match d3d12 docs (#161593)
This PR updates the `DXContainer.rst` in two ways: First, it makes sure
the structures names are matching the ones in d3d12 documentation;
Second, it makes sure the types match what is in the code currently.
Closes: [135210](https://github.com/llvm/llvm-project/issues/135210)
Commit: 1fba01a51d6cbf1cc63f4209203babd81950c5e6
https://github.com/llvm/llvm-project/commit/1fba01a51d6cbf1cc63f4209203babd81950c5e6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/scope.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/type.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/type.cpp
M flang/test/Semantics/declarations01.f90
M flang/test/Semantics/declarations08.f90
M flang/test/Semantics/resolve42.f90
Log Message:
-----------
[flang] Consolidate & clean up COMMON block checks (#161286)
COMMON block checks are split between name resolution and declaration
checking. We generally want declaration checks to take place after name
resolution, and the COMMON block checks that are currently in name
resolution have some derived type analyses that are redundant with the
derived type component iteration framework used elsewhere in semantics.
So move as much as possible into declaration checking, use the component
iteration framework, and cope with the missing COMMON block name case
that arises with blank COMMON when placing the error messages.
Commit: cbe3b72c4c9378c9e4f2fd1b5e4d0f9e63d8f6bb
https://github.com/llvm/llvm-project/commit/cbe3b72c4c9378c9e4f2fd1b5e4d0f9e63d8f6bb
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/boz-literal-constants.f90
M flang/test/Semantics/call13.f90
A flang/test/Semantics/cuf24.cuf
M flang/test/Semantics/null01.f90
Log Message:
-----------
[flang][CUDA] Downgrade error to warning (#161570)
The compiler currently emit an error about the lack of an explicit
procedure interface when an external procedure that is called via an
implicit interface is known to have an dummy argument with a CUDA data
attribute, even when the corresponding actual argument does have a CUDA
data attribute. This behavior is inconsistent with what happens when
such a call is to an external in another source file and its definition
is not visible -- the compiler silently accepts an actual argument with
a CUDA data attribute across the implicit interface.
Harmonize this situation so that an actual argument with a CUDA data
attribute in a reference to a procedure with an implicit interface
elicits a usage warning encouraging the use of explicit interfaces. Only
when the procedure's definition is visible, and incompatible, will an
error message appear.
Commit: 0b8381aba9f90884ddfc69393d6f2bb1bda7facf
https://github.com/llvm/llvm-project/commit/0b8381aba9f90884ddfc69393d6f2bb1bda7facf
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/include/flang/Semantics/tools.h
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Semantics/modfile80.F90
Log Message:
-----------
[flang] Fix bogus generic interface error due to hermetic module files (#161607)
When the same generic interface is processed via USE association from
its original module file and from a copy in a hermetic module file, we
need to do a better job at detecting and omitting duplicate specific
procedures. They won't have the same symbol addresses, but they will
have the same name, module name, and characteristics. This will avoid a
bogus error about multiple specific procedures matching the actual
arguments later when the merged generic interface is referenced.
Commit: 2e67f5ceb8585983e1ca64e776bcbdb86b27c61f
https://github.com/llvm/llvm-project/commit/2e67f5ceb8585983e1ca64e776bcbdb86b27c61f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
Log Message:
-----------
[SLP][NFC]Add udiv/srem test cases, NFC
Commit: 616e5230c7e31caae2c58b46c9655a3617a437a3
https://github.com/llvm/llvm-project/commit/616e5230c7e31caae2c58b46c9655a3617a437a3
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp
M llvm/unittests/Analysis/IR2VecTest.cpp
Log Message:
-----------
Fixing memory leaks in tests (#161878)
Fixing the memory leaks introduced (#158376) in the unit tests of
FunctionPropertiesAnalysis and IR2Vec.
Commit: eabfed8690a1e87056140c1b311f82457e27feb9
https://github.com/llvm/llvm-project/commit/eabfed8690a1e87056140c1b311f82457e27feb9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for modernize-use-bool-literals in VectorEmulateNarrowType.cpp (NFC)
Commit: aea5399919ade83f587a57395ed606528f1985f2
https://github.com/llvm/llvm-project/commit/aea5399919ade83f587a57395ed606528f1985f2
Author: Fateme Hosseini <136356764+fhossein-quic at users.noreply.github.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/test/CodeGen/Hexagon/inst_setcc_uno_uo.ll
Log Message:
-----------
[Hexagon] Support lowering of setuo & seto for vector types in Hexagon (#158740)
Resolves instruction selection failure for v64f16 and v32f32 vector
types.
Patch by: Fateme Hosseini
---------
Co-authored-by: Kaushik Kulkarni <quic_kauskulk at quicinc.com>
Commit: 478048df443a25d75f7cb2dd7b50ba94e73303c2
https://github.com/llvm/llvm-project/commit/478048df443a25d75f7cb2dd7b50ba94e73303c2
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[mlir][acc] Add firstprivate operands to `acc.loop` (#161881)
Add support for firstprivate operands to the OpenACC loop construct,
enabling representation of privatization scenarios that require
initialization from original values.
Commit: 16f5a85fb648027b9644b21c8c0fa9188d6c39b9
https://github.com/llvm/llvm-project/commit/16f5a85fb648027b9644b21c8c0fa9188d6c39b9
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/IR/func.cir
Log Message:
-----------
[CIR] Initial support for emitting coroutine body (#161616)
This PR adds new `FuncOp` attributes (`coroutine` and `builtin`) and
begins the implementation of the `emitCoroutineBody` function. Feature
markers were also added for guidance in future PRs.
Commit: 0cc2ad3c00e255a044ca65af2c09bdfbafc6143d
https://github.com/llvm/llvm-project/commit/0cc2ad3c00e255a044ca65af2c09bdfbafc6143d
Author: Nico Weber <thakis at chromium.org>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
Log Message:
-----------
[gn] port 1af8ed198828
Commit: 8284e4d7cd5cce7f14f820ea2a3f043311eb1d4c
https://github.com/llvm/llvm-project/commit/8284e4d7cd5cce7f14f820ea2a3f043311eb1d4c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV] Remove unused uimm5i32 from RISCVGISel.td. NFC
Commit: 8ae30a3facd25c9c7c2cfb96b69466a6c4d22baa
https://github.com/llvm/llvm-project/commit/8ae30a3facd25c9c7c2cfb96b69466a6c4d22baa
Author: John Harrison <harjohn at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/MCPError.h
M lldb/include/lldb/Protocol/MCP/Protocol.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/source/Host/common/JSONTransport.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Protocol/MCP/MCPError.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Protocol/ProtocolBase.h
M lldb/tools/lldb-dap/Transport.h
M lldb/unittests/DAP/DAPTest.cpp
M lldb/unittests/DAP/Handler/DisconnectTest.cpp
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/TestingSupport/Host/JSONTransportTestUtilities.h
Log Message:
-----------
[lldb] Adding A new Binding helper for JSONTransport. (#159160)
This adds a new Binding helper class to allow mapping of incoming and
outgoing requests / events to specific handlers.
This should make it easier to create new protocol implementations and
allow us to create a relay in the lldb-mcp binary.
Commit: 119216ead189f9a695ab6361ab86d0121e765797
https://github.com/llvm/llvm-project/commit/119216ead189f9a695ab6361ab86d0121e765797
Author: David Green <david.green at arm.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-sextinreg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-vashr-vlshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-neon-vcvtfxu2fp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-neon-3vdiff.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
M llvm/test/CodeGen/AArch64/combine-sdiv.ll
M llvm/test/CodeGen/AArch64/extract-vector-elt.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/neon-shift-left-long.ll
M llvm/test/CodeGen/AArch64/select_cc.ll
M llvm/test/CodeGen/AArch64/selectcc-to-shiftand.ll
Log Message:
-----------
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
This changes the intrinsic definitions for shifts to use IntArg, which
in turn changes how the shifts are represented in SDAG to use
TargetConstant (and fixes up a number of ISel lowering places too). The
vecshift immediates are changed from ImmLeaf to TImmLeaf to keep them
matching the TargetConstant. On the GISel side the constant shift
amounts are then represented as immediate operands, not separate constants.
The end result is that this allows a few more patterns to match in GISel.
Commit: 272025e5afa858ebc6e49df88958b34a9b186f54
https://github.com/llvm/llvm-project/commit/272025e5afa858ebc6e49df88958b34a9b186f54
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV] Remove unneeded anyext/trunc patterns from RISCVGISel.td. NFC
We have code to manually select these as copies already. There are
multiple combinations of types that need to be supported due to
s32 and s16 being legal for the GPR register bank. It's simpler
to handle generically than to write out all the patterns.
Commit: f5dc553e93293743f4c1e36dc119e4823f5970d3
https://github.com/llvm/llvm-project/commit/f5dc553e93293743f4c1e36dc119e4823f5970d3
Author: Martin Storsjö <martin at martin.st>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libcxx] [ci] Make the CI find the right version of Clang-cl (#161736)
We install a (or in practice, update a preexisting) copy of Clang, in
order to get a specific version that we want. At that point in the
procedure, this is the only version of Clang in the PATH.
However, the step of adding the MSVC build tools to the environment also
ends up adding another copy of Clang, bundled with MSVC, into the PATH.
Due to this, CMake ends up finding and preferring the older version of
Clang bundled with MSVC, rather than the one we intend to be used.
Manually add the directory of the version of Clang we want to use at the
head of the search path, after initializing the MSVC build tool
environment.
The directory name we add is a hardcoded guess of where it is installed
- this is not ideal, but seems like the most straightforward solution
for now.
Commit: 3b38314a2b69847305b692677dbe64f1eb43235a
https://github.com/llvm/llvm-project/commit/3b38314a2b69847305b692677dbe64f1eb43235a
Author: Alan Zhao <ayzhao at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-and-cmp.ll
M llvm/test/Transforms/InstCombine/select-or-cmp.ll
Log Message:
-----------
Reapply "[InstCombine] Preserve profile after folding select instructions with conditionals" (#161885) (#161890)
This reverts commit 572b579632fb79ea6eb562a537c9ff1280b3d4f5.
This is a reland of #159666 but with a fix moving the `extern`
declaration of the flag under the LLVM namespace, which is needed to fix
a linker error caused by #161240.
Commit: 99b0aafa4ae792104948e40d64d9fef6e8c7c93b
https://github.com/llvm/llvm-project/commit/99b0aafa4ae792104948e40d64d9fef6e8c7c93b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Log Message:
-----------
[AArch64] Use isStrongerThanMonotonic. NFC (#161866)
Commit: b86fef88c54b20812ed3f1a67869dcaa54a07882
https://github.com/llvm/llvm-project/commit/b86fef88c54b20812ed3f1a67869dcaa54a07882
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
A mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[mlir][xegpu] Create a test pass for subgroup distribution. (#161592)
Current subgroup distribution test employ the entire
`xegpu-subgroup-distribute` pass which include multiple steps like
layout propagation, move func body into warp op, and distribute to work
items.
This makes it harder to isolate the testing for xegpu subgroup
distribution logic, because certain corner cases may be not supported
yet by other steps mentioned above.
This PR introduces a test pass for subgroup distribution logic and
isolate the testing for distribution logic. We plan to add more corner
case (that were not possible before) covering non-xegpu ops (like
vector) in next PRs.
This PR also include,
1. minor bug fixes in gather/scatter distribution.
2. bug fix in vector multi reduction lowering where it fails to retain
some layouts.
Commit: 178e2a704b1dc5209e4cc24866a2738c5bc468f3
https://github.com/llvm/llvm-project/commit/178e2a704b1dc5209e4cc24866a2738c5bc468f3
Author: Yatao Wang <ningxinr at live.cn>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/fpclamptosat.ll
M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/fpclamptosat.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
M llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/fpclamptosat.ll
M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
Log Message:
-----------
[LLVM][CodeGen] Check Non Saturate Case in isSaturatingMinMax (#160637)
Fix Issue #160611
Commit: be29612ffceac888f931dc45664f7c42cea9b598
https://github.com/llvm/llvm-project/commit/be29612ffceac888f931dc45664f7c42cea9b598
Author: ManuelJBrito <59119670+ManuelJBrito at users.noreply.github.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/NewGVN.cpp
A llvm/test/Transforms/NewGVN/pr159918.ll
Log Message:
-----------
[NewGVN] Remove returned arg simplification (#161865)
Replacing uses of the return value with the argument is already handled
in other passes, additionally it causes issues with memory value
numbering when the call is a memory defining intrinsic.
fixes #159918
Commit: b0ad9c293a493c5912ffee6c18191bf35095f9f7
https://github.com/llvm/llvm-project/commit/b0ad9c293a493c5912ffee6c18191bf35095f9f7
Author: Lucie Choi <ychoi0407 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/test/CodeGen/SPIRV/pointers/ptrcast-bitcast.ll
Log Message:
-----------
[SPIR-V] Fix `asdouble` issue in SPIRV codegen to correctly generate `OpBitCast` instruction. (#161891)
Generate `OpBitCast` instruction for pointer cast operation if the
element type is different.
The HLSL for the unit test is
```hlsl
StructuredBuffer<uint2> In : register(t0);
RWStructuredBuffer<double2> Out : register(u2);
[numthreads(1,1,1)]
void main() {
Out[0] = asdouble(In[0], In[1]);
}
```
Resolves https://github.com/llvm/llvm-project/issues/153513
Commit: 36dc2a941f531d6b5662f2ad2c11e7264e5d9622
https://github.com/llvm/llvm-project/commit/36dc2a941f531d6b5662f2ad2c11e7264e5d9622
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td
Log Message:
-----------
[RISCV] Reverse the operands in ins for Zalasr store instructions. NFC (#161882)
Match the assembly printing order rather than sorting by operand name.
Tnis is consistent with normal store instructions.
Commit: 2a059042882ed5108478c635322e4e94439386f5
https://github.com/llvm/llvm-project/commit/2a059042882ed5108478c635322e4e94439386f5
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTestObjC.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Keep the ObjC selector name and `@selector` together (#160739)
Fixes #36459.
after
```Objective-C
- (void)test {
if ([object
respondsToSelector:@selector(
selectorNameThatIsReallyLong:param1:param2:)])
return;
}
```
before
```Objective-C
- (void)test {
if ([object respondsToSelector:@selector
(selectorNameThatIsReallyLong:param1:param2:)])
return;
}
```
Before this patch, the `ObjCMethodExpr` type was assigned to many kinds
of tokens. The rule for allowing breaking the line before the colon on
line TokenAnnotator.cpp:6289 was intended for method declarations and
calls. It matched the parenthesis following `@selector` by mistake. To
fix the problem, this patch adds a new type for `@selector`. Most of the
special things in the code related to the old type is intended for other
constructs. So most of the code related to the old type is not changed
in this patch.
Commit: 1d65d9ce06fef890389e61990d9c748162334e55
https://github.com/llvm/llvm-project/commit/1d65d9ce06fef890389e61990d9c748162334e55
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
[VPlan] Match legacy CM in ::computeCost if load is used by load/store.
If a load is scalarized because it is used by a load/store address, the
legacy cost model does not pass ScalarEvolution to getAddressComputationCost.
Match the behavior in VPReplicateRecipe::computeCost.
Commit: 50285eaa594618bc430114da17fcce3c24f36810
https://github.com/llvm/llvm-project/commit/50285eaa594618bc430114da17fcce3c24f36810
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
Log Message:
-----------
[OpenMP][Clang][NFC] Initializer all of ScanInfo member variables and add deleted copy ctor and assignment operator (#158130)
Static analysis flagged that we were not initializing all of the members
of ScanInfo, fix this so that they are all initialized. Also it pointed
out that we were not following the rule of three. We had a custom
destructor but not copy constructor or assignment. We should never copy
or assignment so defaulting them as deleted.
Commit: b8127cc8d0f5cb48c106199a059442e2719e8656
https://github.com/llvm/llvm-project/commit/b8127cc8d0f5cb48c106199a059442e2719e8656
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] fix v_mov_b16_t16 index in folding pass (#161764)
With true16 mode v_mov_b16_t16 is added as new foldable copy inst, but
the src operand is in different index.
Use the correct src index for v_mov_b16_t16.
Commit: 9c118aa6a6fedb1006a3a81ebca40f226e5abf93
https://github.com/llvm/llvm-project/commit/9c118aa6a6fedb1006a3a81ebca40f226e5abf93
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV] Remove unusable pattern from RISCVGISel.td. NFC
This pattern doesn't have a GISelPredicateCode so it's only usable
in SDAG.
Commit: fb458aa91f8fa614086e855ab29749e81e834194
https://github.com/llvm/llvm-project/commit/fb458aa91f8fa614086e855ab29749e81e834194
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-options.hip
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
A llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/ThreadPool.h
M llvm/include/llvm/Support/Threading.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/Jobserver.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/ThreadPool.cpp
M llvm/lib/Support/Threading.cpp
A llvm/lib/Support/Unix/Jobserver.inc
A llvm/lib/Support/Windows/Jobserver.inc
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/JobserverTest.cpp
Log Message:
-----------
Reland "[LLVM] Add GNU make jobserver support (#145131)"
With fix for JobServerTest where default parallel scheduling
strategy is saved/restored.
Commit: 7f51a2a47d2e706d04855b0e41690ebafa2b3238
https://github.com/llvm/llvm-project/commit/7f51a2a47d2e706d04855b0e41690ebafa2b3238
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/source/Target/Language.cpp
M lldb/unittests/Target/CMakeLists.txt
A lldb/unittests/Target/Language.cpp
Log Message:
-----------
[lldb][Language] Simplify SourceLanguage::GetDescription (#161804)
Currently we don't benefit from the user-friendly names that
`LanguageDescription` returns because we would always use
`Language::GetNameForLanguageType`. I'm not aware of a situation where
`GetDescription` should prefer the non-human readable form of the name
with. This patch removes the call to `GetNameForLanguageType`.
`LanguageDescription` already handles languages that it doesn't know
about. For those it would return `Unknown`. The LLDB language types
should all be available via DWARF. If there are languages that don't map
cleanly between `lldb::LanguageType` and `DW_LANG`, then we should add
explicit support for that in the `SourceLanguage::SourceLanguage`
constructor.
Commit: 2c3724419c04c3b6d918eb4c2eec00a4372d2937
https://github.com/llvm/llvm-project/commit/2c3724419c04c3b6d918eb4c2eec00a4372d2937
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/include/lldb/Target/Language.h
M lldb/source/Target/Language.cpp
Log Message:
-----------
[lldb][Language] Add Language::GetDisplayNameForLanguageType API (#161803)
The intention for this API is to be used when presenting language names
to the user, e.g., in expression evaluation diagnostics or LLDB errors.
Most uses of `GetNameForLanguageType` can be probably replaced with
`GetDisplayNameForLanguageType`, but that's out of scope of this PR.
This uses `llvm::dwarf::LanguageDescription` under the hood, so we would
lose the version numbers in the names. If we deem those to be important,
we could switch to an implementation that hardcodes a list of
user-friendly names with version numbers included.
The intention is to use it from
https://github.com/llvm/llvm-project/pull/161688
Depends on https://github.com/llvm/llvm-project/pull/161804
Commit: df61e349bc4441640a825acefef753637a55633f
https://github.com/llvm/llvm-project/commit/df61e349bc4441640a825acefef753637a55633f
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
A openmp/runtime/test/transform/tile/intfor.F90
R openmp/runtime/test/transform/tile/intfor.f90
Log Message:
-----------
[OpenMP][test] .f90 -> .F90
The test makes use of the preprocessor, which requires a .F90 suffix
Commit: fc1df44dec6396a468edab8136b1969eede54509
https://github.com/llvm/llvm-project/commit/fc1df44dec6396a468edab8136b1969eede54509
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port fb458aa91f8f
Commit: 162b87b0ac86f7604db245b67874fc6715b2f06b
https://github.com/llvm/llvm-project/commit/162b87b0ac86f7604db245b67874fc6715b2f06b
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/dotest.py
Log Message:
-----------
[lldb][yaml2macho-core] Set binary path for tests differently
The way I was setting the path to the yaml2macho-core tool for
API tests assumed that the llvm tool bin directory was the same
as the lldb tool bin directory. There are build configuration
styles where they are not. Set it the same way lldb-dap etc
are set to the lldb bin dir.
Commit: c488dca6564d11ae84fb482599996a9d310f370d
https://github.com/llvm/llvm-project/commit/c488dca6564d11ae84fb482599996a9d310f370d
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/unittests/Host/posix/HostTest.cpp
Log Message:
-----------
[lldb][test] check if CoreDumping is supported at runtime (#161385)
#160333 reimplementation but at runtime instead because of broken CI.
---------
Co-authored-by: Michael Buch <michaelbuch12 at gmail.com>
Co-authored-by: Daniel Thornburgh <mysterymath at gmail.com>
Commit: c2c2e4ec90d0c1d65fff34fc4835dc6ba1ab25fc
https://github.com/llvm/llvm-project/commit/c2c2e4ec90d0c1d65fff34fc4835dc6ba1ab25fc
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
[SelectionDAG] Add support to dump DAGs with sorted nodes (#161097)
An alternative approach to #149732 , which sorts the DAG before dumping
it. That approach runs a risk of altering the codegen result as we don't
know if any of the downstream DAG users relies on the node ID, which was
updated as part of the sorting.
The new method proposed by this PR does not update the node ID or any of
the DAG's internal states: the newly added
`SelectionDAG::getTopologicallyOrderedNodes` is a const member function
that returns a list of all nodes in their topological order.
Commit: 4368616452476472e3d776c9ae72be34fa674146
https://github.com/llvm/llvm-project/commit/4368616452476472e3d776c9ae72be34fa674146
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/CMakeLists.txt
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][Dependency Scanning] Refactor Scanning Compiler Instance Initialization (#161300)
This PR follows https://github.com/llvm/llvm-project/pull/160795, and it
is the second of a series of planned PRs to land
https://github.com/llvm/llvm-project/pull/160207 in smaller pieces.
The initialization steps before and within
`DependencyScanningAction::runInvocation` are broken up in to several
helper functions. The intention is to reuse the helper functions in a
followup PR to initialize the `CompilerInstanceWithContext`.
Part of work for rdar://136303612.
Commit: d322ebdeabf6acac6d1b1580c10abdbc7aef2802
https://github.com/llvm/llvm-project/commit/d322ebdeabf6acac6d1b1580c10abdbc7aef2802
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-dups.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal.ll
Log Message:
-----------
[MemProf] Suppress duplicate clones in the LTO backend (#161551)
In some cases due to phase ordering issues with re-cloning during
function assignment, we may end up with duplicate clones in the
summaries (calling the same set of callee clones and/or allocation
hints).
Ideally we would fix this in the thin link, but for now, detect and
suppress these in the LTO backend. In order to satisfy possibly
cross-module references, make each duplicate an alias to the first
identical copy, which gets materialized.
This reduces ThinLTO backend compile times.
Commit: 1eaf081d5eee11ad5797d8825b0510d61a034099
https://github.com/llvm/llvm-project/commit/1eaf081d5eee11ad5797d8825b0510d61a034099
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
R clang/test/CodeGenHLSL/resources/AppendStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/resources/ConsumeStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/resources/RWStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/resources/StructuredBuffer-elementtype.hlsl
A clang/test/CodeGenHLSL/resources/StructuredBuffers-elementtype.hlsl
Log Message:
-----------
[HLSL][NFC] Merge element type tests for structured buffers (#161895)
The change merges 4 similar test files into one file with multiple RUN: lines and uses macros to parametrize the test.
Commit: 0b543e39351a72f65521522fbe9f3622abc00b47
https://github.com/llvm/llvm-project/commit/0b543e39351a72f65521522fbe9f3622abc00b47
Author: Alex White <milkeeycat at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/Target/GenericOpcodes.td
Log Message:
-----------
[TableGen] Set `G_GLOBAL_VALUE` out operand type to `ptype0` (#161894)
I'm not familiar with how every target handles this generic opcode but I
think it shouldn't break anything and it makes sense to use `ptype0`
because `G_GLOBAL_VALUE` returns a pointer.
Commit: 716fe1cbd9496564ac3588069846a52b8539df65
https://github.com/llvm/llvm-project/commit/716fe1cbd9496564ac3588069846a52b8539df65
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Lower/OpenMP/map-neg-alloca-derived-type-array.f90
Log Message:
-----------
[Flang][OpenMP] Fix negative array indexing with allocatable derived type array maps (#154193)
The main problem is that the previous intermediate map generation for
allocatable members wasn't quite handling negative bounds acccesses
correctly, it seems to require slightly more complicated access using
shape_shift/dimension information. So this more closely mimics what
Flang generates in other cases now.
There is still a path for non-Box types to go down the old route for the
moment, so it is possible we may still have issues with negative bounds
in these cases. But, that's better in another PR if we come across it,
instead of too much change in this one.
Commit: a4b297532d3b3555b70c8b047e7d0ef3457f6ac8
https://github.com/llvm/llvm-project/commit/a4b297532d3b3555b70c8b047e7d0ef3457f6ac8
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
Log Message:
-----------
[SPIRV] Fix unused-variable warnings (NFC)
/llvm-project/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp:198:12:
error: unused variable 'dstBitWidth' [-Werror,-Wunused-variable]
auto dstBitWidth =
^
/llvm-project/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp:200:12:
error: unused variable 'srcBitWidth' [-Werror,-Wunused-variable]
auto srcBitWidth =
^
2 errors generated.
Commit: f3673c5e5bfef176b3f630d82ec2299390b8a69a
https://github.com/llvm/llvm-project/commit/f3673c5e5bfef176b3f630d82ec2299390b8a69a
Author: John Harrison <harjohn at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/Protocol/ProtocolMCPTest.cpp
Log Message:
-----------
[lldb] Disabling tests in win32 to investigate the root cause. (#161931)
These tests are failing on win32 platforms, disabling while I
investigate the root cause.
Commit: cb8b48e583f8f31ef162bcbaabbe95815f08230d
https://github.com/llvm/llvm-project/commit/cb8b48e583f8f31ef162bcbaabbe95815f08230d
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
A llvm/test/TableGen/ResolveSchedClass.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[TableGen][MC] Pass a MCSubtargetInfo instance into resolveVariantSchedClassImpl (#161886)
`Target_MC::resolveVariantSchedClassImpl` is the implementation function
for `TargetGenMCSubtargetInfo::resolveVariantSchedClass`. Despite being
only called by `resolveVariantSchedClass`,
`resolveVariantSchedClassImpl` is still a standalone function that
cannot access a MCSubtargetInfo through `this` (i.e.
`TargetGenMCSubtargetInfo`). And having access to a `MCSubtargetInfo`
could be useful for some (future) SchedPredicate.
This patch modifies TableGen to generate `resolveVariantSchedClassImpl`
with an additional `MCSubtargetInfo` argument passing in. Note that this
does not change any public interface in either `TargetGenMCSubtargetInfo
` or `MCSubtargetInfo`, as `resolveVariantSchedClassImpl` is basically
an internal function.
Commit: 1a3f84864f9d69e0c98500349a638f6ee360322e
https://github.com/llvm/llvm-project/commit/1a3f84864f9d69e0c98500349a638f6ee360322e
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signed-char-misuse.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-char-misuse-with-option.cpp
Log Message:
-----------
[clang-tidy] Fix typoed option name in `bugprone-signed-char-misuse` (#161064)
Following the example of #158282.
Commit: 3896212ceab8fe963335e8a31b898b6099292c88
https://github.com/llvm/llvm-project/commit/3896212ceab8fe963335e8a31b898b6099292c88
Author: David Rivera <davidriverg at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypeCache.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/address-space.c
A clang/test/CIR/IR/invalid-addrspace.cir
Log Message:
-----------
[CIR] Implement Target-specific address space handling support for `PointerType` (#161028)
This PR adds support for address spaces in CIR pointer types by:
1. Introducing a `TargetAddressSpaceAttr` to represent target-specific
numeric address spaces (A Lang-specific attribute is to be implemented
in a different PR)
2. Extending the `PointerType` to include an optional address space
parameter
3. Adding helper methods in `CIRBaseBuilder` to create pointers with
address spaces
4. Implementing custom parsers and printers for address space attributes
5. Updating the LLVM lowering to properly handle address spaces when
converting CIR to LLVM IR
The implementation allows for creating pointers with specific address
spaces, which is necessary for supporting language features like Clang's
`__attribute__((address_space(N)))`. Address spaces are preserved
through the CIR representation and correctly lowered to LLVM IR.
Commit: 1b30e49b9b37673a1e8437b54c077611789f60a3
https://github.com/llvm/llvm-project/commit/1b30e49b9b37673a1e8437b54c077611789f60a3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
A llvm/test/CodeGen/AMDGPU/.#llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-ignore-copies-crash.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
AMDGPU: Remove m0 classes (#161758)
These are singleton register classes, which are not a good idea
and also are unused.
Commit: 910e536fb09f39493906005b9a8d7d1fbcc20e28
https://github.com/llvm/llvm-project/commit/910e536fb09f39493906005b9a8d7d1fbcc20e28
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch_create.ll
Log Message:
-----------
[SimplifyCFG][profcheck] Synthesize profile for `br (X == 0 | X == 1), T, F1 -> switch` (#161549)
We cannot calculate the weights of the switch precisely, but we do know the probability of the default branch. We then split equally the remaining probability over the rest of the cases. If we did nothing, the static estimation could be considerably poorer.
Issue #147390
Commit: 977b546c32d8978bc5682125e64e84aeee41ee76
https://github.com/llvm/llvm-project/commit/977b546c32d8978bc5682125e64e84aeee41ee76
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/Target/TargetSchedule.td
M llvm/test/TableGen/ResolveSchedClass.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[TableGen][SchedModel] Introduce a new SchedPredicate that checks against SubtargetFeature (#161888)
Introduce a new SchedPredicate, `FeatureSchedPredicate`, that holds true
when a certain SubtargetFeature is enabled. This could be useful when we
want to configure a scheduling model with subtarget features.
I add this as a separate SchedPredicate rather than piggy-back on the
existing `SchedPredicate<[{....}]>` because first and foremost,
`SchedPredicate` is expected to only operate on MachineInstr, so it does
_not_ appear in `MCGenSubtargetInfo::resolveVariantSchedClass` but only
show up in `TargetGenSubtargetInfo::resolveSchedClass`. Yet I think
`FeatureSchedPredicate` will be useful for both MCInst and MachineInstr.
There is another subtle difference between `resolveVariantSchedClass`
and `resolveSchedClass` regarding how we access the MCSubtargetInfo
instance, if we really want to express `FeatureSchedPredicate` using
`SchedPredicate<[{.....}]>`.
So I thought it'll be easier to add another new SchedPredicate for
SubtargetFeature.
Commit: 4af3e8f1d4ae0a3eb45068bd12c3b67cb92a7a90
https://github.com/llvm/llvm-project/commit/4af3e8f1d4ae0a3eb45068bd12c3b67cb92a7a90
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
AMDGPU: Remove LDS_DIRECT_CLASS register class (#161762)
This is a singleton register class which is a bad idea,
and not actually used.
Commit: 5ec11900e5df2cb8abcd8626609d38c2a26f0940
https://github.com/llvm/llvm-project/commit/5ec11900e5df2cb8abcd8626609d38c2a26f0940
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Exclude new test cases for SPIRV and GVN transformations (#161941)
Commit: 5fe6479bf2dbd008d9e300c0ea2d1c1ff30ebe58
https://github.com/llvm/llvm-project/commit/5fe6479bf2dbd008d9e300c0ea2d1c1ff30ebe58
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
M llvm/test/Transforms/SimplifyCFG/rangereduce.ll
Log Message:
-----------
[SimplifyCFG][profcheck] Handle branch weights in `simplifySwitchLookup` (#161739)
The switch becomes a conditional branch, one edge going to what was the default target of the switch, the other to a BB that performs a lookup in a table. The branch weights are accurately determinable from the ones of the switch.
Issue #147390
Commit: e61b6f63ed98041911853101c7e5821f0861765b
https://github.com/llvm/llvm-project/commit/e61b6f63ed98041911853101c7e5821f0861765b
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[nfc][profcheck] Re-sort exclude list (#161942)
Commit: b1e29ec3b73b9dd06656c7e30ace597ff72cde70
https://github.com/llvm/llvm-project/commit/b1e29ec3b73b9dd06656c7e30ace597ff72cde70
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M flang/include/flang/Parser/message.h
M flang/lib/Parser/message.cpp
M flang/test/Semantics/associated.f90
Log Message:
-----------
[flang] remove sequences of duplicate messages (#161916)
Fixes bug exposed by https://github.com/llvm/llvm-project/pull/161915 by keeping a cache of messages printed at a given location.
Commit: e95a571f402074ac438235b13a4099f43c4e822c
https://github.com/llvm/llvm-project/commit/e95a571f402074ac438235b13a4099f43c4e822c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
Log Message:
-----------
[RISCV] Add i32 to some QC_SHLADD patterns to reduce RISCVGenDAGISel.inc size. NFC
The shift amount type is independent of the output type. We need to
force it to i32 to prevent tablegen from creating an unnecessary
i64 pattern.
Commit: 7fbfbab3324b88d75d68b2bdb3aed696be80d8d5
https://github.com/llvm/llvm-project/commit/7fbfbab3324b88d75d68b2bdb3aed696be80d8d5
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
Log Message:
-----------
[Clang][NFC] Avoid duplication in BuildDeductionGuideForTypeAlias (#161948)
This addresses the post-commit review https://github.com/llvm/llvm-project/pull/161035#discussion_r2403312649 from Shafik
Commit: 0ce7cbddd29bc857c6d500a6d754352d24254b71
https://github.com/llvm/llvm-project/commit/0ce7cbddd29bc857c6d500a6d754352d24254b71
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
Log Message:
-----------
[AMDGPU] Add another test for missing S_WAIT_XCNT (#161838)
Commit: cd32b9b6c3b2fda3a781d9ce0a0cf8e21c9d0137
https://github.com/llvm/llvm-project/commit/cd32b9b6c3b2fda3a781d9ce0a0cf8e21c9d0137
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/Object/MachO.h
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Object/MachOObjectFile.cpp
Log Message:
-----------
[MachO] Move getArchTriple implementation into BinaryFormat. (#161468)
There's nothing ObjectFile specific about getArchTriple, so move it into
the BinaryFormat library so that clients can use it without taking a
dependence on libObject.
MachOObjectFile::getArchTriple is updated to call through to the moved
implementation.
Commit: 30f7c5d04c395e766bd778acfa46ee88e2ad300d
https://github.com/llvm/llvm-project/commit/30f7c5d04c395e766bd778acfa46ee88e2ad300d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/BitmaskEnum.h
M llvm/include/llvm/ADT/PointerUnion.h
M llvm/include/llvm/ADT/bit.h
M llvm/unittests/ADT/BitTest.cpp
Log Message:
-----------
[ADT] Add bit_width_constexpr (#161775)
This patch adds llvm::bit_width_constexpr, a constexpr version of
llvm::bit_width.
The new function is intended to serve as a marker. When we switch to
C++20, we will most likely go through functions in llvm/ADT/bit.h and
replace them with their counterparts from <bit>. With
llvm::bit_width_constexpr, we can easily replace its use with
std::bit_width.
This patch refactors a couple of places. Specifically:
- bitWidth in BitmaskEnum.h is replaced with the new function.
- bitsRequired in PointerUnion.h is redefined in terms of the new
function.
I've used Compiler Explorer to check the equivalence:
https://godbolt.org/z/1oKMK9Ez7
Commit: 2689abab42c98abb3bdeb8aad38744d3153c0c6b
https://github.com/llvm/llvm-project/commit/2689abab42c98abb3bdeb8aad38744d3153c0c6b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/ValueMap.h
Log Message:
-----------
[IR] Consolidate ValueMap iterator classes (NFC) (#161777)
This patch consolidates ValueMapIterator and ValueMapConstIterator
into ValueMapIteratorImpl. ValueMapIteratorImpl takes a boolean
template parameter to determine whether it should act as a const
iterator or a non-const one. ValueMapIterator and
ValueMapConstIterator are now type aliases of ValueMapIteratorImpl.
Commit: 8af44b07db315baf9819d3395ab9efc64b26af08
https://github.com/llvm/llvm-project/commit/8af44b07db315baf9819d3395ab9efc64b26af08
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/include/llvm/Support/ScopedPrinter.h
Log Message:
-----------
[Support] Use a C++17 fold expression in ScopedPrinter.h (NFC) (#161778)
Commit: 93b01739563202436573b3fd4b5a3ad9142b55c3
https://github.com/llvm/llvm-project/commit/93b01739563202436573b3fd4b5a3ad9142b55c3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-03 (Fri, 03 Oct 2025)
Changed paths:
M llvm/docs/ProgrammersManual.rst
Log Message:
-----------
[llvm] Proofread ProgrammersManual.rst (#161779)
Commit: 25e02a43fe6bf95c118d7c3862d7d7c4abe4dcde
https://github.com/llvm/llvm-project/commit/25e02a43fe6bf95c118d7c3862d7d7c4abe4dcde
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/Object/MachO.h
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Object/MachOObjectFile.cpp
Log Message:
-----------
Revert "[MachO] Move getArchTriple implementation into BinaryFormat. (#161468)"
Reverts commit cd32b9b6c3b while I investigate some bot failures, e.g.
https://lab.llvm.org/buildbot/#/builders/10/builds/14784.
Commit: ad7334b067ced512d65cd7576b0472cf8fc0487c
https://github.com/llvm/llvm-project/commit/ad7334b067ced512d65cd7576b0472cf8fc0487c
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M bolt/utils/dot2html/d3-graphviz-template.html
Log Message:
-----------
[BOLT] Bump d3js version in dot2html
Commit: 823094e407d74ce1b2a805bbfa4a9cfaf743d23c
https://github.com/llvm/llvm-project/commit/823094e407d74ce1b2a805bbfa4a9cfaf743d23c
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M flang/lib/Evaluate/check-expression.cpp
M flang/test/Semantics/intrinsics03.f90
M flang/test/Semantics/intrinsics04.f90
A flang/test/Semantics/type-parameter-constant.f90
Log Message:
-----------
[flang][semantics] fix IsConstantExpr for intrinsic with optional argument (#161915)
fixes https://github.com/llvm/llvm-project/issues/161694
Exposes that some sequences of duplicate messages are being printed,
which is fixed in https://github.com/llvm/llvm-project/pull/161916 .
Commit: 54012102c4a8e8bba9b3b27291dab126e3521544
https://github.com/llvm/llvm-project/commit/54012102c4a8e8bba9b3b27291dab126e3521544
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/Object/MachO.h
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Object/CMakeLists.txt
M llvm/lib/Object/MachOObjectFile.cpp
Log Message:
-----------
Reapply [MachO] Move getArchTriple implementation..." with fixes. (#161949)
This reapplies cd32b9b6c3b, which was reverted in 25e02a43fe6 due to bot
failures.
The failures all appear to be link errors due to the Object library not
depending on BinaryFormat. This commit adds the missing dependence.
Commit: 47361e7e0d3acb5b14f4a0dbd0b451bf7881eca2
https://github.com/llvm/llvm-project/commit/47361e7e0d3acb5b14f4a0dbd0b451bf7881eca2
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/struct.cpp
Log Message:
-----------
[CIR] Implement BinComma Expr for AggregateExpr (#161823)
Implement the BinComma Expr support for AggregateExpr
Commit: c06aa2e8137a7e27e0bd0296d2f489c44d47f6f2
https://github.com/llvm/llvm-project/commit/c06aa2e8137a7e27e0bd0296d2f489c44d47f6f2
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/Object/MachO.h
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Object/CMakeLists.txt
M llvm/lib/Object/MachOObjectFile.cpp
Log Message:
-----------
Revert "Reapply [MachO] Move getArchTriple impl... with fixes. (#161949)"
This reverts commit 54012102c4a8e8bba9b3b27291dab126e3521544 while I further
investigate bot failures. Apparently adding a dependence on BinaryFormat to
Object was insufficient to fix the original linker issues.
Commit: 8243c368b750cfe127aed3cd96c675b4499be7f9
https://github.com/llvm/llvm-project/commit/8243c368b750cfe127aed3cd96c675b4499be7f9
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGen/paren-init-list.cpp
Log Message:
-----------
[CIR] Upstream CXXParenListInitExpr for AggregateExpr (#161876)
Upstream the CXXParenListInitExpr support for AggregateExpr
Commit: 7c666e24807b4b2a07370a11706a4bff8f34aef2
https://github.com/llvm/llvm-project/commit/7c666e24807b4b2a07370a11706a4bff8f34aef2
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/struct.cpp
Log Message:
-----------
[CIR] Implement UnaryExtension for AggregateExpr (#161820)
Implement the UnaryExtension support for AggregateExpr
Commit: a6a78eb2f67257adf2aa0b86f40a58c61eb0f3e2
https://github.com/llvm/llvm-project/commit/a6a78eb2f67257adf2aa0b86f40a58c61eb0f3e2
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Support ComplexType in CallExpr args (#156236)
This change adds support for ComplexType in the CallExpr args
Issue: https://github.com/llvm/llvm-project/issues/141365
Commit: 9a2a4f65bc70712c667feaf0f6559f7ab94d7e11
https://github.com/llvm/llvm-project/commit/9a2a4f65bc70712c667feaf0f6559f7ab94d7e11
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/struct.cpp
Log Message:
-----------
[CIR] Implement emitAtomicInit for AggregateExpr (#161826)
Implement emitAtomicInit support for AggregateExpr
Commit: a368fb5205a305197b650cbbc7264085d133e3e3
https://github.com/llvm/llvm-project/commit/a368fb5205a305197b650cbbc7264085d133e3e3
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Update ComplexImagOp to work on scalar type (#161571)
Update cir::ComplexImagOp to make it visible on scalars
Issue https://github.com/llvm/llvm-project/issues/160568
Commit: 9ebf1e91759d74e703d02ff385dabf0a53ac58b9
https://github.com/llvm/llvm-project/commit/9ebf1e91759d74e703d02ff385dabf0a53ac58b9
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[NFC][InstCombine] Fix namespace usage in InstCombine (#161902)
Commit: e9330fd244f93c53b13a876769fe9555913e6028
https://github.com/llvm/llvm-project/commit/e9330fd244f93c53b13a876769fe9555913e6028
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
A llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/Basic/TargetFeaturesEmitter.cpp
M mlir/include/mlir/TableGen/CodeGenHelpers.h
M mlir/include/mlir/TableGen/Dialect.h
M mlir/lib/TableGen/CodeGenHelpers.cpp
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/tools/mlir-tblgen/DialectGen.cpp
M mlir/tools/mlir-tblgen/OmpOpGen.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
Log Message:
-----------
[NFC][TableGen] Migrate IfDef/Namespace emitter from MLIR to LLVM (#161744)
Commit: f3703f36ee5cf09b0fe86a25270d5923deb43788
https://github.com/llvm/llvm-project/commit/f3703f36ee5cf09b0fe86a25270d5923deb43788
Author: Owen Anderson <resistor at mac.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/utils/TableGen/CompressInstEmitter.cpp
Log Message:
-----------
[TableGen] Look up registers directly in the CodeGenRegBank in CompressInstEmitter, rather than indirecting via the name. (#161853)
The previous code was subtly incorrect, as it indexed the RegistersByName map using the tblgen Def name of the register, rather than the AsmName with which the table was initialized. But all of this indirection via the name was unnecessary.
Commit: 679d2b2ab618a1933c5feb216d665b703d80a650
https://github.com/llvm/llvm-project/commit/679d2b2ab618a1933c5feb216d665b703d80a650
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Fix using IRAttribute with nounwind for AMDGPUNoAGPR (#161954)
Don't think this did anything harmful, but it doesn't make sense
to report this as implementing nounwind handling.
Commit: 1f5fa79d26c8a92e35ccca39f6ae5323ad896d9e
https://github.com/llvm/llvm-project/commit/1f5fa79d26c8a92e35ccca39f6ae5323ad896d9e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[Github] Add pr-subscribers-infrastructure notifications (#142697)
This patch sets up the new PRs labeller for a
pr-subscribers-infrastructure team that can be used for recieving
notifications about infrastructure changes in the monorepo. This is
primarily centered around the .ci directory currently where most of the
action is taking place.
Commit: 648e65e2c51b58deb05b70d190f6a55063c93322
https://github.com/llvm/llvm-project/commit/648e65e2c51b58deb05b70d190f6a55063c93322
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
A .github/workflows/llvm-abi-tests.yml
R .github/workflows/llvm-tests.yml
Log Message:
-----------
[Github] Rename llvm-tests.yml workflow (#153866)
This check used to also run tests for everything, but has since been
modified to only run the ABI tests with actual testing being run through
the premerge configuration. This patch renames the workflow to better
reflect this.
Commit: 9e4af2ffa6e7ff4119b3975df76184bacb1fc209
https://github.com/llvm/llvm-project/commit/9e4af2ffa6e7ff4119b3975df76184bacb1fc209
Author: David Green <david.green at arm.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/test/CodeGen/ARM/llround-conv.ll
M llvm/test/CodeGen/ARM/lround-conv.ll
Log Message:
-----------
[ARM] Update and cleanup lround/llround tests. NFC
Similar to f4370fb801aa, the fp16 tests do not work yet.
Commit: 9dcfebfaee2defe51862699e8fa0c48f32916812
https://github.com/llvm/llvm-project/commit/9dcfebfaee2defe51862699e8fa0c48f32916812
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrCDE.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
Log Message:
-----------
[ARM] Auto-decode vpred_n/vpred_r operands (#160282)
Make the operands auto-decodable by adding `bits<0>` fields to
instructions.
Now we try to decode a vpred_n/vpred_r operand only if the instruction
being decoded has one.
We still need post-decoding pass to check/advance VPT state.
Part of #156540.
Commit: cc127f086df8db320f2e07f5fe6a669433e0c5b0
https://github.com/llvm/llvm-project/commit/cc127f086df8db320f2e07f5fe6a669433e0c5b0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/MC/TargetRegistry.h
Log Message:
-----------
[TargetRegistry] Remove deprecated createTargetMachine (#161053)
This was included in the v21 release, so we can reasonably remove it
now. Add a TODO for the other functions that have not yet made it into a
release. It does not cost much to keep them around until the next
release given the small amount of code and should give a little bit of
extra time for some downstreams to migrate.
Commit: 6ee362e1b5eb52421e0e700074c40ff9e7e0205e
https://github.com/llvm/llvm-project/commit/6ee362e1b5eb52421e0e700074c40ff9e7e0205e
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
Log Message:
-----------
[mlir][vector] Simplify rewrite pattern inheriting constructors. NFC. (#161966)
Use the `Base` type alias from
https://github.com/llvm/llvm-project/pull/158433.
Commit: 8a8a589f24e9520db28180b6651b632799513cb5
https://github.com/llvm/llvm-project/commit/8a8a589f24e9520db28180b6651b632799513cb5
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/docs/GitHub.rst
Log Message:
-----------
Update wording for GitHub CI/CD admin requests to direct to the LLVM Infrastructure Area Team (#150462)
(we should probably add some doc pages about governance/area teams/etc
that this
could link to... )
Commit: 85c7cea8aca5bc58a9bc52f79433569d3cf87ca9
https://github.com/llvm/llvm-project/commit/85c7cea8aca5bc58a9bc52f79433569d3cf87ca9
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/TypeSwitch.h
M llvm/unittests/ADT/TypeSwitchTest.cpp
Log Message:
-----------
[ADT] Add `DefaultUnreachable("msg")` to TypeSwitch (#161970)
This is to allow making it explicit that all the cases must be handled.
The error message is customizable.
Something similar was already supported using the conversion operator
for the typed case but less explicit. In the `void` case when
`TypeSwitch` doesn't return anything, this was not possible without a
custom lambda.
Commit: 9bfbff2c22f14d0494d324302bb5df0f7d2a7c45
https://github.com/llvm/llvm-project/commit/9bfbff2c22f14d0494d324302bb5df0f7d2a7c45
Author: Joseph Bak <36170953+josephbak at users.noreply.github.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M mlir/docs/Tutorials/CreatingADialect.md
Log Message:
-----------
[mlir][docs] Fix typo: 'DDR' → 'DRR' in Creating a Dialect tutorial (#161967)
Fixes a small typo in the Creating a Dialect tutorial.
The rewrite rules format should be DRR (Declarative Rewrite Rules), not
DDR.
Commit: e301a7bbe1fb7006b969c54675ec3813b45d82c7
https://github.com/llvm/llvm-project/commit/e301a7bbe1fb7006b969c54675ec3813b45d82c7
Author: Luke Lau <luke at igalia.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Log Message:
-----------
[TTI] Remove getVPMemoryOpCost. NFC (#160838)
No target implements this and nothing calls it. The cost of
vp.load/store/gather/scatter etc. are handled by
BasicTTIImpl::getIntrinsicInstrCost which forwards it onto the
appropriate TTI::getMemoryOpCost/getGatherScatterOpCost etc.
Commit: 24c1bb60e321c16cb8247b45b080b2d5e02a2b31
https://github.com/llvm/llvm-project/commit/24c1bb60e321c16cb8247b45b080b2d5e02a2b31
Author: ssijaric-nv <ssijaric at nvidia.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmInfoELF.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCAsmInfoELF.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
M llvm/test/CodeGen/AArch64/trampoline.ll
M llvm/test/CodeGen/RISCV/rv64-trampoline.ll
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
[MC] Make .note.GNU-stack explicit for the trampoline case (#151754)
In the presence of trampolines, the .note.GNU-stack section is not emitted. The
absence of .note.GNU-stack results in the stack marked executable by some
linkers. But others require an explict .note.GNU-stack section.
The GNU ld 2.43 on x86 machines, for example, issues the following:
missing .note.GNU-stack section implies executable stack
NOTE: This behaviour is deprecated and will be removed in a future version of the linker
On one of the ARM machines, the absence of .note.GNU-stack results in the stack
marked as non-executable:
STACK off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**4
filesz 0x0000000000000000 memsz 0x0000000000000000 flags rw-
This change just emits the explicit .note.GNU-stack and marks it executable if required.
Commit: 795a115d1919966df72079eb3bd82699bfb2fa58
https://github.com/llvm/llvm-project/commit/795a115d1919966df72079eb3bd82699bfb2fa58
Author: Luke Lau <luke at igalia.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/machine-combiner-copy.ll
M llvm/test/CodeGen/AArch64/machine-licm-sub-loop.ll
M llvm/test/CodeGen/AArch64/peephole-and-tst.ll
M llvm/test/CodeGen/AArch64/reserveXreg-for-regalloc.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/ARM/combine-movc-sub.ll
M llvm/test/CodeGen/ARM/extract-bits.ll
M llvm/test/CodeGen/ARM/extract-lowbits.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/SystemZ/llvm.sincos.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination.ll
M llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
M llvm/test/CodeGen/Thumb2/mve-gather-increment.ll
M llvm/test/CodeGen/Thumb2/mve-phireg.ll
M llvm/test/CodeGen/Thumb2/mve-postinc-dct.ll
M llvm/test/CodeGen/Thumb2/mve-qrintrsplat.ll
M llvm/test/CodeGen/Thumb2/mve-scatter-increment.ll
M llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
M llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll
M llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
M llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
M llvm/test/CodeGen/X86/delete-dead-instrs-with-live-uses.mir
M llvm/test/CodeGen/X86/inalloca-invoke.ll
M llvm/test/CodeGen/X86/licm-regpressure.ll
Log Message:
-----------
[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)
In the register allocator we define non-trivial rematerialization as the
rematerlization of an instruction with virtual register uses.
We have been able to perform non-trivial rematerialization for a while,
but it has been prevented by default unless specifically overriden by
the target in `TargetTransformInfo::isReMaterializableImpl`. The
original reasoning for this given by the comment in the default
implementation is because we might increase a live range of the virtual
register, but we don't actually do this.
LiveRangeEdit::allUsesAvailableAt makes sure that we only rematerialize
instructions whose virtual registers are already live at the use sites.
https://reviews.llvm.org/D106408 had originally tried to remove this
restriction but it was reverted after some performance regressions were
reported. We think it is likely that the regressions were caused by the
fact that the old isTriviallyReMaterializable API sometimes returned
true for non-trivial rematerializations.
However https://github.com/llvm/llvm-project/pull/160377 recently split
the API out into a separate non-trivial and trivial version and updated
the call-sites accordingly, and
https://github.com/llvm/llvm-project/pull/160709 and #159180 fixed
heuristics which weren't accounting for the difference between
non-trivial and trivial.
With these fixes in place, this patch proposes to again allow
non-trivial rematerialization by default which reduces a significant
amount of spills and reloads across various targets.
For llvm-test-suite built with -O3 -flto, we get the following geomean
reduction in reloads:
- arm64-apple-darwin: 11.6%
- riscv64-linux-gnu: 8.1%
- x86_64-linux-gnu: 6.5%
Commit: 074308c64ba10a3346c65deda67501e7bfc58eaa
https://github.com/llvm/llvm-project/commit/074308c64ba10a3346c65deda67501e7bfc58eaa
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M orc-rt/unittests/CMakeLists.txt
R orc-rt/unittests/CommonTestUtils.cpp
M orc-rt/unittests/CommonTestUtils.h
M orc-rt/unittests/bind-test.cpp
Log Message:
-----------
[orc-rt] Support multiple copies of OpCounter unittest utility. (#161985)
This commit templatizes OpCounter with a size_t argument, allowing
multiple copies of OpCounter to be easily created. This functionality
will be used in upcoming unit tests that need to count operations on
several types at once.
Commit: 8181c3deae482769937bdcee68f381df4141eb24
https://github.com/llvm/llvm-project/commit/8181c3deae482769937bdcee68f381df4141eb24
Author: Twice <twice at apache.org>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/python/integration/dialects/pdl.py
Log Message:
-----------
[MLIR][Python] Expose the insertion point of pattern rewriter (#161001)
In [#160520](https://github.com/llvm/llvm-project/pull/160520), we
discussed the current limitations of PDL rewriting in Python (see [this
comment](https://github.com/llvm/llvm-project/pull/160520#issuecomment-3332326184)).
At the moment, we cannot create new operations in PDL native (python)
rewrite functions because the `PatternRewriter` APIs are not exposed.
This PR introduces bindings to retrieve the insertion point of the
`PatternRewriter`, enabling users to create new operations within Python
rewrite functions. With this capability, more complex rewrites e.g. with
branching and loops that involve op creations become possible.
---------
Co-authored-by: Maksim Levental <maksim.levental at gmail.com>
Commit: 3e78c313bcfa54f8d1f1bdf221611d461e56111c
https://github.com/llvm/llvm-project/commit/3e78c313bcfa54f8d1f1bdf221611d461e56111c
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/exp2.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/common_constants.h
A libc/src/__support/math/exp2.h
M libc/src/math/generic/CMakeLists.txt
R libc/src/math/generic/common_constants.cpp
R libc/src/math/generic/common_constants.h
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/expm1.cpp
M libc/src/math/generic/expm1f.cpp
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/log_range_reduction.h
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/pow.cpp
M libc/src/math/generic/powf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor exp2 implementation to header-only in src/__support/math folder. (#161297)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 92d83134b44161cad50198e663b543b46d25b45a
https://github.com/llvm/llvm-project/commit/92d83134b44161cad50198e663b543b46d25b45a
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix concept paramater mapping and caching (#161994)
This expression is not handled by default in RAV, so our parameter
mapping and cache mechanism don't work when it appears in a template
argument list.
There are a few other expressions, such as PackIndexingExpr and
FunctionParmPackExpr, which are also no-ops by default. I don't have a
test case for them now, so let's leave those until users complain :/
There was also a bug in updating the parameter mapping, where the
AssociatedDecl was not updated accordingly.
Also also, this fixes another regression reported in
https://github.com/llvm/llvm-project/pull/161671#issuecomment-3367225480,
where we failed to account for the variable initializer in cache
profiling.
Relies on #161671
Fixes https://github.com/llvm/llvm-project/issues/161983
Fixes https://github.com/llvm/llvm-project/issues/161987
Commit: c41611bacb0ca72a283accd7680061421454e152
https://github.com/llvm/llvm-project/commit/c41611bacb0ca72a283accd7680061421454e152
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-gep.ll
Log Message:
-----------
[InstCombine] Fix pointer replacement in `foldSelectValueEquivalence` (#161701)
Closes https://github.com/llvm/llvm-project/issues/161636.
Compile-time impact (+0.06%):
https://llvm-compile-time-tracker.com/compare.php?from=c2ef022aa7413ddc9aba48fa6fbe6fbd0cb14e19&to=9a0f0302efc30580136d191e66bac929f08ee25f&stat=instructions%3Au
I used to disable this fold for pointers, because I cannot construct a
positive test that is covered by `foldSelectValueEquivalence ` but not
covered by `simplifySelectWithICmpCond`. But the IR diff shows we still
benefit from the fold in InstCombine:
+ Bail out on pointers:
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2880
+ This patch: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2882
Commit: a7414796c0854a9e6f649d922a58aa63147ae2e4
https://github.com/llvm/llvm-project/commit/a7414796c0854a9e6f649d922a58aa63147ae2e4
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[MachineScheduler] Convert some of the debug prints into using LDBG. NFC (#161997)
These lines are heavily skewed and hard to read. Using the new LDBG
there instead.
NFC.
Commit: 505956eeb0943461f9f0c10f0cca0da185fa142d
https://github.com/llvm/llvm-project/commit/505956eeb0943461f9f0c10f0cca0da185fa142d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/test/Parser/cxx0x-lambda-expressions.cpp
M clang/test/SemaCXX/diagnose_if.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
Log Message:
-----------
[Clang] Use the templated declaration for DiagnoseUseOfDecl (#161900)
We missed the check of diagnose_if attributes for the constructor
templates, because we used the template declaration, rather than its
templated one.
Also, we can avoid the duplicate constraint checking because it's
already performed in overload resolution.
There are some diagnostic regressions, all of which are warnings for
uses of lambdas in C++03 mode, which I believe we should still diagnose.
Fixes https://github.com/llvm/llvm-project/issues/160776
Commit: 8dac6e28c951b33659f1f1f80e0dd553788abaab
https://github.com/llvm/llvm-project/commit/8dac6e28c951b33659f1f1f80e0dd553788abaab
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/builtin-assume-aligned.cpp
Log Message:
-----------
Reapply "[clang] Convert second arg of __builtin_assume_aligned to Co… (#161945)
…nstantExpr (#161314)" (#161719)
This reverts commit f1650cf91b01470ce44f47797663d59f00828493.
Commit: 5284c83a8ff143b2d93853d1209f06d7d571f865
https://github.com/llvm/llvm-project/commit/5284c83a8ff143b2d93853d1209f06d7d571f865
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
Revert "[MachineScheduler] Convert some of the debug prints into using LDBG. NFC (#161997)"
This reverts commit a7414796c0854a9e6f649d922a58aa63147ae2e4.
This breaks builds:
3355 | << SchedModel->getResourceName(CurrZone.getZoneCritResIdx()) << "\n";
| ~~~~~~~~~~ ^
/home/buildbot/workspace/bolt-aarch64-ubuntu-clang/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:3358:51: error: no member named 'getResourceName' in 'llvm::TargetSchedModel'
3358 | LDBG() << " RemainingLimit: " << SchedModel->getResourceName(OtherCritIdx)
| ~~~~~~~~~~ ^
2 errors generated.
E.g. https://lab.llvm.org/buildbot/#/builders/128/builds/7522
Commit: e8489c162b32d9bc458a0ec779b69a23c9de478d
https://github.com/llvm/llvm-project/commit/e8489c162b32d9bc458a0ec779b69a23c9de478d
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] WrapperFunction::handle: add by-ref args, minimize temporaries. (#161999)
This adds support for WrapperFunction::handle handlers that take their
arguments by reference, rather than by value.
This commit also reduces the number of temporary objects created to
support SPS-transparent conversion in SPSWrapperFunction.
Commit: 0338350ccb506020529259427ec1c66ca6569749
https://github.com/llvm/llvm-project/commit/0338350ccb506020529259427ec1c66ca6569749
Author: Maxime Arthaud <maxime at arthaud.me>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/lib/IR/Core.cpp
M llvm/tools/llvm-c-test/debuginfo.c
Log Message:
-----------
[llvm-c] Add missing nullptr check in LLVMGetFirstDbgRecord (#151101)
I'm using the LLVM C bindings through the llvm-sys rust crate, and
noticed that LLVMGetFirstDbgRecord and LLVMGetLastDbgRecord are
segfault-ing when called on instructions without debug markers. I found
out it's missing a null pointer check. This PR fixes the issue.
Commit: ca5ece89394f64ab814032d9562b2e4770160523
https://github.com/llvm/llvm-project/commit/ca5ece89394f64ab814032d9562b2e4770160523
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstSimplify/domcondition.ll
Log Message:
-----------
[InstSimplify] Simplify fcmp implied by dominating fcmp (#161090)
This patch simplifies an fcmp into true/false if it is implied by a
dominating fcmp.
As an initial support, it only handles two cases:
+ `fcmp pred1, X, Y -> fcmp pred2, X, Y`: use set operations.
+ `fcmp pred1, X, C1 -> fcmp pred2, X, C2`: use `ConstantFPRange` and
set operations.
Note: It doesn't fix https://github.com/llvm/llvm-project/issues/70985,
as the second fcmp in the motivating case is not dominated by the edge.
We may need to adjust JumpThreading to handle this case.
Comptime impact (~+0.1%):
https://llvm-compile-time-tracker.com/compare.php?from=a728f213c863e4dd19f8969a417148d2951323c0&to=8ca70404fb0d66a824f39d83050ac38e2f1b25b9&stat=instructions:u
IR diff: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2848
Commit: 90d5795a3da3c336bda3c9f9c2f85210395cf676
https://github.com/llvm/llvm-project/commit/90d5795a3da3c336bda3c9f9c2f85210395cf676
Author: Pranav Kant <prka at google.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
R llvm/test/CodeGen/AMDGPU/.#llvm.amdgcn.smfmac.gfx950.ll
Log Message:
-----------
[NFC] Remove accidently added file in #161758 (#161991)
Commit: f61789f5f6788322d8864f2c32021fd552f3f7b4
https://github.com/llvm/llvm-project/commit/f61789f5f6788322d8864f2c32021fd552f3f7b4
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/include/llvm/ADT/StringSwitch.h
M llvm/unittests/ADT/StringSwitchTest.cpp
Log Message:
-----------
[ADT] Add `DefaultUnreachable("msg")` to StringSwitch (#161976)
Similar to TypeSwitch (#161970), allow for explicit unreachable default
case with a custom error message on unhandled cases.
StringSwitch already allowed for checking if any of the cases matched
with the conversion operator, but `DefaultUnreachable` is more explicit
and allows for a custom message.
Commit: 1d01a8473908cf3422fee4905fcf82f160ae0be0
https://github.com/llvm/llvm-project/commit/1d01a8473908cf3422fee4905fcf82f160ae0be0
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Indent literal block properly (NFC)
Commit: 2ef3771175ff36e8a14a949e35fbba24f5ff3e73
https://github.com/llvm/llvm-project/commit/2ef3771175ff36e8a14a949e35fbba24f5ff3e73
Author: Ivan Dzuhan <nadare2357 at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[docs] Fix enumeration in GettingStarted.rst (#96684)
Commit: 76cff3bcdbe945c053f4c3a7d9c99c7c2ae2bb10
https://github.com/llvm/llvm-project/commit/76cff3bcdbe945c053f4c3a7d9c99c7c2ae2bb10
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M clang/include/clang/Sema/SemaConcept.h
Log Message:
-----------
[clang][Sema] NormalizedConstraint - fix MSVC "not all control paths return a value" warnings. NFC. (#162004)
Commit: 1af06cb636c780b2f24f247f0efc0576e411d9c4
https://github.com/llvm/llvm-project/commit/1af06cb636c780b2f24f247f0efc0576e411d9c4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode] interp__builtin_ia32_pshuf - modulo lane index to allow reuse of PSHUFD/LW/HW mask decode. NFC (#162006)
Removes need to offset PSHUFHW land index to extract the shuffle mask element.
Commit: 3149a7720f714c14f7e6320745d9e35f49dba62b
https://github.com/llvm/llvm-project/commit/3149a7720f714c14f7e6320745d9e35f49dba62b
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/struct.cpp
Log Message:
-----------
[CIR] Implement DesignatedInitUpdateExpr for AggregateExpr (#161897)
Implement the DesignatedInitUpdateExpr support for AggregateExpr
Commit: 94eade61a02ae5fc6e7e19f1aff8c0eeb0b0d0a0
https://github.com/llvm/llvm-project/commit/94eade61a02ae5fc6e7e19f1aff8c0eeb0b0d0a0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
Revert "[VPlan] Match legacy CM in ::computeCost if load is used by load/store."
This reverts commit 1d65d9ce06fef890389e61990d9c748162334e55 to fix
crashes, reported in the commits
Commit: f80c0baf058dbdc54d413cdc56a6c551dfa66387
https://github.com/llvm/llvm-project/commit/f80c0baf058dbdc54d413cdc56a6c551dfa66387
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Revert "Reapply "[VPlan] Compute cost of more replicating loads/stores in ::computeCost. (#160053)" (#161724)"
This reverts commit 8f2466bc72a5ab163621cb1bf4bf53a27f1cefe7 to fix
crashes reported in commits
Commit: 718ef3427a2ddd09122e2185962e4b241848d8b9
https://github.com/llvm/llvm-project/commit/718ef3427a2ddd09122e2185962e4b241848d8b9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/tools/llvm-c-test/debuginfo.c
Log Message:
-----------
[llvm-c-test] Fix warnings
This patch fixes:
llvm/tools/llvm-c-test/debuginfo.c:330:20: error: unused variable
'Phi1FirstDbgRecord' [-Werror,-Wunused-variable]
llvm/tools/llvm-c-test/debuginfo.c:332:20: error: unused variable
'Phi1LastDbgRecord' [-Werror,-Wunused-variable]
Commit: e543ca685791b7424fb99187507fd555ff7832d4
https://github.com/llvm/llvm-project/commit/e543ca685791b7424fb99187507fd555ff7832d4
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector][nfc] Add comments in tests (#160106)
Small follow-up for https://github.com/llvm/llvm-project/pull/158528,
otherwise it's not clear what makes the updated tests "negative".
Commit: 2121bda3424d7d8a18b4cd6718514be9bef5932e
https://github.com/llvm/llvm-project/commit/2121bda3424d7d8a18b4cd6718514be9bef5932e
Author: Andrey Ali Khan Bolshakov <bolsh.andrey at yandex.ru>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/DeclPrinter.cpp
M clang/test/AST/ast-print-record-decl.c
Log Message:
-----------
[clang][AST] Don't print inherited default template args (#161953)
Prior to this change, for the code like this:
```cpp
template <int, int = 0>
class Tpl;
template <int = 0, int>
class Tpl;
```
pretty-printing produced an uncompilable code:
```cpp
template <int, int = 0> class Tpl;
template <int = 0, int = 0> class Tpl;
```
Commit: 3ae7af70ce633f1dd552dc7ba3f1b000c66fc821
https://github.com/llvm/llvm-project/commit/3ae7af70ce633f1dd552dc7ba3f1b000c66fc821
Author: Yixuan Cao <caoyixuan2019 at email.szu.edu.cn>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/wcscat.cpp
M compiler-rt/test/asan/TestCases/wcscpy.cpp
M compiler-rt/test/asan/TestCases/wcsncat.cpp
M compiler-rt/test/asan/TestCases/wcsncpy.cpp
Log Message:
-----------
Revert "[compiler-rt][asan][tests] Stabilize wchar tests on Darwin/Android" (#162001)
Reverts llvm/llvm-project#161624
Commit: c793782b03aba045f3b8ae6aa90b7bb7b9579a09
https://github.com/llvm/llvm-project/commit/c793782b03aba045f3b8ae6aa90b7bb7b9579a09
Author: Thurston Dang <thurston at google.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_interceptors.h
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
R compiler-rt/test/asan/TestCases/wcscat.cpp
R compiler-rt/test/asan/TestCases/wcscpy.cpp
R compiler-rt/test/asan/TestCases/wcsncat.cpp
R compiler-rt/test/asan/TestCases/wcsncpy.cpp
Log Message:
-----------
Revert "[compiler-rt][asan] Add wcscpy/wcsncpy; enable wcscat/wcsncat on Windows" (#162021)
Reverts llvm/llvm-project#160493 due to buildbot failures e.g.,
https://github.com/llvm/llvm-project/pull/160493#issuecomment-3357314356
The fix-forward (https://github.com/llvm/llvm-project/pull/161624) still
had failures on Darwin, and was reverted in
https://github.com/llvm/llvm-project/pull/162001 i.e., this pull request
completes the revert to green for this patch stack.
Commit: 4a2f29dd0ccbb378a7c0698a51f3dc42ee615ff4
https://github.com/llvm/llvm-project/commit/4a2f29dd0ccbb378a7c0698a51f3dc42ee615ff4
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaTemplate/alias-template-deprecated.cpp
M clang/test/SemaTemplate/alias-templates.cpp
Log Message:
-----------
[clang] don't print redundant context notes when instantiating alias templates (#161986)
The redundant notes were introduced with the workaround for finding the
template instantiationa args for lambdas inside template type aliases.
This removes the notes for the cases where we are simply instantiating
an outer template, and when diagnosing uses of the alias template.
Also adds comments calling the workaround explicitly.
Commit: c40ee0f32218be0e7f0abd43f96f2f65d2bb1a2a
https://github.com/llvm/llvm-project/commit/c40ee0f32218be0e7f0abd43f96f2f65d2bb1a2a
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
Reapply "[MemProf] Add ambigous memprof attribute" (#161717) (#161918)
Reapply llvm/llvm-project#157204 with fix and a new test for the issue
it caused (the test change provoked the assert that was converted to an
if condition).
Also, make the application of this new attribute under an (on by
default) flag, so that it can be more easily disabled if needed. Add
test for the new flag.
Commit: 99d802a3332b25deae1c8c2be5b8875ba9926a4a
https://github.com/llvm/llvm-project/commit/99d802a3332b25deae1c8c2be5b8875ba9926a4a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
Log Message:
-----------
[flang][cuda] Fix linkage for dynamic shared memory (#161940)
Commit: 2e6da800484d9cf5a75a9a57919f855d7de70d42
https://github.com/llvm/llvm-project/commit/2e6da800484d9cf5a75a9a57919f855d7de70d42
Author: Yixuan Cao <caoyixuan2019 at email.szu.edu.cn>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_interceptors.h
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
A compiler-rt/test/asan/TestCases/wcscat.cpp
A compiler-rt/test/asan/TestCases/wcscpy.cpp
A compiler-rt/test/asan/TestCases/wcsncat.cpp
A compiler-rt/test/asan/TestCases/wcsncpy.cpp
Log Message:
-----------
[compiler-rt][asan] Reland: wcscpy/wcsncpy interceptors and stabilize wchar tests on Darwin/Android (#162028)
### Summary
Reland: wcscpy/wcsncpy interceptors and stabilize wchar tests on
Darwin/Android. Functional reland (runtime + tests).
### Context
Reland of #160493 and #161624; previously reverted by #162021 and
#162001 to restore green.
### Motivation
- Restore wchar interceptors (wcscpy/wcsncpy), broaden ASan coverage,
and improve Windows parity with narrow-string checks.
- Make tests robust across Darwin/Android to keep bots green.
### Runtime (wcscpy/wcsncpy)
- Add overlap checks; mark read/write ranges in bytes.
- Use MaybeRealWcsnlen when available to bound reads.
- Register Windows static runtime thunk where applicable.
### Tests (wcscpy/wcsncpy/wcscat/wcsncat)
- Android: keep `%env_asan_opts=log_to_stderr=1` so the ASan header is
on stderr.
- Darwin: tolerate reordering by putting all four key lines in one DAG
group:
```cpp
// CHECK-DAG: Good so far.
// CHECK-DAG: ERROR: AddressSanitizer: stack-buffer-overflow on address [[ADDR:...]] at pc {{...}} bp {{...}} sp {{...}}
// CHECK-DAG: WRITE of size {{[0-9]+}} at [[ADDR]] thread T0
// CHECK-DAG: #0 {{0x[0-9a-f]+}} in <func>
```
### Risk
- Functional reland (runtime + tests), intended to restore functionality
and maintain stability across platforms.
---------
Signed-off-by: Yixuan Cao <caoyixuan2019 at email.szu.edu.cn>
Commit: 6f3d765d04041412e9801187eb261253c3ceb2a1
https://github.com/llvm/llvm-project/commit/6f3d765d04041412e9801187eb261253c3ceb2a1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
libclc: Add gfx1250 and gfx1251 to amdgpu target list (#162034)
Commit: 1f82e818faac8a2ff868ec364ce1f3de5ceebf2d
https://github.com/llvm/llvm-project/commit/1f82e818faac8a2ff868ec364ce1f3de5ceebf2d
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/convert-sm103a.ll
Log Message:
-----------
[clang][NVPTX] Add intrinsics and builtins for CVT RS rounding mode (#160494)
This change adds LLVM intrinsics and clang builtins for the `cvt`
RS rounding mode instruction variants.
Tests are added in `convert-sm103a.ll` and verified through ptxas-13.0.
Commit: 6b1604ac30082cd7316f06c2b904cb23af95468e
https://github.com/llvm/llvm-project/commit/6b1604ac30082cd7316f06c2b904cb23af95468e
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/netinet-in-macros.h
A libc/include/netinet/in.h.def
A libc/include/netinet/in.yaml
M libc/test/include/CMakeLists.txt
A libc/test/include/netinet_in_test.cpp
Log Message:
-----------
[libc] add IPPROTO related macros (#161855)
Commit: 36cfdebe927c34508c1e245b459da43b745ae620
https://github.com/llvm/llvm-project/commit/36cfdebe927c34508c1e245b459da43b745ae620
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Add method-wrapper utils for use with WrapperFunction::handle. (#162035)
WrapperFunction::handleWithAsyncMethod can be used to wrap asynchronous
methods (void methods whose first arguments are Return callbacks) for
use with WrapperFunction::handle.
WrapperFunction::handleWithSyncMethod can be used to wrap regular
(non-asynchronous) methods for use with WrapperFunction::handle.
Both variants return function objects that take a Return callback as
their first argument, and an ExecutorAddr representing the address of
the instance to call the object on. For asynchronous methods the
resulting function object (AsyncMethod<method-ptr>) forwards the Return
callback through to the method. For synchronous methods the method is
called and the result passed to the Return callback.
Commit: bbdcba9b851abe37cf2b10ec6d9b50c12cdd3604
https://github.com/llvm/llvm-project/commit/bbdcba9b851abe37cf2b10ec6d9b50c12cdd3604
Author: dianqk <dianqk at dianqk.net>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/Coroutines/coro-catchswitch-cleanuppad.ll
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
M llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll
Log Message:
-----------
[SimplifyCFG] Fold the contiguous wrapping cases into ICmp. (#161000)
Fixes #157113.
Take the following IR as an example; we know the destination of the `[1,
3]` cases is `%else`.
```llvm
define i32 @src(i8 range(i8 0, 6) %arg) {
switch i8 %arg, label %else [
i8 0, label %if
i8 4, label %if
i8 5, label %if
]
if:
ret i32 0
else:
ret i32 1
}
```
We can first try the non-wrapping range for both destinations, but I
don't see how that would be any better.
Proof: https://alive2.llvm.org/ce/z/acdWD4.
Commit: bea0225c304e3f8efbca48f8c5ee4b39d8f42e0d
https://github.com/llvm/llvm-project/commit/bea0225c304e3f8efbca48f8c5ee4b39d8f42e0d
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[AMDGPU] Make cluster a target feature (#162040)
This replaces the original arch check.
Commit: a406eb460c05e1171971ed1dace2546e3901eb61
https://github.com/llvm/llvm-project/commit/a406eb460c05e1171971ed1dace2546e3901eb61
Author: Luo, Yuanke <lyk_03 at hotmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCUDA/vararg.cu
Log Message:
-----------
[CUDA] Remove CUDAAllowVariadicFunctions option and its sema check (#161350)
Variadic argument for NVPTX has been support in
https://github.com/llvm/llvm-project/commit/486d00eca6b6ab470e8324b52cdf9f32023c1c9a
We can remove `CUDAAllowVariadicFunctions` option and its sema check. The CC1 option
`fcuda_allow_variadic_functions` is retained to not break the existing code building.
---------
Co-authored-by: Yuanke Luo <ykluo at birentech.com>
Commit: 550b2ef041ba16ee8b5f55b5f2307f501b2c15a0
https://github.com/llvm/llvm-project/commit/550b2ef041ba16ee8b5f55b5f2307f501b2c15a0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M lldb/unittests/Target/CMakeLists.txt
R lldb/unittests/Target/Language.cpp
A lldb/unittests/Target/LanguageTest.cpp
Log Message:
-----------
[lldb][test][NFC] Rename Language.cpp to LanguageTest.cpp
So it's consistent with the other tests in this directory.
Also aligns with the source file header comment.
Commit: 5e92e7f4c0fb9ab92572fb974591d52266be8fc6
https://github.com/llvm/llvm-project/commit/5e92e7f4c0fb9ab92572fb974591d52266be8fc6
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/test/Transforms/SCCP/relax-range-checks.ll
Log Message:
-----------
[SCCP] Strengthen two-instruction range checks (#162008)
This patch implements the todo discussed in
https://github.com/llvm/llvm-project/pull/158495#discussion_r2349609838.
It also fixes a regression introduced by
https://github.com/llvm/llvm-project/pull/161000. See also
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2890#discussion_r2404016316.
IR diff: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2892
Commit: 7185dd66c7740159797834d57e52cfe38cf6e050
https://github.com/llvm/llvm-project/commit/7185dd66c7740159797834d57e52cfe38cf6e050
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmi2vl.s
Log Message:
-----------
[X86][AVX512] Add missing mayLoad attribute to AVX512 instructions (#162036)
Fixes crashes reported in #157034.
Commit: 732a3662736db4ef75b02ddbcdad23385446cea9
https://github.com/llvm/llvm-project/commit/732a3662736db4ef75b02ddbcdad23385446cea9
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Log Message:
-----------
[NFC][AArch64] Flatten a branch on AArch64InstrInfo::copyPhysReg (#161138)
Simplifies the code and improves readability.
Commit: ebbc0e97b991c98bbcacf3d49b54685ef1a73188
https://github.com/llvm/llvm-project/commit/ebbc0e97b991c98bbcacf3d49b54685ef1a73188
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
A llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
Log Message:
-----------
[AMDGPU] Remove subtarget features for dynamic VGPRs (#160822)
Users of the backend are expected to enable dynamic VGPRs via the
`amdgpu-dynamic-vgpr-block-size` attribute instead of the subtarget
features (see https://github.com/llvm/llvm-project/pull/133444).
Commit: e573c795e4938440aa1ddb0371568be69eb08390
https://github.com/llvm/llvm-project/commit/e573c795e4938440aa1ddb0371568be69eb08390
Author: rdez13 <140968532+rdez13 at users.noreply.github.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][x86][bytecode] Replace interp__builtin_rotate with static bool interp__builtin_elementwise_int_binop callback #160289 (#161924)
Fixes #160289
Commit: bd8a7f9ef394c7f722fc8ae3f852311550669e56
https://github.com/llvm/llvm-project/commit/bd8a7f9ef394c7f722fc8ae3f852311550669e56
Author: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/wmma-ptx87-sm120a.py
M llvm/test/CodeGen/NVPTX/wmma.py
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVPTX] Added more MMA intrinsics for F8F6F4 and FP64 types. (#156040)
This change adds more MMA intrinsics for F8F6F4 and FP64 types. The implementation is based on [PTX ISA version 9.0](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma). New restrictions were added for dtype/ctype combinations for MMA and sparse MMA intrinsics. MLIR restrictions for dtype/ctype MMA intrinsics were aligned with NVVM IR.
Commit: 38896d67e458cf4d3b5ce0c3742f48e97527c797
https://github.com/llvm/llvm-project/commit/38896d67e458cf4d3b5ce0c3742f48e97527c797
Author: sskzakaria <ssskzakaria at proton.me>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/Headers/avx512vlintrin.h
M clang/test/CodeGen/X86/avx512vl-builtins.c
Log Message:
-----------
[Headers][X86] Add constexpr support for some AVX512 masked extension/truncation intrinsics. (#161984)
The following AVX[512] intrinsics are now constexpr:
* _mm_cvtepi32_epi8
* _mm_cvtepi32_epi16
* _mm_cvtepi64_epi8
* _mm_cvtepi64_epi16
* _mm_cvtepi64_epi32
* _mm256_cvtepi32_epi8
* _mm256_cvtepi32_epi16
* _mm256_cvtepi64_epi8
* _mm256_cvtepi64_epi16
* _mm256_cvtepi64_epi32
* _mm256_mask_cvtepi64_epi32
* _mm256_maskz_cvtepi64_epi32
Fixes #154539
Commit: a9dafc9bdcfc1090d0744d0c708c5d133bc0fd84
https://github.com/llvm/llvm-project/commit/a9dafc9bdcfc1090d0744d0c708c5d133bc0fd84
Author: Jonas Hahnfeld <jonas.hahnfeld at cern.ch>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
A clang/test/Modules/pr133057.cpp
Log Message:
-----------
[Sema] Compare canonical conversion function (#154158)
With lazy template loading, it is possible to find non-canonical
FunctionDecls, depending on when redecl chains are completed. This
is a problem for templated conversion operators that would allow to
call either the copy assignment or the move assignment operator.
This ambiguity is resolved by isBetterReferenceBindingKind (called
from CompareStandardConversionSequences) ranking rvalue refs over
lvalue refs.
Unfortunately, this fix is hard to test in isolation without the
changes in https://github.com/llvm/llvm-project/pull/133057 that
make lazy template loading more likely to complete redecl chains
at "inconvenient" times. The added reproducer passes before and
after this commit, but would have failed with the proposed changes
of the linked PR.
Kudos to Maksim Ivanov for providing an initial version of the
reproducer that I further simplified.
Commit: b023ca9ce9359c2195795401c6c146e12db84f0e
https://github.com/llvm/llvm-project/commit/b023ca9ce9359c2195795401c6c146e12db84f0e
Author: Vincent <llvm at viceroygroup.ca>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/docs/PDB/HashTable.rst
Log Message:
-----------
[llvm][docs] Fixed documentation (#158795)
fixes #158643
Commit: af2059791e5f37822cc2984c102d7a0358d58243
https://github.com/llvm/llvm-project/commit/af2059791e5f37822cc2984c102d7a0358d58243
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/AArch64/no-aliasing-ld-str.s
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
Log Message:
-----------
Reapply "[llvm-exegesis] Exclude loads/stores from aliasing instruction set" (#156735) (#159366)
Move the mayLoad/mayStore checks out of hasMemoryOperands; there are
instructions with these properties that don't have operands.
This is relanding 899ee375e99c04ef2c4a67dc70b266c929ad43f4 with a
minor tweak.
Commit: 1bd9c1bde38acddd71bf52fd3748d4c7fc75e8ba
https://github.com/llvm/llvm-project/commit/1bd9c1bde38acddd71bf52fd3748d4c7fc75e8ba
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter-tests/lit.local.cfg
M cross-project-tests/debuginfo-tests/dexter/feature_tests/lit.local.cfg
Log Message:
-----------
[Dexter] Allow retries on all dexter tests to avoid lldb-dap flakiness (#161847)
This isn't pretty but should help us keep the bot stable while issues
such as #158306 and #158311 are investigated
Commit: 1087c1079f870518b6bf6e2f6ed764d3e90611ae
https://github.com/llvm/llvm-project/commit/1087c1079f870518b6bf6e2f6ed764d3e90611ae
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
R mlir/test/Transforms/buffer-results-to-out-params-elim.mlir
A mlir/test/Transforms/buffer-results-to-out-params-hosit-dynamic-allocs.mlir
A mlir/test/Transforms/buffer-results-to-out-params-hosit-static-allocs.mlir
Log Message:
-----------
[mlir][bufferize] Add hoist-dynamic-allocs-option to buffer-results-to-out-params (#160985)
Add hoist-dynamic-allocs-option to buffer-results-to-out-params. This PR
supported that obtain the size of the dynamic shape memref through the
caller-callee relationship.
Commit: a9ca220e8138f39d504faa48ba771dd90fd89838
https://github.com/llvm/llvm-project/commit/a9ca220e8138f39d504faa48ba771dd90fd89838
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
R llvm/test/CodeGen/AArch64/spill-fill-zpr-predicates.mir
M llvm/test/CodeGen/AArch64/ssve-stack-hazard-remarks.ll
Log Message:
-----------
[AArch64][SME] Remove support for `-arch64-enable-zpr-predicate-spills` (#161819)
This was a stop-gap solution until we implemented
`-aarch64-split-sve-objects`. It was never enabled by default, and
likely saw no real-world use.
Let's remove this to reduce the maintenance burden.
Commit: a13ff2cb027eaeffe67241bbc7f7308affb3aae7
https://github.com/llvm/llvm-project/commit/a13ff2cb027eaeffe67241bbc7f7308affb3aae7
Author: Bonsthie <barnabe.bonnet at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/test/CodeGen/X86/GlobalISel/legalize-phi.mir
A llvm/test/CodeGen/X86/GlobalISel/legalize-undef-vec-scaling.mir
A llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier-vec256.mir
A llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier-vec512.mir
A llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier.mir
A llvm/test/CodeGen/X86/GlobalISel/select-freeze-vec256.mir
A llvm/test/CodeGen/X86/GlobalISel/select-freeze-vec512.mir
A llvm/test/CodeGen/X86/GlobalISel/select-freeze.mir
Log Message:
-----------
[X86][GISel] Add missing legalization for G_IMPLICIT_DEF (#161699)
Legalize scalar and vector integer types for `G_IMPLICIT_DEF` at
SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming `G_*_VECTOR`
legalization, since vector inserts/builds rely on undef bases.
Commit: 69761e761c8d37f4fa96af4483c37c436fa7d295
https://github.com/llvm/llvm-project/commit/69761e761c8d37f4fa96af4483c37c436fa7d295
Author: Martin Storsjö <martin at martin.st>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/test/Headers/arm-acle-header.c
M clang/test/Headers/arm-cde-header.c
M clang/test/Headers/arm-cmse-header.c
M clang/test/Headers/arm-fp16-header.c
M clang/test/Headers/arm-neon-header.c
A clang/test/Headers/system_reserved_names.h
M clang/test/Headers/x86-intrinsics-headers-clean.cpp
M clang/test/Headers/x86-intrinsics-headers.c
Log Message:
-----------
[clang] [test] Verify that intrinsic headers don't use unreserved names (#161817)
This mirrors a similar test that libcxx does, to make sure that the
libcxx headers don't use any unreserved symbols.
The header for polluting with defines is based very far on the libcxx
one; some parts of it could possibly be omitted, but I included most of
it for completeness here.
This should allow catching these issues earlier, to avoid issues like
#161808 and #98478 happening again.
Commit: 4ab25977ea47c31a8b68fd607ec5f985de722fd4
https://github.com/llvm/llvm-project/commit/4ab25977ea47c31a8b68fd607ec5f985de722fd4
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/SPSWrapperFunction.h
Log Message:
-----------
[orc-rt] Remove incorrect noexcept specifiers.
Conversions between Error/Expected and their serializable counterparts may
throw.
Commit: 93073af121051738937313111e069b61a3bd09db
https://github.com/llvm/llvm-project/commit/93073af121051738937313111e069b61a3bd09db
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[LV] Move 3 functions into VPlanTransforms (NFC) (#158644)
Two of them are actually transforms, and the third is a dependent
static.
Commit: 830373372c6e6776149948dd8d3044f06ce9780f
https://github.com/llvm/llvm-project/commit/830373372c6e6776149948dd8d3044f06ce9780f
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
A openmp/runtime/test/transform/tile/do.F90
A openmp/runtime/test/transform/tile/do_2d.f90
A openmp/runtime/test/transform/tile/do_2d_varsizes.f90
R openmp/runtime/test/transform/tile/intfor.F90
R openmp/runtime/test/transform/tile/intfor_2d.f90
R openmp/runtime/test/transform/tile/intfor_2d_varsizes.F90
A openmp/runtime/test/transform/unroll/heuristic_do.f90
R openmp/runtime/test/transform/unroll/heuristic_intdo.f90
Log Message:
-----------
[OpenMP] Clean-up Fortran tests
* Use "do" for DO loops, there is no "for" in Fortran and it is always
integer
* Add -cpp to not rely on file name case
* Add "implicit none" safety
Commit: 23f010f1ab09263d79027c70d5f4cddfe0055ca9
https://github.com/llvm/llvm-project/commit/23f010f1ab09263d79027c70d5f4cddfe0055ca9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[clang] SemaConcept.cpp - fix MSVC "not all control paths return a value" warnings. NFC. (#162060)
Commit: 93408f5312a555bad59c4f75d83970ddb48e07ad
https://github.com/llvm/llvm-project/commit/93408f5312a555bad59c4f75d83970ddb48e07ad
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Log Message:
-----------
[AArch64] determineSVEStackSizes - fix MSVC signed/unsigned comparison failure. NFC. (#162059)
Commit: 913ae2d37219edbf992277ad909a8fddd1c2371a
https://github.com/llvm/llvm-project/commit/913ae2d37219edbf992277ad909a8fddd1c2371a
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/docs/HowToReleaseLLVM.rst
Log Message:
-----------
[llvm][docs] Minor fixes and improvements for release process (#151956)
- The list numbering in [1] currently starts again after item 3 due to
the code-block.
- Remove mentions of Phabricator and Subversion.
- In final step of [2] remove mention of
llvm/utils/git/sync-release-repo.sh, which was removed in #73682.
- Add direct links to:
- www-releases repo.
- backporting doc [3].
- Getting Started page.
- RELEASE_TESTERS.txt.
- Release Sources GitHub workflow.
[1] https://llvm.org/docs/HowToReleaseLLVM.html#create-release-branch
[2]
https://llvm.org/docs/HowToReleaseLLVM.html#triaging-bug-reports-for-releases
[3]
https://llvm.org/docs/GitHub.html#backporting-fixes-to-the-release-branches
Commit: 10da6f05cc4828c02ceebc8d0e2d8fbb03363a12
https://github.com/llvm/llvm-project/commit/10da6f05cc4828c02ceebc8d0e2d8fbb03363a12
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
Log Message:
-----------
[X86] x86-shrink-wrap-unwind.ll - regenerate test checks (#162061)
Commit: 4b05a12e9c0de38f54a6440a2cfe3741780418aa
https://github.com/llvm/llvm-project/commit/4b05a12e9c0de38f54a6440a2cfe3741780418aa
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
Log Message:
-----------
[libc++] Fix simd_unary.pass.cpp with AppleClang
When using AppleClang the `clang` feature flag is not set, but the
compiler supports `-flax-vector-conversions=integer`. This adds another
`ADDITIONAL_COMPILE_FLAGS` for AppleClang to fix the CI.
Commit: 5547c0cff3eec029318317cb263b0ddc37c5bfd0
https://github.com/llvm/llvm-project/commit/5547c0cff3eec029318317cb263b0ddc37c5bfd0
Author: Steven Perron <stevenperron at google.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/hlsl-resources/test_counters.ll
Log Message:
-----------
[SPIRV] Implement LLVM IR and backend for typed buffer counters (#161425)
This commit implements the backend portion of the typed buffer counter
proposal described in
https://github.com/llvm/wg-hlsl/blob/main/proposals/0023-typed-buffer-counters.md.
This is the second part of the implementation, focusing on the LLVM IR
and SPIR-V backend.
Specifically, this commit implements the "LLVM IR Generation and Backend
Handling"
section of the proposal. This includes:
- Adding the `llvm.spv.resource.counterhandlefromimplicitbinding` and
`llvm.spv.resource.counterhandlefrombinding` intrinsics.
- Implementing the selection of these intrinsics in the SPIRV backend to
generate the correct `OpVariable` and `OpDecorate` instructions for
the counter buffer.
- Handling `IncrementCounter` and `DecrementCounter` via a new
`llvm.spv.resource.updatecounter` intrinsic, which is lowered to
`OpAtomicIAdd`.
- Adding a new test file to verify the implementation.
Contributes to https://github.com/llvm/llvm-project/issues/137032
---------
Co-authored-by: Marcos Maronas <marcos.maronas at intel.com>
Commit: 5d7f324614d7a5c0de89cfe8295a9b2b7ef5d073
https://github.com/llvm/llvm-project/commit/5d7f324614d7a5c0de89cfe8295a9b2b7ef5d073
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
Log Message:
-----------
[SLP]Enable Shl as a base opcode in copyables (#156766)
Enables Shl matching for the nodes, where copyable can be modelled as
shl %v, 0
Commit: 1c5186c315fdc6a070c302fe78f0e18122b9038f
https://github.com/llvm/llvm-project/commit/1c5186c315fdc6a070c302fe78f0e18122b9038f
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M openmp/tools/omptest/src/OmptTester.cpp
Log Message:
-----------
[OpenMP][omptest] Enable missing callback (#161650)
The registration of this callback handler was disabled for some reason.
Local testing did not bring up any issues when I enabled it.
Side effect is: Silences current warning about unused function.
Commit: 7f43b80d85758037b61eaec01ef8aac934307dc6
https://github.com/llvm/llvm-project/commit/7f43b80d85758037b61eaec01ef8aac934307dc6
Author: Martin Storsjö <martin at martin.st>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libcxx] [ci] Stop manually installing ninja in the Windows build jobs (#161907)
Ninja is officially included among the preinstalled tools on the Windows
runners now.
This should reduce the risk for stray failures here; sometimes,
attempting to install Ninja through Chocolatey have caused spurious
failures.
Commit: 9a111ff91c5dc7d59e1fc9d35f3e43e1c5699120
https://github.com/llvm/llvm-project/commit/9a111ff91c5dc7d59e1fc9d35f3e43e1c5699120
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Enable transparent SPS conversion for ptrs via ExecutorAddr. (#162069)
Allows SPS wrapper function calls and handles to use pointer arguments.
These will be converted to ExecutorAddr for serialization /
deserialization.
Commit: f8baf07c7cc2c85c2273606ecf5b15bc23228102
https://github.com/llvm/llvm-project/commit/f8baf07c7cc2c85c2273606ecf5b15bc23228102
Author: Lang Hames <lhames at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Clean up SPSWrapperFunction unittest names.
Drop the redundant 'Test' prefix and rename transparent serialization tests to
clarify their purpose.
Commit: 5e07093917fa84b3ee9d09189a34a0c750f68cb7
https://github.com/llvm/llvm-project/commit/5e07093917fa84b3ee9d09189a34a0c750f68cb7
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
Log Message:
-----------
[mlir][spirv] Simplify unreachable default cases in type switch. NFC. (#162010)
Use `DefaultUnreachable` from
https://github.com/llvm/llvm-project/pull/161970.
Commit: fee71a3474ed09eb06a0d2c10edad376cab61ced
https://github.com/llvm/llvm-project/commit/fee71a3474ed09eb06a0d2c10edad376cab61ced
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaUtilOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/variables.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Apply 'Symbol' trait to `tosa.variable` (#153223)
Implement SymbolOpInterface on tosa.variable so that it's declaration is
automatically inserted into its parents SymbolTable.
Verifiers for tosa.variable_read/write can now look up the symbol and
guarantee it exists, and duplicate names are caught at creation time.
Previously this was completed by walking the graph which could be
inefficient.
Unfortunately, the Symbol trait expects to find a symbol name via a
hard-coded attribute name "sym_name". Therefore, "name" is renamed
to"sym_name" and a getName() wrapper is provided for backwards
compatibility.
This change also restricts tosa.variable declarations to ops that carry
a SymbolTable (e.g. modules), rather than allowing them to be placed
inside a func.func.
Note: EXT-VARIABLE is an experimental extension in the TOSA
specification, so is not subject to backwards compatibility guarantees.
Commit: 5296d017381f5bb4e3b29644767b98ce336698ce
https://github.com/llvm/llvm-project/commit/5296d017381f5bb4e3b29644767b98ce336698ce
Author: marius doerner <marius.doerner1 at icloud.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
Log Message:
-----------
[clang][bytecode] Assert on virtual func call from array elem (#158502)
Fixes #152893.
An assert was raised when a constexpr virtual function was called from
an constexpr array element with -fexperimental-new-constant-interpreter
set.
Commit: 8bab6c4e8c4f9a7b32ac5dd94436922c84705a86
https://github.com/llvm/llvm-project/commit/8bab6c4e8c4f9a7b32ac5dd94436922c84705a86
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
M mlir/lib/Tools/PDLL/AST/NodePrinter.cpp
M mlir/lib/Tools/PDLL/AST/Nodes.cpp
M mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
Log Message:
-----------
[mlir] Simplify unreachable type switch cases. NFC. (#162032)
Use `DefaultUnreachable` from
https://github.com/llvm/llvm-project/pull/161970.
Commit: 542cba893018e6c7faebbc5c19e5c10034c160ea
https://github.com/llvm/llvm-project/commit/542cba893018e6c7faebbc5c19e5c10034c160ea
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
A clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
Log Message:
-----------
[OpenACC][CIR] Handle firstprivate bounds recipe lowering (#161873)
These work the same as the other two (private and reduction) except that
the expression for the 'init' is a copy instead of a default/value init,
and in a separate region. This patch gets all of that correct, and
ensures we generate these as expected.
There is a little extra work to make sure that the bounds-loop
generation does 2 separate array index operations, otherwise this is
very much like the reduction implementation.
Commit: c6a4e84a10ae8b163c9cae3f9a49eb8077a499ff
https://github.com/llvm/llvm-project/commit/c6a4e84a10ae8b163c9cae3f9a49eb8077a499ff
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
Log Message:
-----------
AMDGPU: Remove unnecessary reference (#162085)
Commit: f31bc666f42bb6bf0a3312a1d2ec230c390e8171
https://github.com/llvm/llvm-project/commit/f31bc666f42bb6bf0a3312a1d2ec230c390e8171
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/IR/Globals.cpp
A llvm/test/Bitcode/thinlto-alias-addrspacecast.ll
Log Message:
-----------
[IR] Handle addrspacecast in findBaseObject() (#162076)
Make findBaseObject() look through addrspacecast, so that
getAliaseeObject() works with an aliasee that uses and addrspacecast.
This fixes a crash during module summary index emission.
Fixes https://github.com/llvm/llvm-project/issues/161646.
Commit: f3a952311c9d7cfe56fefe14c3ece777f679b164
https://github.com/llvm/llvm-project/commit/f3a952311c9d7cfe56fefe14c3ece777f679b164
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/pr162009.ll
Log Message:
-----------
[AArch64] Return Invalid partial reduction cost for i128 accumulator. (#162066)
PR #158641 introduced an issue where i128 accumulator types resulted
in a valid cost, because for a <2 x i128> type the code that
checks for unsupported type legalization would see a type action
of 'TypeSplitVector' which is supported, even though the legalised
type of <1 x i128> would require further scalarization.
This fixes https://github.com/llvm/llvm-project/issues/162009
Commit: 48db3fd7026737d0fefe376e08ffee2ad996163a
https://github.com/llvm/llvm-project/commit/48db3fd7026737d0fefe376e08ffee2ad996163a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
Log Message:
-----------
AMDGPU: Stop handling AGPR case in getCrossCopyRegClass (#161800)
This isn't what this is for. In the sense this hook is concerned with,
you can copy between AGPRs. This only changes some DAG scheduling
decisions; later passes are responsible for dealing with the bad
agpr-agpr handling.
Commit: 4efe170d858eb54432f520abb4e7f0086236748b
https://github.com/llvm/llvm-project/commit/4efe170d858eb54432f520abb4e7f0086236748b
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/AArch64/no-aliasing-ld-str.s
Log Message:
-----------
[llvm-exegesis] Disable load store aliasing test
Test added by #159366
This is causing objdump to crash more often than not on our 2 stage
SVE bots, disabling it and I will investigate tomorrow.
Could be the changes in the PR, or a pre-existing codegen or
llvm-objdump problem.
Commit: 919470311fbdf366e25156ea20227ac5b76ad618
https://github.com/llvm/llvm-project/commit/919470311fbdf366e25156ea20227ac5b76ad618
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
Log Message:
-----------
clang/AMDGPU: Report some missing OpenCL 2.0 feature macros (#160826)
Report __opencl_c_program_scope_global_variables and
__opencl_c_device_enqueue as supported. These 2.0 features are
supported but were missing from the extension map.
__opencl_c_atomic_scope_all_devices should also be reported, but
that seems to not just work by adding it to the map for some
reason.
The existing test for these macros was also broken, since it was
missing CL3.0 run lines, so add those.
Commit: 47d74ca157b4381c98ec92aaf4c5c6303e5da387
https://github.com/llvm/llvm-project/commit/47d74ca157b4381c98ec92aaf4c5c6303e5da387
Author: Usha Gupta <usha.gupta at arm.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionAttrs.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_libfunc_address_taken.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_libfunc_no_address_taken.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_lto.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_multi_scc_indirect_recursion.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_multi_scc_indirect_recursion1.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_multinode_refscc.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_self_recursive_callee.ll
Log Message:
-----------
[FuncAttrs][LTO] Relax norecurse attribute inference during postlink LTO (#158608)
This PR, which supersedes
https://github.com/llvm/llvm-project/pull/139943, extends the scenarios
where the 'norecurse' attribute can be inferred.
Currently, the 'norecurse' attribute is only inferred if all called
functions also have this attribute. This change introduces a new pass in
the LTO pipeline, run after Whole Program Devirtualization, to broaden
the inference criteria. The new pass inspects all functions in the
module and sets a flag if any functions are external or have their
addresses taken (while ignoring those already marked norecurse). This
flag is then used with the existing conditions to enable inference in
more cases.
This enhancement allows 'norecurse' to be applied in situations where a
function calls a recursive function, but is not part of the same
recursion chain.
For example, foo can now be marked 'norecurse' in the following
scenarios:
`foo -> callee1 -> callee2 -> callee2`
In this case, foo and callee1 can both be marked 'norecurse' because
they're not part of the callee2 recursion.
Similarly, foo can be marked 'norecurse' here:
`foo -> callee1 -> callee2 -> callee1`
Here, foo is not part of the callee1 -> callee2 -> callee1 recursion
chain, so it can be marked 'norecurse'.
Commit: 6b5fecf93bb330079fd91f5729ef0eedb288c3a9
https://github.com/llvm/llvm-project/commit/6b5fecf93bb330079fd91f5729ef0eedb288c3a9
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/test/Dialect/Transform/ops-invalid.mlir
Log Message:
-----------
[mlir] transform dialect: don't crash in verifiers (#161098)
Fix crashes in the verifier of `transform.with_named_sequence` attribute
attached to a symbol table operation caused by it constructing a call
graph inside the symbol table. The call graph construction assumes calls
and callables, such as functions or named sequences, have been verified,
but it is not yet the case when the attribute verifier on the (parent)
symbol table operation runs. Trigger such verification manually before
constructing the call graph. This adds redundancy in verification, but
there is currently no mechanism to change the order of verificaiton. In
performance-critical scenarios, verification can be disabled altogether.
Remove unnecessary verfificaton from `transform::IncludeOp::getEffects`.
It was introduced along with the op definition as the op used to inspect
the body of callee, which assumed the body existed, to identify handle
consumption behavior. This was later evolved to having explicit argument
attributes on the callee, which handles the absence of such attributes
gracefully without the need for verification, but the verification was
never removed. It would have been causing infinite recursion if kept in
place.
Fixes #159646.
Fixes #159734.
Fixes #159736.
Commit: 2b153a4c93dafc36d237d63ac64376ef3494285f
https://github.com/llvm/llvm-project/commit/2b153a4c93dafc36d237d63ac64376ef3494285f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/TosaUtilsGen.cpp
Log Message:
-----------
[NFC][MLIR][TableGen] Use ArrayRef instead of const vector reference (#162016)
Commit: 95215a3f0d5931fb47a0655cfb6825d8a904ce1e
https://github.com/llvm/llvm-project/commit/95215a3f0d5931fb47a0655cfb6825d8a904ce1e
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/tools/mlir-tblgen/CppGenUtilities.cpp
M mlir/tools/mlir-tblgen/CppGenUtilities.h
M mlir/tools/mlir-tblgen/DialectGen.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
Log Message:
-----------
[NFC][MLIR][TableGen] Change `emitSummaryAndDescComments` to write to os directly (#162014)
Change `emitSummaryAndDescComments` to directly write to the output
stream, avoiding creating large intermediate strings.
Commit: 23e35bd43cf18ee479e6d5df08189db4591c403c
https://github.com/llvm/llvm-project/commit/23e35bd43cf18ee479e6d5df08189db4591c403c
Author: Cameron McInally <cameron.mcinally at nyu.edu>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M flang/docs/FortranLLVMTestSuite.md
Log Message:
-----------
[Flang][Tests] Add GPL notice to GFortran test suite documentation. (#161912)
Add a GPL notice to the GFortran test suite documentation and redirect
to the LICENSE file distributed with the test suite.
Co-authored-by: Cameron McInally <cmcinally at nvidia.com>
Commit: 45c41247f82e5691425542de829d568cdc2fb580
https://github.com/llvm/llvm-project/commit/45c41247f82e5691425542de829d568cdc2fb580
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__ranges/iota_view.h
M libcxx/include/ranges
M libcxx/include/version
M libcxx/modules/std/ranges.inc
M libcxx/test/std/language.support/support.limits/support.limits.general/ranges.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/library/description/conventions/customization.point.object/cpo.compile.pass.cpp
A libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][ranges] P3060R3: Add `std::views::indices(n)` (#146823)
Implements [P3060R3](https://wg21.link/P3060R3)
Closes #148175
# References
- https://github.com/cplusplus/draft/issues/7966
- https://github.com/cplusplus/draft/pull/8006
- https://wg21.link/customization.point.object
- https://wg21.link/range.iota.overview
- https://wg21.link/ranges.syn
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 35c57a778bbd25d4df92b4b0e172b2f2aa3bf4f3
https://github.com/llvm/llvm-project/commit/35c57a778bbd25d4df92b4b0e172b2f2aa3bf4f3
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/BasicFeatures/AggregateSplatCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/ArrayElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/StructElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/SemaHLSL/Language/AggregateSplatCast-errors.hlsl
M clang/test/SemaHLSL/Language/ElementwiseCast-errors.hlsl
Log Message:
-----------
[HLSL] Add support for elementwise and aggregate splat casting struct types with bitfields (#161263)
Adds support for elementwise and aggregate splat casting struct types
with bitfields. Replacing existing Flattening function which used to
produce a list of GEPs representing a flattened object with one that
produces a list of LValues representing a flattened object. The LValues
can be used by EmitStoreThroughLValue and EmitLoadOfLValue, ensuring
bitfields are properly loaded and stored. This also simplifies the code
in the elementwise and aggregate splat casting functions.
Closes #125986
Commit: a663119455df2720e0c2b8b11fdb978b9d9dddb3
https://github.com/llvm/llvm-project/commit/a663119455df2720e0c2b8b11fdb978b9d9dddb3
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Fix verifier failures due to 93073af (#162097)
Follow up on 93073af ([LV] Move 3 functions into VPlanTransforms (NFC))
to not call runPass on the moved functions, as that results in verifier
failures.
Ref: https://lab.llvm.org/buildbot/#/builders/187/builds/12178
Commit: 6620e53511341703f3a2c54e4e9f1252d7d8dd1f
https://github.com/llvm/llvm-project/commit/6620e53511341703f3a2c54e4e9f1252d7d8dd1f
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/test/CIR/CodeGen/new.cpp
Log Message:
-----------
[CIR][NFC] Update Complex CXX new test to use regex (#162024)
Update Complex CXX new test to use regex for variable names
Commit: 1cc9a8c1272f428edcd4caf871cb66f973f4c13e
https://github.com/llvm/llvm-project/commit/1cc9a8c1272f428edcd4caf871cb66f973f4c13e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-10-07 (Tue, 07 Oct 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Log Message:
-----------
AMDGPU: Stop using the wavemask register class for SCC cross class copies (#161801)
SCC should be copied to a 32-bit SGPR. Using a wave mask doesn't make
sense.
Commit: e9f3be63d3928b24f3667d8aaadfbee9d325015f
https://github.com/llvm/llvm-project/commit/e9f3be63d3928b24f3667d8aaadfbee9d325015f
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
Log Message:
-----------
[NFC][PowerPC] Cleanup isImm and getImmEncoding functions (#161567)
Refactor and replace explicit Imm `getImm*Encodng() | isU*Imm() |
isS*Imm()` functions to a generic one that takes a template.
This is in prep for followup batch to implement `paddis` which takes a
pcrel Imm == 32bits. Doing this
refactor so we don't have to copy and paste the same set of functions
again with only the bit length changes.
Commit: 9e8dda103425d355e06aca7e069050381ae84ceb
https://github.com/llvm/llvm-project/commit/9e8dda103425d355e06aca7e069050381ae84ceb
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[NFC] Change spelling of cluster feature to "clusters" (#162103)
Commit: 44b2673544bf32ae498cfa22193090f9fd7dae24
https://github.com/llvm/llvm-project/commit/44b2673544bf32ae498cfa22193090f9fd7dae24
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/global-init.cpp
Log Message:
-----------
[CIR] Implement initial LoweringPrepare support for global ctors (#161452)
This adds the initial support for lowering the 'ctor' region of
cir.global operations to an init function which is called from a
TU-specific static initialization function.
This does not yet add an attribute to hold a list of global
initializers. That will be added in a future change.
Commit: 08e95405752e6d3475afdebe3bd5f2ff2ff17712
https://github.com/llvm/llvm-project/commit/08e95405752e6d3475afdebe3bd5f2ff2ff17712
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
A llvm/include/llvm/CAS/OnDiskDataAllocator.h
M llvm/lib/CAS/CMakeLists.txt
A llvm/lib/CAS/OnDiskDataAllocator.cpp
M llvm/unittests/CAS/CMakeLists.txt
A llvm/unittests/CAS/OnDiskDataAllocatorTest.cpp
Log Message:
-----------
[CAS] Add OnDiskDataAllocator (#161264)
Add OnDiskDataAllocator, which is the data pool implementation inside a
OnDiskCAS that stores data in a single file. It is a based on
MappedFileRegionArena and wrapped inside a CAS database file.
Commit: edc91d4f6e91786a93eb7cc1886eb7ce6640771a
https://github.com/llvm/llvm-project/commit/edc91d4f6e91786a93eb7cc1886eb7ce6640771a
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M .clang-format
M .github/new-prs-labeler.yml
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/llvm-abi-tests.yml
R .github/workflows/llvm-tests.yml
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/MCInstUtils.h
M bolt/include/bolt/Passes/SplitFunctions.h
M bolt/include/bolt/Rewrite/MetadataRewriters.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/PAuthGadgetScanner.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/lib/Rewrite/DWARFRewriter.cpp
A bolt/lib/Rewrite/GNUPropertyRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
A bolt/test/AArch64/Inputs/property-note-bti.yaml
A bolt/test/AArch64/Inputs/property-note-nobti.yaml
A bolt/test/AArch64/bti-note.test
A bolt/test/AArch64/no-bti-note.test
A bolt/test/AArch64/tls-desc-call.s
M bolt/test/AArch64/unsupported-passes.test
M bolt/test/binary-analysis/AArch64/cmdline-args.test
M bolt/test/binary-analysis/AArch64/gs-pauth-authentication-oracles.s
M bolt/test/binary-analysis/AArch64/gs-pauth-calls.s
M bolt/test/binary-analysis/AArch64/gs-pauth-debug-output.s
M bolt/test/binary-analysis/AArch64/gs-pauth-signing-oracles.s
M bolt/test/binary-analysis/AArch64/gs-pauth-tail-calls.s
M bolt/utils/dot2html/d3-graphviz-template.html
M clang-tools-extra/clang-apply-replacements/lib/Tooling/ApplyReplacements.cpp
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clang-move/Move.cpp
M clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/SystemIncludeExtractor.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signed-char-misuse.rst
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang-tools-extra/test/clang-doc/long-name.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-char-misuse-with-option.cpp
M clang/.clang-format
M clang/CMakeLists.txt
A clang/cmake/caches/BOLT-CSSPGO.cmake
M clang/cmake/caches/BOLT-PGO.cmake
A clang/cmake/caches/CSSPGO.cmake
M clang/docs/InternalsManual.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/developer-docs/DebugChecks.rst
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/CharUnits.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/ExprCXX.h
A clang/include/clang/AST/HLSLResource.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Analysis/CFG.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/BuiltinsX86_64.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/CrossTU/CrossTranslationUnit.h
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Lex/HLSLRootSignatureTokenKinds.def
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/EntryPointStats.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTConcept.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
A clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/lib/CIR/CodeGen/CIRGenDeclCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypeCache.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/MacroExpander.cpp
M clang/lib/Format/NamespaceEndCommentsFixer.cpp
M clang/lib/Format/ObjCPropertyAttributeOrderFixer.cpp
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/lib/Format/SortJavaScriptImports.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Frontend/ChainedIncludesSource.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/avx512vlintrin.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/lib/StaticAnalyzer/Core/CMakeLists.txt
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/EntryPointStats.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/Store.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/CMakeLists.txt
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/AST/ByteCode/const-eval.c
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/HLSL/RootSignature-Target-AST.hlsl
M clang/test/AST/HLSL/RootSignatures-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/ast-dump-concepts.cpp
M clang/test/AST/ast-dump-ctad-alias.cpp
M clang/test/AST/ast-print-record-decl.c
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
M clang/test/Analysis/analyze-function-guide.cpp
A clang/test/Analysis/analyzeOneFunction.cpp
M clang/test/Analysis/analyzer-stats/entry-point-stats.cpp
M clang/test/Analysis/csv2json.py
M clang/test/Analysis/initializer.cpp
M clang/test/CIR/CodeGen/aapcs-volatile-bitfields.c
A clang/test/CIR/CodeGen/address-space.c
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/CodeGen/binassign.c
M clang/test/CIR/CodeGen/binop.c
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/builtin_bit.cpp
M clang/test/CIR/CodeGen/builtin_call.cpp
M clang/test/CIR/CodeGen/builtin_printf.cpp
M clang/test/CIR/CodeGen/cast.cpp
M clang/test/CIR/CodeGen/cmp.cpp
M clang/test/CIR/CodeGen/comma.c
M clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/cxx-default-init.cpp
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/delete.cpp
M clang/test/CIR/CodeGen/destructors.cpp
M clang/test/CIR/CodeGen/finegrain-bitfield-access.cpp
A clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/if.cpp
M clang/test/CIR/CodeGen/int-to-bool.cpp
M clang/test/CIR/CodeGen/loop.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-prototype.c
M clang/test/CIR/CodeGen/opaque.c
M clang/test/CIR/CodeGen/opaque.cpp
A clang/test/CIR/CodeGen/paren-init-list.cpp
M clang/test/CIR/CodeGen/pointers.cpp
A clang/test/CIR/CodeGen/predefined-expr.c
M clang/test/CIR/CodeGen/struct.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CIR/CodeGen/variable-decomposition.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/data.c
A clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
A clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/wait.c
M clang/test/CIR/IR/alloca.cir
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/array.cir
M clang/test/CIR/IR/atomic.cir
M clang/test/CIR/IR/binassign.cir
M clang/test/CIR/IR/bitfield_info.cir
M clang/test/CIR/IR/call.cir
M clang/test/CIR/IR/cast.cir
M clang/test/CIR/IR/cmp.cir
M clang/test/CIR/IR/complex.cir
M clang/test/CIR/IR/copy.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global-init.cir
M clang/test/CIR/IR/global-var-linkage.cir
M clang/test/CIR/IR/global.cir
A clang/test/CIR/IR/invalid-addrspace.cir
M clang/test/CIR/IR/label.cir
M clang/test/CIR/IR/module.cir
M clang/test/CIR/IR/stack-save-restore.cir
M clang/test/CIR/IR/struct.cir
M clang/test/CIR/IR/switch-flat.cir
M clang/test/CIR/IR/switch.cir
M clang/test/CIR/IR/ternary.cir
M clang/test/CIR/IR/throw.cir
M clang/test/CIR/IR/unary.cir
M clang/test/CIR/IR/vector.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtable-attr.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/cast.cir
M clang/test/CIR/Lowering/if.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/canonicalize.cir
M clang/test/CIR/Transforms/if.cir
M clang/test/CIR/Transforms/switch.cir
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.id/p3.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/compound-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/nested-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/simple-requirement.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/type-requirement.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx-cxx-record.cpp
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512ifma-builtins.c
M clang/test/CodeGen/X86/avx512ifmavl-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/avxifma-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGenHLSL/BasicFeatures/AggregateSplatCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/ArrayElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/StructElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/RootSignature.hlsl
R clang/test/CodeGenHLSL/resources/AppendStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/resources/ConsumeStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/resources/RWStructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/resources/RasterizerOrderedStructuredBuffer-elementtype.hlsl
R clang/test/CodeGenHLSL/resources/StructuredBuffer-elementtype.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
A clang/test/CodeGenHLSL/resources/StructuredBuffers-elementtype.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-lib.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/Driver/dxc_frs.hlsl
M clang/test/Driver/dxc_rootsignature_target.hlsl
M clang/test/Driver/hip-options.hip
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Headers/arm-acle-header.c
M clang/test/Headers/arm-cde-header.c
M clang/test/Headers/arm-cmse-header.c
M clang/test/Headers/arm-fp16-header.c
M clang/test/Headers/arm-neon-header.c
A clang/test/Headers/system_reserved_names.h
M clang/test/Headers/x86-intrinsics-headers-clean.cpp
M clang/test/Headers/x86-intrinsics-headers.c
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Modules/pr133057.cpp
A clang/test/OpenMP/amdgcn_save_temps.c
M clang/test/Parser/cxx0x-lambda-expressions.cpp
A clang/test/Parser/recovery-after-expected-unqualified-id.cpp
M clang/test/Sema/const-eval.c
M clang/test/Sema/integer-overflow.c
M clang/test/Sema/unbounded-array-bounds.c
M clang/test/SemaCUDA/vararg.cu
M clang/test/SemaCXX/array-bounds.cpp
M clang/test/SemaCXX/builtin-assume-aligned.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/cxx2c-template-template-param.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
M clang/test/SemaCXX/diagnose_if.cpp
M clang/test/SemaCXX/integer-overflow.cpp
M clang/test/SemaCXX/invalid-requirement-requires-expr.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaHLSL/BuiltIns/Buffers.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/Language/AggregateSplatCast-errors.hlsl
M clang/test/SemaHLSL/Language/ElementwiseCast-errors.hlsl
M clang/test/SemaHLSL/RootSignature-err.hlsl
M clang/test/SemaHLSL/RootSignature-flags-err.hlsl
A clang/test/SemaTemplate/GH161657.cpp
M clang/test/SemaTemplate/alias-template-deprecated.cpp
M clang/test/SemaTemplate/alias-templates.cpp
M clang/test/SemaTemplate/concepts-recovery-expr.cpp
M clang/test/SemaTemplate/concepts-recursive-inst.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/instantiate-abbreviated-template.cpp
M clang/test/SemaTemplate/instantiate-expanded-type-constraint.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
M clang/test/SemaTemplate/instantiate-template-argument.cpp
M clang/test/SemaTemplate/pr52970.cpp
M clang/test/lit.cfg.py
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/Analysis/CFGTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Format/FormatTestObjC.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Lex/LexHLSLRootSignatureTest.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_interceptors.h
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/cpu_model/aarch64.c
A compiler-rt/lib/builtins/cpu_model/aarch64/fmv/hwcap.inc
R compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
A compiler-rt/lib/builtins/wasm/__c_longjmp.S
A compiler-rt/lib/builtins/wasm/__cpp_exception.S
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
A compiler-rt/test/asan/TestCases/wcscat.cpp
A compiler-rt/test/asan/TestCases/wcscpy.cpp
A compiler-rt/test/asan/TestCases/wcsncat.cpp
A compiler-rt/test/asan/TestCases/wcsncpy.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/lit.local.cfg
M cross-project-tests/debuginfo-tests/dexter/feature_tests/lit.local.cfg
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/character.cpp
M flang-rt/lib/runtime/derived-api.cpp
M flang-rt/lib/runtime/extrema.cpp
M flang-rt/lib/runtime/findloc.cpp
M flang/docs/ComplexOperations.md
M flang/docs/FlangDriver.md
M flang/docs/FortranLLVMTestSuite.md
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Lower/OpenACC.h
M flang/include/flang/Lower/SymbolMap.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Parser/message.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/scope.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Semantics/type.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Support/LangOptions.def
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/constant.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Lower/SymbolMap.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/parsing.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Semantics/type.cpp
M flang/test/Driver/complex-range.f90
A flang/test/Driver/fast-real-mod.f90
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
A flang/test/HLFIR/simplify-hlfir-intrinsics-index.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Integration/debug-complex-1.f90
M flang/test/Integration/debug-local-var-2.f90
A flang/test/Lower/Intrinsics/fast-real-mod.f90
A flang/test/Lower/OpenACC/acc-host-data-cuda-device.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
A flang/test/Lower/OpenMP/map-neg-alloca-derived-type-array.f90
A flang/test/Lower/OpenMP/tile01.f90
A flang/test/Lower/OpenMP/tile02.f90
A flang/test/Lower/OpenMP/wsloop-collapse-continue.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
A flang/test/Parser/OpenMP/tile-fail.f90
M flang/test/Parser/OpenMP/tile.f90
A flang/test/Semantics/OpenACC/acc-sentinel.f90
M flang/test/Semantics/OpenMP/declare-simd.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do13.f90
A flang/test/Semantics/OpenMP/tile01.f90
A flang/test/Semantics/OpenMP/tile02.f90
A flang/test/Semantics/OpenMP/tile03.f90
A flang/test/Semantics/OpenMP/tile04.f90
A flang/test/Semantics/OpenMP/tile05.f90
A flang/test/Semantics/OpenMP/tile06.f90
A flang/test/Semantics/OpenMP/tile07.f90
A flang/test/Semantics/OpenMP/tile08.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/boz-literal-constants.f90
M flang/test/Semantics/call13.f90
A flang/test/Semantics/contiguous-warn.f90
A flang/test/Semantics/cuf24.cuf
M flang/test/Semantics/declarations01.f90
M flang/test/Semantics/declarations08.f90
M flang/test/Semantics/intrinsics03.f90
M flang/test/Semantics/intrinsics04.f90
A flang/test/Semantics/modfile80.F90
M flang/test/Semantics/null01.f90
M flang/test/Semantics/resolve42.f90
A flang/test/Semantics/type-parameter-constant.f90
M flang/test/Transforms/debug-complex-1.fir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-local-var.fir
A flang/test/Transforms/debug-module-3.fir
M flang/test/Transforms/debug-ref-type.fir
M flang/test/Transforms/debug-tuple-type.fir
M flang/test/Transforms/debug-vector-type.fir
M flang/unittests/Optimizer/Builder/FIRBuilderTest.cpp
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/fuzzing/stdlib/strtointeger_differential_fuzz.cpp
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/fcntl-macros.h
A libc/include/llvm-libc-macros/netinet-in-macros.h
A libc/include/netinet/in.h.def
A libc/include/netinet/in.yaml
M libc/include/sys/syscall.h.def
M libc/include/unistd.yaml
M libc/shared/math.h
A libc/shared/math/exp10m1f16.h
A libc/shared/math/exp2.h
M libc/src/__support/macros/attributes.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/common_constants.h
A libc/src/__support/math/exp10m1f16.h
A libc/src/__support/math/exp2.h
M libc/src/math/generic/CMakeLists.txt
R libc/src/math/generic/common_constants.cpp
R libc/src/math/generic/common_constants.h
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/expm1.cpp
M libc/src/math/generic/expm1f.cpp
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/log_range_reduction.h
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/pow.cpp
M libc/src/math/generic/powf.cpp
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/aarch64/inline_strlen.h
M libc/src/string/memory_utils/generic/inline_strlen.h
M libc/src/string/memory_utils/x86_64/inline_strlen.h
M libc/src/string/string_utils.h
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/faccessat.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/access.cpp
A libc/src/unistd/linux/faccessat.cpp
M libc/test/include/CMakeLists.txt
A libc/test/include/netinet_in_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/faccessat_test.cpp
M libclc/CMakeLists.txt
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/index.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/find.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/__tree
A libcxx/include/__type_traits/is_generic_transparent_comparator.h
A libcxx/include/__type_traits/make_transparent.h
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/ranges
M libcxx/include/string
M libcxx/include/version
M libcxx/modules/std/ranges.inc
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/test/std/language.support/support.exception/propagation/make_exception_ptr.objc.pass.mm
M libcxx/test/std/language.support/support.limits/support.limits.general/ranges.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/library/description/conventions/customization.point.object/cpo.compile.pass.cpp
A libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
A libcxx/utils/find-rerun-candidates
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/params.py
M libcxx/utils/visualize-historical
M libunwind/test/configs/cmake-bridge.cfg.in
M libunwind/test/eh_frame_fde_pc_range.pass.cpp
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
M lld/ELF/Driver.cpp
M lld/ELF/Options.td
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/docs/ReleaseNotes.rst
M lld/test/COFF/arm64-delayimport.yaml
M lld/test/COFF/arm64x-delayimport.test
A lld/test/MachO/cstring-tailmerge-objc.s
A lld/test/MachO/cstring-tailmerge.s
A lld/test/MachO/order-file-cstring-tailmerge.s
M lldb/include/lldb/Core/Mangled.h
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/MCPError.h
M lldb/include/lldb/Protocol/MCP/Protocol.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/include/lldb/Target/Language.h
M lldb/include/lldb/Target/Statistics.h
M lldb/packages/Python/lldbsuite/test/cpu_feature.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/source/API/SBTarget.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Host/common/JSONTransport.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Protocol/MCP/MCPError.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Target/Language.cpp
M lldb/source/Target/Statistics.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/TestDataFormatterStdUnorderedMap.py
M lldb/test/API/functionalities/json/symbol-file/Makefile
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
A lldb/test/API/functionalities/stats_api/arm64-minidump-build-ids.yaml
M lldb/test/API/lang/cpp/abi_tag_structors/TestAbiTagStructors.py
M lldb/test/API/lang/cpp/expr-definition-in-dylib/TestExprDefinitionInDylib.py
A lldb/test/API/lang/cpp/floating-types-specialization/Makefile
A lldb/test/API/lang/cpp/floating-types-specialization/TestCppFloatingTypesSpecialization.py
A lldb/test/API/lang/cpp/floating-types-specialization/main.cpp
A lldb/test/API/lang/cpp/function-call-from-object-file/Makefile
A lldb/test/API/lang/cpp/function-call-from-object-file/TestFunctionCallFromObjectFile.py
A lldb/test/API/lang/cpp/function-call-from-object-file/common.h
A lldb/test/API/lang/cpp/function-call-from-object-file/lib1.cpp
A lldb/test/API/lang/cpp/function-call-from-object-file/lib2.cpp
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M lldb/test/API/lang/cpp/structured-binding/TestStructuredBinding.py
M lldb/test/API/lang/cpp/template-arguments/TestCppTemplateArguments.py
A lldb/test/API/macosx/mte/Makefile
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M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
A lldb/test/Shell/Expr/TestGlobalSymbolObjCConflict.c
M lldb/test/Shell/SymbolFile/NativePDB/symtab.cpp
M lldb/test/Shell/lit.cfg.py
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/DNBDefs.h
M lldb/tools/debugserver/source/MacOSX/MachTask.h
M lldb/tools/debugserver/source/MacOSX/MachTask.mm
M lldb/tools/debugserver/source/MacOSX/MachVMMemory.cpp
M lldb/tools/debugserver/source/MacOSX/MachVMMemory.h
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.cpp
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.h
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Protocol/ProtocolBase.h
M lldb/tools/lldb-dap/Transport.h
M lldb/unittests/DAP/DAPTest.cpp
M lldb/unittests/DAP/Handler/DisconnectTest.cpp
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Host/posix/HostTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/Protocol/ProtocolMCPTest.cpp
M lldb/unittests/Target/CMakeLists.txt
A lldb/unittests/Target/LanguageTest.cpp
M lldb/unittests/TestingSupport/Host/JSONTransportTestUtilities.h
M llvm/.clang-format
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/cmake/modules/HandleLLVMOptions.cmake
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M llvm/docs/CodingStandards.rst
M llvm/docs/DirectX/DXContainer.rst
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M llvm/docs/GitHub.rst
M llvm/docs/HowToReleaseLLVM.rst
M llvm/docs/LangRef.rst
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M llvm/docs/TableGen/ProgRef.rst
M llvm/include/llvm/ADT/BitVector.h
M llvm/include/llvm/ADT/BitmaskEnum.h
M llvm/include/llvm/ADT/ConcurrentHashtable.h
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M llvm/include/llvm/ADT/IntervalTree.h
M llvm/include/llvm/ADT/PointerUnion.h
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M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
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M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
A llvm/include/llvm/CAS/OnDiskDataAllocator.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
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M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
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M llvm/include/llvm/IR/ValueMap.h
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M llvm/include/llvm/MC/MCRegisterInfo.h
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M llvm/include/llvm/Support/TargetOpcodes.def
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M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
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M llvm/include/llvm/Transforms/IPO/FunctionAttrs.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Scalar/JumpTableToSwitch.h
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M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/IR2Vec.cpp
M llvm/lib/Analysis/IndirectCallPromotionAnalysis.cpp
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
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M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
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M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
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M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
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M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
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M llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
M llvm/lib/CodeGen/MachineRegionInfo.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocScore.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Assumptions.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/DiagnosticHandler.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/IR/PassInstrumentation.cpp
M llvm/lib/IR/ProfDataUtils.cpp
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/VFABIDemangler.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCAsmInfoELF.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/Object/BuildID.cpp
M llvm/lib/Object/OffloadBundle.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/MemProfCommon.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/CMakeLists.txt
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M llvm/lib/Support/Mustache.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/ScopedPrinter.cpp
M llvm/lib/Support/StringMap.cpp
M llvm/lib/Support/ThreadPool.cpp
M llvm/lib/Support/Threading.cpp
A llvm/lib/Support/Unix/Jobserver.inc
M llvm/lib/Support/VirtualFileSystem.cpp
A llvm/lib/Support/Windows/Jobserver.inc
M llvm/lib/TableGen/Error.cpp
M llvm/lib/TableGen/Main.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrCDE.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Instrumentation/ValueProfilePlugins.inc
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Analysis/IR2Vec/Inputs/dummy_2D_vocab.json
M llvm/test/Analysis/IR2Vec/Inputs/dummy_3D_nonzero_arg_vocab.json
M llvm/test/Analysis/IR2Vec/Inputs/dummy_3D_nonzero_opc_vocab.json
M llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt
M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt
M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt
M llvm/test/Analysis/IR2Vec/if-else.ll
M llvm/test/Analysis/IR2Vec/unreachable.ll
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
A llvm/test/Analysis/LoopAccessAnalysis/inbounds-gep-in-predicated-blocks.ll
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
A llvm/test/Bitcode/DW_OP_rot_neg_abs.ll
A llvm/test/Bitcode/thinlto-alias-addrspacecast.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-sextinreg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-vashr-vlshr.mir
A llvm/test/CodeGen/AArch64/GlobalISel/select-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-neon-vcvtfxu2fp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-neon-3vdiff.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
A llvm/test/CodeGen/AArch64/cbz_wzr.mir
M llvm/test/CodeGen/AArch64/combine-sdiv.ll
M llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir
M llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir
M llvm/test/CodeGen/AArch64/extract-vector-elt.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/fpclamptosat.ll
M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
A llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
M llvm/test/CodeGen/AArch64/framelayout-sve.mir
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract.ll
M llvm/test/CodeGen/AArch64/llvm.modf.ll
M llvm/test/CodeGen/AArch64/machine-combiner-copy.ll
M llvm/test/CodeGen/AArch64/machine-licm-sub-loop.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/neon-shift-left-long.ll
M llvm/test/CodeGen/AArch64/peephole-and-tst.ll
A llvm/test/CodeGen/AArch64/pr161420.ll
M llvm/test/CodeGen/AArch64/reserveXreg-for-regalloc.ll
M llvm/test/CodeGen/AArch64/select_cc.ll
M llvm/test/CodeGen/AArch64/selectcc-to-shiftand.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4-lane-x4.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-luti4.ll
R llvm/test/CodeGen/AArch64/spill-fill-zpr-predicates.mir
M llvm/test/CodeGen/AArch64/spillfill-sve.mir
A llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/ssve-stack-hazard-remarks.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
A llvm/test/CodeGen/AArch64/sve-int-mul-neg.ll
A llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AArch64/tbz-tbnz.ll
M llvm/test/CodeGen/AArch64/trampoline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-ignore-copies-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-attributor-flat-scratch-init-asan.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.flat.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-store-opt-scale-offset.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-precise-allocate-to-module-struct.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
A llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-mubuf.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-undef-poison.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
A llvm/test/CodeGen/ARM/and-mask-variable.ll
M llvm/test/CodeGen/ARM/combine-movc-sub.ll
A llvm/test/CodeGen/ARM/extract-bits.ll
A llvm/test/CodeGen/ARM/extract-lowbits.ll
M llvm/test/CodeGen/ARM/fpclamptosat.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/inline-asm-clobber.ll
M llvm/test/CodeGen/ARM/llrint-conv.ll
M llvm/test/CodeGen/ARM/llround-conv.ll
M llvm/test/CodeGen/ARM/llvm.exp10.ll
M llvm/test/CodeGen/ARM/llvm.frexp.ll
M llvm/test/CodeGen/ARM/lrint-conv.ll
M llvm/test/CodeGen/ARM/lround-conv.ll
M llvm/test/CodeGen/ARM/vector-lrint.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-AddressU.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-AddressV.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-AddressW.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-BorderColor.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-ComparisonFunc.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-Filter.ll
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-Flag.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MaxAnisotropy.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MaxLod.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MinLod.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-MinLopBias.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-RegisterSpace.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-ShaderRegister.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers-Invalid-ShaderVisibility.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers.ll
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-StaticSamplers_V3.ll
M llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler.ll
M llvm/test/CodeGen/DirectX/rootsignature-validation-fail-static-sampler-range.ll
A llvm/test/CodeGen/Hexagon/inst_setcc_uno_uo.ll
M llvm/test/CodeGen/Hexagon/isel-fold-shl-zext.ll
A llvm/test/CodeGen/Hexagon/isel-inttofp-v32i1tov32f32.ll
R llvm/test/CodeGen/Hexagon/isel-uinttofp-v32i1tov32f32.ll
A llvm/test/CodeGen/Hexagon/unaligned-vec-store.ll
M llvm/test/CodeGen/Mips/no-odd-spreg-msa.ll
A llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/NVPTX/f32x2-convert-i32x2.ll
M llvm/test/CodeGen/NVPTX/wmma-ptx87-sm120a.py
M llvm/test/CodeGen/NVPTX/wmma.py
M llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
M llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/fp128.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/rv64-trampoline.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nontemporal-vp-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/xqcicli.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
M llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/UniqueImplicitBindingNumber.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/test_counters.ll
A llvm/test/CodeGen/SPIRV/pointers/ptrcast-bitcast.ll
M llvm/test/CodeGen/SystemZ/fp-cmp-04.ll
M llvm/test/CodeGen/SystemZ/llvm.sincos.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination.ll
M llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
M llvm/test/CodeGen/Thumb2/mve-gather-increment.ll
M llvm/test/CodeGen/Thumb2/mve-phireg.ll
M llvm/test/CodeGen/Thumb2/mve-postinc-dct.ll
M llvm/test/CodeGen/Thumb2/mve-qrintrsplat.ll
M llvm/test/CodeGen/Thumb2/mve-scatter-increment.ll
M llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll
M llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
M llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
M llvm/test/CodeGen/VE/Vector/vec_divrem.ll
M llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
M llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
M llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll
M llvm/test/CodeGen/X86/GlobalISel/legalize-phi.mir
A llvm/test/CodeGen/X86/GlobalISel/legalize-undef-vec-scaling.mir
A llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier-vec256.mir
A llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier-vec512.mir
A llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier.mir
A llvm/test/CodeGen/X86/GlobalISel/select-freeze-vec256.mir
A llvm/test/CodeGen/X86/GlobalISel/select-freeze-vec512.mir
A llvm/test/CodeGen/X86/GlobalISel/select-freeze.mir
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/avx2-vector-shifts.ll
A llvm/test/CodeGen/X86/combine-pack.ll
M llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
M llvm/test/CodeGen/X86/delete-dead-instrs-with-live-uses.mir
M llvm/test/CodeGen/X86/fpclamptosat.ll
M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/fshl.ll
M llvm/test/CodeGen/X86/fshr.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/inalloca-invoke.ll
M llvm/test/CodeGen/X86/isel-fpclass.ll
M llvm/test/CodeGen/X86/isel-smax.ll
M llvm/test/CodeGen/X86/isel-smin.ll
M llvm/test/CodeGen/X86/isel-umax.ll
M llvm/test/CodeGen/X86/isel-umin.ll
M llvm/test/CodeGen/X86/licm-regpressure.ll
M llvm/test/CodeGen/X86/logic-shift.ll
A llvm/test/CodeGen/X86/pr161693.ll
M llvm/test/CodeGen/X86/prefer-avx256-shift.ll
M llvm/test/CodeGen/X86/sbb.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shuffle-as-shifts.ll
M llvm/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
M llvm/test/CodeGen/X86/sshl_sat_vec.ll
M llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-zext.ll
M llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
M llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
M llvm/test/DebugInfo/X86/dynamic-bitfield.ll
A llvm/test/DebugInfo/X86/x86fixupsetcc-debug-instr-num.mir
M llvm/test/DebugInfo/symbolize-build-id.test
M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/x-0.s
A llvm/test/ExecutionEngine/JITLink/AArch64/Inputs/x-1.s
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_universal_slice_selection.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call_rvc.s
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-smaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-sminv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_lane.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_origins.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-tbl.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vaddv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmovn.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vshift.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_float.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/ARM32/vararg-arm32.ll
M llvm/test/Instrumentation/MemorySanitizer/LoongArch/vararg-loongarch64.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mips.ll
M llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mipsel.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/kernel-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppc.ll
M llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppcle.ll
M llvm/test/Instrumentation/MemorySanitizer/RISCV32/vararg-riscv32.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2_512ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-gfni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-vl-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avxvnniint16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avxvnniint8-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/f16c-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse41-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/vararg-too-large.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/vararg_call.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
M llvm/test/Instrumentation/MemorySanitizer/array_types.ll
M llvm/test/Instrumentation/MemorySanitizer/bmi.ll
M llvm/test/Instrumentation/MemorySanitizer/byval-alignment.ll
M llvm/test/Instrumentation/MemorySanitizer/byval.ll
M llvm/test/Instrumentation/MemorySanitizer/expand-experimental-reductions.ll
M llvm/test/Instrumentation/MemorySanitizer/funnel_shift.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/msan_i386intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse41-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg-too-large.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg_call.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_eager.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/opaque-ptr.ll
M llvm/test/Instrumentation/MemorySanitizer/or.ll
M llvm/test/Instrumentation/MemorySanitizer/overflow.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
M llvm/test/Instrumentation/MemorySanitizer/saturating.ll
M llvm/test/Instrumentation/MemorySanitizer/scmp.ll
M llvm/test/Instrumentation/MemorySanitizer/ucmp.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-reduce-fadd.ll
M llvm/test/Instrumentation/MemorySanitizer/vector-reduce-fmul.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Instrumentation/MemorySanitizer/vscale.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
A llvm/test/TableGen/RegisterClassCopyCost.td
A llvm/test/TableGen/ResolveSchedClass.td
M llvm/test/ThinLTO/X86/memprof-basic.ll
A llvm/test/ThinLTO/X86/memprof-dups.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch-cleanuppad.ll
A llvm/test/Transforms/CorrelatedValuePropagation/pr161367.ll
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
M llvm/test/Transforms/DFAJumpThreading/dfa-unfold-select.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_libfunc_address_taken.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_libfunc_no_address_taken.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_lto.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_multi_scc_indirect_recursion.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_multi_scc_indirect_recursion1.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_multinode_refscc.ll
A llvm/test/Transforms/FunctionAttrs/norecurse_self_recursive_callee.ll
M llvm/test/Transforms/GVN/condprop.ll
A llvm/test/Transforms/GVN/masked-load-store-no-mem-dep.ll
M llvm/test/Transforms/GVN/masked-load-store.ll
M llvm/test/Transforms/GlobalOpt/fastcc.ll
M llvm/test/Transforms/IndVarSimplify/X86/overflow-intrinsics.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/freeze-phi.ll
M llvm/test/Transforms/InstCombine/freeze.ll
M llvm/test/Transforms/InstCombine/funnel.ll
A llvm/test/Transforms/InstCombine/icmp-clamp.ll
A llvm/test/Transforms/InstCombine/in-freeze-phi.ll
M llvm/test/Transforms/InstCombine/masked_intrinsics.ll
M llvm/test/Transforms/InstCombine/pr83947.ll
M llvm/test/Transforms/InstCombine/select-and-cmp.ll
M llvm/test/Transforms/InstCombine/select-gep.ll
M llvm/test/Transforms/InstCombine/select-or-cmp.ll
M llvm/test/Transforms/InstSimplify/domcondition.ll
A llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check-dl.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopUnroll/peel-branch-weights-freq.ll
M llvm/test/Transforms/LoopUnroll/peel-branch-weights.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-pgo.ll
M llvm/test/Transforms/LoopUnroll/scev-invalidation-lcssa.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
A llvm/test/Transforms/LoopVectorize/AArch64/pr162009.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/struct-return-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/remark-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/scalar-steps-with-users-demanding-all-lanes-and-first-lane-only.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/pr34438.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
A llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/scev-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/constantfolder-infer-correct-gepty.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
A llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/flags.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction-multiple-uses-in-same-instruction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-neg-off.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pr154045-dont-fold-extractelement-livein.ll
M llvm/test/Transforms/LoopVectorize/pr32859.ll
M llvm/test/Transforms/LoopVectorize/pr36983-multiple-lcssa.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reverse-induction-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-neg-cond.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-hint.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/strided-accesses-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-loads-p16.ll
M llvm/test/Transforms/LoopVectorize/trunc-reductions.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LoopVectorize/widen-intrinsic.ll
A llvm/test/Transforms/NewGVN/pr159918.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
M llvm/test/Transforms/SCCP/relax-range-checks.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
M llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
M llvm/test/Transforms/SimplifyCFG/rangereduce.ll
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
M llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll
M llvm/test/Transforms/SimplifyCFG/switch_create.ll
A llvm/test/Unit/CMakeLists.txt
A llvm/test/Verifier/captures-metadata.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
A llvm/test/tools/llvm-exegesis/AArch64/no-aliasing-ld-str.s
M llvm/test/tools/llvm-ir2vec/entities.ll
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmi2.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmi2vl.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx1250.s
M llvm/tools/llvm-c-test/debuginfo.c
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
M llvm/tools/llvm-config/llvm-config.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-opt-report/OptReport.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/ADT/BitTest.cpp
M llvm/unittests/ADT/StringSwitchTest.cpp
M llvm/unittests/ADT/TypeSwitchTest.cpp
M llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp
M llvm/unittests/Analysis/IR2VecTest.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/CAS/CMakeLists.txt
A llvm/unittests/CAS/OnDiskDataAllocatorTest.cpp
M llvm/unittests/CodeGen/RegAllocScoreTest.cpp
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M llvm/unittests/Frontend/HLSLRootSignatureDumpTest.cpp
A llvm/unittests/Object/BuildIDTest.cpp
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M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/JobserverTest.cpp
M llvm/unittests/Support/MustacheTest.cpp
M llvm/unittests/Support/Path.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/Basic/TargetFeaturesEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/Common/InfoByHwMode.cpp
M llvm/utils/TableGen/Common/PredicateExpander.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/ExegesisEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerShared.h
M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/TableGen/X86MnemonicTables.cpp
M llvm/utils/TableGen/X86ModRMFilters.h
M llvm/utils/TableGen/X86RecognizableInstr.h
M llvm/utils/gn/secondary/bolt/lib/Core/BUILD.gn
M llvm/utils/gn/secondary/bolt/lib/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
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M llvm/utils/profcheck-xfail.txt
M mlir/.clang-format
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M mlir/include/mlir-c/IR.h
M mlir/include/mlir-c/Rewrite.h
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
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M mlir/include/mlir/Dialect/Math/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
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M mlir/include/mlir/Dialect/OpenMP/OpenMPOpBase.td
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M mlir/include/mlir/TableGen/CodeGenHelpers.h
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M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/Bindings/Python/MainModule.cpp
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineMinMax.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Math/Transforms/SincosFusion.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorGather.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShuffle.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorStep.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateMaskedLoadStore.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/TableGen/CodeGenHelpers.cpp
M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDecl.txt
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDef.txt
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/TypeToLLVM.cpp
M mlir/lib/Tools/PDLL/AST/NodePrinter.cpp
M mlir/lib/Tools/PDLL/AST/Nodes.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/mlir/dialects/transform/structured.py
M mlir/python/mlir/dialects/transform/tune.py
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/emulate-unsupported-floats.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
A mlir/test/Dialect/Math/sincos-fusion.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/MemRef/ops.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/test/Dialect/OpenMP/cli-canonical_loop.mlir
A mlir/test/Dialect/OpenMP/cli-tile.mlir
M mlir/test/Dialect/OpenMP/cli-unroll-heuristic.mlir
A mlir/test/Dialect/OpenMP/invalid-tile.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/variables.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
A mlir/test/Dialect/Transform/test-promote-tensors.mlir
M mlir/test/Dialect/Transform/test-tune-extension-invalid.mlir
M mlir/test/Dialect/Transform/test-tune-extension.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Examples/standalone/lit.local.cfg
M mlir/test/Examples/standalone/test.wheel.toy
M mlir/test/Target/LLVMIR/nvvmir.mlir
A mlir/test/Target/LLVMIR/openmp-cli-tile01.mlir
A mlir/test/Target/LLVMIR/openmp-cli-tile02.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
R mlir/test/Transforms/buffer-results-to-out-params-elim.mlir
A mlir/test/Transforms/buffer-results-to-out-params-hosit-dynamic-allocs.mlir
A mlir/test/Transforms/buffer-results-to-out-params-hosit-static-allocs.mlir
M mlir/test/lib/Dialect/TestIRDLToCpp/CMakeLists.txt
M mlir/test/lib/Dialect/TestIRDLToCpp/TestIRDLToCppDialect.cpp
M mlir/test/lib/Dialect/TestIRDLToCpp/test_conversion.testd.mlir
M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp.irdl.mlir
M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp_invalid_unsupported_types.irdl.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/test/mlir-tblgen/op-format-invalid.td
M mlir/test/mlir-tblgen/op-format-spec.td
M mlir/test/python/dialects/transform_tune_ext.py
M mlir/test/python/integration/dialects/pdl.py
M mlir/test/python/ir/operation.py
M mlir/tools/mlir-rewrite/mlir-rewrite.cpp
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
M mlir/tools/mlir-tblgen/CppGenUtilities.cpp
M mlir/tools/mlir-tblgen/CppGenUtilities.h
M mlir/tools/mlir-tblgen/DialectGen.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
M mlir/tools/mlir-tblgen/FormatGen.cpp
M mlir/tools/mlir-tblgen/OmpOpGen.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/tools/mlir-tblgen/TosaUtilsGen.cpp
M mlir/unittests/TableGen/PassGenTest.cpp
M offload/libomptarget/OpenMP/InteropAPI.cpp
M offload/libomptarget/exports
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
A offload/test/offloading/fortran/target-declare-mapper-parent-allocatable.f90
A openmp/runtime/test/transform/tile/do.F90
A openmp/runtime/test/transform/tile/do_2d.f90
A openmp/runtime/test/transform/tile/do_2d_varsizes.f90
A openmp/runtime/test/transform/unroll/heuristic_do.f90
R openmp/runtime/test/transform/unroll/heuristic_intdo.f90
M openmp/tools/omptest/src/OmptTester.cpp
A orc-rt/include/orc-rt/CallableTraitsHelper.h
M orc-rt/include/orc-rt/Error.h
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/CallableTraitsHelperTest.cpp
R orc-rt/unittests/CommonTestUtils.cpp
M orc-rt/unittests/CommonTestUtils.h
M orc-rt/unittests/ErrorTest.cpp
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
M orc-rt/unittests/bind-test.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/cachemeifyoucan/spr/cas-rename-ondisktrierawhashmappointer-ondiskptr-nfc
Compare: https://github.com/llvm/llvm-project/compare/3c26b8cc99b4...edc91d4f6e91
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