[all-commits] [llvm/llvm-project] 19cd5b: [AMDGPU] Account for implicit XCNT insertion (#160...

[Aaditya via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 19cd5bd350b730da35629de5095764861f70ecee
      https://github.com/llvm/llvm-project/commit/19cd5bd350b730da35629de5095764861f70ecee
  Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
  Date:   2025-10-03 (Fri, 03 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir

  Log Message:
  -----------
  [AMDGPU] Account for implicit XCNT insertion (#160812)

Hardware inserts an implicit `S_WAIT_XCNT 0` between 
alternate SMEM and VMEM instructions, so there are 
never outstanding address translations for both SMEM 
and VMEM at the same time.



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