[all-commits] [llvm/llvm-project] 0b8cc7: [AArch64][SME] Reshuffle emit[prologue|epilogue]()...

Benjamin Maxwell via All-commits all-commits at lists.llvm.org
Thu Oct 2 10:03:24 PDT 2025


  Branch: refs/heads/users/MacDue/split_pprs
  Home:   https://github.com/llvm/llvm-project
  Commit: 0b8cc7e3b00a44da54c0f4fc65479a32c8975feb
      https://github.com/llvm/llvm-project/commit/0b8cc7e3b00a44da54c0f4fc65479a32c8975feb
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp

  Log Message:
  -----------
  [AArch64][SME] Reshuffle emit[prologue|epilogue]() for splitSVEObjects (NFCI)

Requested in https://github.com/llvm/llvm-project/pull/142392#discussion_r2207880079

Change-Id: I842faddea1bd54c5e30a9985782baf5dce37e5bb


  Commit: 5adbcdfbf3b2209050757f82ffe0217a133bed63
      https://github.com/llvm/llvm-project/commit/5adbcdfbf3b2209050757f82ffe0217a133bed63
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp

  Log Message:
  -----------
  Remove unused iterators

Change-Id: I2c0e8290e4c224045aa12031cd966bc66bd84ac4


  Commit: f2dc37e5c94e91cb8fd9ebe6e83632f9bf6b64de
      https://github.com/llvm/llvm-project/commit/f2dc37e5c94e91cb8fd9ebe6e83632f9bf6b64de
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
    A llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
    M llvm/test/CodeGen/AArch64/spill-fill-zpr-predicates.mir
    A llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll
    M llvm/test/CodeGen/AArch64/stack-hazard.ll
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll

  Log Message:
  -----------
  [AArch64][SME] Support split ZPR and PPR area allocation

For a while we have supported the `-aarch64-stack-hazard-size=<size>`
option, which adds "hazard padding" between GPRs and FPR/ZPRs. However,
there is currently a hole in this mitigation as PPR and FPR/ZPR accesses
to the same area also cause streaming memory hazards (this is noted by
`-pass-remarks-analysis=sme -aarch64-stack-hazard-remark-size=<val>`),
and the current stack layout places PPRs and ZPRs within the same area.

Which looks like:

------------------------------------  Higher address
| callee-saved gpr registers        |
|---------------------------------- |
| lr,fp  (a.k.a. "frame record")    |
|-----------------------------------| <- fp(=x29)
|   <hazard padding>                |
|-----------------------------------|
| callee-saved fp/simd/SVE regs     |
|-----------------------------------|
|        SVE stack objects          |
|-----------------------------------|
| local variables of fixed size     |
|   <FPR>                           |
|   <hazard padding>                |
|   <GPR>                           |
------------------------------------| <- sp
                                    | Lower address

With this patch the stack (and hazard padding) is rearranged so that
hazard padding is placed between the PPRs and ZPRs rather than within
the (fixed size) callee-save region. Which looks something like this:

------------------------------------  Higher address
| callee-saved gpr registers        |
|---------------------------------- |
| lr,fp  (a.k.a. "frame record")    |
|-----------------------------------| <- fp(=x29)
|        callee-saved PPRs          |
|        PPR stack objects          | (These are SVE predicates)
|-----------------------------------|
|   <hazard padding>                |
|-----------------------------------|
|       callee-saved ZPR regs       | (These are SVE vectors)
|        ZPR stack objects          | Note: FPRs are promoted to ZPRs
|-----------------------------------|
| local variables of fixed size     |
|   <FPR>                           |
|   <hazard padding>                |
|   <GPR>                           |
------------------------------------| <- sp
                                    | Lower address

This layout is only enabled if:

 * SplitSVEObjects are enabled (`-aarch64-split-sve-objects`)
   - (This may be enabled by default in a later patch)
 * Streaming memory hazards are present
   - (`-aarch64-stack-hazard-size=<val>` != 0)
 * PPRs and FPRs/ZPRs are on the stack
 * There's no stack realignment or variable-sized objects
   - This is left as a TODO for now

Additionally, any FPR callee-saves that are present will be promoted to
ZPRs. This is to prevent stack hazards between FPRs and GRPs in the
fixed size callee-save area (which would otherwise require more hazard
padding, or moving the FPR callee-saves).

This layout should resolve the hole in the hazard padding mitigation,
and is not intended change codegen for non-SME code.

Change-Id: I2e1906577c2ac79c40bc69e7c15e3ef09857445f


  Commit: 40dd12a2573939273e64c95c02e265f0d687ccd9
      https://github.com/llvm/llvm-project/commit/40dd12a2573939273e64c95c02e265f0d687ccd9
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineFrameInfo.h
    M llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp
    M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp

  Log Message:
  -----------
  Small fixups

Change-Id: I64f503597717441461ede15dc50709f9af498288


  Commit: c053a9276166bd8a91f3100916ab74f7d655bcd0
      https://github.com/llvm/llvm-project/commit/c053a9276166bd8a91f3100916ab74f7d655bcd0
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

  Log Message:
  -----------
  Add stack layout comment

Change-Id: If04156b0ef35e89a517d8bc06f121d2555ee9379


  Commit: ad63911e9600ba0f0b0da1d91e7959849f710456
      https://github.com/llvm/llvm-project/commit/ad63911e9600ba0f0b0da1d91e7959849f710456
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp

  Log Message:
  -----------
  Don't use setIsSVECC()

Change-Id: I58542d83ae47b292ba3fa15f47ca0b9cb5a16141


  Commit: 97c083387cd4632eca31eb61104de7a5ce573538
      https://github.com/llvm/llvm-project/commit/97c083387cd4632eca31eb61104de7a5ce573538
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp

  Log Message:
  -----------
  Add iterator changes from #161217

Change-Id: I2703f109fda15a437bd918fbd94a97566f26e161


  Commit: 380fb335659d30567e33ef2adf2636c919325cd4
      https://github.com/llvm/llvm-project/commit/380fb335659d30567e33ef2adf2636c919325cd4
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
    M llvm/test/CodeGen/AArch64/spill-fill-zpr-predicates.mir
    M llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll

  Log Message:
  -----------
  Fixups

Change-Id: I44aaa861c82fa44fe4c762366572a7367e8bf5c0


  Commit: 9e7ab0936d4ca709f1be60cae7613d7b80d56643
      https://github.com/llvm/llvm-project/commit/9e7ab0936d4ca709f1be60cae7613d7b80d56643
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

  Log Message:
  -----------
  Tweak comment layout

Change-Id: I048bf702e3a507275bb503217e7b91b2d0d67498


  Commit: d016e655857281d265acaf0154e74de358bd7286
      https://github.com/llvm/llvm-project/commit/d016e655857281d265acaf0154e74de358bd7286
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-10-02 (Thu, 02 Oct 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

  Log Message:
  -----------
  Tweak comment layout x2

Change-Id: I0479ebfbfd33a96bb7b50ca6c7b691f594383053


Compare: https://github.com/llvm/llvm-project/compare/8c536302c70a...d016e6558572

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