[all-commits] [llvm/llvm-project] 42ab47: [RISCV] Xqci with Short Forward Branches (#161407)

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 42ab473f518c5f180455c674cbaba70a0b2634b7
      https://github.com/llvm/llvm-project/commit/42ab473f518c5f180455c674cbaba70a0b2634b7
  Author: Sam Elliott <aelliott at qti.qualcomm.com>
  Date:   2025-10-01 (Wed, 01 Oct 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
    M llvm/test/CodeGen/RISCV/select-bare.ll
    M llvm/test/CodeGen/RISCV/select-cc.ll
    M llvm/test/CodeGen/RISCV/select-cond.ll
    M llvm/test/CodeGen/RISCV/select-const.ll
    M llvm/test/CodeGen/RISCV/select.ll
    M llvm/test/CodeGen/RISCV/xqcicli.ll
    M llvm/test/CodeGen/RISCV/xqcicm.ll
    M llvm/test/CodeGen/RISCV/xqcics.ll

  Log Message:
  -----------
  [RISCV] Xqci with Short Forward Branches (#161407)

This change implements support for the combination of Xqci and the Short
Forward Branch optimisation.

In particular, we want to prioritise `Branch+ALU` (short forward
branches) over the equivalent `ALU+CMov`, when the compared values are
both registers, and the selected values come from registers (as this is
what `PseudoCCMOVGPR` supports).

However, when expanding `PseudoCCMOVGPR` (i.e., `Branch+MV`), we instead
want to expand it to a conditional move (for code size reasons), so I
have added `RISCVExpandPseudo::expandCCOpToCMov` to try to do so. This
mostly works, except if `PseudoCCMOVGPR` is comparing against zero and
gets commuted - as can be seen in one example in `foo` in
`select-cc.ll`.

This change:
- updates the attributes used for the XQCI RUN lines for the select
tests.
- modifies the CodeGen patterns and predicates to prioritise selecting
the SFB Pseudo.
- adds CodeGen patterns for MVLTI/MVLTUI/MVGEI/MVGEUI with imm=zero, to
prioritise over the equivalent `Select_GPR_Using_CC_GPR` patterns for
rhs=X0.
- adds a hook to attempt to turn the predicated-mov Pseudo back into a
Conditional Move from Xqcicm (which matches the pseudo in terms of tied
register operands).



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