[all-commits] [llvm/llvm-project] 1098a5: [RISCV] Add commutative support for Qualcomm uC Xq...

[quic_hchandel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1098a5cefd764eb58e8530e821eaa5d5a6c42310
      https://github.com/llvm/llvm-project/commit/1098a5cefd764eb58e8530e821eaa5d5a6c42310
  Author: quic_hchandel <hchandel at qti.qualcomm.com>
  Date:   2025-10-01 (Wed, 01 Oct 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/test/CodeGen/RISCV/xqcics.ll

  Log Message:
  -----------
  [RISCV] Add commutative support for Qualcomm uC Xqcics extension (#161328)

This is a follow-up to #160653 doing similar changes for Xqcics.



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