[all-commits] [llvm/llvm-project] d481e5: [AMDGPU][SPIRV] Use SPIR-V syncscopes for some AMD...

[Alex Voicu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d481e5f9b7f4bde74fc4909a8a67bbd758991b33
      https://github.com/llvm/llvm-project/commit/d481e5f9b7f4bde74fc4909a8a67bbd758991b33
  Author: Alex Voicu <alexandru.voicu at amd.com>
  Date:   2025-09-29 (Mon, 29 Sep 2025)

  Changed paths:
    M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
    M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
    M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn.cl

  Log Message:
  -----------
  [AMDGPU][SPIRV] Use SPIR-V syncscopes for some AMDGCN BIs (#154867)

AMDGCN flavoured SPIR-V allows AMDGCN specific builtins, including those
for scoped fences and some specific RMWs. However, at present we don't
map syncscopes to their SPIR-V equivalents, but rather use the AMDGCN
ones. This ends up pessimising the resulting code as system scope is
used instead of device (agent) or subgroup (wavefront), so we correct
the behaviour, to ensure that we do the right thing during reverse
translation.



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