[all-commits] [llvm/llvm-project] 50a7eb: [MLIR][XeGPU] Add support for vector.multi_reducti...
Steven Wu via All-commits
all-commits at lists.llvm.org
Fri Sep 26 13:27:19 PDT 2025
Branch: refs/heads/users/cachemeifyoucan/spr/cas-add-ondiskhashmappedtrie
Home: https://github.com/llvm/llvm-project
Commit: 50a7eb6fc2977d3a5c2d71d91a799d4275f5a595
https://github.com/llvm/llvm-project/commit/50a7eb6fc2977d3a5c2d71d91a799d4275f5a595
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Add support for vector.multi_reduction in wg to sg pass [1/N] (#157554)
This PR adds pattern for lowering vector.multi_reduction from workgroup
to subgroup IR. It currently only supports sg local reductions
Commit: f07cedbdc6887b02f5ae4188b92ab85e510d964b
https://github.com/llvm/llvm-project/commit/f07cedbdc6887b02f5ae4188b92ab85e510d964b
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/combine-wide.ll
Log Message:
-----------
[NVPTX] Reland `mad.wide` combine under (default off) CLI option (#160214)
Users reported regressions to important matmul kernels as a result of
#155024. Although #155024 was a revert, this PR should allow them to
recover some of the lost performance.
Commit: c924e7a8672fb1098c695d652697946cd69343b6
https://github.com/llvm/llvm-project/commit/c924e7a8672fb1098c695d652697946cd69343b6
Author: David Peixotto <peix at meta.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[workflows] Update commit access request PR links (#146169)
This PR updates the links used to show the PR contribution stats of the
user requesting commit access to the LLVM project. Previously we would
only show the PRs that were currently opened by the user because the
`/pulls/<username>` endpoint automatically applies the `is:open` filter.
The contribution guidelines suggest that the user should have at least 3
merged PRs to be considered for commit access so this seems like a
relevant data point to add.
We now show all PRs that a user has created (not just the open ones) and
a separate link for the PRs that are merged.
Commit: 9e7b21afaaf1b165ac7a9f4bc4afd67a7d1b4687
https://github.com/llvm/llvm-project/commit/9e7b21afaaf1b165ac7a9f4bc4afd67a7d1b4687
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
Log Message:
-----------
[llvm] Fix X86InstrInfo.cpp build after #160188
Commit: 80d3a8015513e2a64c47e173addda6ce816bf85c
https://github.com/llvm/llvm-project/commit/80d3a8015513e2a64c47e173addda6ce816bf85c
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
Log Message:
-----------
[NFC][x86] Cleanup X86FrameLowering::emitSPUpdate (#156948)
I was trying to understand the cases where `emitSPUpdate` may use a
`push` to adjust the stack pointer and realized that the code was more
complex than it needed to be.
* `Chunk` is redundant as it is set to `MaxSPChunk` and never modified.
* The only time we use the `push` optimization is if `Offset` is equal
to `SlotSize` (as `SlotSize` is never as large as `MaxSPChunk`, so will
never equal if `std::min` returned that value).
* If we use the `push` optimization, then we've finished adjusting the
stack and can return early instead of continuing the loop.
Commit: 30402c7dea57d35ead80387c061cda6977ba98ef
https://github.com/llvm/llvm-project/commit/30402c7dea57d35ead80387c061cda6977ba98ef
Author: Dave Bartolomeo <dave_bartolomeo at apple.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/include/clang/Analysis/PathDiagnostic.h
M clang/include/clang/Basic/Sarif.h
M clang/lib/Analysis/PathDiagnostic.cpp
M clang/lib/Basic/Sarif.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
A clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.h
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-diagnostics-taint-test.c.sarif
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-diagnostic-test.c.sarif
A clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-file-diagnostics.c.sarif
A clang/test/Analysis/diagnostics/sarif-multi-file-diagnostics.c
M clang/test/Analysis/lit.local.cfg
Log Message:
-----------
[analyzer] Emit IssueHash in SARIF (#159445)
This change adds two new properties to each `result` object in the SARIF
log:
`partialFingerprints`: Contains the "issue hash" that the analyzer
already generates for each result, which can help identify a result
across runs even if surrounding code changes.
`hostedViewUri`: If running with `-analyzer-format=sarif-html`, this
property will now be emitted with the `file:` URL of the generated HTML
report for that result.
Along the way, I discovered an existing bug where the HTML diagnostic
consumer does not record the path to the generated report if another
compilation already created that report. This caused both the SARIF and
Plist consumers to be missing the link to the file in all but one of the
compilations in case of a warning in a header file. I added a new test
to ensure that the generated SARIF for each compilation contains the
property.
Finally, I made a few changes to the `normalize_sarif` processing in the
tests. I switched to `sed` to allow substitutions. The normalization now
removes directory components from `file:` URLs, replaces the `length`
property of the source file with a constant `-1`, and puts placeholders
in the values of the `version` properties rather than just deleting
them. The URL transformation in particular lets us verify that the right
filename is generated for each HTML report.
Fixes #158159
rdar://160410408
Commit: 96a7c9b9858ac4eb366e443b00784488c190688c
https://github.com/llvm/llvm-project/commit/96a7c9b9858ac4eb366e443b00784488c190688c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__vector/vector_bool.h
A libcxx/test/benchmarks/containers/sequence/vector_bool.bench.cpp
Log Message:
-----------
[libc++] Simplify vector<bool> fill constructors (#160521)
#119632 introduced a code size and performance regression. This was
verified by running the included benchmark against trunk and trunk with
#119632 reverted. Instead of actually reverting that patch, we can
inline `__construct_at_end` into the few places it's used instead,
simplifying the implementation further (by not handling special cases we
never actually encounter).
```
Benchmark Baseline Candidate Difference % Difference
------------------------ ---------- ----------- ------------ --------------
BM_vector_bool_size_ctor 29.91 8.56 -21.35 -71.37
```
Commit: cc95c5680e9fd1a3697822407a9857caeca32dba
https://github.com/llvm/llvm-project/commit/cc95c5680e9fd1a3697822407a9857caeca32dba
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__memory/compressed_pair.h
Log Message:
-----------
[libc++] Remove alignment attributes from _LIBCPP_COMPRESSED_PAIR (#158595)
These attributes aren't required anymore, since the potential
overalignemnt of the objects is handled by the surrounding anonymous
struct.
Commit: 62660e59d9365a2c77724c7cf05986eef7c2354a
https://github.com/llvm/llvm-project/commit/62660e59d9365a2c77724c7cf05986eef7c2354a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
Log Message:
-----------
[gn build] Port 0f1a952399b8
Commit: c3cbd27d005b86ea5c5a375c21b86e6c2110e198
https://github.com/llvm/llvm-project/commit/c3cbd27d005b86ea5c5a375c21b86e6c2110e198
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
A llvm/test/CodeGen/AMDGPU/s_uaddo_usubo_pseudo.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
[AMDGPU] Calc IsVALU correctly during UADDO/USUBO selection (#159814)
Fix two bugs. The first bug hid the second bug.
1. Calculate IsVALU correctly during UADDO/USUBO selection. IsVALU
should be false if the carryout users are UADDO_CARRY/USUBO_CARRY.
However instruction selection visits uses before defs, so the
UADDO_CARRY/USUBO_CARRY nodes are normally (probably always) already
converted to S_ADD_CO_PSEUDO/S_SUB_CO_PSEUDO. Fix to check for these
machine opcodes.
2. Without this fix, UADDO/USUBO selection will always select the VALU
instructions V_ADD_CO__U32_e64/V_SUB_CO_U32_e64.
S_UADDO_PSEUDO/S_USUBO_PSEUDO were never selected in the CodeGen/AMDGPU
tests. Thus, S_UADDO_PSEUDO/S_USUBO_PSEUDO cases were never hit in
EmitInstrWithCustomInserter. The code generation for
S_UADDO_PSEUDO/S_USUBO_PSEUDO had a bug where it could not handle code
generation for 32-bit $scc_out.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 321a7c3caf7c5c6a208501e1406fcab14f8b54f9
https://github.com/llvm/llvm-project/commit/321a7c3caf7c5c6a208501e1406fcab14f8b54f9
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members.mm
Log Message:
-----------
[alpha.webkit.NoUnretainedMemberChecker] Only check @property when @implementation is seen (#159947)
A @interface declaration with a raw pointer @property does not
necessarily mean it synthesizes ivar of that type. To determine whether
such a synthesis happens or not, we must wait for @implementation to
appear. So this PR makes the checker only validate @property then.
Commit: 57330c8514c78e7032975961badf5fa59091f059
https://github.com/llvm/llvm-project/commit/57330c8514c78e7032975961badf5fa59091f059
Author: Aaron Puchert <aaron.puchert at sap.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ThrowKeywordMissingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/throw-keyword-missing.cpp
Log Message:
-----------
Don't look into base class aliases in bugprone-throw-keyword-missing (#160725)
The check confusingly fires on non-exception classes if any base class
has an alias in an exception class. In our case, the exception had an
alias for an allocator interface, so every allocator inheriting from
that interface was treated as an exception type. (But only when the
header for the exception was included.)
The reason behind this is the odd (but documented) behavior of
isDerivedFrom and similar matchers: it does not only iterate through the
bases as written, but through all relevant nodes to check them for being
a base. This makes the matcher also finds aliases of the base classes.
Only going through the bases as written can be done with `hasAnyBase`.
However, that doesn't cover the class itself, and we have to check it
separately. Since we're no longer looking through aliases via the
matcher, and because we're apparently interested in the canonical type,
we check that (see the test with "typedef std::exception ERROR_BASE;").
Commit: 39ed57c0888dd9b76d63757357a8d5a742850ab6
https://github.com/llvm/llvm-project/commit/39ed57c0888dd9b76d63757357a8d5a742850ab6
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[NFC][Clang][OpenMP] Address minor review feedback from #155625. (#160746)
Commit: 1685a6a602c529d3615e2c2d98b7ef060f192eb7
https://github.com/llvm/llvm-project/commit/1685a6a602c529d3615e2c2d98b7ef060f192eb7
Author: itrofimow <i.trofimow at yandex.ru>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/lib/Core/GDBIndex.cpp
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-gdb-generated-gdb11.test
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-lld-generated.test
M bolt/test/X86/dwarf5-gdb-index-types-gdb-generated-gdb11.test
M bolt/test/X86/dwarf5-gdb-index-types-gdb-generated-gdb9.test
M bolt/test/X86/dwarf5-gdb-index-types-lld-generated.test
Log Message:
-----------
[BOLT] Fix incorrect CU-indicies in gdb-index (#151927)
After we sort the CUVector, we have to update CU-indices in address map
and constant pool
Commit: 1b0553c9fa8d61010a43b1a2dcb649d1aab7d8ae
https://github.com/llvm/llvm-project/commit/1b0553c9fa8d61010a43b1a2dcb649d1aab7d8ae
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/bitset
Log Message:
-----------
[libc++] Use _BitInt and __builtin_popcountg in bitset::count() (#160679)
This has multiple benefits:
1) The compiler has to do way less work to figure out things fold into a
simple `popcount`, improving compile times quite a bit
2) The compiler inlines better, since the compile doesn't have to do
complicated optimizations to get to the same point. Looking at the
pipeline, it seems that without this, LLVM has to go all the way to GVN
to get to the same code as there is after the first InstCombine pass
with this change.
Currently this applies only to `bitset`s with at most 64 bits, but that
is by far the most common case.
Commit: ca61a9d96027a34750149b856ffba746999b4e16
https://github.com/llvm/llvm-project/commit/ca61a9d96027a34750149b856ffba746999b4e16
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
Log Message:
-----------
[mlir][xegpu] Support offset arguments in LoadNd, StoreNd and PrefetchNd subgroup distribution. (#160417)
Currently offsets are given as operands of `CreateNd` op. Sg
distribution does not support offsets arguments at the consumer.
This PR adds support for offsets given at the consumer (like LoadNd).
With this change, it is required to specify the offsets at consumer op
(LoadNd, StoreNd, PrefetchNd) of the tile or otherwise distribution will
fail.
This also removes the need for UpdateNdOffset op. PR removes the support
for UpdateNdOffset .
Commit: 04258fe3b15c9ecf78848c9b1470e1048844989e
https://github.com/llvm/llvm-project/commit/04258fe3b15c9ecf78848c9b1470e1048844989e
Author: Dmitry Chigarev <dmitry.chigarev at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
A mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[mlir][XeGPU][XeGPUUnroll] Support new syntax with offsets moved to load_nd/store_nd/prefetch_nd (#160323)
Adds support for new syntax in XeGPUUnroll for:
1. `create_nd_desc` without offsets
2. `load_nd` with offsets
3. `store_nd` with offsets
4. `prefetch_nd` with offsets
`create_nd_desc with offsets` + `load_nd with offsets` won't be lowered
correctly. In this case the IR would still have two unrealized
conversions that will fail later in the pipeline.
The offsets computation for the unrolled tile is now moved from
descriptors to load/store/prefetch operations. The resulted IR now has
one single descriptor that is being iterated in load/store/prefetch ops.
<details><summary>old/new behavior examples</summary>
```mlir
// before unroll pass:
gpu.func @load_nd(%src: memref<256x318xf32>) -> vector<24x32xf32> {
%tdesc = xegpu.create_nd_tdesc %src : memref<256x318xf32> -> !xegpu.tensor_desc<24x32xf32, #xegpu.layout<inst_data = [8, 16]>>
%ld = xegpu.load_nd %tdesc[8, 16]: !xegpu.tensor_desc<24x32xf32, #xegpu.layout<inst_data = [8, 16]>> -> vector<24x32xf32>
gpu.return %ld : vector<24x32xf32>
}
// after unroll pass (offsets in create_nd_desc):
gpu.func @create_nd_tdesc2(%arg0: memref<256x318xf32>) -> vector<24x32xf32> {
%cst = arith.constant dense<0.000000e+00> : vector<24x32xf32>
%c24 = arith.constant 24 : index
%c32 = arith.constant 32 : index
%c8 = arith.constant 8 : index
%c16 = arith.constant 16 : index
// create 6 descriptors for each tile
%0 = xegpu.create_nd_tdesc %arg0[%c8, %c16] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%1 = xegpu.create_nd_tdesc %arg0[%c8, %c32] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%2 = xegpu.create_nd_tdesc %arg0[%c16, %c16] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%3 = xegpu.create_nd_tdesc %arg0[%c16, %c32] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%4 = xegpu.create_nd_tdesc %arg0[%c24, %c16] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%5 = xegpu.create_nd_tdesc %arg0[%c24, %c32] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%6 = xegpu.load_nd %0 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%7 = xegpu.load_nd %1 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%8 = xegpu.load_nd %2 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%9 = xegpu.load_nd %3 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%10 = xegpu.load_nd %4 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%11 = xegpu.load_nd %5 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
...
}
// after unroll pass (offsets in load_nd):
gpu.func @load_nd(%arg0: memref<256x318xf32>) -> vector<24x32xf32> {
%cst = arith.constant dense<0.000000e+00> : vector<24x32xf32>
%c24 = arith.constant 24 : index
%c32 = arith.constant 32 : index
%c16 = arith.constant 16 : index
%c8 = arith.constant 8 : index
// create only one descriptor with proper tile shape
%0 = xegpu.create_nd_tdesc %arg0 : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
// compute tile offsets at the operation (using only one descriptor)
%1 = xegpu.load_nd %0[%c8, %c16] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%2 = xegpu.load_nd %0[%c8, %c32] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%3 = xegpu.load_nd %0[%c16, %c16] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%4 = xegpu.load_nd %0[%c16, %c32] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%5 = xegpu.load_nd %0[%c24, %c16] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%6 = xegpu.load_nd %0[%c24, %c32] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
...
}
```
</details>
---------
Signed-off-by: dchigarev <dmitry.chigarev at intel.com>
Commit: 3e7e60ae5ce80b00602506e007b02e7195373f35
https://github.com/llvm/llvm-project/commit/3e7e60ae5ce80b00602506e007b02e7195373f35
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Lower/OpenMP/declare-mapper.f90
R offload/test/offloading/fortran/target-declare-mapper-parent-allocatable.f90
Log Message:
-----------
Revert "[Flang][OpenMP] Implicitly map nested allocatable components in derived types" (#160759)
Reverts llvm/llvm-project#160116
Commit: 223cfa8018595ff2a809b4e10701bfea884af709
https://github.com/llvm/llvm-project/commit/223cfa8018595ff2a809b4e10701bfea884af709
Author: Chad Smith <cssmith at meta.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/Plugins/Platform/Android/AdbClient.cpp
M lldb/source/Plugins/Platform/Android/AdbClient.h
M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroid.h
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
M lldb/unittests/Platform/Android/AdbClientTest.cpp
M lldb/unittests/Platform/Android/PlatformAndroidTest.cpp
Log Message:
-----------
[lldb] refactor PlatformAndroid and make threadsafe (attempt 2) (#159676)
Reattempt at https://github.com/llvm/llvm-project/pull/145382 (cc
@labath). This time setenv() was replaced with set_env()
(https://github.com/llvm/llvm-project/pull/145382#issuecomment-3187227704).
---------
Co-authored-by: Chad Smith <cssmith at meta.com>
Commit: 90a6884f2d088547f7b2650d2151a316b9694f59
https://github.com/llvm/llvm-project/commit/90a6884f2d088547f7b2650d2151a316b9694f59
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
Enable parsing of optional strings (#154364)
Previously a "opt<std::optional<std::string>>>" would fail to
parse/would attempt to parse option value as argument.
Commit: 93cac97d7d4e5259cb544caab54e9902d3d84dbe
https://github.com/llvm/llvm-project/commit/93cac97d7d4e5259cb544caab54e9902d3d84dbe
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/test/CodeGen/X86/avx512vlfp16-builtins.c
Log Message:
-----------
[Headers][X86] Allow AVX512fp16 initialization intrinsics to be used in constexpr (#159929)
Fixes https://github.com/llvm/llvm-project/issues/156866
---------
Signed-off-by: Shreeyash Pandey <shreeyash335 at gmail.com>
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 302be34a3f387f26e576734e125d174245a987f1
https://github.com/llvm/llvm-project/commit/302be34a3f387f26e576734e125d174245a987f1
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/recursive.ll
Log Message:
-----------
[MemProf] Make sure call clones without callsite node clones get updated (#159861)
Because we may prune differing amounts of call context for different
allocation contexts during matching (we only keep enough call context to
distinguish cold from noncold paths), we can end up with different
numbers of callsite node clones for different callsites in the same
function. Any callsites that don't have node clones for all function
clones should have their copies in those other function clones updated
the same way as the version in the original function, which might be
calling a clone of the callsite.
Commit: 885cb59315f974b261945686177cfa23833793bd
https://github.com/llvm/llvm-project/commit/885cb59315f974b261945686177cfa23833793bd
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/primary64.h
Log Message:
-----------
[scudo] Release to OS if a large amount of memory is deallocated. (#160621)
Before this change, if large amounts of memory are deallocated within a
release interval, the release is put off until the release interval
occurs. Unfortunately, for larger class sizes, this could mean that a
lot of this memory accumulates and is never released since no more
deallocations occur in that size class.
To fix this, if `RegionPushedBytesDelta` grows larger than a group size,
immediately do a release.
This work was originally done by ChiaHungDuan.
Commit: bb284a69688c0b3454dd77342d24719364b79a2b
https://github.com/llvm/llvm-project/commit/bb284a69688c0b3454dd77342d24719364b79a2b
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
Log Message:
-----------
[NFC][PowerPC] Fix err in instruction class name for stxvp (#160764)
Commit: 7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d
https://github.com/llvm/llvm-project/commit/7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
Log Message:
-----------
[clang] simplify constant template parameter type deduction for partial ordering (#160433)
This simplifies things a little bit. This is mostly NFCish, except the
reference type deduction workaround now applies in partial ordering as
well, but we don't have any test cases and any reason to suspect this is
significant.
Commit: 0d6af2db6cd9c964ff300e5b5246c070a57d45e2
https://github.com/llvm/llvm-project/commit/0d6af2db6cd9c964ff300e5b5246c070a57d45e2
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lld/COFF/Writer.cpp
M lld/test/COFF/strtab.s
Log Message:
-----------
[LLD] [COFF] Fix symbol names for import thunks (#160694)
9cc9efc483339ece1d52923569bb755db42b69f3 changed LLD to use a
StringTableBuilder for optimizing the string table, used for long
section and symbol names.
That commit had a bug, where the symbol table entry for an import thunk
with a long symbol name wouldn't get fetched from the
StringTableBuilder, if the base symbol name (without the "__imp_"
prefix) wasn't over 8 chars.
This should fix issues with Go, which errors out on reading the
executables with a broken symbol table, as noted in
https://github.com/mstorsjo/llvm-mingw/issues/518 and
https://github.com/golang/go/issues/75219.
Commit: 5923004f8121a6ce24db9fbfddecfe8ce659691c
https://github.com/llvm/llvm-project/commit/5923004f8121a6ce24db9fbfddecfe8ce659691c
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Don't check address past end of function for data/code marker annotation (#159210)
We want to annotate function with data and code markers
whose addresses fall within the range of the function, so
setting `CheckPastEnd` to false.
Commit: 185ae5cdc695248b58ae017508cc764c19bee5b7
https://github.com/llvm/llvm-project/commit/185ae5cdc695248b58ae017508cc764c19bee5b7
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
M lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp
M lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
M lldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp
M lldb/test/Shell/SymbolFile/NativePDB/find-functions.cpp
M lldb/test/Shell/SymbolFile/NativePDB/local-variables.cpp
M lldb/test/Shell/SymbolFile/NativePDB/stack_unwinding01.cpp
M lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
M lldb/test/Shell/SymbolFile/PDB/variables.test
Log Message:
-----------
Revert "[LLDB][NativePDB] Create functions with mangled name (#149701)"
This reverts commit e98f34eb08b2bf7aed787e7f8a7cea9111f044c8.
This broke demangling of Itanium symbols on i386.
Commit: 9e6fa3954006dd496440e4355c2ae75ea43cb80e
https://github.com/llvm/llvm-project/commit/9e6fa3954006dd496440e4355c2ae75ea43cb80e
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/instrumentation_sequence.s
Log Message:
-----------
[BOLT][AArch64][instr] Consider targeting ARM64 CPUs without LSE support (#158738)
`stadd` is only available in recent arm64 CPUs that have LSE support
(like Cortex-A73 and Cortex-A75) and is not available on old arm64 CPUs
(like Cortex-A53 and Cortex-A55). Devices could have a mixture of these
two kinds of CPUs, for which we need to provide an option for BOLT to
generate instrumentation sequence that emulates what `stadd` would do.
The implementation puts counter increment into an injected helper function
so we don't need to update CFG in the function that is being instrumented
and instrumentation induced binary size increase will be smaller.
Commit: 1e302e942cdbb2db902530144d0c3891f811168b
https://github.com/llvm/llvm-project/commit/1e302e942cdbb2db902530144d0c3891f811168b
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/AArch64/constant-island-alignment.s
Log Message:
-----------
[BOLT] Add heuristics to determine constant island's alignment (#159486)
Constant island embedded in text section doesn't have its alignment
information from input binary and we currently set its alignment as
8 bytes. Constant island might be given a much larger alignment due
to performance or other reasons, so this change adds some heuristics
to determine its alignment based on its size, original address from
input binary and its owning section's alignment.
Commit: a85d3a53d306d6624f20b528cf783de778392347
https://github.com/llvm/llvm-project/commit/a85d3a53d306d6624f20b528cf783de778392347
Author: Chad Smith <cssmith at meta.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/unittests/Platform/Android/AdbClientTest.cpp
Log Message:
-----------
[lldb] Turn off AdbClientTest on windows to fix build breakage (#160771)
https://github.com/llvm/llvm-project/pull/159676 was recently landed.
After it was landed, additional tests were ran, where I saw an assertion
error on windows only. I am not able to test on windows, and the test is
a new test to mock an adb server. The mock server fails to start on
windows, so I am disabling to fix the breakage on main. This is not an
issue with the main code, only a test issue.
Relevant error output:
```
Step 8 (test-check-lldb-unit) failure: Test just built components: check-lldb-unit completed (failure)
******************** TEST 'lldb-unit :: Platform/Android/./AdbClientTests.exe/7/20' FAILED ********************
Script(shard):
--
GTEST_OUTPUT=json:C:\buildbot\as-builder-10\lldb-x86-64\build\tools\lldb\unittests\Platform\Android\.\AdbClientTests.exe-lldb-unit-30696-7-20.json GTEST_SHUFFLE=0 GTEST_TOTAL_SHARDS=20 GTEST_SHARD_INDEX=7 C:\buildbot\as-builder-10\lldb-x86-64\build\tools\lldb\unittests\Platform\Android\.\AdbClientTests.exe
--
Note: This is test shard 8 of 20.
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from AdbClientTest
[ RUN ] AdbClientTest.RealTcpConnection
Assertion failed: error.Fail(), file C:\buildbot\as-builder-10\lldb-x86-64\llvm-project\lldb\source\Host\common\TCPSocket.cpp, line 254
```
Commit: 4193a90b4263ff8c9599b921882cfbd7052b8571
https://github.com/llvm/llvm-project/commit/4193a90b4263ff8c9599b921882cfbd7052b8571
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
A lldb/test/Shell/ObjectFile/ELF/elf-no-shdrs-pt-notes.yaml
Log Message:
-----------
Modify ObjectFileELF so it can load notes from PT_NOTE segments. (#160652)
The ObjectFileELF parser was not able to load ELF notes from PT_NOTE
program headers. This patch fixes ObjectFileELF::GetUUID() to check the
program header and parse the notes in any PT_NOTE segments. This will
allow memory ELF files to extract the UUID from an in memory image that
has no section headers. Added a test that creates an ELF file, strips
all section headers, and then makes sure that LLDB can see the UUID
value.
Commit: bd4f97792addc30e9f6aabc143e1ab2b9c7abff7
https://github.com/llvm/llvm-project/commit/bd4f97792addc30e9f6aabc143e1ab2b9c7abff7
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/tools/offload-arch/CMakeLists.txt
A clang/tools/offload-arch/LevelZeroArch.cpp
M clang/tools/offload-arch/OffloadArch.cpp
Log Message:
-----------
[clang][tools] Add LevelZero support to offload-arch (#160570)
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Commit: 73bcac28d0bfbfd8c997385f25637b85c8f0f818
https://github.com/llvm/llvm-project/commit/73bcac28d0bfbfd8c997385f25637b85c8f0f818
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/tools/llvm-objdump/MachO/function-starts.test
Log Message:
-----------
[llvm-objdump][MachO] Update check in flaky test that depends on directory path (#150674)
Earlier, function-starts.test failed when directory path contained
'_main', because objdump prints out the entire directory path, and there
is an implicit-check-not for '_main'.
There's three ways in which [function starts are printed by
llvm-objdump](https://llvm.org/docs/CommandGuide/llvm-objdump.html#cmdoption-llvm-objdump-function-starts):
With the "addr" mode, there will be no "_main"\
With "names", it'll be printed as "_main\n"\
With "both", it'll be printed as "<addr> _main\n".
The existing check for function-starts=addrs checks that the pattern for
"names" or "both" does not get printed. This MR changes the RUN lines to
take stdin input, so that no directory path is printed, and stray _main
strings in the directory path will not make the test fail.
Commit: e5b2a06546eb20662156b8a59b77aca086301486
https://github.com/llvm/llvm-project/commit/e5b2a06546eb20662156b8a59b77aca086301486
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
A llvm/test/CodeGen/WebAssembly/fake-use.ll
Log Message:
-----------
[WebAssembly] Remove FAKE_USEs before ExplicitLocals (#160768)
`FAKE_USE`s are essentially no-ops, so they have to be removed before
running ExplicitLocals so that `drop`s will be correctly inserted to
drop those values used by the `FAKE_USE`s.
---
This is reapplication of #160228, which broke Wasm waterfall. This PR
additionally prevents `FAKE_USE`s uses from being stackified.
Previously, a 'def' whose first use was a `FAKE_USE` was able to be
stackified as `TEE`:
- Before
```
Reg = INST ... // Def
FAKE_USE ..., Reg, ... // Insert
INST ..., Reg, ...
INST ..., Reg, ...
```
- After RegStackify
```
DefReg = INST ... // Def
TeeReg, Reg = TEE ... DefReg
FAKE_USE ..., TeeReg, ... // Insert
INST ..., Reg, ...
INST ..., Reg, ...
```
And this assumes `DefReg` and `TeeReg` are stackified.
But this PR removes `FAKE_USE`s in the beginning of ExplicitLocals. And
later in ExplicitLocals we have a routine to unstackify registers that
have no uses left:
https://github.com/llvm/llvm-project/blob/7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp#L257-L269
(This was added in #149626. Then it didn't seem it would trigger the
same assertions for `TEE`s because it was fixing the bug where a
terminator was removed in CFGSort (#149097).
Details here:
https://github.com/llvm/llvm-project/pull/149432#issuecomment-3091444141)
- After `FAKE_USE` removal and unstackification
```
DefReg = INST ...
TeeReg, Reg = TEE ... DefReg
INST ..., Reg, ...
INST ..., Reg, ...
```
And now `TeeReg` is unstackified. This triggered the assertion here,
that `TeeReg` should be stackified:
https://github.com/llvm/llvm-project/blob/7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp#L316
This prevents `FAKE_USE`s' uses from being stackified altogether,
including `TEE` transformation. Even when it is not a `TEE`
transformation and just a single use stackification, it does not trigger
the assertion but there's no point stackifying it given that it will be
deleted.
---
Fixes https://github.com/emscripten-core/emscripten/issues/25301.
Commit: d6072986cd40a3c009d2963a2b33501e047c7dc4
https://github.com/llvm/llvm-project/commit/d6072986cd40a3c009d2963a2b33501e047c7dc4
Author: Alireza Torabian <alireza.torabian at huawei.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
A llvm/test/Transforms/LoopFusion/da_separate_loops.ll
M llvm/test/Transforms/LoopFusion/simple.ll
Log Message:
-----------
[LoopFusion] Detecting legal dependencies for fusion using DA info (#146383)
Loop fusion pass will use the information provided by the recent
DA patch to fuse additional legal loops, including those with
forward loop-carried dependencies.
Commit: d77d3a78472410128f6d0b9f71bd36fb26b72feb
https://github.com/llvm/llvm-project/commit/d77d3a78472410128f6d0b9f71bd36fb26b72feb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Shard/Transforms/ShardingPropagation.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for modernize-use-emplace in ShardingPropagation.cpp (NFC)
Commit: 57947ace14ebfadba46a99aa80589e021c757037
https://github.com/llvm/llvm-project/commit/57947ace14ebfadba46a99aa80589e021c757037
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll
Log Message:
-----------
[SLP]Correctly set the insert point for insertlements with copyable arguments
Need to find the last insertelement instruction in the list for the
copyable arguments, otherwise wrong def-use chain may be built
Fixes #160671
Commit: b86aaacf28b358b187071bc87075f1faa2d65c4e
https://github.com/llvm/llvm-project/commit/b86aaacf28b358b187071bc87075f1faa2d65c4e
Author: Andrew Lazarev <alazarev at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__tree
R libcxx/include/__type_traits/is_generic_transparent_comparator.h
R libcxx/include/__type_traits/make_transparent.h
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
Log Message:
-----------
Revert "[libc++] Avoid constructing additional objects when using map::at" (#160738)
Reverts llvm/llvm-project#157866
It breaks a lot of sanitizer buildbots
Commit: 70eb6cc662c9771afb47be4d553667c4b3c4e437
https://github.com/llvm/llvm-project/commit/70eb6cc662c9771afb47be4d553667c4b3c4e437
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port b86aaacf28b3
Commit: 078a4e93dabf2b7e474e538c5dd4f1b5cb7b76e8
https://github.com/llvm/llvm-project/commit/078a4e93dabf2b7e474e538c5dd4f1b5cb7b76e8
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
Log Message:
-----------
[clang] Load `-fbasic-block-sections=list=` through the VFS (#160785)
This PR loads the path from `-fbasic-block-sections=list=<path>` through
the VFS rather than going straight to the real file system. This matches
the behavior of other input files of the compiler.
Commit: d8a296523af503327c86252daaf6a57898e503c1
https://github.com/llvm/llvm-project/commit/d8a296523af503327c86252daaf6a57898e503c1
Author: Francisco Geiman Thiesen <franciscogthiesen at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/BitVector.h
M llvm/unittests/ADT/BitVectorTest.cpp
Log Message:
-----------
[ADT] Adding bidirectional iterator functionality + unit tests (#160726)
This feature is needed for #160415 , kuhar suggested that I split that
PR into 2 so that the ADT work is checking in first.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 3008367910fccb2d5d9ebf71769c7b8a49db4534
https://github.com/llvm/llvm-project/commit/3008367910fccb2d5d9ebf71769c7b8a49db4534
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/tools/offload-arch/LevelZeroArch.cpp
Log Message:
-----------
[offload-arch] Fix warnings
This patch fixes:
clang/tools/offload-arch/LevelZeroArch.cpp:94:1: error: extra ';'
outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
clang/tools/offload-arch/LevelZeroArch.cpp:95:1: error: extra ';'
outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
clang/tools/offload-arch/LevelZeroArch.cpp:96:1: error: extra ';'
outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
clang/tools/offload-arch/LevelZeroArch.cpp:173:55: error: missing
field 'type' initializer [-Werror,-Wmissing-field-initializers]
Commit: 0e17fcf93b6c4a53e23c3ba8ee8961ff3b1a7fba
https://github.com/llvm/llvm-project/commit/0e17fcf93b6c4a53e23c3ba8ee8961ff3b1a7fba
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
A clang/include/clang/Analysis/Analyses/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/CMakeLists.txt
A clang/lib/Analysis/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/Analysis/LifetimeSafety/benchmark.py
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Implement support for lifetimebound attribute (#158489)
Add support for `lifetimebound` attributes in the lifetime safety
analysis to track loans from function parameters to return values.
Implemented support for `lifetimebound` attributes on function
parameters
This change replaces the single `AssignOriginFact` with two separate
operations: `OriginFlowFact` and `KillOriginFact`. The key difference is
in semantics:
* Old `AssignOriginFact`: Replaced the destination origin's loans
entirely with the source origin's loans.
* New `OriginFlowFact`: Can now optionally merge the source origin's
loans to the destination's existing loans.
* New `KillOriginFact`: Clears all loans from an origin.
For function calls with `lifetimebound` parameters, we kill the the
return value' origin first then use `OriginFlowFact` to accumulate loans
from multiple parameters into the return value's origin - enabling
tracking multiple lifetimebound arguments.
- Added a new `LifetimeAnnotations.h/cpp` to provide helper functions
for inspecting and inferring lifetime annotations
- Moved several functions from `CheckExprLifetime.cpp` to the new file
to make them reusable
The `lifetimebound` attribute is a key mechanism for expressing lifetime
dependencies between function parameters and return values. This change
enables the lifetime safety analysis to properly track these
dependencies, allowing it to detect more potential dangling reference
issues.
Commit: 0963cc262708034e41c3ecf412c4597fbec284c5
https://github.com/llvm/llvm-project/commit/0963cc262708034e41c3ecf412c4597fbec284c5
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
Log Message:
-----------
[clang][DebugInfo][NFC] Simplify CollectRecordLambdaFields (#160690)
This patch creates a helper to retrieve the name from a lambda capture
and only calls `createFieldType` once.
This will simplify reviewing some upcoming changes in this function.
Commit: 4a194064dc9e1fddabf7ed9f3b364d07cf6c9613
https://github.com/llvm/llvm-project/commit/4a194064dc9e1fddabf7ed9f3b364d07cf6c9613
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 0e17fcf93b6c
Commit: 85aeb6ab777862be0b79976a34c13ff2954ca238
https://github.com/llvm/llvm-project/commit/85aeb6ab777862be0b79976a34c13ff2954ca238
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
Log Message:
-----------
[clang-tidy] add readability-redundant-parentheses (#159911)
This check wants to detect a common happened case that forgetting to
remove parenthese during modifying code.
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: ba3415bc524667e12990ac86b6897f3840b20a76
https://github.com/llvm/llvm-project/commit/ba3415bc524667e12990ac86b6897f3840b20a76
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port 85aeb6ab7778
Commit: bad92c9c1c054a24742a3fc85045d21e5fd8703d
https://github.com/llvm/llvm-project/commit/bad92c9c1c054a24742a3fc85045d21e5fd8703d
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lld/test/wasm/mutable-global-exports.s
M lld/wasm/Writer.cpp
Log Message:
-----------
[lld][WebAssembly] Fix check for exporting mutable globals (#160787)
We were not actually checking whether the global in question was
actually mutable before reporting the error.
Commit: 8a9aa183ac593d72c4713a0a9117774e7e50a3e7
https://github.com/llvm/llvm-project/commit/8a9aa183ac593d72c4713a0a9117774e7e50a3e7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtin-masked.c
M clang/test/Sema/builtin-masked.c
A clang/test/Sema/builtin-masked.cpp
A clang/test/SemaObjC/builtin-masked.m
Log Message:
-----------
[Clang][FIX] Fix type qualifiers on vector builtins (#160185)
Summary:
These were not stripping qualifiers when using them to infer the types,
leading to errors when mixiing const and non-const.
Commit: 663414817b2669cee9d828c909822d3b4b9f5bbb
https://github.com/llvm/llvm-project/commit/663414817b2669cee9d828c909822d3b4b9f5bbb
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
Log Message:
-----------
[SPIRV][NFC] Update issue number in XFAIL test for non-uniform resource index (#160381)
Commit: be23cdc858b860fbcc17c1f260d8a127a24d90b6
https://github.com/llvm/llvm-project/commit/be23cdc858b860fbcc17c1f260d8a127a24d90b6
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/LiveRangeEdit.h
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
Log Message:
-----------
[RegAlloc] Account for use availability when applying rematerializable weight discount (#159180)
This aims to fix the issue that caused https://reviews.llvm.org/D106408
to be reverted.
CalcSpillWeights will reduce the weight of an interval by half if it's
considered rematerializable, so it will be evicted before others.
It does this by checking TII.isTriviallyReMaterializable. However
rematerialization may still fail if any of the defining MI's uses aren't
available at the locations it needs to be rematerialized.
LiveRangeEdit::canRematerializeAt calls allUsesAvailableAt to check this
but CalcSpillWeights doesn't, so the two diverge.
This fixes it by also checking allUsesAvailableAt in CalcSpillWeights.
In practice this has zero change AArch64/X86-64/RISC-V as measured on
llvm-test-suite, but prevents weights from being perturbed in an
upcoming patch which enables more rematerialization by re-attempting
https://reviews.llvm.org/D106408
Commit: f6ded0be897e2878612dd903f7e8bb85448269e5
https://github.com/llvm/llvm-project/commit/f6ded0be897e2878612dd903f7e8bb85448269e5
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/python/CMakeLists.txt
Log Message:
-----------
[MLIR][Python] don't generate type stubs when cross-compiling (#160793)
Stubgen doesn't work when cross-compiling (stubgen will run in the host
interpreter and then fail to find the extension module for the host
arch). So disable it when `CMAKE_CROSSCOMPILING=ON`.
Commit: 55906e0abb685d52a5a134c83ad230229e76de3b
https://github.com/llvm/llvm-project/commit/55906e0abb685d52a5a134c83ad230229e76de3b
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
A llvm/test/tools/llvm-dwarfdump/verify_stmt_seq.yaml
Log Message:
-----------
[DWARFVerifier] Verify that DW_AT_LLVM_stmt_sequence is set correctly (#152807)
Sometimes DW_AT_LLVM_stmt_sequence won't point to the correct offset.
This feature helps us debug when/where it went wrong.
Added a new test and manually tempered with the value to show the
intended verification result.
---------
Signed-off-by: Peter Rong <PeterRong at meta.com>
Commit: 1867ca7afeea5eded105f868720b832ac2a4e204
https://github.com/llvm/llvm-project/commit/1867ca7afeea5eded105f868720b832ac2a4e204
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/Mustache.cpp
Log Message:
-----------
[llvm] Add benchmarks for Mustache (#160164)
The mustache library still has many issues with performance. While not
critical, template rendering is fairly simple, and should be fast. This
is hard to reason about without a benchmark. Since there is no standard
benchmark suite for Mustache, we can construct some benchmarks that will
stress our implementation.
This commit adds a new benchmark suite (MustacheBench) that tests
several
key performance areas:
- Parsing (Complex): Measures the one-time parse cost of a large
template.
- Parsing (Small): Measures the parse cost of a small template with deep
keys.
- Data Traversal: Stresses hot, cached data traversal using a
5k-iteration loop inside the template.
- Context Stack: Tests the render cost of deeply nested sections
(50 levels).
- Array Iteration: Benchmarks section iteration over a 100,000-item
array.
- Partial Rendering: Tests partial tag performance inside a large loop.
- String Escaping: Measures HTML-escaping a large string.
- String Unescaped (Triple): Baseline for {{{...}}} syntax.
- String Unescaped (Ampersand): Baseline for {{& ...}} syntax.
- Output Buffer: Tests rendering a single 1MB string.
Initial results show that Partial rendering is by far the slowest
operation. The cost per-item is ~3x higher than simple iteration,
because partial templates are being re-parsed on every call instead of
being cached. It also shows that the logic for HTML escaping is very
expensive likely due to the character by character parsing done to
escapes.
Commit: cc0fecf619301c68a7c885b4e2f2215144abab5a
https://github.com/llvm/llvm-project/commit/cc0fecf619301c68a7c885b4e2f2215144abab5a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/global_float_array.mlir
Log Message:
-----------
[MLIR][MLIRToLLVM] Fix zero fp value to array translation (#160713)
The translator should not generate zeroinitilizer on fp all zero values,
since it may affect signedness of zeroes
Fixes #160437
Commit: 2810a489d233baa68f405ed9c4a83675509df098
https://github.com/llvm/llvm-project/commit/2810a489d233baa68f405ed9c4a83675509df098
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/utils/compare-benchmarks
M libcxx/utils/visualize-historical
Log Message:
-----------
[libc++] Use pandas.DataFrame in compare-benchmarks
This opens the door to performing more advanced computations on the
data we're comparing.
Commit: 7ad70d2793ec9baba1f343d82c8457b744c74164
https://github.com/llvm/llvm-project/commit/7ad70d2793ec9baba1f343d82c8457b744c74164
Author: Thurston Dang <thurston at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
Log Message:
-----------
[msan] Handle AVX512/AVX10 vrndscale (#160624)
Uses the updated handleAVX512VectorGenericMaskedFP() from
https://github.com/llvm/llvm-project/pull/159966
Commit: 9440f40cfbe7a62aed9e5726901a2ef935a60d54
https://github.com/llvm/llvm-project/commit/9440f40cfbe7a62aed9e5726901a2ef935a60d54
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll
M llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll
Log Message:
-----------
[LoongArch] Support vector types for hasAndNot to enable more DAG combines (#159056)
After this commit, DAGCombiner will have more opportunities to optimize
vector types `and+...+not` to `andn`.
Many combines in DAGCombiner will be enabled, but only shows changes
after combining `and(add(not))` to `and(not(sub))` in the tests of this
commit.
Commit: 8553bd2b29ad2b17a9a884f14da6c43b606ec776
https://github.com/llvm/llvm-project/commit/8553bd2b29ad2b17a9a884f14da6c43b606ec776
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
M llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
Log Message:
-----------
[LoongArch] Override shouldScalarizeBinop to enable `extract(binop)->binop(extract)` combination (#159726)
Commit: 7275c178bd989bd431ae8aaff57d62d6fba1cc4f
https://github.com/llvm/llvm-project/commit/7275c178bd989bd431ae8aaff57d62d6fba1cc4f
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
Log Message:
-----------
[VPlan] Fix packed replication of struct types (#160274)
I ran into this crash when #158690 caused a loop with a struct call to
be vectorized.
If we have a replicate recipe in a branch-on-mask predicated region
that's used by a widened recipe in another block then it will be packed
together with the other lanes via a VPPredInstPHIRecipe.
If we're replicating a call with a struct return type then we currently
crash. The code that handles structs in packScalarIntoVectorizedValue
seemed to be untested at least on test/Transforms/LoopVectorize.
There's two places that need to be fixed. The poison value that the
scalar is packed into needs to use toVectorizedTy to correctly handle
structs (not to be confused with toVectorTy!)
The other is that VPPredInstPHIRecipe expects its operand to be an
InsertElementInstr when stringing together the different lanes. For
structs this will be an InsertVlaueInstr, and the value for the previous
lane will be at the back of a chain of InsertValueInstrs.
Commit: b4b89a688c290f8c5a5f4f9427d4781e9b1a4ce8
https://github.com/llvm/llvm-project/commit/b4b89a688c290f8c5a5f4f9427d4781e9b1a4ce8
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/GenericSSAContext.h
Log Message:
-----------
[Unifomity] Fix type of ValueRefNull (NFC)
ValueRefNull has no current users.
Commit: c4a134f59108c8a5e41d9f2539b0ee96f5cbccec
https://github.com/llvm/llvm-project/commit/c4a134f59108c8a5e41d9f2539b0ee96f5cbccec
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
Log Message:
-----------
[profcheck] Add unknown branch weights for inlined strcmp/strncmp (#160455)
The strcmp/strncmp inliner creates new conditional branches but was
failing to add profile metadata. This caused the ProfileVerifierPass to
fail when profcheck is enabled.
This patch fixes the issue by explicitly adding unknown branch weights
to these branches.
Issue #147390
Commit: 1e01c029961c0dd3dd70b68e029581dc6ef9c17b
https://github.com/llvm/llvm-project/commit/1e01c029961c0dd3dd70b68e029581dc6ef9c17b
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
Log Message:
-----------
[DAGCombiner] Remove `NoSignedZerosFPMath` uses in `visitFADD` (#160635)
Remove these global flags and use node level flags instead.
Commit: b928695c2fb8968764f0ae04f8a1ee62ffc9c94d
https://github.com/llvm/llvm-project/commit/b928695c2fb8968764f0ae04f8a1ee62ffc9c94d
Author: co63oc <co63 at 163.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMutate.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
Log Message:
-----------
[compiler-rt] fix typos (#160799)
fix typos
Commit: 6679e43937a87db3ce59a02f0cfc86951a4881e4
https://github.com/llvm/llvm-project/commit/6679e43937a87db3ce59a02f0cfc86951a4881e4
Author: Koakuma <koachan at protonmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/test/CodeGen/sparcv9-abi.c
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/test/CodeGen/SPARC/64abi.ll
Log Message:
-----------
[clang][SPARC] Pass 16-aligned structs with the correct alignment in CC (#155829)
Pad argument registers to preserve overaligned structs in LLVM IR.
Additionally, since i128 values will be lowered as split i64 pairs in
the backend, correctly set the alignment of such arguments as 16 bytes.
This should make clang compliant with the ABI specification and fix
https://github.com/llvm/llvm-project/issues/144709.
Commit: 114b3b8b04fe5aae4143e30078637015a9e077ce
https://github.com/llvm/llvm-project/commit/114b3b8b04fe5aae4143e30078637015a9e077ce
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsExpandPseudo.cpp
M llvm/test/CodeGen/Mips/atomic-min-max.ll
Log Message:
-----------
[Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (#159717)
Modify instr movn/movz to mixture of beq, move, and sc.
Because atomic-min-max.ll test broken on the expensive builder, I revert
https://github.com/llvm/llvm-project/pull/149983 and resubmit this PR.
The broken reason:
In i16/i8 function expandAtomicBinOpSubword, we use two successor
after loop2MBB, one does not specify the second parameter, the other
use BranchProbability::getOne() that means 100% probability. This is
contradictory. And the second successor is also specified incorrectly.
The changess:
* llvm/lib/Target/Mips/MipsExpandPseudo.cpp:
Change loop2MBB`s second successor to correct one and delete the
second parameter BranchProbability::getOne().
* llvm/test/CodeGen/Mips/atomic-min-max.ll:
Add -verify-machineinstrs option in RUN command;
Modify i16 test and i8 test according to the changes.
Fix #145411.
Commit: de59bc42ed84e062360eb3a9e591a195bfb1104f
https://github.com/llvm/llvm-project/commit/de59bc42ed84e062360eb3a9e591a195bfb1104f
Author: Josh Hutton <55123932+JoshHuttonCode at users.noreply.github.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[AMDGPU] Avoid constraining RC based on folded into operand (NFC) (#160743)
The RC of the folded operand does not need to be constrained based on
the RC of the current operand we are folding into.
The purpose of this PR is to facilitate this PR:
https://github.com/llvm/llvm-project/pull/151033
Commit: a274ffe2597ca53d828d08d44af0f44d3b823507
https://github.com/llvm/llvm-project/commit/a274ffe2597ca53d828d08d44af0f44d3b823507
Author: Pete Chou <petechou at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
A llvm/test/CodeGen/AMDGPU/postra-machine-sink-livein-subrange.mir
Log Message:
-----------
[MachineSink] Remove subrange of live-ins from super register as well. (#159145)
Post-RA machine sinking could sink a copy of sub-register into
a successor. However, the sub-register might not be removed from the
live-in bitmask of its super register in successor and then a later
pass, e.g, if-converter, may add an implicit use of the register from
live-in resulting in an use of an undefined register. This change makes
sure subrange of live-ins from super register could be removed as well.
Commit: fe2dc19a8bb11675dd3c1b01adb1c711dc82086d
https://github.com/llvm/llvm-project/commit/fe2dc19a8bb11675dd3c1b01adb1c711dc82086d
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvrepl128vei.ll
Log Message:
-----------
[LoongArch] Refine 256-bit vector_shuffle legalization for LASX (#160254)
Commit: 77a3d431ff95a69736da42ec2b12e26b9e1e4bcc
https://github.com/llvm/llvm-project/commit/77a3d431ff95a69736da42ec2b12e26b9e1e4bcc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
A clang/test/DebugInfo/CXX/lambda-capture-packs.cpp
Log Message:
-----------
[clang][DebugInfo][test] Add tests for lambda capture packs (#160705)
We didn't have coverage for this yet. And I'm planning on making some
chnges in this area. These tests will be useful for that.
Commit: beed796ea02a54ec44a30db092e3f5d045390434
https://github.com/llvm/llvm-project/commit/beed796ea02a54ec44a30db092e3f5d045390434
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/shuffle-as-permute-and-shuffle.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
Log Message:
-----------
[LoongArch] Custom legalize vector_shuffle to xvpermi.d when possible (#160429)
Commit: 8cd917bc80eb9882cdc38d49ed82d855820d7e6c
https://github.com/llvm/llvm-project/commit/8cd917bc80eb9882cdc38d49ed82d855820d7e6c
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
Log Message:
-----------
[AMDGPU] Skip debug uses in SIInsertWaitcnts::shouldFlushVmCnt (#160818)
Commit: 3257dc35fe9ed872788e90c948cb4bb593b8fa05
https://github.com/llvm/llvm-project/commit/3257dc35fe9ed872788e90c948cb4bb593b8fa05
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/test/CodeGen/ARM/fnegs.ll
M llvm/test/CodeGen/ARM/fnmscs.ll
Log Message:
-----------
[ARM] Remove `UnsafeFPMath` uses in code generation part (#160801)
Factor out from #151275
Remove all UnsafeFPMath uses but ABI tags related part.
Commit: 368d59986e769511437781fdd45cd5f787f35980
https://github.com/llvm/llvm-project/commit/368d59986e769511437781fdd45cd5f787f35980
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M lldb/test/Shell/ObjectFile/ELF/elf-no-shdrs-pt-notes.yaml
Log Message:
-----------
[lldb][test] Fix elf-no-shdrs-pt-notes.yaml on Windows (#160827)
Windows paths have different slashes, but I don't think we care about
the exact paths there anyway so I've just checked for the final
filename.
Fixes #160652
Commit: 2cacf7117ba0fb7c134413a1a51302f8d6649052
https://github.com/llvm/llvm-project/commit/2cacf7117ba0fb7c134413a1a51302f8d6649052
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
[ARM] Improve comment on the 'J' inline asm modifier. (#160712)
An inline asm constraint "Jr", in AArch32, means that if the input value
is a compile-time constant in the range -4095 to +4095, then it can be
inserted into the assembly language as an immediate operand, and
otherwise it will be placed in a register.
The comment in the Arm backend said "It is not clear what this
constraint is intended for". I believe the answer is that that range of
immediate values are the ones you can use in a LDR or STR instruction.
So it's suitable for cases like this:
asm("str %0,[%1,%2]" : : "r"(data), "r"(base), "Jr"(offset) : "memory");
in the same way that the "Ir" constraint is suitable for the immediate
in a data-processing instruction such as ADD or EOR.
Commit: 9de1bc0336540ad643249ec216d9c02f9b3b3786
https://github.com/llvm/llvm-project/commit/9de1bc0336540ad643249ec216d9c02f9b3b3786
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
Log Message:
-----------
[LoongArch] Generate [x]vldi instructions with special constant splats (#159258)
Commit: 8c122e5d3bcbdd82c34a406c6d3029060306521a
https://github.com/llvm/llvm-project/commit/8c122e5d3bcbdd82c34a406c6d3029060306521a
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/cpu_feature.py
Log Message:
-----------
[lldb][test] Make Linux cpuinfo check more robust (#160675)
We were looking for any mention of the feature name in cpuinfo, which
could have hit anything including features with common prefixes like
sme, sme2, smefa64.
Luckily this was not a problem but I'm changing this to find the
features line and split the features into a list. Then we are only
looking for exact matches.
Here's the information for one core as an example:
```
processor : 7
BogoMIPS : 200.00
Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid <...>
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x0
CPU part : 0xd0f
CPU revision : 0
```
(and to avoid any doubt, this is from a CPU simulated in Arm's FVP, it's
not real)
Note that the layout of the label, colon, values is sometimes aligned
but not always. So I trim whitespace a few times to normalise that.
This repeats once for each core so we only need to find one features
line.
Commit: 9b270fcb376ccdef333ae717f37d04d90defd115
https://github.com/llvm/llvm-project/commit/9b270fcb376ccdef333ae717f37d04d90defd115
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Set default rounding mode round to nearest for llvm.set.rounding (#160823)
- Fix
https://github.com/llvm/llvm-project/pull/156591#issuecomment-3335218842
- As per https://cdrdv2.intel.com/v1/dl/getContent/671200 default
rounding mode is **round to nearest**.
Commit: aa08b1a9963f33ded658d3ee655429e1121b5212
https://github.com/llvm/llvm-project/commit/aa08b1a9963f33ded658d3ee655429e1121b5212
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)
Split out from #151300 to isolate TargetTransformInfo cost modelling for
fault-only-first loads from VPlan implementation details. This change
adds costing support for vp.load.ff independently of the VPlan work.
For now, model a vp.load.ff as cost-equivalent to a vp.load.
Commit: 656707086e5f6fccd2eb57f5aaf987c328c0f4f1
https://github.com/llvm/llvm-project/commit/656707086e5f6fccd2eb57f5aaf987c328c0f4f1
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
Log Message:
-----------
[compiler-rt] Fix test ifdefs and XFAILs (#160687)
This fixes the ifdefs added in
e9e166e54354330c474457711a8e7a7ca2efd731; we need to include int_lib.h
first before we can expect these defines to be set.
Also remove the XFAILs for aarch64 windows. As this test now became a
no-op on platforms that lack CRT_HAS_128BIT or CRT_HAS_F128 (aarch64
windows lacks the latter), it no longer fails.
Commit: d357e965af90cbcfcd717e9d82502bda68f10d5e
https://github.com/llvm/llvm-project/commit/d357e965af90cbcfcd717e9d82502bda68f10d5e
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir
Log Message:
-----------
[RegisterCoalescer] Mark implicit-defs of super-registers as dead in remat (#159110)
Currently, something like:
```
$eax = MOV32ri -11, implicit-def $rax
%al = COPY $eax
```
Can be rematerialized as:
```
dead $eax = MOV32ri -11, implicit-def $rax
```
Which marks the full $rax as used, not just $al.
With this change, this is rematerialized as:
```
dead $eax = MOV32ri -11, implicit-def dead $rax, implicit-def $al
```
To indicate that only $al is used.
Note: This issue is latent right now, but is exposed when #134408 is
applied, as it results in the register pressure being incorrectly
calculated (unless this patch is applied too).
I think this change is in line with past fixes in this area, notably:
https://github.com/llvm/llvm-project/commit/059cead5ed7aa11ce1eae0bcc751ea0d1e23ea75
https://github.com/llvm/llvm-project/commit/69cd121dd9945429b565b6a5eb8719130de880a7
Commit: 745e1e6ad5d40ff8f1553e62c48554a61611ee76
https://github.com/llvm/llvm-project/commit/745e1e6ad5d40ff8f1553e62c48554a61611ee76
Author: Wenju He <wenju.he at intel.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/NVPTX/machinelicm-no-preheader.mir
Log Message:
-----------
[CodeGen] Ignore requiresStructuredCFG check in canSplitCriticalEdge if successor is loop header (#154063)
This addresses a performance issue for our downstream GPU target that
sets requiresStructuredCFG to true. The issue is that EarlyMachineLICM
pass does not hoist loop invariants because a critical edge is not
split.
The critical edge's destination a loop header. Splitting the critical
edge will not break structured CFG.
Add a nvptx test to demonstrate the issue since the target also
requires structured CFG.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 5d51e006caa6a2ca6c9944200ca69bcb1c38576a
https://github.com/llvm/llvm-project/commit/5d51e006caa6a2ca6c9944200ca69bcb1c38576a
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/ConvertConv2DToImg2Col.cpp
M mlir/test/Dialect/Linalg/convert-conv2d-to-img2col.mlir
Log Message:
-----------
[mlir][linalg] Propagate filter tensor encoding in im2col (#160099)
In the im2col decomposition, propagate the filter tensor encoding (if
specified) through the tensor.collapse_shape op, so that it can be used
by the consuming linalg.generic matmul op.
Signed-off-by: Fabrizio Indirli <Fabrizio.Indirli at arm.com>
Commit: 78af0561376ff2eb01bd0ed7ef3055e5a9954746
https://github.com/llvm/llvm-project/commit/78af0561376ff2eb01bd0ed7ef3055e5a9954746
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
Log Message:
-----------
[VPlan] Run CSE closer to VPlan::execute. (#160572)
Additional CSE opportunities are exposed after converting to concrete
recipes/dissolving regions and materializing various expressions. Run
CSE later, to capitalize on some of the late opportunities.
PR: https://github.com/llvm/llvm-project/pull/160572
Commit: ef5e0c7c83080af7f752dcadbb9972ed3e3a9c39
https://github.com/llvm/llvm-project/commit/ef5e0c7c83080af7f752dcadbb9972ed3e3a9c39
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(pshufb(x,y)) -> pshufb(freeze(x),freeze(y)) (#160835)
Commit: c10befb9d3b2b50e37048f2aba5dda0f77031ba3
https://github.com/llvm/llvm-project/commit/c10befb9d3b2b50e37048f2aba5dda0f77031ba3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(vpermps(x,y)) -> vpermps(freeze(x),freeze(y)) (#160837)
Commit: c7312916b7e228460c1c21c1f5959dc3c1973c4c
https://github.com/llvm/llvm-project/commit/c7312916b7e228460c1c21c1f5959dc3c1973c4c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(permilvar(x,y)) -> permilvar(freeze(x),freeze(y)) (#160836)
Commit: 96675a467ef5811dc1e78b2bec3c90cf0c67ba1c
https://github.com/llvm/llvm-project/commit/96675a467ef5811dc1e78b2bec3c90cf0c67ba1c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Clang.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/split-debug.f90
A flang/test/Integration/debug-split-dwarf.f90
Log Message:
-----------
[flang][Driver] Support -gsplit-dwarf. (#160540)
This flags enables the compiler to generate most of the debug
information in a separate file which can be useful for executable size
and link times. Clang already supports this flag.
I have tried to follow the logic of the clang implementation where
possible. Some functions were moved where they could be used by both
clang and flang. The `addOtherOptions` was renamed to `addDebugOptions`
to better reflect its purpose.
Clang also set the `splitDebugFilename` field of the `DICompileUnit` in
the IR when this option is present. That part is currently missing from
this patch and will come in a follow-up PR.
Commit: 0fff27084b5d4daf218c5a16e2290917dfddbf68
https://github.com/llvm/llvm-project/commit/0fff27084b5d4daf218c5a16e2290917dfddbf68
Author: LeeYoungJoon <dog3hk.dev at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
M llvm/docs/Reference.rst
M llvm/docs/index.rst
Log Message:
-----------
[QualGroup][docs] Reorganize QualGroup docs under Reference section (#160021)
This patch makes the following updates to the `QualGroup` documentation:
✅ 1. Move to Reference section
Relocated the Qualification Working Group (QualGroup) docs from the main
index into the Reference section for better organization and
consistency.
✅ 2. Add link in GettingInvolved
Inserted a proper link to the QualGroup documentation in the
GettingInvolved sync-ups table, improving discoverability for newcomers.
✅ 3. Align structure with Security Group
Revised the documentation layout to follow the same structure pattern as
the Security Group docs, ensuring consistency across LLVM working group
references.
Commit: f6fc5e83d71e643518c63acb5e43847cd1813895
https://github.com/llvm/llvm-project/commit/f6fc5e83d71e643518c63acb5e43847cd1813895
Author: A. Jiang <de34 at live.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
Log Message:
-----------
[libc++][test] Guard non-guaranteed implicit-lifetime-ness cases with `_LIBCPP_VERSION` (#160627)
And add some guaranteed cases (namely, for `expected`, `optional`, and
`variant`) to `is_implicit_lifetime.pass.cpp`.
It's somehow unfortunate that `pair` and `tuple` are not guaranteed to
propagate triviality of copy/move constructors, and MSVC STL fails to do
so due to ABI compatibility. This affects the implicit-lifetime
property.
Commit: 81aafd91fd27f20677402b6a8c8aacbc4928d6d1
https://github.com/llvm/llvm-project/commit/81aafd91fd27f20677402b6a8c8aacbc4928d6d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode/isGuaranteedNotToBeUndefOrPoisonForTargetNode - add X86ISD::PSHUFB handling (#160842)
X86ISD::PSHUFB shuffles can't create undef/poison itself, allowing us to fold freeze(pshufb(x,y)) -> pshufb(freeze(x),freeze(y))
Commit: a27baf9c96a484312a1a32df1e552bcce7a610d1
https://github.com/llvm/llvm-project/commit/a27baf9c96a484312a1a32df1e552bcce7a610d1
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
Log Message:
-----------
[SelectionDAG] Improve v2f16 maximumnum expansion (#160723)
On targets where f32 maximumnum is legal, but maximumnum on vectors of
smaller types is not legal (e.g. v2f16), try unrolling the vector first
as part of the expansion.
Only fall back to expanding the full maximumnum computation into
compares + selects if maximumnum on the scalar element type cannot be
supported.
Commit: 347df234e0558a1818a563ff896d8b434f2c1016
https://github.com/llvm/llvm-project/commit/347df234e0558a1818a563ff896d8b434f2c1016
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpFrame.h
Log Message:
-----------
[clang][bytecode] Remove Program include from InterpFrame.h (#160843)
Program itself is unused in that file, so just include the needed
headers.
Commit: 2100c504d9454e920ecbadfe3b81abacf296fd5e
https://github.com/llvm/llvm-project/commit/2100c504d9454e920ecbadfe3b81abacf296fd5e
Author: Ross Burton <ross.burton at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
[clang] Support building native tools when cross-compiling standalone clang (#160605)
When cross-compiling the LLVM project as a whole (from llvm/), if it
cannot find presupplied tools it will create a native build environment
to build the tools it needs.
However, when doing a standalone build of clang (that is, from clang/
and linking against an existing libLLVM) this doesn't work. Instead a
_target_ binary is built which predictably then fails.
The conventional workaround for this is to build the native tools in a
separate native compile phase and pass the paths to the cross build, for
example see OpenEmbedded[1] or Nix[2]. But we can do better!
The first problem is that LLVM_USE_HOST_TOOLS is only set in the llvm/
CMakeLists.txt, so setup_host_tool() will never consider building a
native binary. This can be solved by setting LLVM_USE_HOST_TOOLS based
on CMAKE_CROSSCOMPILING in clang/CMakeLists.txt in the standalone case.
Now setup_host_tool() will try to build a native tool, but it needs
build_native_tool() from CrossCompile.cmake, so that also needs to be
included.
Finally, the native binary then fails because there's no provider for
the dependency "CONFIGURE_Clang_NATIVE", so use llvm_create_cross_target
to create the native environment.
These few lines mirror what the lldb CMakeLists.txt does in the
standalone case, so there is prior art for this.
[1]
https://git.openembedded.org/openembedded-core/tree/meta/recipes-devtools/clang/clang_git.bb?id=e18d697e92b55e57124e80234369d46575226386#n212
[2]
https://github.com/NixOS/nixpkgs/blob/3354d448f2a26117a74638957b0131ce3da9c8c4/pkgs/development/compilers/llvm/common/tblgen.nix#L54
Commit: 3073bb5fcfbb62910876f22084a5eb0478d3ff8f
https://github.com/llvm/llvm-project/commit/3073bb5fcfbb62910876f22084a5eb0478d3ff8f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode/isGuaranteedNotToBeUndefOrPoisonForTargetNode - add X86ISD::VPERMV handling (#160845)
X86ISD::VPERMV shuffles can't create undef/poison itself, allowing us to fold freeze(vpermps(x,y)) -> vpermps(freeze(x),freeze(y))
Commit: 02746f80c1fa1d17997849a9bf5a41a91523ca41
https://github.com/llvm/llvm-project/commit/02746f80c1fa1d17997849a9bf5a41a91523ca41
Author: David Green <david.green at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll
M llvm/test/CodeGen/ARM/2012-04-10-DAGCombine.ll
M llvm/test/CodeGen/ARM/fnmul.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll
R llvm/test/CodeGen/ARM/fp16.ll
M llvm/test/CodeGen/ARM/sincos.ll
M llvm/test/CodeGen/ARM/vminmaxnm.ll
Log Message:
-----------
[ARM] Remove -fno-unsafe-math from a number of tests. NFC
llvm.convert/to.fp16 and from.fp16 are no longer used / deprecated and do not
need to be tested any more.
Commit: e38e0bde41e084a05de6972a5a9fff81435c7f77
https://github.com/llvm/llvm-project/commit/e38e0bde41e084a05de6972a5a9fff81435c7f77
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/test/CAPI/llvm.c
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir] Add splitDebugFilename field in DIComplileUnitAttr. (#160704)
Mostly mechanical changes to add the missing field.
Commit: 0aad055f30d8148057a71a2f5f1cdb2d1bab2eee
https://github.com/llvm/llvm-project/commit/0aad055f30d8148057a71a2f5f1cdb2d1bab2eee
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(insertps(x,y,i)) -> insertps(freeze(x),freeze(y),i) (#160852)
Commit: 3fa3e09bdc568db733cf85d020e02e6a8fa0c97f
https://github.com/llvm/llvm-project/commit/3fa3e09bdc568db733cf85d020e02e6a8fa0c97f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode/isGuaranteedNotToBeUndefOrPoisonForTargetNode - add X86ISD::VPERMILPV handling (#160849)
X86ISD::VPERMILPV shuffles can't create undef/poison itself, allowing us to fold freeze(vpermilps(x,y)) -> vpermilps(freeze(x),freeze(y))
Commit: 42dd9260dbd615c075844c6c96ec6665be6c1aed
https://github.com/llvm/llvm-project/commit/42dd9260dbd615c075844c6c96ec6665be6c1aed
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libcxx/utils/visualize-historical
Log Message:
-----------
[libc++] Switch back to plotting on revlist order for visualize-historical
That provides vastly better plots.
Commit: 83ef38a274b76c8877f15d3758d955772f91cf2d
https://github.com/llvm/llvm-project/commit/83ef38a274b76c8877f15d3758d955772f91cf2d
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A offload/test/offloading/fortran/target-no-loop.f90
M openmp/device/src/Workshare.cpp
Log Message:
-----------
[Flang][OpenMP] Enable no-loop kernels (#155818)
Enable the generation of no-loop kernels for Fortran OpenMP code. target
teams distribute parallel do pragmas can be promoted to no-loop kernels
if the user adds the -fopenmp-assume-teams-oversubscription and
-fopenmp-assume-threads-oversubscription flags.
If the OpenMP kernel contains reduction or num_teams clauses, it is not
promoted to no-loop mode.
The global OpenMP device RTL oversubscription flags no longer force
no-loop code generation for Fortran.
Commit: 9be276ec75c087595ebb62fe11b35c1a90371a49
https://github.com/llvm/llvm-project/commit/9be276ec75c087595ebb62fe11b35c1a90371a49
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/trip-multiple-guard-info.ll
Log Message:
-----------
[SCEV] Add tests for computing trip counts with align assumptions.
Commit: eaf36c668c956a90bfb00c47415c4c8550f159c8
https://github.com/llvm/llvm-project/commit/eaf36c668c956a90bfb00c47415c4c8550f159c8
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.cpp
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
Log Message:
-----------
[ASan] Update meminstrinsics to use library memmove rather than internal (#160740)
Currently `memcpy` and `memset` intrinsics map through to the library
implementations if ASan has been inited, whereas `memmove` always calls
`internal_memmove`.
This patch changes `memmove` to use the library implementation if ASan
has been inited.
Commit: bb38b48910967041045997a0c1293ee2ba834196
https://github.com/llvm/llvm-project/commit/bb38b48910967041045997a0c1293ee2ba834196
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/unittests/CMakeLists.txt
Log Message:
-----------
[flang-rt] Set _POSIX_C_SOURCE on Darwin (#160130)
Clang on Darwin enables non-POSIX extensions by default.
This causes some macros to leak, such as HUGE from <math.h>, which
causes some conflicts with Flang symbols (but not with Flang-RT, for
now).
It also causes some Flang-RT extensions to be disabled, such as FDATE,
that checks for _POSIX_C_SOURCE. Setting _POSIX_C_SOURCE avoids these
issues. This is already being done in Flang, but it was not ported to
Flang-RT.
This also fixes check-flang-rt on Darwin, as NoArgv.FdateNotSupported
is broken since the flang runtime was moved to flang-rt.
Fixes #82036
Commit: e2d5efd59ff2d448d371f0f72630934e42a8c12c
https://github.com/llvm/llvm-project/commit/e2d5efd59ff2d448d371f0f72630934e42a8c12c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libc/src/__support/CPP/simd.h
M libc/src/string/memory_utils/generic/inline_strlen.h
M libc/test/src/__support/CPP/simd_test.cpp
Log Message:
-----------
[libc] Update the memory helper functions for simd types (#160174)
Summary:
This unifies the interface to just be a bunch of `load` and `store`
functions that optionally accept a mask / indices for gathers and
scatters with masks.
I had to rename this from `load` and `store` because it conflicts with
the other version in `op_generic`. I might just work around that with a
trait instead.
Commit: acb826e64e773f65ae58eaa98bc8bbb7d07af8d9
https://github.com/llvm/llvm-project/commit/acb826e64e773f65ae58eaa98bc8bbb7d07af8d9
Author: Alexandra Sidorova <asidorov at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
Log Message:
-----------
[MLIR][TBLGen] Added compound assignment operator for any BitEnum (#160840)
## Details:
- Added missing compound assignment operators `|=`, `&=`, `^=` to
`mlir-tblgen`
- Replaced the arithmetic operators with added assignment operators for
`BitEnum` in the transformations
- Updated related documentation
## Tickets:
- Closes https://github.com/llvm/llvm-project/issues/158098
Commit: 3e746bd8fb6aece3c6d56dae4a9a7f0a7ec61859
https://github.com/llvm/llvm-project/commit/3e746bd8fb6aece3c6d56dae4a9a7f0a7ec61859
Author: Francisco Geiman Thiesen <franciscogthiesen at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
A mlir/test/Transforms/remove-dead-values-call-segments.mlir
M mlir/test/lib/Dialect/Test/TestDialect.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
Allowing RDV to call `getArgOperandsMutable()` (#160415)
## Problem
`RemoveDeadValues` can legally drop dead function arguments on private
`func.func` callees. But call-sites to such functions aren't fixed if
the call operation keeps its call arguments in a **segmented operand
group** (i.ie, uses `AttrSizedOperandSegments`), unless the call op
implements `getArgOperandsMutable` and the RDV pass actually uses it.
## Fix
When RDV decides to drop callee function args, it should, for each
call-site that implements `CallOpInterface`, **shrink the call's
argument segment** via `getArgOperandsMutable()` using the same dead-arg
indices. This keeps both the flat operand list and the
`operand_segment_sizes` attribute in sync (that's what
`MutableOperandRange` does when bound to the segment).
## Note
This change is a no-op for:
* call ops without segment operands (they still get their flat operands
erased via the generic path)
* call ops whose calle args weren't dropped (public, external,
non-`func-func`, unresolved symbol, etc)
* `llvm.call`/`llvm.invoke` (RDV doesn't drop `llvm.func` args
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 69194be7484adc707a16e09fdcfb3cdbc22d2074
https://github.com/llvm/llvm-project/commit/69194be7484adc707a16e09fdcfb3cdbc22d2074
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
A clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
Log Message:
-----------
[NFC][OpenACC][CIR] Extract 'base' class for Recipe generation (#160603)
It was brought up on a previous review that the CIRGenOpenACCRecipe.h
file was getting too large. I noticed that the 'dependent on template
argument' parts were actually quite small, so I extract a base class in
this patch that allows me to implement it in the .cpp file, plus
minimize the amount of code that needs instantiating.
Commit: 7ab7bc7274dcb2c429bf85cf3488c0627b4f04f7
https://github.com/llvm/llvm-project/commit/7ab7bc7274dcb2c429bf85cf3488c0627b4f04f7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[MLIR] Fix LivenessAnalysis/RemoveDeadValues handling of dead function arguments (#160755)
In #153973 I added the correctly handling of block arguments,
unfortunately this was gated on operation that also have results. This
wasn't intentional and this excluded operations like function from being
correctly processed.
Commit: 84df4123e645ad93839e5b5b48c9f94bdd27a6e1
https://github.com/llvm/llvm-project/commit/84df4123e645ad93839e5b5b48c9f94bdd27a6e1
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
Log Message:
-----------
[CodeGen] Adjust global-split remat heuristic to match LICM (#160709)
This heuristic was originally added in 40c4aa with the stated purpose of
avoiding global split on live long ranges created by MachineLICM
hoisting trivially rematerializable instructions. In the meantime,
various backends have introduced non-trivial rematerialization cases,
MachineLICM gained an explicitly triviality check, and we've reworked
our APIs to match naming wise. Let's move this heuristic back to truely
trivial remat only.
This is a functional change, though somewhat hard to hit. This change
will cause non-trivially rematerializable instructions to be globally
split more often. This is likely a good thing since non-trivial remat
may not be legal at all possible points in the live interval, but may
cost slightly more compile time.
I don't have a motivating example; I found it when reviewing the callers
of isRemMaterializable(MI).
Commit: 78da5926471194407e959afce3e42d4e12f3ef06
https://github.com/llvm/llvm-project/commit/78da5926471194407e959afce3e42d4e12f3ef06
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
Log Message:
-----------
[RegAlloc] Add additional tracing in InlineSpiller::rematerializeFor (#160761)
We didn't have trace logging for two cases in this routine which makes
it sometimes hard to tell what is going on. In addition to debug trace
statements, add comments to explain the logic behind the early exits
which don't mark the virtual register live. Suggestions on how to word
these more precisely very welcome; I'm not clear I understand all the
intrinicies of this code myself.
Commit: bba91727789bed302758dac282107a44c7b33504
https://github.com/llvm/llvm-project/commit/bba91727789bed302758dac282107a44c7b33504
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/LiveRangeEdit.cpp
Log Message:
-----------
[RegAlloc] Strengthen asserts in LiveRangeEdit::scanRemattable [nfc] (#160765)
We should always be able to find the VNInfo in the original live
interval which corresponds to the subset we're trying to spill, and the
only cases where we have a VNInfo without a definition instruction are
if the vni is unused, or corresponds to a phi. Adjust the code structure
to explicitly check for PHIDef, and assert the stronger conditions.
Commit: d404c3781be0214ea37a0f93b1bcb9176f3e420f
https://github.com/llvm/llvm-project/commit/d404c3781be0214ea37a0f93b1bcb9176f3e420f
Author: Shaoce SUN <sunshaoce at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[Clang][RVV][SVE] Cache getScalableVectorType lookups (#160108)
Currently, RVV/SVE intrinsics are cached, but the corresponding type
construction is not. As a result, `ASTContext::getScalableVectorType`
can become a performance hotspot, since every query must run through a
long sequence of type checks and macro expansions.
Commit: 0b8c7758e7369d6c87276bc4e37acede766c116d
https://github.com/llvm/llvm-project/commit/0b8c7758e7369d6c87276bc4e37acede766c116d
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/ldexp.ll
Log Message:
-----------
[AArch64][GlobalISel] Add support for ldexp (#160517)
Commit: def68dccf71dbcbd2c846138dc9402dcde5a8397
https://github.com/llvm/llvm-project/commit/def68dccf71dbcbd2c846138dc9402dcde5a8397
Author: Gleb Popov <6yearold at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
A llvm/test/tools/llvm-tli-checker/ifuncs.yaml
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
Log Message:
-----------
llvm-tli-checker: Take ifunc symbols into account (#158596)
FreeBSD libc has a lot of symbols that are ifuncs, which makes TLI
checker believe they are not available. This change makes the tool
consider symbols with the STT_GNU_IFUNC type.
Commit: 550d425a719cb8296dd8df4484a1b6a2c6b5b140
https://github.com/llvm/llvm-project/commit/550d425a719cb8296dd8df4484a1b6a2c6b5b140
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/LiveInterval.cpp
Log Message:
-----------
[RegAlloc] Add printer and dump for VNInfo [nfc] (#160758)
Uses the existing format of the LiveRange printer, and just factors it
out so that you can do vni->dump() when debugging, or log a vni in a
debug print statement.
Commit: 9412769c1e03a928ba83ee24da084e26ca713dbf
https://github.com/llvm/llvm-project/commit/9412769c1e03a928ba83ee24da084e26ca713dbf
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/LiveRangeEdit.cpp
Log Message:
-----------
Revert "[RegAlloc] Strengthen asserts in LiveRangeEdit::scanRemattable [nfc]" (#160897)
Reverts llvm/llvm-project#160765. Failures on buildbot indicate second
assertion does not in fact hold.
Commit: 23473247c2aad142b8259ed70e569e932357c962
https://github.com/llvm/llvm-project/commit/23473247c2aad142b8259ed70e569e932357c962
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode][NFC] Use switches for pointer type distinction (#160879)
In the important places. They are all fully covered switch statements so
we know where to add code when adding a new pointer type.
Commit: 129394e3f2cfb7fbac7b71a968a38328c82e9c8d
https://github.com/llvm/llvm-project/commit/129394e3f2cfb7fbac7b71a968a38328c82e9c8d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-27 (Sat, 27 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/X86/atomic-bit-test.ll
Log Message:
-----------
Greedy: Make trySplitAroundHintReg try to match hints with subreg copies (#160294)
This is essentially the same patch as
116ca9522e89f1e4e02676b5bbe505e80c4d4933;
when trying to match a physreg hint, try to find a compatible physreg if
there is
a subregister copy. This has the slight difference of using getSubReg on
the hint
instead of getMatchingSuperReg (the other use should also use getSubReg
instead,
it's faster).
At the moment this turns out to have very little effect. The adjacent
code needs
better handling of subregisters, so continue adding this piecemeal. The
X86 test
shows a net reduction in real instructions, plus a few new kills.
Commit: 0e3c3165ea33043b8fa0457e535f50ca59312278
https://github.com/llvm/llvm-project/commit/0e3c3165ea33043b8fa0457e535f50ca59312278
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/Frontend/Utils.h
M clang/lib/Frontend/CompilerInstance.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ModuleDependencyCollector.h
M llvm/include/llvm/Support/FileCollector.h
M llvm/lib/Support/FileCollector.cpp
M llvm/tools/dsymutil/Reproducer.cpp
M llvm/unittests/Support/FileCollectorTest.cpp
Log Message:
-----------
[llvm][clang] Use the VFS in `FileCollector` (#160788)
This PR changes `llvm::FileCollector` to use the `llvm::vfs::FileSystem`
API for making file paths absolute instead of using
`llvm::sys::fs::make_absolute()` directly. This matches the behavior of
the compiler on most other input files.
Commit: 88324f1cabc89c841df6928bd1c79b1604194b22
https://github.com/llvm/llvm-project/commit/88324f1cabc89c841df6928bd1c79b1604194b22
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Simplify align_up/down implementation (#160880)
Fix a double assignment to a local variable and use the new
popToAPSInt() overload.
Commit: d636dc835826e063d9d1023ff8f56299e78c4d79
https://github.com/llvm/llvm-project/commit/d636dc835826e063d9d1023ff8f56299e78c4d79
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libcxx/utils/compare-benchmarks
Log Message:
-----------
[libc++] Support comparison of more than two data sets in compare-benchmarks
Commit: 446b9dcfeb02f680277a6b84a7eee11fcf5fbbbc
https://github.com/llvm/llvm-project/commit/446b9dcfeb02f680277a6b84a7eee11fcf5fbbbc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Use initializer list (#160898)
Commit: e8e563be1fe54a22b69cbccedcd755b39eab37d4
https://github.com/llvm/llvm-project/commit/e8e563be1fe54a22b69cbccedcd755b39eab37d4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Reduce code duplication in SmallDenseMap (NFC) (#160813)
This patch reduces code duplication by having allocateBuckets take a
larger role. Specifically, allocateBuckets now checks to see if we
need to allocate heap memory and initializes Small appropriately.
With this patch, allocateBuckets mirrors deallocateBuckets cleanly.
Both methods handle the Small mode without asserting and are
responsible for constructing and destructing LargeRep.
Commit: 6598e313739adf20520c7b904c0cd44d136d1b69
https://github.com/llvm/llvm-project/commit/6598e313739adf20520c7b904c0cd44d136d1b69
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
Log Message:
-----------
[ADT] Refactor SmallPtrSetIterator (NFC) (#160814)
SmallPtrSetIterator and its base class SmallPtrSetIteratorImpl
collectively have the following responsibilities:
- type-safe user-facing iterator interface
- type-erased iterator increment/dereference core
- DebugEpochBase via inheritance
This patch refactors the two classes so that SmallPtrSetIteratorImpl
implements everything except the type-safe user-facing interface.
Benefits:
- DebugEpochBase::HandleBase is now part of the type-erased class.
- AdvanceIfNotValid is now private in SmallPtrSetIteratorImpl.
- SmallPtrSetIterator is a very thin wrapper around
SmallPtrSetIteratorImpl and should generate very little code on its
own.
Commit: 88ef27463e56de7b80df5679c90bf32b81b4e104
https://github.com/llvm/llvm-project/commit/88ef27463e56de7b80df5679c90bf32b81b4e104
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/StringTable.h
Log Message:
-----------
[ADT] Apply Rule of Five to StringTable::Iterator (#160815)
StringTable::Iterator has a user-defined copy assignment operator, a
defaulted copy constructor, and a defaulted move constructor.
This patch makes the copy assignment operator defaulted and adds a
defaulted move assignment operator to adhere to the Rule of Five while
making the operators constexpr.
Commit: 8f9385c6c9f17f81be08eac9d8f56de612ad184f
https://github.com/llvm/llvm-project/commit/8f9385c6c9f17f81be08eac9d8f56de612ad184f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/ProgramStack.h
Log Message:
-----------
[Support] Consolidate runOnNewStack (NFC) (#160816)
This patch consolidates two implementations of runOnNewStack with
"if constexpr".
Commit: 6d1c19bb1926fae44619a3531b2e0d0b1259cd25
https://github.com/llvm/llvm-project/commit/6d1c19bb1926fae44619a3531b2e0d0b1259cd25
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/docs/BugLifeCycle.rst
Log Message:
-----------
[llvm] Proofread BugLifeCycle.rst (#160817)
Commit: f026cb0909b380f87b748971576e0e30396c3342
https://github.com/llvm/llvm-project/commit/f026cb0909b380f87b748971576e0e30396c3342
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M bolt/lib/Target/AArch64/CMakeLists.txt
Log Message:
-----------
[BOLT][AArch64] Fix BUILD_SHARED_LIBS after #158738 (#160854)
Link BOLTUtils against the AArch64 target to support the new option
that enables instrumentation without LSE (see #158738)
This fixes shared library builds, eg:
https://lab.llvm.org/staging/#/builders/220/builds/1537
Note: the link points to a collapsing builder.
Commit: f8b79e68cf86016b2849dacf8eb16846557db231
https://github.com/llvm/llvm-project/commit/f8b79e68cf86016b2849dacf8eb16846557db231
Author: David Green <david.green at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
Log Message:
-----------
[ARM] Add extra mulh tests with known-bits. NFC
Commit: fc71b1ce242a1ae16c293422d14628e724fbc412
https://github.com/llvm/llvm-project/commit/fc71b1ce242a1ae16c293422d14628e724fbc412
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Support/DXILABI.cpp
Log Message:
-----------
[NFC][LLVM] Fix line endings for DXILABI.cpp (#160791)
Fix line ending to Unix style by running dos2unix on this file.
Commit: 8eb0ab708e03739ae840542ce95e8fa9ba3c623a
https://github.com/llvm/llvm-project/commit/8eb0ab708e03739ae840542ce95e8fa9ba3c623a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/SROA.h
M llvm/lib/Support/rpmalloc/rpmalloc.h
M llvm/lib/Support/rpmalloc/rpnew.h
Log Message:
-----------
[NFC][LLVM] Use Unix line endings for a few source files (#160794)
Commit: 2a72522c52bb1f58609b6f53e8304542cfd3eb34
https://github.com/llvm/llvm-project/commit/2a72522c52bb1f58609b6f53e8304542cfd3eb34
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/SMLoc.h
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[NFC][LLVM] Pass/return SMLoc by value instead of const reference (#160797)
SMLoc itself encapsulates just a pointer, so there is no need to pass or
return it by reference.
Commit: d2239fbf432ecf3df64966a421340aaa6b518d2c
https://github.com/llvm/llvm-project/commit/d2239fbf432ecf3df64966a421340aaa6b518d2c
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGAtomic.cpp
M clang/test/CodeGen/atomic-test-and-set.c
M clang/test/DebugInfo/KeyInstructions/atomic.c
Log Message:
-----------
[clang][CodeGen] Fix sub-optimal clang CodeGen for __atomic_test_and_set (#160098)
Clang CodeGen for `__atomic_test_and_set` would emit a `store`
instruction that stores an `i1` value:
```cpp
bool f(void *ptr) {
return __atomic_test_and_set(ptr, __ATOMIC_RELAXED);
}
```
```llvm
%1 = atomicrmw xchg ptr %0, i8 1 monotonic, align 1
%tobool = icmp ne i8 %1, 0
store i1 %tobool, ptr %atomic-temp, align 1
```
which could lead to suboptimal binary code, for example on x86_64:
```asm
f:
mov al, 1
xchg byte ptr [rdi], al
test al, al
setne al
setne byte ptr [rsp - 1]
ret
```
The last `setne` instruction is obviously redundant. This patch fixes
this issue by first zero-extending `%tobool` to an `i8` before the
store. This effectively eliminates the last `setne` instruction in the
binary code sequence. The `test` and `setne` on `al` is kept still,
though.
-----
I'm quite conservative about the codegen in this patch. Vanilla gcc
actually emits simpler code for `__atomic_test_and_set`:
```cpp
bool f(void *ptr) {
return __atomic_test_and_set(ptr, __ATOMIC_RELAXED);
}
```
```asm
f:
mov eax, 1
xchg al, BYTE PTR [rdi]
ret
```
It seems like gcc assumes `ptr` would always point to a valid `bool`
value as required by the ABI. I'm not sure if we should also make this
assumption.
Related to #121943 .
Commit: c06f35422d6b049ef6a6b1d7de07597845b841e6
https://github.com/llvm/llvm-project/commit/c06f35422d6b049ef6a6b1d7de07597845b841e6
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-appending-limits.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-limits-multiples.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-offset-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-register-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-mix.ll
Log Message:
-----------
[DirectX] Adding missing descriptor table validations (#153276)
This patch adds 2 small validation to DirectX backend. First, it checks
if registers in descriptor tables are not overflowing, meaning they
don't try to bind registers over the maximum allowed value, this is
checked both on the offset and on the number of descriptors inside the
range; second, it checks if samplers are being mixed with other resource
types.
Closes: #153057, #153058
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Co-authored-by: Joao Saffran <{ID}+{username}@users.noreply.github.com>
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 7d2f6fd177fcf79564e68c9999a38b5af9982cbb
https://github.com/llvm/llvm-project/commit/7d2f6fd177fcf79564e68c9999a38b5af9982cbb
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/lib/BinaryFormat/DXContainer.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Invalid-Version.ll
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
Log Message:
-----------
[DirectX] Updating DXContainer Yaml to represent Root Signature 1.2 (#159659)
This PR updates the YAML representation of DXContainer to support Root
Signature 1.2, this also requires updating the write logic to support
testing.
Commit: 3aaa58fd903b26831f986140acbfdac4e07d4f12
https://github.com/llvm/llvm-project/commit/3aaa58fd903b26831f986140acbfdac4e07d4f12
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/complex.c
Log Message:
-----------
[Clang] Fix Codegen UO real/imag crash on scalar with type promotion (#160609)
Fixing codegen crash when compiling real/imag unary operators on scalar
with type promotion
Ref: #160583
Commit: d6e20c42c1f916fa925f0b1c2c37f3098ada1686
https://github.com/llvm/llvm-project/commit/d6e20c42c1f916fa925f0b1c2c37f3098ada1686
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/IO.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/OpenMP/simd-only.mlir
Log Message:
-----------
[flang] Clean-up for fir.do_loop generation in lowering. (#160630)
This patch changes two things:
1. We do not need to use the loop counter's last value
for regular do-loops in Lowering.
2. The loop counter's increment is implied by fir.do_loop
operation, so there is no need to increment it explicitly.
The last point has been especially confusing to me, because it was
unclear why we have an explicit increment if it is implied.
It looks like CFGConversion somehow still makes the final code
correct, i.e. the counter is not incremented twice.
Anyway, the new lowering should look more concise.
Commit: f0b58bc9f486374541cf7004eda34be7d7fe33f0
https://github.com/llvm/llvm-project/commit/f0b58bc9f486374541cf7004eda34be7d7fe33f0
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/GDBIndex.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/test/AArch64/constant-island-alignment.s
A bolt/test/AArch64/instrumentation_sequence.s
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-gdb-generated-gdb11.test
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-lld-generated.test
M bolt/test/X86/dwarf5-gdb-index-types-gdb-generated-gdb11.test
M bolt/test/X86/dwarf5-gdb-index-types-gdb-generated-gdb9.test
M bolt/test/X86/dwarf5-gdb-index-types-lld-generated.test
M clang-tools-extra/clang-tidy/bugprone/ThrowKeywordMissingCheck.cpp
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/throw-keyword-missing.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
M clang/CMakeLists.txt
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
A clang/include/clang/Analysis/Analyses/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/include/clang/Analysis/PathDiagnostic.h
M clang/include/clang/Basic/Sarif.h
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/Utils.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/Analysis/CMakeLists.txt
A clang/lib/Analysis/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Analysis/PathDiagnostic.cpp
M clang/lib/Basic/Sarif.cpp
A clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Clang.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
A clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.h
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members.mm
M clang/test/Analysis/LifetimeSafety/benchmark.py
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-diagnostics-taint-test.c.sarif
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-diagnostic-test.c.sarif
A clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-file-diagnostics.c.sarif
A clang/test/Analysis/diagnostics/sarif-multi-file-diagnostics.c
M clang/test/Analysis/lit.local.cfg
M clang/test/CodeGen/X86/avx512vlfp16-builtins.c
M clang/test/CodeGen/atomic-test-and-set.c
M clang/test/CodeGen/builtin-masked.c
M clang/test/CodeGen/complex.c
M clang/test/CodeGen/sparcv9-abi.c
A clang/test/DebugInfo/CXX/lambda-capture-packs.cpp
M clang/test/DebugInfo/KeyInstructions/atomic.c
M clang/test/Sema/builtin-masked.c
A clang/test/Sema/builtin-masked.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
A clang/test/SemaObjC/builtin-masked.m
M clang/tools/offload-arch/CMakeLists.txt
A clang/tools/offload-arch/LevelZeroArch.cpp
M clang/tools/offload-arch/OffloadArch.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.cpp
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMutate.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/unittests/CMakeLists.txt
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Driver/split-debug.f90
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
A flang/test/Integration/debug-split-dwarf.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/OpenMP/simd-only.mlir
M libc/src/__support/CPP/simd.h
M libc/src/string/memory_utils/generic/inline_strlen.h
M libc/test/src/__support/CPP/simd_test.cpp
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__memory/compressed_pair.h
M libcxx/include/__tree
R libcxx/include/__type_traits/is_generic_transparent_comparator.h
R libcxx/include/__type_traits/make_transparent.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/bitset
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
A libcxx/test/benchmarks/containers/sequence/vector_bool.bench.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/utils/compare-benchmarks
M libcxx/utils/visualize-historical
M lld/COFF/Writer.cpp
M lld/test/COFF/strtab.s
M lld/test/wasm/mutable-global-exports.s
M lld/wasm/Writer.cpp
M lldb/packages/Python/lldbsuite/test/cpu_feature.py
M lldb/source/Plugins/ExpressionParser/Clang/ModuleDependencyCollector.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/Platform/Android/AdbClient.cpp
M lldb/source/Plugins/Platform/Android/AdbClient.h
M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroid.h
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
A lldb/test/Shell/ObjectFile/ELF/elf-no-shdrs-pt-notes.yaml
M lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp
M lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
M lldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp
M lldb/test/Shell/SymbolFile/NativePDB/find-functions.cpp
M lldb/test/Shell/SymbolFile/NativePDB/local-variables.cpp
M lldb/test/Shell/SymbolFile/NativePDB/stack_unwinding01.cpp
M lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
M lldb/test/Shell/SymbolFile/PDB/variables.test
M lldb/unittests/Platform/Android/AdbClientTest.cpp
M lldb/unittests/Platform/Android/PlatformAndroidTest.cpp
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/Mustache.cpp
M llvm/docs/BugLifeCycle.rst
M llvm/docs/GettingInvolved.rst
M llvm/docs/Reference.rst
M llvm/docs/index.rst
M llvm/include/llvm/ADT/BitVector.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/GenericSSAContext.h
M llvm/include/llvm/ADT/SmallPtrSet.h
M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/LiveRangeEdit.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/FileCollector.h
M llvm/include/llvm/Support/ProgramStack.h
M llvm/include/llvm/Support/SMLoc.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Transforms/Scalar/SROA.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/BinaryFormat/DXContainer.cpp
M llvm/lib/CAS/OnDiskTrieRawHashMap.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/DXILABI.cpp
M llvm/lib/Support/FileCollector.cpp
M llvm/lib/Support/rpmalloc/rpmalloc.h
M llvm/lib/Support/rpmalloc/rpnew.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/Mips/MipsExpandPseudo.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/ScalarEvolution/trip-multiple-guard-info.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
A llvm/test/CodeGen/AMDGPU/postra-machine-sink-livein-subrange.mir
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
A llvm/test/CodeGen/AMDGPU/s_uaddo_usubo_pseudo.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll
M llvm/test/CodeGen/ARM/2012-04-10-DAGCombine.ll
M llvm/test/CodeGen/ARM/fnegs.ll
M llvm/test/CodeGen/ARM/fnmscs.ll
M llvm/test/CodeGen/ARM/fnmul.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll
R llvm/test/CodeGen/ARM/fp16.ll
M llvm/test/CodeGen/ARM/sincos.ll
M llvm/test/CodeGen/ARM/vminmaxnm.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Invalid-Version.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-appending-limits.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-limits-multiples.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-offset-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-register-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-mix.ll
M llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
M llvm/test/CodeGen/LoongArch/lasx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvrepl128vei.ll
M llvm/test/CodeGen/LoongArch/lasx/shuffle-as-permute-and-shuffle.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
M llvm/test/CodeGen/LoongArch/lsx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
M llvm/test/CodeGen/Mips/atomic-min-max.ll
M llvm/test/CodeGen/NVPTX/combine-wide.ll
A llvm/test/CodeGen/NVPTX/machinelicm-no-preheader.mir
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
A llvm/test/CodeGen/WebAssembly/fake-use.ll
M llvm/test/CodeGen/X86/atomic-bit-test.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
A llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
M llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
A llvm/test/Transforms/LoopFusion/da_separate_loops.ll
M llvm/test/Transforms/LoopFusion/simple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/recursive.ll
A llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll
A llvm/test/tools/llvm-dwarfdump/verify_stmt_seq.yaml
M llvm/test/tools/llvm-objdump/MachO/function-starts.test
A llvm/test/tools/llvm-tli-checker/ifuncs.yaml
M llvm/tools/dsymutil/Reproducer.cpp
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
M llvm/unittests/ADT/BitVectorTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Support/FileCollectorTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M mlir/docs/DefiningDialects/Operations.md
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/ConvertConv2DToImg2Col.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Shard/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/python/CMakeLists.txt
M mlir/test/CAPI/llvm.c
M mlir/test/Dialect/Linalg/convert-conv2d-to-img2col.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
A mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
A mlir/test/Target/LLVMIR/global_float_array.mlir
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
A mlir/test/Transforms/remove-dead-values-call-segments.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/lib/Dialect/Test/TestDialect.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
R offload/test/offloading/fortran/target-declare-mapper-parent-allocatable.f90
A offload/test/offloading/fortran/target-no-loop.f90
M openmp/device/src/Workshare.cpp
Log Message:
-----------
minor improvement on error handling
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/6bad5c92faf0...f0b58bc9f486
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