[all-commits] [llvm/llvm-project] 4b9954: [mlir][tosa] Use `LogicalResult` in validation fun...
Yuxuan Chen via All-commits
all-commits at lists.llvm.org
Fri Sep 26 11:06:19 PDT 2025
Branch: refs/heads/users/yuxuanchen1997/libcxx-is-clock
Home: https://github.com/llvm/llvm-project
Commit: 4b99547b74450fd54a552261e44850718bed2c9d
https://github.com/llvm/llvm-project/commit/4b99547b74450fd54a552261e44850718bed2c9d
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
Log Message:
-----------
[mlir][tosa] Use `LogicalResult` in validation functions (#160052)
This commit replaces functions that previously returned `bool` to
indicate validation success or failure with `LogicalResult`.
Commit: 14a126b37a2a0898ad09aa00da7b276d20cb2a86
https://github.com/llvm/llvm-project/commit/14a126b37a2a0898ad09aa00da7b276d20cb2a86
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Remove `log(exp(x))` and `exp(log(x))` folders (#156434)
Both of the folders would reduce to `x`. These folders were vulnerable
to overflow / underflow issues, resulting in a difference in numerical
behaviour when running or not running the folders. For now they have
been removed. We can consider restoring these as part of an optional and
separate "fast-math" style of transformation in the future.
Commit: 3cc56dd82a78964ab0b5edc9738abf90f259e36a
https://github.com/llvm/llvm-project/commit/3cc56dd82a78964ab0b5edc9738abf90f259e36a
Author: Marcel Jacobse <mjacobse at uni-bremen.de>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/warn-double-promotion.c
A clang/test/Sema/warn-double-promotion.cpp
Log Message:
-----------
[Clang] [Sema] Fix -Wdouble-promotion in C++ list-initialization (#159992)
Resolves https://github.com/llvm/llvm-project/issues/33409.
The information `IsListInit` is already passed to function
`CheckImplicitConversion` for another use-case which makes adding a
condition for the double-promotion case simple.
Also adds tests, both for the changed list-initialization case as well
as for normal explicit casts which already would have passed before this
PR. These negative tests are added directly next to the positive tests
in `warn-double-promotion.c` or for the C++-specific cases in a new .cpp
version of that file.
Commit: 792a7bbd99ba7fafabc8c03cf9f3c29e729858c0
https://github.com/llvm/llvm-project/commit/792a7bbd99ba7fafabc8c03cf9f3c29e729858c0
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ProfileVerify.cpp
A llvm/test/Transforms/PGOProfile/profcheck-synthetic.ll
Log Message:
-----------
[profcheck] Option to inject distinct small weights (#159644)
There are cases where the easiest way to regression-test a profile change is to add `!prof` metadata, with small numbers as to simplify manual verification. To ensure coverage, this (the inserting) may become tedious. This patch makes `prof-inject` do that for us, if so opted in.
The list of weights used is a bunch of primes, used as a circular buffer.
Issue #147390
Commit: 59b4074037827290f97eeac512c3f8332cf23457
https://github.com/llvm/llvm-project/commit/59b4074037827290f97eeac512c3f8332cf23457
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
A llvm/test/CodeGen/X86/basic-block-sections-cfg.ll
M llvm/test/CodeGen/X86/basic-block-sections-clusters-error.ll
Log Message:
-----------
[Propeller] Read the CFG profile from the propeller directive. (#160422)
The CFG allows us to do layout optimization in the compiler.
Furthermore, it allows further branch optimization.
Commit: 6e904e89cb97fa113c95f746942e04226a7d2207
https://github.com/llvm/llvm-project/commit/6e904e89cb97fa113c95f746942e04226a7d2207
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/utils/lit/tests/shtest-readfile.py
Log Message:
-----------
[lit] [test] Fix the shtest-readfile test on Python 3.13 on Windows (#160503)
Python 3.13 considers "/file/does/not/exist" to not be an absolute path
on Windows, so the test runner does os.path.join(cwd, filePath), which
can end up with an output path such as "D:/file/does/not/exist".
Accept a potential prefix before the missing path here.
This fixes running the lit tests on Windows with Python 3.13.
Commit: 12bc084b3276c891162a298bafdf153e1701da4a
https://github.com/llvm/llvm-project/commit/12bc084b3276c891162a298bafdf153e1701da4a
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/test/CodeGen/X86/debug-loclists.ll
M llvm/test/DebugInfo/X86/convert-loclist.ll
M llvm/test/DebugInfo/X86/ranges_always_default.ll
M llvm/test/DebugInfo/X86/split-dwarf-v5-ranges.ll
Log Message:
-----------
[MC][COFF] Add missing sections for DWO (#157239)
Add DWO sections `.debug_loclists.dwo` and `.debug_rnglists.dwo` to the
COFF targets.
This enables building with `-DLLVM_USE_SPLIT_DWARF=ON` on the Cygwin
target, which previously failed due to compiler crashes.
Commit: 08c98baddf123d42b7f3267f28ad121f5b449cdb
https://github.com/llvm/llvm-project/commit/08c98baddf123d42b7f3267f28ad121f5b449cdb
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause-templates.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause-templates.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
Log Message:
-----------
[NFC][OpenACC] Reorder 'recipe' generation to be lexical (#160585)
It was noticed on a previous patch that I could have emitted recipes in
lexical order instead of reverse order, which would improve the
readability of a lot of tests. This patch implements that, and changes
all of the required test.
Commit: 738e927652c4b270fe60b65ad289077d8160d5c8
https://github.com/llvm/llvm-project/commit/738e927652c4b270fe60b65ad289077d8160d5c8
Author: Andrew <dota2drot at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
M llvm/test/tools/llvm-cov/mcdc-export-json.test
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
Log Message:
-----------
Add executed MC/DC TestVectors to `llvm-cov export` (#159119)
It adds a new JSON array with the list of test vectors to the end of the mcdc_records.
I also bumped the json format version accordingly, which I believe wasn’t done properly in the past when new fields were added.
This PR adds tests and comment docs for
https://github.com/llvm/llvm-project/pull/105511
---------
Co-authored-by: Arpad Borsos <swatinem at swatinem.de>
Commit: 70b150c10c3877469abebfa2caa2fae41e165112
https://github.com/llvm/llvm-project/commit/70b150c10c3877469abebfa2caa2fae41e165112
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
R llvm/test/CodeGen/AMDGPU/gfx1250-scratch-scope-se.ll
Log Message:
-----------
[AMDGPU] Remove gfx1250-scratch-scope-se.ll. NFC (#160584)
The test is supposed to check SCOPE_SE upgrade which was
removed and also does not present in the test.
Commit: e9e166e54354330c474457711a8e7a7ca2efd731
https://github.com/llvm/llvm-project/commit/e9e166e54354330c474457711a8e7a7ca2efd731
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
Log Message:
-----------
[compiler-rt] Disable tests for unavailable builtins (#158664)
The builtins `__fixunstfdi` and `__multc3` may be removed by the
preprocessor depending on configuration flags. When this happens, the
corresponding tests fail at link time due to missing definitions.
Disable these tests when the builtins are not available.
rdar://159705803
rdar://159705705
Commit: f963d17f898c801193da3dafb40b29c62b622b68
https://github.com/llvm/llvm-project/commit/f963d17f898c801193da3dafb40b29c62b622b68
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/examples/standalone/python/StandaloneExtensionNanobind.cpp
M mlir/examples/standalone/python/StandaloneExtensionPybind11.cpp
M mlir/examples/standalone/test/CAPI/CMakeLists.txt
M mlir/examples/standalone/test/CAPI/standalone-capi-test.c
M mlir/examples/standalone/test/python/smoketest.py
M mlir/test/CMakeLists.txt
Log Message:
-----------
[MLIR][Standalone] use narrow registration instead of RegisterEverything (#160469)
This PR cleans up a long-standing TODO by avoiding
`MLIRPythonExtension.RegisterEverything` in the Standalone example and
registering the necessary dialects explicitly instead.
Commit: d235d62d65a8403f1a239720058646bcefcd3d74
https://github.com/llvm/llvm-project/commit/d235d62d65a8403f1a239720058646bcefcd3d74
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Add unroll pattern for load_gather and store_scatter with offsets (#159453)
This PR adds unrolling/blocking patterns for load_gather and
store_scatter ops with offsets.
Commit: 5d511b6736d0c70a99ea38bd800be0ffe65991e7
https://github.com/llvm/llvm-project/commit/5d511b6736d0c70a99ea38bd800be0ffe65991e7
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
A lldb/packages/Python/lldbsuite/test/cpu_feature.py
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/macosx/sme-registers/TestSMERegistersDarwin.py
Log Message:
-----------
[lldb][test] Unify test infrastructure for checking CPU features (#153914)
This addresses limitations in our testing infrastructure for checking
CPU features. Before this
* `getCPUInfo()` was Linux-only, and the
* `@skipUnlessFeature` decorator was Darwin-only and did not consider
the remote (on device) testing use case.
Introduce `CPUFeature` class as an abstraction to hide the
platform-specific implementations to check for CPU features. Unify local
(on host) and remote (on device) test execution by always going through
`test.run_platform_command()` which uses LLDB's `platform shell <cmd>`
command.
Potential future cleanups: I think `@skipUnlessFeature` decorator could
be used in place of code like this:
```
if not self.isAArch64SME():
self.skipTest("SME must be present.")
if not self.isAArch64SME2():
self.skipTest("SME2 must be present.")
```
Commit: 37de695cb1de65dd16f589cdeae50008d1f91d4d
https://github.com/llvm/llvm-project/commit/37de695cb1de65dd16f589cdeae50008d1f91d4d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Make sure global device descriptor is allocated in managed memory (#160596)
When the descriptor of a global device variable is re-materialized to be
passed to a kernel, make sure it is allocated in managed memory
otherwise the kernel launch will fail.
Commit: ac3f148f60b147461050c62f9569e00b6678fd02
https://github.com/llvm/llvm-project/commit/ac3f148f60b147461050c62f9569e00b6678fd02
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Set extend kinds together with ExtOpTypes (NFC).
Set extend kinds together with ExtOpTypes. This will make it easier to
adjust the extend kind handling.
Commit: 2a5c6e1b990c002c6852047edb6affd4bbe9f8cb
https://github.com/llvm/llvm-project/commit/2a5c6e1b990c002c6852047edb6affd4bbe9f8cb
Author: Matthew Bastien <matthew_bastien at apple.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] bundle lldb-dap extension using esbuild (#160598)
The most recent version of the lldb-dap VS Code extension (0.2.17) fails
to activate because it's missing the `chokidar` dependency in the
`.vsix`. In order to prevent this from happening in the future, this PR
adds a `bundle-extension` step to extension packaging in order to bundle
the extension into a single `.js` file using esbuild. All dependencies
will be included in this bundle so that the `.vscodeignore` doesn't need
to be updated.
Commit: 18cffb8f469e9fd6df70084b121caaa18490a4af
https://github.com/llvm/llvm-project/commit/18cffb8f469e9fd6df70084b121caaa18490a4af
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] Bump the version to 0.2.18
Bump the version to 0.2.18 to address the missing chokidar dependency in
the .vsix.
Commit: 1c6e896c712d3f44947d3b26089f7ab55aa0d416
https://github.com/llvm/llvm-project/commit/1c6e896c712d3f44947d3b26089f7ab55aa0d416
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/lib/Support/Mustache.cpp
M llvm/unittests/Support/MustacheTest.cpp
M llvm/utils/llvm-test-mustache-spec/llvm-test-mustache-spec.cpp
Log Message:
-----------
[llvm][mustache] Add support for Triple Mustache (#159183)
We extend the logic in tokenize() to treat the `{{{}}}` delimiters
to treat it like other unescaped HTML. We do this by updating the
tokenizer to treat the new tokes the same way we do for the `{{&variable}}`
syntax, which avoid the need to change the parser.
We also update the llvm-test-mustache-spec tool to no longer mark Triple
Mustache as XFAIL.
Commit: 7c2e0dbddee5a5c790d432591efcdfbb7508d525
https://github.com/llvm/llvm-project/commit/7c2e0dbddee5a5c790d432591efcdfbb7508d525
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/cuf23.cuf
Log Message:
-----------
[flang][cuda] Avoid I/O error in block inside a kernel (#160599)
Make sure we get the program unit to check the device context. The scope
would be the block otherwise.
Commit: 7813da34e85e8dcef91a1f125abf65debbc9de3c
https://github.com/llvm/llvm-project/commit/7813da34e85e8dcef91a1f125abf65debbc9de3c
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M .github/workflows/pr-code-lint.yml
Log Message:
-----------
[GitHub] Bump clang-tidy version to 21th in CI (#160551)
Commit: 876296e9b7f0b1393cdaeb46901e18eb0b49ff93
https://github.com/llvm/llvm-project/commit/876296e9b7f0b1393cdaeb46901e18eb0b49ff93
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/utils/lit/tests/shtest-readfile-external.py
M llvm/utils/lit/tests/shtest-readfile.py
Log Message:
-----------
[lit] Allow retries for readfile tests (#160600)
This patch allows for two retry attempts for the readfile tests. This is
intended as a stop-gap until I have time to do proper investigation into
why exactly the tests are failing.
Commit: 6f58c16c494f7a287137d23728fd66d6f176ee9a
https://github.com/llvm/llvm-project/commit/6f58c16c494f7a287137d23728fd66d6f176ee9a
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/lib/Dialect/Linalg/TestDataLayoutPropagation.cpp
Log Message:
-----------
[mlir][linalg] Use ub.poison in data layout propagation if a packed operand requires padding. (#159467)
In the past, it was hard to set padding values because we did not have
ub.poison. It is not always correct if we set zeros as padding values.
Now we can use `ub.poison` in this case. The revision adds the support
for setting padding value using `ub.poison` when padding is required in
the propagation. Otherwise, it creates an invalid pack op.
Additionally the revision adds a control option for allowing padding in
the pattern which is false by default. To correctly do this, a new
`requirePaddingValueStrict` method is added which assumes dynamic dims
would mean padding is required.
The revision also removes trailing white space in the lit test file.
Co-authored-by : Nirvedh Meshram <nirvedh at gmail.com>
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Signed-off-by: Nirvedh Meshram <nirvedh at gmail.com>
Co-authored-by: Nirvedh Meshram <nirvedh at gmail.com>
Commit: c989283c27621843ce82b0d16aba34785650cb47
https://github.com/llvm/llvm-project/commit/c989283c27621843ce82b0d16aba34785650cb47
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtin-masked.c
M clang/test/Sema/builtin-masked.c
Log Message:
-----------
[Clang] Change masked load / store builtin interface to take scalar pointer (#156063)
Summary:
Right now these enformce alignment, which isn't convenient for the user
on platforms that support unaligned accesses. The options are to either
permit passing the alignment manually, or just assume it's unaligned
unless the user specifies it.
I've added https://github.com/llvm/llvm-project/pull/156057 which should
make the requiested alignment show up on the intrinsic if the user
passed `__builtin_assume_aligned`, however that's only with
optimizations. This shouldn't cause issues unless the backend
categorically decides to reject an unaligned access.
Commit: 83331cc9833e5ff20218733273ac7b273006192f
https://github.com/llvm/llvm-project/commit/83331cc9833e5ff20218733273ac7b273006192f
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/SemaCXX/cxx17-compat.cpp
M clang/test/SemaCXX/cxx2c-binding-pack-nontemplate.cpp
A clang/test/SemaCXX/cxx2c-decomposition.cpp
Log Message:
-----------
[Clang] Constexpr Structured Bindings : The easy parts (#160337)
This implements the easy parts of P2686R5.
Ie allowing constexpr structured binding of structs and arrays.
References to constexpr variables / support for tuple is left for a
future PR.
Until we implement the whole thing, the feature is not enabled as an
extension in older language modes.
Trying to use it as a tuple does produce errors but not meaningful ones.
We could add a better diagnostic if we fail to complete the
implementation before the end of the clang 22 cycle.
Commit: 0dc5d2e87de3f763493ad4227a600b8c9784de45
https://github.com/llvm/llvm-project/commit/0dc5d2e87de3f763493ad4227a600b8c9784de45
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
Log Message:
-----------
[AMDGPU] Add gfx1250 memory lealizer tests run lines. NFC (#160586)
Commit: 9379922fbacc4b87fafec62c3cff892c15a7f37c
https://github.com/llvm/llvm-project/commit/9379922fbacc4b87fafec62c3cff892c15a7f37c
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/unittests/Support/MustacheTest.cpp
Log Message:
-----------
[llvm][mustache] Precommit test for StandaloneIndentation (#159184)
Commit: 74d49f202cf76e270b405b9108622e71c02b52b8
https://github.com/llvm/llvm-project/commit/74d49f202cf76e270b405b9108622e71c02b52b8
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/lib/MC/MCSFrame.cpp
M llvm/test/MC/ELF/cfi-sframe-fre-cases.s
Log Message:
-----------
[SFrames] Implement .cfi_restore, remember_state, and restore_state (#159832)
As in the description. Very straightforward.
Commit: bef2658de05f17088b06c7fc84739fb3c05c5ce6
https://github.com/llvm/llvm-project/commit/bef2658de05f17088b06c7fc84739fb3c05c5ce6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/docs/Docker.rst
Log Message:
-----------
[llvm] Proofread Docker.rst (#160448)
Commit: 9a736e821b23937fd808e280b0df540036f0fe62
https://github.com/llvm/llvm-project/commit/9a736e821b23937fd808e280b0df540036f0fe62
Author: NohHyeon Kwon <96061253+swote-git at users.noreply.github.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M mlir/include/mlir/IR/Builders.h
Log Message:
-----------
[MLIR] Clarify `createOrFold()` doc as opportunistic eager folding (#160565)
This addresses user confusion about createOrFold behavior compared to
canonicalization passes, as discussed in #159844.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 370db9c62910195e664e82dde6f0adb3e255a4fd
https://github.com/llvm/llvm-project/commit/370db9c62910195e664e82dde6f0adb3e255a4fd
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
A lldb/test/Shell/SymbolFile/DWARF/union-types-no-member-location.yaml
Log Message:
-----------
Fix a bug where an error was emitted for GCC union types. (#159401)
GCC doesn't add DW_AT_data_member_location attributes to the
DW_TAG_member children of DW_TAG_union_type types. An error was being
emitted incorrectly for these cases fr om the DWARFASTParserClang. This
fixes that issue and adds a test.
Commit: 475e0ee7fa446beb0e57ab508645418cd8a5d68e
https://github.com/llvm/llvm-project/commit/475e0ee7fa446beb0e57ab508645418cd8a5d68e
Author: Thurston Dang <thurston at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP() operands (#159966)
This generalizes handleAVX512VectorGenericMaskedFP() (introduced in
#158397), to potentially handle intrinsics that have A/WriteThru/Mask in
an operand order that is different to AVX512/AVX10 rcp and rsqrt. Any
operands other than A and WriteThru must be fully initialized.
For example, the generalized handler could be applied in follow-up work
to many of the AVX512 rndscale intrinsics:
```
<32 x half> @llvm.x86.avx512fp16.mask.rndscale.ph.512(<32 x half>, i32, <32 x half>, i32, i32)
<16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float>, i32, <16 x float>, i16, i32)
<8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double>, i32, <8 x double>, i8, i32)
A Imm WriteThru Mask Rounding
<8 x float> @llvm.x86.avx512.mask.rndscale.ps.256(<8 x float>, i32, <8 x float>, i8)
<4 x float> @llvm.x86.avx512.mask.rndscale.ps.128(<4 x float>, i32, <4 x float>, i8)
<4 x double> @llvm.x86.avx512.mask.rndscale.pd.256(<4 x double>, i32, <4 x double>, i8)
<2 x double> @llvm.x86.avx512.mask.rndscale.pd.128(<2 x double>, i32, <2 x double>, i8)
A Imm WriteThru Mask
```
Commit: add906ffe47b49b8fca28c8ac9d35ad47989028c
https://github.com/llvm/llvm-project/commit/add906ffe47b49b8fca28c8ac9d35ad47989028c
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/test/CodeGen/ARM/fadds.ll
M llvm/test/CodeGen/ARM/fmuls.ll
M llvm/test/CodeGen/ARM/fp_convert.ll
M llvm/test/CodeGen/ARM/fsubs.ll
M llvm/test/CodeGen/ARM/neon-spfp.ll
Log Message:
-----------
[ARM] Consider denormal mode in `ARMSubtarget` (#160456)
Factor out from #151275.
Add denormal mode to subtarget.
Commit: 804b46bb45d2c52c873f7b06c8f12cde6d6c0814
https://github.com/llvm/llvm-project/commit/804b46bb45d2c52c873f7b06c8f12cde6d6c0814
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/version
M libcxx/test/libcxx/diagnostics/string.nodiscard.verify.cpp
M libcxx/test/libcxx/diagnostics/string_view.nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/string.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/string_view.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/strings/basic.string/string.ops/string_substr/subview.pass.cpp
A libcxx/test/std/strings/string.view/string.view.ops/subview.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][string] P3044R2: sub-`string_view` from `string` (#147095)
Implements [P3044R2](https://wg21.link/P3044R2)
Note: `substr.pass.cpp` is refactored to accommodate the test of
`basic_string_view`'s `subview` which is an alias of `substr` without
changing the test cases.
Closes #148140
# References
- https://github.com/cplusplus/draft/pull/7975
- https://wg21.link/string.substr
- https://wg21.link/string.view.ops
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: ba24b3ec6695b239366f82968fa78702f6f89da9
https://github.com/llvm/llvm-project/commit/ba24b3ec6695b239366f82968fa78702f6f89da9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Posix/coverage-reset.cpp
Log Message:
-----------
[compiler-rt] Fix coverage-reset.cpp (#160620)
When relanding a previous patch I had accidentally left this patched to
tee output into a file rather than run FileCheck. This patch fixes that
so the test actually tests what it is supposed to.
Commit: a3d7c468bdc328f04da720088b2e542ef1f33ffc
https://github.com/llvm/llvm-project/commit/a3d7c468bdc328f04da720088b2e542ef1f33ffc
Author: Jade Marker <jade.marker153 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libunwind/src/UnwindRegistersRestore.S
Log Message:
-----------
[Mips] Fixed libunwind::Registers_mips_o32::jumpto to allow for load delay (#152942)
Fix #152922
MIPS III also has load delay, so
libunwind::Registers_mips_newabi::jumpto() is also fixed.
Commit: 151a80bbcea947a097870e8ce9034583936a357b
https://github.com/llvm/llvm-project/commit/151a80bbcea947a097870e8ce9034583936a357b
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
Log Message:
-----------
[TargetLowering][ExpandABD] Prefer selects over usubo if we do the same for ucmp (#159889)
Same deal we use for determining ucmp vs scmp.
Using selects on platforms that like selects is better than using usubo.
Rename function to be more general fitting this new description.
Commit: ea721e2fa1cd2a35652082dae1d0987de531883d
https://github.com/llvm/llvm-project/commit/ea721e2fa1cd2a35652082dae1d0987de531883d
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/RegAllocScore.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
Log Message:
-----------
[TII] Split isTrivialReMaterializable into two versions [nfc] (#160377)
This change builds on https://github.com/llvm/llvm-project/pull/160319
which tries to clarify which *callers* (not backends) assume that the
result is actually trivial.
This change itself should be NFC. Essentially, I'm just renaming the
existing isTrivialRematerializable to the non-trivial version and then
adding a new trivial version (with the same name as the prior function)
and simplifying a few callers which want that semantic.
This change does *not* enable non-trivial remat any more broadly than
was already done for our targets which were lying through the old APIs;
that will come separately. The goal here is simply to make the code
easier to follow in terms of what assumptions are being made where.
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 157b81a910efadf7fa08f6958ca7f7e2200c0ca8
https://github.com/llvm/llvm-project/commit/157b81a910efadf7fa08f6958ca7f7e2200c0ca8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
Log Message:
-----------
[ADT] clang-format SmallPtrSet.h (NFC)
I'm planning to modify this file.
Commit: a34048bfed8c4e6f43bc4dd09c4dbc189c3a29f5
https://github.com/llvm/llvm-project/commit/a34048bfed8c4e6f43bc4dd09c4dbc189c3a29f5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-24 (Wed, 24 Sep 2025)
Changed paths:
M libcxx/test/benchmarks/algorithms/sorting/partial_sort.bench.cpp
Log Message:
-----------
[libc++][NFC] Fix benchmark name missing a parenthesis
Commit: aa6a33ae6556690f58ccb7519f577c7fae2783ef
https://github.com/llvm/llvm-project/commit/aa6a33ae6556690f58ccb7519f577c7fae2783ef
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
R llvm/include/llvm/Transforms/Vectorize/EVLIndVarSimplify.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
R llvm/lib/Transforms/Vectorize/EVLIndVarSimplify.cpp
R llvm/test/Transforms/LoopVectorize/RISCV/evl-iv-simplify.ll
Log Message:
-----------
[LV] Remove EVLIndVarSimplify pass (#160454)
Initially this was needed to replace the fixed-step canonical IV with
the variable-step EVL IV, but this was eventually superseded by the loop
vectorizer doing this transform itself in #147222. The pass was then
removed from the RISC-V pipeline in #151483 and the loop vectorizer
stopped emitting the metadata used by the pass in #155760, so now
there's no users of it.
Commit: 47017af57d471a15af2ac4ec1235835d34f92d28
https://github.com/llvm/llvm-project/commit/47017af57d471a15af2ac4ec1235835d34f92d28
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port aa6a33ae6556
Commit: f9305c900ba23de7a9088ed00912cc6113eba506
https://github.com/llvm/llvm-project/commit/f9305c900ba23de7a9088ed00912cc6113eba506
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/verbose-trap.cpp
Log Message:
-----------
[clang][bytecode] Use in `Expr::tryEvaluateString` (#160118)
Fixes #157492
Commit: 3e639930d3ba3d6401992ab1d54dc625d5a299a5
https://github.com/llvm/llvm-project/commit/3e639930d3ba3d6401992ab1d54dc625d5a299a5
Author: Afanasyev Ivan <ivafanas at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
Log Message:
-----------
[CodeGen] Extract copy-paste on PHI MachineInstr income removal. (#158634)
Commit: 440d6d0f7867dac1c19d2020b7b35b6201d83855
https://github.com/llvm/llvm-project/commit/440d6d0f7867dac1c19d2020b7b35b6201d83855
Author: Twice <twice at apache.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/python/integration/dialects/pdl.py
Log Message:
-----------
[MLIR][Python] Add bindings for PDL constraint function registering (#160520)
This is a follow-up to #159926.
That PR (#159926) exposed native rewrite function registration in PDL
through the C API and Python, enabling use with
`pdl.apply_native_rewrite`.
In this PR, we add support for native constraint functions in PDL via
`pdl.apply_native_constraint`, further completing the PDL API.
Commit: efa907e899339f1c2d9b885202ec23ed612300ed
https://github.com/llvm/llvm-project/commit/efa907e899339f1c2d9b885202ec23ed612300ed
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/SemaHIP/amdgpu-builtin-in-lambda.hip
A clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
Log Message:
-----------
[Clang][AMDGPU] Defer amdgcn.*to_lds builtins size diagnostics (#160140)
Before, the diagnostic was emitted immediately, as soon as the error was
detected. This is problematic during the host compilation, since
the compiler performs semantic analysis of `__device__` functions with
the host's
target attributes.
A solution for this is to use `SemaRef.targetDiag` to defer the
diagnostic. The diagnostic will then be printed only if the function is
emitted.
The test included in this patch highlights a second problem: we cannot
compile a file having a call to `__builtin_amdgcn_load_to_lds` on a
`__device__` function since we typecheck the signature.
The issue is that, `__shared__ void*` on X86 doesn't translate to
`addrspace(3) void*`, so the compilation fails.
Fixes: SWDEV-555501
Commit: 2016af56525734a3ac80d7256434e49e561befc2
https://github.com/llvm/llvm-project/commit/2016af56525734a3ac80d7256434e49e561befc2
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-loop-backedge-elimination-epilogue.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
Log Message:
-----------
[VPlan] Create epilogue minimum iteration check in VPlan. (#157545)
Move creation of the minimum iteration check for the epilogue vector
loop to VPlan. This is a first step towards breaking up and moving
skeleton creation for epilogue vectorization to VPlan.
It moves most logic out of EpilogueVectorizerEpilogueLoop: the minimum
iteration check is created directly in VPlan, connecting the check
blocks from the main vector loop is done as post-processing. Next steps
are to move connecting and updating the branches from the check blocks
to VPlan, as well as updating the incoming values for phis.
Test changes are improvements due to folding of live-ins.
PR: https://github.com/llvm/llvm-project/pull/157545
Commit: ec179f2269bb2118216eeea8fa00f113b1ae75fa
https://github.com/llvm/llvm-project/commit/ec179f2269bb2118216eeea8fa00f113b1ae75fa
Author: Jhalak Patel <jhalakp at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector]: Extend convertIntegerAttr to handle float-to-integer conversion (#159627)
Fixes #159613
`vector.from_elements` crashes when processing float attributes with
integer result types (e.g., `llvm.mlir.constant(0.0 : f8E4M3FN) : i8`
from arith-to-llvm lowering):
```
Assertion `newType.getElementType() == curType.getElementType() && "expected the same element type"' failed.
```
## Implementation
- Rename `convertIntegerAttr` → `convertNumericAttr`
- Add float-to-integer conversion using `APFloat::convertToInteger()`
with exactness assertion
- Preserve existing integer-to-integer conversion behavior
Only implements conversions that pass LLVM verification. Other patterns
(int→float, float→float, bool→int) are rejected by LLVM verifier before
reaching this code, as documented in the attached verification failures.
Commit: bb1d15e84624784b2c3e652ac666e3be4272d8f2
https://github.com/llvm/llvm-project/commit/bb1d15e84624784b2c3e652ac666e3be4272d8f2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__chrono/time_point.h
M libcxx/include/__cxx03/__chrono/time_point.h
R libcxx/test/std/time/time.duration/time.duration.alg/abs.compile.fail.cpp
M libcxx/test/std/time/time.duration/time.duration.alg/abs.pass.cpp
R libcxx/test/std/time/time.point/time.point.cast/ceil.compile.fail.cpp
M libcxx/test/std/time/time.point/time.point.cast/ceil.pass.cpp
R libcxx/test/std/time/time.point/time.point.cast/floor.compile.fail.cpp
M libcxx/test/std/time/time.point/time.point.cast/floor.pass.cpp
R libcxx/test/std/time/time.point/time.point.cast/round.compile.fail.cpp
M libcxx/test/std/time/time.point/time.point.cast/round.pass.cpp
M libcxx/test/std/time/time.point/time.point.cast/time_point_cast.pass.cpp
R libcxx/test/std/time/time.point/time.point.cast/toduration.compile.fail.cpp
Log Message:
-----------
[libc++] Refactor some .fail.cpp tests and fix time_point_cast not SFINAEing away (#159288)
All of the `.fail.cpp` tests are actually testing constraints, so we
should just test that the overloads SFINAE away correctly.
Commit: 8bcb614c165ad4bbb3f7f7a361af128e0c31c13b
https://github.com/llvm/llvm-project/commit/8bcb614c165ad4bbb3f7f7a361af128e0c31c13b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__cxx03/__math/traits.h
M libcxx/test/std/numerics/c.math/signbit.pass.cpp
Log Message:
-----------
[libc++][C++03] cherry-pick #106566 (#158250)
Commit: a769608339ad4fff68081ceb7f388da8b660cfa1
https://github.com/llvm/llvm-project/commit/a769608339ad4fff68081ceb7f388da8b660cfa1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__string/char_traits.h
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/std/strings/basic.string/string.ops/string_find/string_size.pass.cpp
Log Message:
-----------
[libc++] Fold __search_substring into _Traits::find in case the second string has length 1 (#160076)
Apple M4:
```
Benchmark Baseline Candidate Difference % Difference
----------------------------------------------------------- ---------- ----------- ------------ --------------
BM_string_literal/1024 16.99 16.79 -0.21 -1.21
BM_string_literal/128 3.44 3.34 -0.10 -2.88
BM_string_literal/16 1.80 1.69 -0.11 -5.93
BM_string_literal/2048 38.44 38.38 -0.07 -0.17
BM_string_literal/256 5.77 5.65 -0.12 -2.02
BM_string_literal/32 2.03 1.92 -0.11 -5.44
BM_string_literal/4096 73.92 73.74 -0.18 -0.25
BM_string_literal/512 9.49 9.41 -0.08 -0.84
BM_string_literal/64 2.59 2.45 -0.14 -5.38
BM_string_literal/8 1.79 1.69 -0.11 -5.90
BM_string_literal/8192 132.09 131.81 -0.28 -0.21
```
Commit: 5f44fa87989324384eb96ead4c7e6581cec292e3
https://github.com/llvm/llvm-project/commit/5f44fa87989324384eb96ead4c7e6581cec292e3
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef][VP] Clarify 'ff' mnemonic in vp.load.ff: 'first-fault' (#160649)
The LangRef for llvm.vp.load.ff.* stated that 'ff' stands for
'fault-first or fault-only-first.' This patch corrects this to
'first-fault or fault-only-first.' to match established terminology.
- ARM SVE uses "first-fault" [1]
- RISC-V V uses "fault-only-first" [2]
[1] https://arxiv.org/abs/1803.06185
[2] https://github.com/riscvarchive/riscv-v-spec/blob/master/v-spec.adoc
Commit: d7921de8027eec19a9d272bf445944973e6758b1
https://github.com/llvm/llvm-project/commit/d7921de8027eec19a9d272bf445944973e6758b1
Author: owenca <owenpiano at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/ConfigParseTest.cpp
Log Message:
-----------
[clang-format] Correctly handle backward compatibility of C headers (#159908)
This in effect reverts 05fb8408de23c3ccb6125b6886742177755bd757 and
7e1a88b9d1431e263258e3ff0f729c1fdce342d3, the latter of which
erroneously changed the behavior of formatting `ObjC` header files when
both the default and `ObjC` styles were absent. Now the previous
behavior of treating that as an error is restored.
Fixes #158704
Commit: 2f5d5a3f748391f85cfa33702a247d42549f7b9d
https://github.com/llvm/llvm-project/commit/2f5d5a3f748391f85cfa33702a247d42549f7b9d
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/AssumptionCache.h
M llvm/lib/Analysis/AssumptionCache.cpp
M llvm/lib/Transforms/Scalar/DropUnnecessaryAssumes.cpp
M llvm/test/Transforms/DropUnnecessaryAssumes/basic.ll
Log Message:
-----------
[DropUnnecessaryAssumes] Add support for operand bundles (#160311)
This extends the DropUnnecessaryAssumes pass to also handle operand
bundle assumes. For this purpose, export the affected value analysis for
operand bundles from AssumptionCache.
If the bundle only affects ephemeral values, drop it. If all bundles on
an assume are dropped, drop the whole assume.
Commit: 70a26da63992142ba2221f1034048ea883cdcb3d
https://github.com/llvm/llvm-project/commit/70a26da63992142ba2221f1034048ea883cdcb3d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/cse-casts.ll
Log Message:
-----------
[VPlan] Set correct flags when creating and cloning VPWidenCastRecipe.
Make sure that we set the correct wrap flags when creating new
VPWidenCastRecipes for truncs and preserve the flags from the recipe
directly when cloning, to make sure they are not dropped.
Fixes https://github.com/llvm/llvm-project/issues/160396
Commit: 020b9286413c151d33e2d72c29abc8b56c7080d3
https://github.com/llvm/llvm-project/commit/020b9286413c151d33e2d72c29abc8b56c7080d3
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Remark/RemarkStreamer.h
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Remarks.cpp
M mlir/lib/Remark/RemarkStreamer.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Pass/remark-final.mlir
M mlir/test/lib/Pass/TestRemarksPass.cpp
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
[MLIR] Implement remark emitting policies in MLIR (#160526)
This update introduces two new remark emitting policies:
1. `RemarkEmittingPolicyAll`, which emits all remarks,
2. `RemarkEmittingPolicyFinal`, which only emits final remarks after
processing.
The `RemarkEngine` is modified to support these policies, allowing for
more flexible remark handling based on user configuration.
PR also adds flag to `mlir-opt`
```
--remark-policy=<value> - Specify the policy for remark output.
=all - Print all remarks
=final - Print final remarks
```
Commit: 81b90418e2db4ce7aa58f45b0fa84d3029789b4f
https://github.com/llvm/llvm-project/commit/81b90418e2db4ce7aa58f45b0fa84d3029789b4f
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
Log Message:
-----------
[AArch64] Remove AArch64TargetLowering::shouldExpandPartialReductionIntrinsic (NFC) (#159546)
The AArch64 implementation now matches the base implementation.
Commit: 7b2b3756954d60a0da9712d4b1c6ad72b0f7219c
https://github.com/llvm/llvm-project/commit/7b2b3756954d60a0da9712d4b1c6ad72b0f7219c
Author: woruyu <1214539920 at qq.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/X86/encoder-fail.s
Log Message:
-----------
[X86][MC][AsmParser] Reject H-byte regs with VEX/EVEX-encoded 8-bit RR (NDD) (#160039)
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/158585.
Commit: 072cf57a6ab9894ad0f2e177a74eb2bf621b6cb5
https://github.com/llvm/llvm-project/commit/072cf57a6ab9894ad0f2e177a74eb2bf621b6cb5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/ptr-replace-alloca.ll
Log Message:
-----------
InstCombine: Check GEP operand is available (#160438)
Logic copied from the select case.
Fixes #160302
Commit: 90db6292653e9aba81134b1a04f89c74c5ed1e28
https://github.com/llvm/llvm-project/commit/90db6292653e9aba81134b1a04f89c74c5ed1e28
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__cxx03/__math/traits.h
M libcxx/test/std/numerics/c.math/isnormal.pass.cpp
Log Message:
-----------
[libc++][C++03] cherry-pick #104773 (#158244)
Commit: 1034bb57aed54bca75be3b02cb8e348ca9728ff8
https://github.com/llvm/llvm-project/commit/1034bb57aed54bca75be3b02cb8e348ca9728ff8
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
A llvm/test/CodeGen/AArch64/movi64_sve.ll
Log Message:
-----------
[AArch64] Use SVE to materialise some 128-bit vector constants (#159101)
There is no easy way to materialise some fixed-width vector constants
with 64-bit elements. This is because NEON's movi instruction is
restricted to setting all bits in a byte to the same value, i.e. 0xFF
can be encoded as an immediate but not 0x1F. However, if SVE is
available we can use the dup instruction to cover more cases.
Rather than lower the immediate directly using the dup instruction, I've
instead used the generic SPLAT_VECTOR node in combination with an
EXTRACT_SUBVECTOR. This is because we already have SVE splat_vector
patterns that can match directly to dup.
Commit: ed30414b0a2a751bab3cf717bad98db6f699c29b
https://github.com/llvm/llvm-project/commit/ed30414b0a2a751bab3cf717bad98db6f699c29b
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/MachineStripDebug.cpp
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
Log Message:
-----------
[MachineStripDebug] Remove debug instructions from inside bundles (#160297)
Some passes, like AMDGPU's SIInsertHardClauses, wrap sequences of
instructions into bundles, and these bundles may end up with debug
instructions in the middle. Assuming that this is allowed, this patch
fixes MachineStripDebug to be able to remove these instructions from
inside a bundle.
Commit: c8d983c7b339ba6ac61711ab527ca280ef6ede4a
https://github.com/llvm/llvm-project/commit/c8d983c7b339ba6ac61711ab527ca280ef6ede4a
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll
A llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for combining `and(add(not))` (#159055)
Commit: 02d8fb5789f64ed9cff3f42b005105a51c6c7550
https://github.com/llvm/llvm-project/commit/02d8fb5789f64ed9cff3f42b005105a51c6c7550
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/unittests/Host/posix/HostTest.cpp
Log Message:
-----------
[lldb][test] check if CoreDumping info is supported (#160333)
CoreDumping in /proc/<pid>/status was added in kernel 4.15, this causes the
test to fail in older kernel versions. see
https://man7.org/linux/man-pages/man5/proc_pid_status.5.html
Commit: 1d46071bfe93175b4083483dea6023eb186aca2d
https://github.com/llvm/llvm-project/commit/1d46071bfe93175b4083483dea6023eb186aca2d
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
A llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for element extraction from binary add operation (#159725)
Commit: c5ded52d5f3603182b41be64f1f8ac3bbdaa3daa
https://github.com/llvm/llvm-project/commit/c5ded52d5f3603182b41be64f1f8ac3bbdaa3daa
Author: Xing Guo <higuoxing+github at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/attr-format.c
M clang/test/Sema/format-strings-scanf.c
M clang/test/Sema/format-strings.c
Log Message:
-----------
[clang][Sema] Accept gnu format attributes (#160255)
This patch teaches clang accepts gnu_printf, gnu_scanf, gnu_strftime and
gnu_strfmon. These attributes are aliases for printf, scanf, strftime and
strfmon.
Ref: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html
Fixes: #16219
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: cfb4f29b1cd271c2c1d77c1cc086d7b6613f0bd9
https://github.com/llvm/llvm-project/commit/cfb4f29b1cd271c2c1d77c1cc086d7b6613f0bd9
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Relax constraint on matmul verifier requiring equal operand types (#155799)
Removes the verifier constraint allowing support for matmul with
different operand types such as fp8e5m2xfp8e4m3. Support for specific
operand types strictly adhering to the TOSA specification will still be
caught in the validation pass.
Commit: dfc88549b0c2da7ea9d9c3cba9a08811e3e56f8a
https://github.com/llvm/llvm-project/commit/dfc88549b0c2da7ea9d9c3cba9a08811e3e56f8a
Author: Qi Zhao <zhaoqi01 at loongson.cn>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/adda.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/adda.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for `[x]vadda.{b/h/w/d}`
Commit: e94a0b300addcf4a0ead62bbadf811f3209a8a49
https://github.com/llvm/llvm-project/commit/e94a0b300addcf4a0ead62bbadf811f3209a8a49
Author: Giuseppe Rossini <giuseppe.rossini at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/Analysis/CostModel/AMDGPU/canonicalize.ll
M llvm/test/Analysis/CostModel/AMDGPU/fadd.ll
M llvm/test/Analysis/CostModel/AMDGPU/fma.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmul.ll
M llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
A llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
Log Message:
-----------
[AMDGPU] Fix vector legalization for bf16 valu ops (#158439)
Add v4,v8,v16,v32 legalizations for the following operations:
- `FADD`
- `FMUL`
- `FMA`
- `FCANONICALIZE`
Commit: 28a8dfb484dae13d1ef464ea603c9bc94e5fa0aa
https://github.com/llvm/llvm-project/commit/28a8dfb484dae13d1ef464ea603c9bc94e5fa0aa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
Log Message:
-----------
[X86] Add missing prefixes to trunc-sat tests (#160662)
Since #159321 we now get actual warnings when we're missing coverage
Commit: ed07b3043d6a88ad90175eac1043ca23adcddd9f
https://github.com/llvm/llvm-project/commit/ed07b3043d6a88ad90175eac1043ca23adcddd9f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/union-types-no-member-location.yaml
Log Message:
-----------
[lldb][test] Make hex prefix optional in DWARF union types test
Fixes #159401
On Windows there is no hex prefix, I suspect because somewhere we
print a pointer. I'd prefer to fix that itself but can't get to
a Windows machine at the moment. It's not important to the purpose
of the test anyway.
Commit: 833d5f0cd8bec8de84cdbefc49c4ef4566a5b356
https://github.com/llvm/llvm-project/commit/833d5f0cd8bec8de84cdbefc49c4ef4566a5b356
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__tree
A libcxx/include/__type_traits/is_generic_transparent_comparator.h
A libcxx/include/__type_traits/make_transparent.h
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
Log Message:
-----------
[libc++] Avoid constructing additional objects when using map::at (#157866)
This patch adds additional overloads to `map::at` in case its known that
the argument is transparently comparable to the key type. This avoids
actually constructing the key type in some cases, potentially removing
allocations.
```
--------------------------------------------------------
Benchmark old new
--------------------------------------------------------
BM_map_find_string_literal 12.8 ns 2.68 ns
```
Commit: 2c3453afd2d28d1a4d802af071c15b8620896ed3
https://github.com/llvm/llvm-project/commit/2c3453afd2d28d1a4d802af071c15b8620896ed3
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/bail-out-all-deps.ll
M llvm/test/Transforms/LoopInterchange/confused-dependence.ll
M llvm/test/Transforms/LoopInterchange/legality-for-scalar-deps.ll
M llvm/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll
M llvm/test/Transforms/LoopInterchange/unique-dep-matrix.ll
Log Message:
-----------
[LoopInterchange] Bail out when finding a dependency with all `*` elements (#149049)
If a direction vector with all `*` elements, like `[* * *]`, is present,
it indicates that none of the loop pairs are legal to interchange. In
such cases, continuing the analysis is meaningless.
This patch introduces a check to detect such direction vectors and exits
early when one is found. This slightly reduces compile time.
Commit: 0a80631142db9eb2c357dee304d51c1ef1acc590
https://github.com/llvm/llvm-project/commit/0a80631142db9eb2c357dee304d51c1ef1acc590
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/MC/AMDGPU/wavesize-feature-unsupported-target.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_wave64_feature.s
A llvm/test/MC/Disassembler/AMDGPU/gfx9_wave32_feature.txt
Log Message:
-----------
AMDGPU: Ensure both wavesize features are not set (#159234)
Make sure we cannot be in a mode with both wavesizes. This
prevents assertions in a future change. This should probably
just be an error, but we do not have a good way to report
errors from the MCSubtargetInfo constructor.
Commit: 65b41f03b674872d95efda60877d5628c3b4ce9a
https://github.com/llvm/llvm-project/commit/65b41f03b674872d95efda60877d5628c3b4ce9a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 833d5f0cd8be
Commit: bafcc3e3b3353718b47e77618f0bb5fad7d1aa15
https://github.com/llvm/llvm-project/commit/bafcc3e3b3353718b47e77618f0bb5fad7d1aa15
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestMemoryRegionDirtyPages.py
Log Message:
-----------
[lldb][test] Refactor and expand TestMemoryRegionDirtyPages.py (#156035)
This started as me being annoyed that I got loads of this when
inspecting memory regions on Mac:
Modified memory (dirty) page list provided, 0 entries.
So I thought I should test the existing behaviour, which led me to
refactor the existing test to run the same checks on all regions.
In the process I realised that the output is not wrong. There is a
difference between knowing that no pages are dirty and not knowing
anything about dirty pages. We print that there are 0 entries so the
user knows that difference.
The test case now checks "memory region" output as well as API use.
There were also some checks only run on certain regions, like page size,
which now run for all of them.
Commit: 961b3724775eee93da1fe3d4ed9de9f8341751f9
https://github.com/llvm/llvm-project/commit/961b3724775eee93da1fe3d4ed9de9f8341751f9
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/test/X86/dwarf5-dwoid-no-dwoname.s
Log Message:
-----------
[BOLT] Fix dwarf5-dwoid-no-dwoname.s (#160676)
Fix the test in dwarf5-dwoid-no-dwoname.s, add %cflags in the test to
control the triple.
[detail](https://github.com/llvm/llvm-project/pull/154749#issuecomment-3333043864)
Commit: 50de925bcbd9175792c1f3c7786c94c0897ab876
https://github.com/llvm/llvm-project/commit/50de925bcbd9175792c1f3c7786c94c0897ab876
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for [x]vldi instructions with special constant splats (#159228)
Commit: a7f5abbe735faef7f13a1346167274fb8afb0b18
https://github.com/llvm/llvm-project/commit/a7f5abbe735faef7f13a1346167274fb8afb0b18
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
Log Message:
-----------
[NFC][InstSimplify] Refactor fminmax-folds.ll test (#160504)
Refactor all the tests in `fminmax-folds.ll` so that they are grouped by
optimization, rather than by intrinsic.
Instead of calling 1 intrinsic per function, each function now tests all
6 variants of the intrinsic. Results are stored to named pointers to
maintain readability in this more compact form. This makes it much
easier to compare the outputs from each intrinsic, rather than having
them scattered in different functions in different parts of the file. It
is also much more compact, so despite adding >50% more tests, the file
is ~500 lines shorter.
The tests added include:
* Adding `maximumnum` and `minimumnum` everywhere (currently not
optimized, but added as a baseline for future optimizations in #139581).
* Adding separate tests for SNaN and QNaN (as a baseline for correctness
improvements in #139581 )
* Adding tests for scalable vectors
* Increasing the variety of types used in various tests by using more
f16, f64, and vector types in tests.
The only coverage removed is for tests with undef (only poison is now
tested for).
Overall, this refactor should increase coverage, improve readability
with more comments and clear section headers, and make the tests much
more compact and easier to review in #139581 by providing a clear
baseline for each intrinsic's current behaviour.
Commit: b96884fcad72da76d1cee5a75f26164201a2352c
https://github.com/llvm/llvm-project/commit/b96884fcad72da76d1cee5a75f26164201a2352c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Remark/RemarkStreamer.h
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Remarks.cpp
M mlir/lib/Remark/RemarkStreamer.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
R mlir/test/Pass/remark-final.mlir
M mlir/test/lib/Pass/TestRemarksPass.cpp
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
Revert "[MLIR] Implement remark emitting policies in MLIR" (#160681)
Reverts llvm/llvm-project#160526
This fails with Sanitizers.
Commit: ce63093e2b44f1e7e938db98ee7030fb541ddef3
https://github.com/llvm/llvm-project/commit/ce63093e2b44f1e7e938db98ee7030fb541ddef3
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
Log Message:
-----------
[LV] Add partial reduction tests multiplying extend with constants.
Commit: 2d6d56bae167e2e3d0a73a3593d1c735b211df36
https://github.com/llvm/llvm-project/commit/2d6d56bae167e2e3d0a73a3593d1c735b211df36
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/MC/AMDGPU/wave_any.s
Log Message:
-----------
AMDGPU: Convert wave_any test to use update_mc_test_checks
Commit: c1f8dbb11cff9e017e3d65c22162e11d04a61dfa
https://github.com/llvm/llvm-project/commit/c1f8dbb11cff9e017e3d65c22162e11d04a61dfa
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/epilogue-vectorization-fix-scalar-resume-values.ll
Log Message:
-----------
[LV] Add coverage for fixing-up scalar resume values (#160492)
Increase coverage of the routine fixScalarResumeValuesFromBypass in the
case where the original scalar resume value is zero.
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: c80d49590871c2060bbea758e09382bc5f9561c6
https://github.com/llvm/llvm-project/commit/c80d49590871c2060bbea758e09382bc5f9561c6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-divrem.mir
Log Message:
-----------
GlobalISel: Adjust insert point when expanding G_[SU]DIVREM
(#160683)
The insert point management is messy here. We probably should
have an insert point guard, and not have ths dest operand utilities
modify the insert point.
Fixes #159716
Commit: 4769e52bb63d88942db8b27245c085e06921a4ee
https://github.com/llvm/llvm-project/commit/4769e52bb63d88942db8b27245c085e06921a4ee
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/epilogue-vectorization-fix-scalar-resume-values.ll
Log Message:
-----------
[LV] Fixup a test after c1f8dbb (#160688)
Follow up on c1f8dbb ([LV] Add coverage for fixing-up scalar resume
values) to regenerate a test with UTC.
Commit: 9652dc931be6598c441c7dc8f50c1fcb967c2410
https://github.com/llvm/llvm-project/commit/9652dc931be6598c441c7dc8f50c1fcb967c2410
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/fpr-gpr-copy-rv64.ll
Log Message:
-----------
[RISCV][test] Regenerate fpr-gpr-copy-rv64.ll
It was missing RV64I lines for `fadd_f32`.
Commit: fb67737c49ad098f5dcd4a2f9b67bdd1befb75b7
https://github.com/llvm/llvm-project/commit/fb67737c49ad098f5dcd4a2f9b67bdd1befb75b7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/assume-align.ll
Log Message:
-----------
[InstCombine] Add test with "align"(ptr %p, i32 1) assumption.
Commit: 508748dd9eb522bb2c02dd86ba9bb3ea13f71874
https://github.com/llvm/llvm-project/commit/508748dd9eb522bb2c02dd86ba9bb3ea13f71874
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[libclang/python] Fix OpenMP and OpenACC CursorKinds name format (#160295)
Missing `CursorKind`s that were added in #143264 follow the name format
of Index.h instead of those in cindex.py. Adapt the names accordingly.
Commit: fae54a05bc100d84c2547dc5b7be277a77b0e9a4
https://github.com/llvm/llvm-project/commit/fae54a05bc100d84c2547dc5b7be277a77b0e9a4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.h
A clang/test/Driver/Inputs/basic_gpu_tree/bin/keep
A clang/test/Driver/Inputs/basic_gpu_tree/include/amdgcn-amd-amdhsa/.keep
A clang/test/Driver/Inputs/basic_gpu_tree/include/nvptx64-nvidia-cuda/.keep
A clang/test/Driver/Inputs/basic_gpu_tree/lib/amdgcn-amd-amdhsa/.keep
A clang/test/Driver/Inputs/basic_gpu_tree/lib/nvptx64-nvidia-cuda/.keep
M clang/test/Driver/gpu-libc-headers.c
Log Message:
-----------
[Clang][NFC] Move GPU include directory to proper place (#160608)
Summary:
This should be handled in the toolchain, not in the middle of clang.
Commit: b7e20c741451bb846e25c87a782d746c2382597a
https://github.com/llvm/llvm-project/commit/b7e20c741451bb846e25c87a782d746c2382597a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
[libc] Make all targets respect LLVM_PER_TARGET_RUNTIME_DIR (#160597)
Summary:
The libcxx and compiler-rt already install their headers according
to the triple if this option is enabled. We should do this by default so
these don't get mixed up when people potentially combine multiple
toolchains.
Commit: d73ffe57f983c8ef9490e420d972ae3373b3f175
https://github.com/llvm/llvm-project/commit/d73ffe57f983c8ef9490e420d972ae3373b3f175
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[flang][OpenMP] Introduce variant argument, customize OmpArgument par… (#160372)
…sing
The DECLARE_VARIANT directive takes two names separated by a colon as an
argument: base-name:variant-name. Define OmpBaseVariantNames to
represent this, since no existing argument alternative matches it.
However, there is an issue. The syntax "name1:name2" can be the argument
to DECLARE_VARIANT (if both names are OmpObjects), but it can also be a
reduction-specifier if "name2" is a type. This conflict can only be
resolved once we know what the names are, which is after name resolution
has visited them. The problem is that name resolution has side-effects
that may be (practically) impossible to undo (e.g. creating new symbols,
emitting diagnostic messages).
To avoid this problem this PR makes the parsing of OmpArgument
directive- sensitive: when the directive is DECLARE_VARIANT, don't
attempt to parse a reduction-specifier, consider OmpBaseVariantNames
instead. Otherwise ignore OmpBaseVariantNames in favor of
reduction-specifier.
Commit: fde15cb3eeb68461c66f6b5b928c7093393496a0
https://github.com/llvm/llvm-project/commit/fde15cb3eeb68461c66f6b5b928c7093393496a0
Author: hev <wangrui at loongson.cn>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/bitreverse.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-frecipe.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-frsqrte.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-max-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-min-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr-d-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr-d.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-replgr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-replgr2vr.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-set.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-setallnez.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-setanyeqz.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-pair-elements.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvrepl128vei.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
M llvm/test/CodeGen/LoongArch/lasx/shuffle-as-permute-and-shuffle.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-add.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-and.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-or.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-smax.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-smin.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-umax.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-umin.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-xor.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/bitreverse.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-fcmp.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-frecipe.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-frsqrte.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-max-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-min-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr-d-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr-d.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-replgr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-replgr2vr.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-set.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-setallnez.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-setanyeqz.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vreplvei.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf4i.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-add.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-and.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-or.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-smax.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-smin.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-umax.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-umin.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-xor.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-any-ext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
Log Message:
-----------
[LoongArch] Enable more vector tests for 32-bit target (#160656)
Commit: 48a0bb71053bf4dd7884cae998ed341df02ecef3
https://github.com/llvm/llvm-project/commit/48a0bb71053bf4dd7884cae998ed341df02ecef3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/masked_store_trunc.ll
Log Message:
-----------
[X86] masked_store_trunc.ll - add missing prefixes (#160685)
Since #159321 we now get actual warnings when we're missing coverage
Commit: 0956febc4c1d7c66eae0064ce02dbb98880021dc
https://github.com/llvm/llvm-project/commit/0956febc4c1d7c66eae0064ce02dbb98880021dc
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/IR/DebugInfo.cpp
A llvm/test/Transforms/Inline/dilocation-loop-metadata-update.ll
Log Message:
-----------
[DebugInfo] Handle followup loop metadata in updateLoopMetadataDebugLocations (#157557)
Inliner/IROutliner/CodeExtractor all uses the
updateLoopMetadataDebugLocations helper in order to modify debug
location related to loop metadata. However, the helper has only
been updating DILocation nodes found as operands to the first level
of the MD_loop metadata. There could however be more DILocations
as part of the various kinds of followup metadata. A typical example
would be llvm.loop metadata like this
!6 = distinct !{!6, !7, !8, !9, !10, !11}
!7 = !DILocation(line: 6, column: 3, scope: !3)
!8 = !DILocation(line: 7, column: 22, scope: !3)
!11 = !{!"llvm.loop.distribute.followup_all", !7, !8, ..., !14}
!14 = !{!"llvm.loop.vectorize.followup_all", !7, !8, ...}
Instead of just updating !7 and !8 in !6, this patch make sure that
we now recursively update the DILocations in !11 and !14 as well.
Fixes #141568
Commit: 7be2951750afa48ea00c743cc31d3046adeb21c5
https://github.com/llvm/llvm-project/commit/7be2951750afa48ea00c743cc31d3046adeb21c5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/unittests/Analysis/Presburger/MatrixTest.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in MatrixTest.cpp (NFC)
Commit: 66bd8456fccf677bb1cab1d8ba3095006eb73709
https://github.com/llvm/llvm-project/commit/66bd8456fccf677bb1cab1d8ba3095006eb73709
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
Log Message:
-----------
[AMDGPU][TargetLowering] Allow forming overflow op if it is legal (#156266)
Because usubo and uaddo are legal in AMDGPU in 32 bits, we want to use
it whenever possible.
Commit: 17c93d6e082c3cb3e3780c53e4d51ed9dc1fa5b5
https://github.com/llvm/llvm-project/commit/17c93d6e082c3cb3e3780c53e4d51ed9dc1fa5b5
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Support/TextEncoding.cpp
Log Message:
-----------
Improvements to TextEncodingConverter (#142476)
This patch addresses the follow-up comments on PR
https://github.com/llvm/llvm-project/pull/138893
Commit: 2a82e71835f7b2258c42af9ad0ec67b6d007045c
https://github.com/llvm/llvm-project/commit/2a82e71835f7b2258c42af9ad0ec67b6d007045c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__cxx03/locale
M libcxx/include/__locale_dir/time.h
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
Log Message:
-----------
[libc++] Remove __time_get_storage::{__analyze,init} from the ABI (#158469)
These functions have never been used outside the dylib, so there is no
point in exporting them.
Commit: c533017bcb576baff4016722d6498c1756e2bc0f
https://github.com/llvm/llvm-project/commit/c533017bcb576baff4016722d6498c1756e2bc0f
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
A llvm/test/CodeGen/AArch64/arm64-cvt-simd-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
Log Message:
-----------
[AArch64][GlobalISel] Add codegen for simd fpcvt intrinsics (#157680)
This patch is a first in a series of patches that add codegen support
for fcvt instructions that keep the result in 32-bit or 64-bit SIMD&FP
registers. For a long time, LLVM primarily generated fpcvt instructions,
which store the result in GPRs, resulting in extra moves when the value
was used by NEON instructions that operate on SIMD&FP registers.
Although patterns existed for generating the SIMD variants, they relied
on single-element vector types (such as v1i32 or v1i64) to decide
whether the SIMD variant should be selected. This was not useful,
because many NEON intrinsics and other LLVM IR operations use scalar
types (i32/i64) even though they expect the result to be stored in
SIMD&FP registers.
This patch is part of a series that addresses this and also adds support
for generating these instructions in GlobalISel. To fix this in
SelectionDAG, bitcasts of the result to a floating-point type serve as a
hint that the SIMD variant of the conversion should be used, rather than
relying on single-element vector types. These bitcasts are not currently
generated by LLVM, but the goal is to add explicit bitcasts to the
inputs and outputs of NEON intrinsics operating on integers in follow-up
patches.
For GlobalISel, the register bank selection algorithm is used to
determine which variant to generate
Commit: a05b232076edc3b05fc58d68451a716a0ddc8868
https://github.com/llvm/llvm-project/commit/a05b232076edc3b05fc58d68451a716a0ddc8868
Author: Justin Cady <desk at justincady.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/API/CMakeLists.txt
Log Message:
-----------
[lldb] Avoid copying header just to overwrite it (#160555)
The build script copies lldb-defines.h into the staging area but it gets
overwritten by version-header-fix.py. This flow assumes that the
lldb-defines.h from the source was writable originally (thus the copy
maintains that permission). This is problematic for systems that
integrate LLVM source as read only.
This change skips the initial copy of lldb-defines.h, which prevents
lldb build failures when the source is not writable.
Commit: 0c1087b377b49dafaa7d82942db11c2fd3fd4c11
https://github.com/llvm/llvm-project/commit/0c1087b377b49dafaa7d82942db11c2fd3fd4c11
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrGISel.td
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/X86/isel-llvm.set.rounding.ll
A llvm/test/CodeGen/X86/isel-set-invalid-rounding.ll
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/RegClassByHwMode.td
Log Message:
-----------
[X86][GlobalISel] Added support for llvm.set.rounding (#156591)
- This implementation is adapted from **SDAG
X86TargetLowering::LowerSET_ROUNDING**.
Commit: b05101b86472826ec77d0c9b71a431917a8f2493
https://github.com/llvm/llvm-project/commit/b05101b86472826ec77d0c9b71a431917a8f2493
Author: Owen Anderson <resistor at mac.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
A llvm/test/TableGen/CPtrWildcard.td
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
Log Message:
-----------
[TableGen, CodeGen, CHERI] Add support for the cPTR wildcard value type. (#158426)
cPTR is a wildcard CHERI capability value type, used analogously to iPTR. This allows TableGen patterns to abstract over CHERI capability widths.
Co-authored-by: Jessica Clarke <jrtc27 at jrtc27.com>
Commit: 373a2f1f222608d1f274c42281f4ffeed47a17a1
https://github.com/llvm/llvm-project/commit/373a2f1f222608d1f274c42281f4ffeed47a17a1
Author: Dor Arad <45083160+undor at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
Log Message:
-----------
[mlir][scf] ExecuteRegionOp bufferization to consider no_inline attr (#160697)
Fix a bug where ExecuteRegionOp bufferization dropped the "no_inline"
attribute.
Co-authored-by: Dor Arad <dor.arad at mobileye.com>
Commit: 09bdbfd9d1a7b10b3b91c86672ca2994dc997c82
https://github.com/llvm/llvm-project/commit/09bdbfd9d1a7b10b3b91c86672ca2994dc997c82
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/X86/usub_inc_iv.ll
Log Message:
-----------
[CodeGenPrepare] Bail out of usubo creation if sub's parent is not the same as the comparison (#160358)
We match uadd's behavior here.
Codegen comparison: https://godbolt.org/z/x8j4EhGno
Commit: f3f5d8bea836e01a2bc12edf5980c3a51de2fd7a
https://github.com/llvm/llvm-project/commit/f3f5d8bea836e01a2bc12edf5980c3a51de2fd7a
Author: Radovan Božić <radovan.bozic at htecgroup.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.def
Log Message:
-----------
[NFC][clang] Quote literal builtin attribute markers in Builtins.def docs (#160080)
Clarify the documentation in Builtins.def by quoting literal attribute
markers (e.g. 'n', 'r', 'U', 'N') to distinguish them from placeholders
such as N in C<N,...>. This avoids confusion and makes the attribute
docs clearer.
Commit: f9c2565117106467c3c8b1975e67c9750aee34e3
https://github.com/llvm/llvm-project/commit/f9c2565117106467c3c8b1975e67c9750aee34e3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
A llvm/test/Transforms/PGOProfile/chr-lifetimes.ll
Log Message:
-----------
Reapply "[ControlHeightReduction] Drop lifetime annotations where necessary" (#160640)
Reapplies #159686
This reverts commit 4f33d7b7a9f39d733b7572f9afbf178bca8da127.
The original landing of this patch had an issue where it would try and
hoist allocas into the entry block that were in the entry block. This
would end up actually moving them lower in the block potentially after
users, resulting in invalid IR.
This update fixes this by ensuring that we are only hoisting static
allocas that have been sunk into a split basic block. A regression test
has been added.
Integration tested using a three stage build of clang with IRPGO
enabled.
Commit: 4d4df2ba477fa4bce9db017f28a80a27ee5ab8ca
https://github.com/llvm/llvm-project/commit/4d4df2ba477fa4bce9db017f28a80a27ee5ab8ca
Author: David Green <david.green at arm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/dp-3source.ll
R llvm/test/CodeGen/AArch64/madd-lohi.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for dp-3source.ll. NFC
madd-lohi.ll is removed as the test is available elsewhere.
Commit: 2657c79cb974d1fb55500bf6c0cbb18e4265621e
https://github.com/llvm/llvm-project/commit/2657c79cb974d1fb55500bf6c0cbb18e4265621e
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/SVEInstrFormats.td
Log Message:
-----------
[AArch64][llvm] (NFC) Refactor `sve_intx_dot` class and delete `sve2p1_two_way_dot_vv` (#160103)
`sve_intx_dot` and `sve2p1_two_way_dot_vv` are both very similar,
encoding for `SDOT` instructions. Refactor the `sve_intx_dot` class so
it is more flexible, and delete the `sve2p1_two_way_dot_vv` class.
Making this change now, to accommodate future SDOT instructions.
Commit: 832a342328cfb62f434d3d506a7bf30df5e2589d
https://github.com/llvm/llvm-project/commit/832a342328cfb62f434d3d506a7bf30df5e2589d
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/cdefined.f90
Log Message:
-----------
[flang] CDEFINED globals should have external linkage (#160167)
In Fortran::lower::defineGlobal() don't change the linkage and don't
generate initializer for CDEFINED globals.
Commit: 9aa5d5a9f72cd3bbf5a7b6ee52d86b59fbaf9589
https://github.com/llvm/llvm-project/commit/9aa5d5a9f72cd3bbf5a7b6ee52d86b59fbaf9589
Author: Asher Mancinelli <ashermancinelli at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR] Add sincos intrinsic to LLVM dialect (#160561)
Adds llvm.intr.sincos operation using LLVM_TwoResultIntrOp in the mold of the frexp intrinsic.
Commit: 3bfcbfc327ad5ca8bcec086a6d837f105d58e801
https://github.com/llvm/llvm-project/commit/3bfcbfc327ad5ca8bcec086a6d837f105d58e801
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Parser/OpenMP/declare-variant.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
Log Message:
-----------
[flang][OpenMP] Use OmpDirectiveSpecification in DECLARE_VARIANT (#160371)
Commit: 56a1cbbd1c54b325a336965f2631bd83e525dcf6
https://github.com/llvm/llvm-project/commit/56a1cbbd1c54b325a336965f2631bd83e525dcf6
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
Log Message:
-----------
[LAA] Fix non-NFC parts of 1aded51 (#160701)
1aded51 ([LAA] Prepare to handle diff type sizes (NFC)) was supposed to
be a non-functional patch, but introduced functional changes as
known-non-negative and known-non-positive is not equivalent to
!known-non-zero. Fix this.
Commit: d127d00c19578ae7c227b94a70e39d626bf125cf
https://github.com/llvm/llvm-project/commit/d127d00c19578ae7c227b94a70e39d626bf125cf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/AllocatorBase.h
Log Message:
-----------
[Support] Include <utility> in AllocatorBase.h
This should fix the build breakage reported in:
https://green.lab.llvm.org/job/llvm.org/job/clang-stage2-Rthinlto/1200/
Commit: ec27c2d340c08f98ffc893e01a60045b7377ebff
https://github.com/llvm/llvm-project/commit/ec27c2d340c08f98ffc893e01a60045b7377ebff
Author: cmtice <cmtice at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/docs/Contributing.rst
Log Message:
-----------
[libc++] Add link to premerge tesing dashboard to docs. (#160342)
This adds a link to the dashboard that shows premerge testing queue and
run times for libc++ testing, to the Contributing.rst document.
Commit: 25c0da8b0d004b7b32061691dbac81e854d1f6dd
https://github.com/llvm/llvm-project/commit/25c0da8b0d004b7b32061691dbac81e854d1f6dd
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2i-d2i.ll
M llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2ll-d2ll.ll
Log Message:
-----------
[NVPTX] Fix NaN + overflow semantics of f2ll/d2i (#159530)
Fix the NaN-handling semantics of various NVVM intrinsics converting
from fp types to integer types.
Previously in ConstantFolding, NaN inputs would be constant-folded to 0.
However, v9.0 of the PTX spec states that:
In float-to-integer conversions, depending upon conversion types, NaN
input results in following value:
* Zero if source is not `.f64` and destination is not `.s64`, .`u64`.
* Otherwise `1 << (BitWidth(dst) - 1)` corresponding to the value of
`(MAXINT >> 1) + 1` for unsigned type or `MININT` for signed type.
Also, support for constant-folding +/-Inf and values which
overflow/underflow the integer output type has been added (they clamp to
min/max int).
Because of this NaN-handling semantic difference, we also need to
disable transforming several intrinsics to FPToSI/FPToUI, as the LLVM
intstruction will return poison, but the intrinsics have defined
behaviour for these edge-cases like NaN/Inf/overflow.
Commit: 7d35226173fad2f5d6a2b082583843ebcb8cea53
https://github.com/llvm/llvm-project/commit/7d35226173fad2f5d6a2b082583843ebcb8cea53
Author: Thurston Dang <thurston at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M compiler-rt/lib/msan/msan_linux.cpp
Log Message:
-----------
[msan] Change personality CHECK to Printf() + Die() (#160626)
This ports https://github.com/llvm/llvm-project/pull/142821 from TSan.
Although MSan doesn't segfault the way TSan did, the failure message was
nonetheless cryptic. The improved error message will prepare MSan for
the upcoming AppArmorpocalypse.
Commit: d995c413c6001360da153a6a04fd6e6cf5185364
https://github.com/llvm/llvm-project/commit/d995c413c6001360da153a6a04fd6e6cf5185364
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/test/python/dialects/python_test.py
Log Message:
-----------
[MLIR][Python] fix python_test.py to not use `is` for type hint (#160718)
`is` causes the asserts to fail when the return hint is interpreted as
`OpResult | OpResultList | test.SameVariadicResultSizeOpVFV`
Commit: ca9fbb5553907714b9192b0803d0ed7ddade2194
https://github.com/llvm/llvm-project/commit/ca9fbb5553907714b9192b0803d0ed7ddade2194
Author: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVObject.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/test/tools/llvm-debuginfo-analyzer/COFF/01-coff-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/01-dwarf-compare-logical-elements.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/01-dwarf-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/pr-57040-incorrect-function-compare.test
M llvm/test/tools/llvm-debuginfo-analyzer/WebAssembly/01-wasm-compare-logical-elements.test
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer] Remove `LVScope::Children` container (#144750)
Remove the `LVScope::Children` container and use `llvm::concat()`
instead to return a view over the types, symbols, and sub-scopes
contained in a given `LVScope`.
Fixes #69160.
Commit: 78428cec39b37a2a284336ec139894280a6b75e8
https://github.com/llvm/llvm-project/commit/78428cec39b37a2a284336ec139894280a6b75e8
Author: Aadesh Premkumar <aadesh.premkumar at multicorewareinc.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
Log Message:
-----------
[SPIRV] Addition of @llvm.lround.* and @llvm.llround.* intrinsic (#129240)
--Added legalizer for @llvm.lround.* and @llvm.llround.* inrinsic
--Added Instruction Selector for @llvm.lround.* and @llvm.llround.*
intrinsic
--Added tests for @llvm.lround.* and @llvm.llround.* intrinsic
Commit: e2585583ae8401ab809cbdaee5abb330bc26087d
https://github.com/llvm/llvm-project/commit/e2585583ae8401ab809cbdaee5abb330bc26087d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
A flang/test/Semantics/OpenMP/declare-simd.f90
Log Message:
-----------
[flang][OpenMP] Use OmpDirectiveSpecification in DECLARE_SIMD (#160390)
Commit: b5c01029eddea97b86af80c75d8ad60be67bd546
https://github.com/llvm/llvm-project/commit/b5c01029eddea97b86af80c75d8ad60be67bd546
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for modernize-loop-convert in BarvinokTest.cpp (NFC)
Commit: f2c268f9370e0021ae373d919ba2283eb851527f
https://github.com/llvm/llvm-project/commit/f2c268f9370e0021ae373d919ba2283eb851527f
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Analysis/LifetimeSafety.cpp
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/unittests/ADT/ImmutableSetTest.cpp
Log Message:
-----------
[ImmutableSet] Optimize add/remove operations to avoid redundant tree modifications (#159845)
Optimize ImmutableSet operations to avoid unnecessary tree modifications
when adding existing elements or removing non-existent elements.
- Modified `ImutAVLFactory::add_internal()` to return the original tree
when both key and value are the same, avoiding unnecessary node creation
- Updated `ImutAVLFactory::remove_internal()` and `add_internal()` to
return the original tree when no changes are made.
Note that `balanceTree` always end up creating at least one node even
when no rebalancing is done. So we also need to avoid unnecessary calls
to it.
Commit: 5953233edeb8af419b67116cefbeee8b15940cb9
https://github.com/llvm/llvm-project/commit/5953233edeb8af419b67116cefbeee8b15940cb9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/FunctionExtras.h
Log Message:
-----------
[ADT] Simplify IsSizeLessThanThreshold (NFC) (#160642)
IsSizeLessThanThreshold is used only in AdjustedParamTBase, just a few
lines below the declaration. This patch simplifies
IsSizeLessThanThreshold by substituting U with T, stripping away the
template, and switching to "static constexpr bool.
Commit: fddb8fe5f2be4f31c643ee6ff6f017b01465b21d
https://github.com/llvm/llvm-project/commit/fddb8fe5f2be4f31c643ee6ff6f017b01465b21d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
Log Message:
-----------
[ADT] Simplify SmallPtrSetIterator with std::reverse_iterator (NFC) (#160643)
SmallPtrSetIterator has two tasks:
- iterate the buckets in the requested direction
- skip the empty and tombstone buckets
These tasks are intertwined in the current implementation. This patch
separates them.
A new private iterator type, BucketItTy, now handles the iteration
direction. This is an alias for a raw pointer for forward iteration
and std::reverse_iterator<pointer> for reverse iteration.
The user-facing iterator now focuses solely on advancing BucketItTy
while skipping invalid (empty or tombstone) buckets. AdvanceIfNotValid
now works transparently for both directions. operator++ on BucketItTy
does the right thing whether it's a raw pointer or a
std::reverse_iterator.
This simplification removes RetreatIfNotValid and the
reverse-iteration logic in operator*() and operator++().
Commit: 0fd341c20b890b05f9588b7da61731561d3ef72a
https://github.com/llvm/llvm-project/commit/0fd341c20b890b05f9588b7da61731561d3ef72a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Alignment.h
M llvm/unittests/Support/AlignmentTest.cpp
Log Message:
-----------
[Support] Clean up Align (#160644)
This patch cleans up the constructors and operator= of Align.
- "constexpr Align(LogValue CA)" is a really strange "public:"
constructor. It can only be constructed with a private struct
LogValue, which wraps the log2 of an alignment. Since nobody uses
it outside the class anyway, this patch moves the constructor to
"private:" while switching to a tag-based parameter list. In turn,
this patch removes LogValue.
- The block of comment being deleted is no longer applicable, so this
patch marks operator= constexpr. To test operator= in a unit test,
this patch makes value() constexpr also. Refer to the unit test to
see how operator= and value() are put together.
Commit: 78238dc9f8888a6c5ec42ceea24ae2bde801fb18
https://github.com/llvm/llvm-project/commit/78238dc9f8888a6c5ec42ceea24ae2bde801fb18
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Support/ARMWinEH.cpp
M llvm/lib/Support/BinaryStreamReader.cpp
M llvm/lib/Support/BinaryStreamWriter.cpp
M llvm/lib/Support/YAMLParser.cpp
Log Message:
-----------
[Support] Use list-initialization for returning pairs (#160645)
In C++17 and later, "return {A, B};" guarantees copy elision for a
std::pair return type, ensuring the object is constructed directly in
the return slot. This patch updates those instances under Support/.
Commit: 81309d54db450bd94ca0dba5959d4a123bf6ba76
https://github.com/llvm/llvm-project/commit/81309d54db450bd94ca0dba5959d4a123bf6ba76
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/docs/ExtendingLLVM.rst
Log Message:
-----------
[llvm] Proofread ExtendingLLVM.rst (#160646)
Commit: e2cab7c031c46a4465bd7380db64a8c87ec2b5e5
https://github.com/llvm/llvm-project/commit/e2cab7c031c46a4465bd7380db64a8c87ec2b5e5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/cmake/caches/PGO.cmake
Log Message:
-----------
Reapply "[Clang][CMake] Use IRPGO instead of FE PGO for Cmake Caches" (#160711)
This reverts commit 18f7e03dd60d84b5da3403f10177323df01b6f92.
Reapplies #160133.
This was reverted originally because it was causing compilation crashes
in ControlHeightReduction. It was reverted again because fix in
CntrolHeightReduction was causing more problems. Everything should be in
working order now, so relanding.
Commit: fc9369a70ecc9c260f3eb1af9cbc3ded24e9d4fb
https://github.com/llvm/llvm-project/commit/fc9369a70ecc9c260f3eb1af9cbc3ded24e9d4fb
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Analysis/LifetimeSafety.cpp
Log Message:
-----------
[LifetimeSafety] Disable canonicalization in immutable collections (#159850)
Disable canonicalization in immutable collections for lifetime analysis.
Modified the `LifetimeFactory` struct in `LifetimeSafety.cpp` to
explicitly initialize the immutable collection factories with
`canonicalize=false`. This prevents the factories from canonicalizing
their data structures, which can improve performance by avoiding
unnecessary comparisons and digest computations.
Commit: 538325f23e16b6d1195ae11904ea1731d41654c9
https://github.com/llvm/llvm-project/commit/538325f23e16b6d1195ae11904ea1731d41654c9
Author: Aleksandar Spasojevic <aleksandar.spasojevic at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/MC/AMDGPU/gfx12_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopk_alias.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopk.txt
Log Message:
-----------
[AMDGPU] Add GFX12 wave register names with WAVE_ prefix (#144352)
Rename canonical register names with WAVE_ prefix for GFX12
Maintain backward compatibility through aliases
Commit: c1b211034b854737245409b435726cd169349a4b
https://github.com/llvm/llvm-project/commit/c1b211034b854737245409b435726cd169349a4b
Author: Georgios Pinitas <georgios.pinitas at arm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/lib/Dialect/GPU/Transforms/ParallelLoopMapper.cpp
M mlir/test/Dialect/GPU/mapping.mlir
Log Message:
-----------
[mlir][gpu] Add innermost-first policy when mapping loops to GPU IDs (#160634)
Commit: 68a253da6498abe20b0e61e9dce488943aaf2c28
https://github.com/llvm/llvm-project/commit/68a253da6498abe20b0e61e9dce488943aaf2c28
Author: Ivan Tadeu Ferreira Antunes Filho <antunesi at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
Log Message:
-----------
[lldb][RISCV] Use uint64_t for emulating ADDI (#160550)
In RISC-V, the same instruction is used for both signed and unsigned
additions.
Signed integer overflow is undefined behavior in C++, but signed integer
overflow is defined behavior when using ADDI in RISC-V.
As we are emulating the RISC-V behavior we should be using uint.
This fix the failure with ubsan introduced by #159842:
lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp:807:40:
runtime error: signed integer overflow: -9223372036854775808 + -16
cannot be represented in type 'int64_t' (aka 'long')
Commit: df420ee2ba3ce58b07f7ae70b32ebd649dcb0a5a
https://github.com/llvm/llvm-project/commit/df420ee2ba3ce58b07f7ae70b32ebd649dcb0a5a
Author: Dan Brown <61992655+danbrown-amd at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_compat_overloads.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/isnan-overloads.hlsl
A clang/test/CodeGenHLSL/builtins/isnan.hlsl
A clang/test/SemaHLSL/BuiltIns/isnan-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/isnan.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/isnan.ll
Log Message:
-----------
Implements isnan() HLSL intrinsic for DXIL and SPIR-V targets. (#157733)
Addresses #99132.
Commit: a0c75a9009e0699ac98e9d0ca3edc913a77d606a
https://github.com/llvm/llvm-project/commit/a0c75a9009e0699ac98e9d0ca3edc913a77d606a
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Align within the level with Cpp11BracedListStyle disabled (#159140)
When the style is
`{AlignConsecutiveDeclarations: true, Cpp11BracedListStyle: false}`, the
program would sometimes align the lambda body with the outside. Like
this.
```C++
const volatile auto result{ []() {
const auto something = 1;
return 2;
} };
```
This patch stops it. Now the output looks like this.
```C++
const volatile auto result{ []() {
const auto something = 1;
return 2;
} };
```
Fixes #53699.
The problem was with how the `AlignTokenSequence` function tracked
levels. The stack was pushed once when a token was more nested than the
previous one. It was popped once when a token was less nested than the
previous one. With the option `Cpp11BracedListStyle` disabled, the `[`
token was deeper than the previous token by 2 levels. Both its
indentation level and nesting level were more than that of the previous
one. But the stack was only pushed once. The following tokens popped the
2 levels separately. The function treated the body of the lambda
expression as on the same level as the outside.
The problem is fixed this way. The function `AlignTokens` which calls
the function `AlignTokenSequence` already uses a simpler and more robust
way to track levels. It remembers the outermost level it should align.
It compares the token's level with the outermost level. It does not need
a stack. So it is immune to the problem. This patch makes the function
`AlignTokenSequence` take as a parameter the indices of the tokens
matched by the function `AlignTokens`. This way it does not have to
contain the logic again.
Now the function `AlignTokenSequence` only aligns tokens already matched
by the function `AlignTokens`. It is easy to see that the assertion on
line 453 holds. The workaround on line 354 is not needed any more. The
test on line 20310 added at the same time as the assertion ensures that
the assertion hold.
The stack in the function `AlignTokenSequence` is kept for now. It is
still used to figure out when things inside a level should move along
with the outer level. Since the stack has the problem, the developer
plans to move the logic into token annotator. It already uses a stack.
Commit: e47a42e5b597b155207da24a348baaba52014a92
https://github.com/llvm/llvm-project/commit/e47a42e5b597b155207da24a348baaba52014a92
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Do not use managed memory inside gpu module (#160730)
Do not issue call to _FortranACUFAllocDescriptor inside gpu module.
Commit: 6eff26094a2c277d9f324545b8b26a02213ed5de
https://github.com/llvm/llvm-project/commit/6eff26094a2c277d9f324545b8b26a02213ed5de
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll
Log Message:
-----------
[InstCombine] Skip replaceExtractElements for ConstantData (#160575)
Closes https://github.com/llvm/llvm-project/issues/160507.
Note: Replacing other users except for `ExtElt` is a bit strange to me.
I tried to only replace `ExtElt` with a new extractelement, but it
caused regressions on `widen_extract2/3`.
Commit: 0f1a952399b874246b48f787431efbd5364cb74d
https://github.com/llvm/llvm-project/commit/0f1a952399b874246b48f787431efbd5364cb74d
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/CommandProcessorCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/CommandProcessorCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
R clang-tools-extra/clang-tidy/cert/CommandProcessorCheck.cpp
R clang-tools-extra/clang-tidy/cert/CommandProcessorCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/command-processor.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/command-processor.c
R clang-tools-extra/test/clang-tidy/checkers/cert/env33-c.c
Log Message:
-----------
[clang-tidy] Rename `cert-env33-c` to `bugprone-command-processor` (#160275)
Moves `cert-env33-c` check into `bugprone` module and gives it a clearer
name: `bugprone-command-processor`
This is part of the cleanup described in
https://github.com/llvm/llvm-project/issues/157287.
Closes https://github.com/llvm/llvm-project/issues/157288
Commit: d45a1359183a2e3f3f5b58a426a5f4899c893778
https://github.com/llvm/llvm-project/commit/d45a1359183a2e3f3f5b58a426a5f4899c893778
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume-align.ll
Log Message:
-----------
[InstCombine] Remove redundant align 1 assumptions. (#160695)
It seems like we have a bunch of align 1 assumptions in practice and
unless I am missing something they should not add any value.
See https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2861/files
PR: https://github.com/llvm/llvm-project/pull/160695
Commit: 777eea0732d646ee12e781d814047f9a7164b4af
https://github.com/llvm/llvm-project/commit/777eea0732d646ee12e781d814047f9a7164b4af
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/OpenMPKinds.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[NFC][Clang][OpenMP] Add helper functions/utils for finding/comparing attach base-ptrs. (#155625)
These have been pulled out of the codegen PR #153683, to reduce the size
of that PR.
Commit: 62450ba905fecc0821f3a08db81f756c8b1f7b7c
https://github.com/llvm/llvm-project/commit/62450ba905fecc0821f3a08db81f756c8b1f7b7c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/test/benchmarks/spec.gen.py
M libcxx/utils/parse-spec-results
Log Message:
-----------
[libc++] Improve handling of runtime errors inside SPEC benchmarks
Previously, we would report a successful run if the benchmark exited
with an error, and we would produce a timing for the benchmark. After
this patch, we consider an error in the benchmark to be a failed LIT
test and we don't produce any benchmark data for it.
Commit: 35c14c4cc32f97bd82d5bab458cf53b941b4f2dc
https://github.com/llvm/llvm-project/commit/35c14c4cc32f97bd82d5bab458cf53b941b4f2dc
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Implement AtomicExpr for ComplexType (#160563)
This change implements AtomicExpr for ComplexType
Issue: https://github.com/llvm/llvm-project/issues/141365
Commit: a5569b4bd7f8d2696f962e4edaa5179895228e42
https://github.com/llvm/llvm-project/commit/a5569b4bd7f8d2696f962e4edaa5179895228e42
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M flang/lib/Frontend/FrontendActions.cpp
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Support/PGOOptions.h
M llvm/include/llvm/Transforms/Instrumentation/DataFlowSanitizer.h
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Support/PGOOptions.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
[llvm] Add `vfs::FileSystem` to `PassBuilder` (#160188)
Some LLVM passes need access to the filesystem to read configuration
files and similar. In some places, this is achieved by grabbing the VFS
from `PGOOptions`, but some passes don't have access to these and resort
to just calling `vfs::getRealFileSystem()`. This PR allows setting the
VFS directly on `PassBuilder` that's able to pass it down to all passes
that need it.
Commit: 50a7eb6fc2977d3a5c2d71d91a799d4275f5a595
https://github.com/llvm/llvm-project/commit/50a7eb6fc2977d3a5c2d71d91a799d4275f5a595
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Add support for vector.multi_reduction in wg to sg pass [1/N] (#157554)
This PR adds pattern for lowering vector.multi_reduction from workgroup
to subgroup IR. It currently only supports sg local reductions
Commit: f07cedbdc6887b02f5ae4188b92ab85e510d964b
https://github.com/llvm/llvm-project/commit/f07cedbdc6887b02f5ae4188b92ab85e510d964b
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/combine-wide.ll
Log Message:
-----------
[NVPTX] Reland `mad.wide` combine under (default off) CLI option (#160214)
Users reported regressions to important matmul kernels as a result of
#155024. Although #155024 was a revert, this PR should allow them to
recover some of the lost performance.
Commit: c924e7a8672fb1098c695d652697946cd69343b6
https://github.com/llvm/llvm-project/commit/c924e7a8672fb1098c695d652697946cd69343b6
Author: David Peixotto <peix at meta.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[workflows] Update commit access request PR links (#146169)
This PR updates the links used to show the PR contribution stats of the
user requesting commit access to the LLVM project. Previously we would
only show the PRs that were currently opened by the user because the
`/pulls/<username>` endpoint automatically applies the `is:open` filter.
The contribution guidelines suggest that the user should have at least 3
merged PRs to be considered for commit access so this seems like a
relevant data point to add.
We now show all PRs that a user has created (not just the open ones) and
a separate link for the PRs that are merged.
Commit: 9e7b21afaaf1b165ac7a9f4bc4afd67a7d1b4687
https://github.com/llvm/llvm-project/commit/9e7b21afaaf1b165ac7a9f4bc4afd67a7d1b4687
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
Log Message:
-----------
[llvm] Fix X86InstrInfo.cpp build after #160188
Commit: 80d3a8015513e2a64c47e173addda6ce816bf85c
https://github.com/llvm/llvm-project/commit/80d3a8015513e2a64c47e173addda6ce816bf85c
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
Log Message:
-----------
[NFC][x86] Cleanup X86FrameLowering::emitSPUpdate (#156948)
I was trying to understand the cases where `emitSPUpdate` may use a
`push` to adjust the stack pointer and realized that the code was more
complex than it needed to be.
* `Chunk` is redundant as it is set to `MaxSPChunk` and never modified.
* The only time we use the `push` optimization is if `Offset` is equal
to `SlotSize` (as `SlotSize` is never as large as `MaxSPChunk`, so will
never equal if `std::min` returned that value).
* If we use the `push` optimization, then we've finished adjusting the
stack and can return early instead of continuing the loop.
Commit: 30402c7dea57d35ead80387c061cda6977ba98ef
https://github.com/llvm/llvm-project/commit/30402c7dea57d35ead80387c061cda6977ba98ef
Author: Dave Bartolomeo <dave_bartolomeo at apple.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/include/clang/Analysis/PathDiagnostic.h
M clang/include/clang/Basic/Sarif.h
M clang/lib/Analysis/PathDiagnostic.cpp
M clang/lib/Basic/Sarif.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
A clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.h
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-diagnostics-taint-test.c.sarif
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-diagnostic-test.c.sarif
A clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-file-diagnostics.c.sarif
A clang/test/Analysis/diagnostics/sarif-multi-file-diagnostics.c
M clang/test/Analysis/lit.local.cfg
Log Message:
-----------
[analyzer] Emit IssueHash in SARIF (#159445)
This change adds two new properties to each `result` object in the SARIF
log:
`partialFingerprints`: Contains the "issue hash" that the analyzer
already generates for each result, which can help identify a result
across runs even if surrounding code changes.
`hostedViewUri`: If running with `-analyzer-format=sarif-html`, this
property will now be emitted with the `file:` URL of the generated HTML
report for that result.
Along the way, I discovered an existing bug where the HTML diagnostic
consumer does not record the path to the generated report if another
compilation already created that report. This caused both the SARIF and
Plist consumers to be missing the link to the file in all but one of the
compilations in case of a warning in a header file. I added a new test
to ensure that the generated SARIF for each compilation contains the
property.
Finally, I made a few changes to the `normalize_sarif` processing in the
tests. I switched to `sed` to allow substitutions. The normalization now
removes directory components from `file:` URLs, replaces the `length`
property of the source file with a constant `-1`, and puts placeholders
in the values of the `version` properties rather than just deleting
them. The URL transformation in particular lets us verify that the right
filename is generated for each HTML report.
Fixes #158159
rdar://160410408
Commit: 96a7c9b9858ac4eb366e443b00784488c190688c
https://github.com/llvm/llvm-project/commit/96a7c9b9858ac4eb366e443b00784488c190688c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__vector/vector_bool.h
A libcxx/test/benchmarks/containers/sequence/vector_bool.bench.cpp
Log Message:
-----------
[libc++] Simplify vector<bool> fill constructors (#160521)
#119632 introduced a code size and performance regression. This was
verified by running the included benchmark against trunk and trunk with
#119632 reverted. Instead of actually reverting that patch, we can
inline `__construct_at_end` into the few places it's used instead,
simplifying the implementation further (by not handling special cases we
never actually encounter).
```
Benchmark Baseline Candidate Difference % Difference
------------------------ ---------- ----------- ------------ --------------
BM_vector_bool_size_ctor 29.91 8.56 -21.35 -71.37
```
Commit: cc95c5680e9fd1a3697822407a9857caeca32dba
https://github.com/llvm/llvm-project/commit/cc95c5680e9fd1a3697822407a9857caeca32dba
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/__memory/compressed_pair.h
Log Message:
-----------
[libc++] Remove alignment attributes from _LIBCPP_COMPRESSED_PAIR (#158595)
These attributes aren't required anymore, since the potential
overalignemnt of the objects is handled by the surrounding anonymous
struct.
Commit: 62660e59d9365a2c77724c7cf05986eef7c2354a
https://github.com/llvm/llvm-project/commit/62660e59d9365a2c77724c7cf05986eef7c2354a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
Log Message:
-----------
[gn build] Port 0f1a952399b8
Commit: c3cbd27d005b86ea5c5a375c21b86e6c2110e198
https://github.com/llvm/llvm-project/commit/c3cbd27d005b86ea5c5a375c21b86e6c2110e198
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
A llvm/test/CodeGen/AMDGPU/s_uaddo_usubo_pseudo.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
[AMDGPU] Calc IsVALU correctly during UADDO/USUBO selection (#159814)
Fix two bugs. The first bug hid the second bug.
1. Calculate IsVALU correctly during UADDO/USUBO selection. IsVALU
should be false if the carryout users are UADDO_CARRY/USUBO_CARRY.
However instruction selection visits uses before defs, so the
UADDO_CARRY/USUBO_CARRY nodes are normally (probably always) already
converted to S_ADD_CO_PSEUDO/S_SUB_CO_PSEUDO. Fix to check for these
machine opcodes.
2. Without this fix, UADDO/USUBO selection will always select the VALU
instructions V_ADD_CO__U32_e64/V_SUB_CO_U32_e64.
S_UADDO_PSEUDO/S_USUBO_PSEUDO were never selected in the CodeGen/AMDGPU
tests. Thus, S_UADDO_PSEUDO/S_USUBO_PSEUDO cases were never hit in
EmitInstrWithCustomInserter. The code generation for
S_UADDO_PSEUDO/S_USUBO_PSEUDO had a bug where it could not handle code
generation for 32-bit $scc_out.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 321a7c3caf7c5c6a208501e1406fcab14f8b54f9
https://github.com/llvm/llvm-project/commit/321a7c3caf7c5c6a208501e1406fcab14f8b54f9
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members.mm
Log Message:
-----------
[alpha.webkit.NoUnretainedMemberChecker] Only check @property when @implementation is seen (#159947)
A @interface declaration with a raw pointer @property does not
necessarily mean it synthesizes ivar of that type. To determine whether
such a synthesis happens or not, we must wait for @implementation to
appear. So this PR makes the checker only validate @property then.
Commit: 57330c8514c78e7032975961badf5fa59091f059
https://github.com/llvm/llvm-project/commit/57330c8514c78e7032975961badf5fa59091f059
Author: Aaron Puchert <aaron.puchert at sap.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ThrowKeywordMissingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/throw-keyword-missing.cpp
Log Message:
-----------
Don't look into base class aliases in bugprone-throw-keyword-missing (#160725)
The check confusingly fires on non-exception classes if any base class
has an alias in an exception class. In our case, the exception had an
alias for an allocator interface, so every allocator inheriting from
that interface was treated as an exception type. (But only when the
header for the exception was included.)
The reason behind this is the odd (but documented) behavior of
isDerivedFrom and similar matchers: it does not only iterate through the
bases as written, but through all relevant nodes to check them for being
a base. This makes the matcher also finds aliases of the base classes.
Only going through the bases as written can be done with `hasAnyBase`.
However, that doesn't cover the class itself, and we have to check it
separately. Since we're no longer looking through aliases via the
matcher, and because we're apparently interested in the canonical type,
we check that (see the test with "typedef std::exception ERROR_BASE;").
Commit: 39ed57c0888dd9b76d63757357a8d5a742850ab6
https://github.com/llvm/llvm-project/commit/39ed57c0888dd9b76d63757357a8d5a742850ab6
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[NFC][Clang][OpenMP] Address minor review feedback from #155625. (#160746)
Commit: 1685a6a602c529d3615e2c2d98b7ef060f192eb7
https://github.com/llvm/llvm-project/commit/1685a6a602c529d3615e2c2d98b7ef060f192eb7
Author: itrofimow <i.trofimow at yandex.ru>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/lib/Core/GDBIndex.cpp
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-gdb-generated-gdb11.test
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-lld-generated.test
M bolt/test/X86/dwarf5-gdb-index-types-gdb-generated-gdb11.test
M bolt/test/X86/dwarf5-gdb-index-types-gdb-generated-gdb9.test
M bolt/test/X86/dwarf5-gdb-index-types-lld-generated.test
Log Message:
-----------
[BOLT] Fix incorrect CU-indicies in gdb-index (#151927)
After we sort the CUVector, we have to update CU-indices in address map
and constant pool
Commit: 1b0553c9fa8d61010a43b1a2dcb649d1aab7d8ae
https://github.com/llvm/llvm-project/commit/1b0553c9fa8d61010a43b1a2dcb649d1aab7d8ae
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/bitset
Log Message:
-----------
[libc++] Use _BitInt and __builtin_popcountg in bitset::count() (#160679)
This has multiple benefits:
1) The compiler has to do way less work to figure out things fold into a
simple `popcount`, improving compile times quite a bit
2) The compiler inlines better, since the compile doesn't have to do
complicated optimizations to get to the same point. Looking at the
pipeline, it seems that without this, LLVM has to go all the way to GVN
to get to the same code as there is after the first InstCombine pass
with this change.
Currently this applies only to `bitset`s with at most 64 bits, but that
is by far the most common case.
Commit: ca61a9d96027a34750149b856ffba746999b4e16
https://github.com/llvm/llvm-project/commit/ca61a9d96027a34750149b856ffba746999b4e16
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
Log Message:
-----------
[mlir][xegpu] Support offset arguments in LoadNd, StoreNd and PrefetchNd subgroup distribution. (#160417)
Currently offsets are given as operands of `CreateNd` op. Sg
distribution does not support offsets arguments at the consumer.
This PR adds support for offsets given at the consumer (like LoadNd).
With this change, it is required to specify the offsets at consumer op
(LoadNd, StoreNd, PrefetchNd) of the tile or otherwise distribution will
fail.
This also removes the need for UpdateNdOffset op. PR removes the support
for UpdateNdOffset .
Commit: 04258fe3b15c9ecf78848c9b1470e1048844989e
https://github.com/llvm/llvm-project/commit/04258fe3b15c9ecf78848c9b1470e1048844989e
Author: Dmitry Chigarev <dmitry.chigarev at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
A mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[mlir][XeGPU][XeGPUUnroll] Support new syntax with offsets moved to load_nd/store_nd/prefetch_nd (#160323)
Adds support for new syntax in XeGPUUnroll for:
1. `create_nd_desc` without offsets
2. `load_nd` with offsets
3. `store_nd` with offsets
4. `prefetch_nd` with offsets
`create_nd_desc with offsets` + `load_nd with offsets` won't be lowered
correctly. In this case the IR would still have two unrealized
conversions that will fail later in the pipeline.
The offsets computation for the unrolled tile is now moved from
descriptors to load/store/prefetch operations. The resulted IR now has
one single descriptor that is being iterated in load/store/prefetch ops.
<details><summary>old/new behavior examples</summary>
```mlir
// before unroll pass:
gpu.func @load_nd(%src: memref<256x318xf32>) -> vector<24x32xf32> {
%tdesc = xegpu.create_nd_tdesc %src : memref<256x318xf32> -> !xegpu.tensor_desc<24x32xf32, #xegpu.layout<inst_data = [8, 16]>>
%ld = xegpu.load_nd %tdesc[8, 16]: !xegpu.tensor_desc<24x32xf32, #xegpu.layout<inst_data = [8, 16]>> -> vector<24x32xf32>
gpu.return %ld : vector<24x32xf32>
}
// after unroll pass (offsets in create_nd_desc):
gpu.func @create_nd_tdesc2(%arg0: memref<256x318xf32>) -> vector<24x32xf32> {
%cst = arith.constant dense<0.000000e+00> : vector<24x32xf32>
%c24 = arith.constant 24 : index
%c32 = arith.constant 32 : index
%c8 = arith.constant 8 : index
%c16 = arith.constant 16 : index
// create 6 descriptors for each tile
%0 = xegpu.create_nd_tdesc %arg0[%c8, %c16] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%1 = xegpu.create_nd_tdesc %arg0[%c8, %c32] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%2 = xegpu.create_nd_tdesc %arg0[%c16, %c16] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%3 = xegpu.create_nd_tdesc %arg0[%c16, %c32] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%4 = xegpu.create_nd_tdesc %arg0[%c24, %c16] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%5 = xegpu.create_nd_tdesc %arg0[%c24, %c32] : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
%6 = xegpu.load_nd %0 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%7 = xegpu.load_nd %1 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%8 = xegpu.load_nd %2 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%9 = xegpu.load_nd %3 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%10 = xegpu.load_nd %4 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%11 = xegpu.load_nd %5 : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
...
}
// after unroll pass (offsets in load_nd):
gpu.func @load_nd(%arg0: memref<256x318xf32>) -> vector<24x32xf32> {
%cst = arith.constant dense<0.000000e+00> : vector<24x32xf32>
%c24 = arith.constant 24 : index
%c32 = arith.constant 32 : index
%c16 = arith.constant 16 : index
%c8 = arith.constant 8 : index
// create only one descriptor with proper tile shape
%0 = xegpu.create_nd_tdesc %arg0 : memref<256x318xf32> -> !xegpu.tensor_desc<8x16xf32>
// compute tile offsets at the operation (using only one descriptor)
%1 = xegpu.load_nd %0[%c8, %c16] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%2 = xegpu.load_nd %0[%c8, %c32] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%3 = xegpu.load_nd %0[%c16, %c16] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%4 = xegpu.load_nd %0[%c16, %c32] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%5 = xegpu.load_nd %0[%c24, %c16] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
%6 = xegpu.load_nd %0[%c24, %c32] : !xegpu.tensor_desc<8x16xf32> -> vector<8x16xf32>
...
}
```
</details>
---------
Signed-off-by: dchigarev <dmitry.chigarev at intel.com>
Commit: 3e7e60ae5ce80b00602506e007b02e7195373f35
https://github.com/llvm/llvm-project/commit/3e7e60ae5ce80b00602506e007b02e7195373f35
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Lower/OpenMP/declare-mapper.f90
R offload/test/offloading/fortran/target-declare-mapper-parent-allocatable.f90
Log Message:
-----------
Revert "[Flang][OpenMP] Implicitly map nested allocatable components in derived types" (#160759)
Reverts llvm/llvm-project#160116
Commit: 223cfa8018595ff2a809b4e10701bfea884af709
https://github.com/llvm/llvm-project/commit/223cfa8018595ff2a809b4e10701bfea884af709
Author: Chad Smith <cssmith at meta.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/Plugins/Platform/Android/AdbClient.cpp
M lldb/source/Plugins/Platform/Android/AdbClient.h
M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroid.h
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
M lldb/unittests/Platform/Android/AdbClientTest.cpp
M lldb/unittests/Platform/Android/PlatformAndroidTest.cpp
Log Message:
-----------
[lldb] refactor PlatformAndroid and make threadsafe (attempt 2) (#159676)
Reattempt at https://github.com/llvm/llvm-project/pull/145382 (cc
@labath). This time setenv() was replaced with set_env()
(https://github.com/llvm/llvm-project/pull/145382#issuecomment-3187227704).
---------
Co-authored-by: Chad Smith <cssmith at meta.com>
Commit: 90a6884f2d088547f7b2650d2151a316b9694f59
https://github.com/llvm/llvm-project/commit/90a6884f2d088547f7b2650d2151a316b9694f59
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
Enable parsing of optional strings (#154364)
Previously a "opt<std::optional<std::string>>>" would fail to
parse/would attempt to parse option value as argument.
Commit: 93cac97d7d4e5259cb544caab54e9902d3d84dbe
https://github.com/llvm/llvm-project/commit/93cac97d7d4e5259cb544caab54e9902d3d84dbe
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/test/CodeGen/X86/avx512vlfp16-builtins.c
Log Message:
-----------
[Headers][X86] Allow AVX512fp16 initialization intrinsics to be used in constexpr (#159929)
Fixes https://github.com/llvm/llvm-project/issues/156866
---------
Signed-off-by: Shreeyash Pandey <shreeyash335 at gmail.com>
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 302be34a3f387f26e576734e125d174245a987f1
https://github.com/llvm/llvm-project/commit/302be34a3f387f26e576734e125d174245a987f1
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/recursive.ll
Log Message:
-----------
[MemProf] Make sure call clones without callsite node clones get updated (#159861)
Because we may prune differing amounts of call context for different
allocation contexts during matching (we only keep enough call context to
distinguish cold from noncold paths), we can end up with different
numbers of callsite node clones for different callsites in the same
function. Any callsites that don't have node clones for all function
clones should have their copies in those other function clones updated
the same way as the version in the original function, which might be
calling a clone of the callsite.
Commit: 885cb59315f974b261945686177cfa23833793bd
https://github.com/llvm/llvm-project/commit/885cb59315f974b261945686177cfa23833793bd
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/primary64.h
Log Message:
-----------
[scudo] Release to OS if a large amount of memory is deallocated. (#160621)
Before this change, if large amounts of memory are deallocated within a
release interval, the release is put off until the release interval
occurs. Unfortunately, for larger class sizes, this could mean that a
lot of this memory accumulates and is never released since no more
deallocations occur in that size class.
To fix this, if `RegionPushedBytesDelta` grows larger than a group size,
immediately do a release.
This work was originally done by ChiaHungDuan.
Commit: bb284a69688c0b3454dd77342d24719364b79a2b
https://github.com/llvm/llvm-project/commit/bb284a69688c0b3454dd77342d24719364b79a2b
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
Log Message:
-----------
[NFC][PowerPC] Fix err in instruction class name for stxvp (#160764)
Commit: 7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d
https://github.com/llvm/llvm-project/commit/7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
Log Message:
-----------
[clang] simplify constant template parameter type deduction for partial ordering (#160433)
This simplifies things a little bit. This is mostly NFCish, except the
reference type deduction workaround now applies in partial ordering as
well, but we don't have any test cases and any reason to suspect this is
significant.
Commit: 0d6af2db6cd9c964ff300e5b5246c070a57d45e2
https://github.com/llvm/llvm-project/commit/0d6af2db6cd9c964ff300e5b5246c070a57d45e2
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lld/COFF/Writer.cpp
M lld/test/COFF/strtab.s
Log Message:
-----------
[LLD] [COFF] Fix symbol names for import thunks (#160694)
9cc9efc483339ece1d52923569bb755db42b69f3 changed LLD to use a
StringTableBuilder for optimizing the string table, used for long
section and symbol names.
That commit had a bug, where the symbol table entry for an import thunk
with a long symbol name wouldn't get fetched from the
StringTableBuilder, if the base symbol name (without the "__imp_"
prefix) wasn't over 8 chars.
This should fix issues with Go, which errors out on reading the
executables with a broken symbol table, as noted in
https://github.com/mstorsjo/llvm-mingw/issues/518 and
https://github.com/golang/go/issues/75219.
Commit: 5923004f8121a6ce24db9fbfddecfe8ce659691c
https://github.com/llvm/llvm-project/commit/5923004f8121a6ce24db9fbfddecfe8ce659691c
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Don't check address past end of function for data/code marker annotation (#159210)
We want to annotate function with data and code markers
whose addresses fall within the range of the function, so
setting `CheckPastEnd` to false.
Commit: 185ae5cdc695248b58ae017508cc764c19bee5b7
https://github.com/llvm/llvm-project/commit/185ae5cdc695248b58ae017508cc764c19bee5b7
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
M lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp
M lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
M lldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp
M lldb/test/Shell/SymbolFile/NativePDB/find-functions.cpp
M lldb/test/Shell/SymbolFile/NativePDB/local-variables.cpp
M lldb/test/Shell/SymbolFile/NativePDB/stack_unwinding01.cpp
M lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
M lldb/test/Shell/SymbolFile/PDB/variables.test
Log Message:
-----------
Revert "[LLDB][NativePDB] Create functions with mangled name (#149701)"
This reverts commit e98f34eb08b2bf7aed787e7f8a7cea9111f044c8.
This broke demangling of Itanium symbols on i386.
Commit: 9e6fa3954006dd496440e4355c2ae75ea43cb80e
https://github.com/llvm/llvm-project/commit/9e6fa3954006dd496440e4355c2ae75ea43cb80e
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/instrumentation_sequence.s
Log Message:
-----------
[BOLT][AArch64][instr] Consider targeting ARM64 CPUs without LSE support (#158738)
`stadd` is only available in recent arm64 CPUs that have LSE support
(like Cortex-A73 and Cortex-A75) and is not available on old arm64 CPUs
(like Cortex-A53 and Cortex-A55). Devices could have a mixture of these
two kinds of CPUs, for which we need to provide an option for BOLT to
generate instrumentation sequence that emulates what `stadd` would do.
The implementation puts counter increment into an injected helper function
so we don't need to update CFG in the function that is being instrumented
and instrumentation induced binary size increase will be smaller.
Commit: 1e302e942cdbb2db902530144d0c3891f811168b
https://github.com/llvm/llvm-project/commit/1e302e942cdbb2db902530144d0c3891f811168b
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/AArch64/constant-island-alignment.s
Log Message:
-----------
[BOLT] Add heuristics to determine constant island's alignment (#159486)
Constant island embedded in text section doesn't have its alignment
information from input binary and we currently set its alignment as
8 bytes. Constant island might be given a much larger alignment due
to performance or other reasons, so this change adds some heuristics
to determine its alignment based on its size, original address from
input binary and its owning section's alignment.
Commit: a85d3a53d306d6624f20b528cf783de778392347
https://github.com/llvm/llvm-project/commit/a85d3a53d306d6624f20b528cf783de778392347
Author: Chad Smith <cssmith at meta.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/unittests/Platform/Android/AdbClientTest.cpp
Log Message:
-----------
[lldb] Turn off AdbClientTest on windows to fix build breakage (#160771)
https://github.com/llvm/llvm-project/pull/159676 was recently landed.
After it was landed, additional tests were ran, where I saw an assertion
error on windows only. I am not able to test on windows, and the test is
a new test to mock an adb server. The mock server fails to start on
windows, so I am disabling to fix the breakage on main. This is not an
issue with the main code, only a test issue.
Relevant error output:
```
Step 8 (test-check-lldb-unit) failure: Test just built components: check-lldb-unit completed (failure)
******************** TEST 'lldb-unit :: Platform/Android/./AdbClientTests.exe/7/20' FAILED ********************
Script(shard):
--
GTEST_OUTPUT=json:C:\buildbot\as-builder-10\lldb-x86-64\build\tools\lldb\unittests\Platform\Android\.\AdbClientTests.exe-lldb-unit-30696-7-20.json GTEST_SHUFFLE=0 GTEST_TOTAL_SHARDS=20 GTEST_SHARD_INDEX=7 C:\buildbot\as-builder-10\lldb-x86-64\build\tools\lldb\unittests\Platform\Android\.\AdbClientTests.exe
--
Note: This is test shard 8 of 20.
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from AdbClientTest
[ RUN ] AdbClientTest.RealTcpConnection
Assertion failed: error.Fail(), file C:\buildbot\as-builder-10\lldb-x86-64\llvm-project\lldb\source\Host\common\TCPSocket.cpp, line 254
```
Commit: 4193a90b4263ff8c9599b921882cfbd7052b8571
https://github.com/llvm/llvm-project/commit/4193a90b4263ff8c9599b921882cfbd7052b8571
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
A lldb/test/Shell/ObjectFile/ELF/elf-no-shdrs-pt-notes.yaml
Log Message:
-----------
Modify ObjectFileELF so it can load notes from PT_NOTE segments. (#160652)
The ObjectFileELF parser was not able to load ELF notes from PT_NOTE
program headers. This patch fixes ObjectFileELF::GetUUID() to check the
program header and parse the notes in any PT_NOTE segments. This will
allow memory ELF files to extract the UUID from an in memory image that
has no section headers. Added a test that creates an ELF file, strips
all section headers, and then makes sure that LLDB can see the UUID
value.
Commit: bd4f97792addc30e9f6aabc143e1ab2b9c7abff7
https://github.com/llvm/llvm-project/commit/bd4f97792addc30e9f6aabc143e1ab2b9c7abff7
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/tools/offload-arch/CMakeLists.txt
A clang/tools/offload-arch/LevelZeroArch.cpp
M clang/tools/offload-arch/OffloadArch.cpp
Log Message:
-----------
[clang][tools] Add LevelZero support to offload-arch (#160570)
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Commit: 73bcac28d0bfbfd8c997385f25637b85c8f0f818
https://github.com/llvm/llvm-project/commit/73bcac28d0bfbfd8c997385f25637b85c8f0f818
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/tools/llvm-objdump/MachO/function-starts.test
Log Message:
-----------
[llvm-objdump][MachO] Update check in flaky test that depends on directory path (#150674)
Earlier, function-starts.test failed when directory path contained
'_main', because objdump prints out the entire directory path, and there
is an implicit-check-not for '_main'.
There's three ways in which [function starts are printed by
llvm-objdump](https://llvm.org/docs/CommandGuide/llvm-objdump.html#cmdoption-llvm-objdump-function-starts):
With the "addr" mode, there will be no "_main"\
With "names", it'll be printed as "_main\n"\
With "both", it'll be printed as "<addr> _main\n".
The existing check for function-starts=addrs checks that the pattern for
"names" or "both" does not get printed. This MR changes the RUN lines to
take stdin input, so that no directory path is printed, and stray _main
strings in the directory path will not make the test fail.
Commit: e5b2a06546eb20662156b8a59b77aca086301486
https://github.com/llvm/llvm-project/commit/e5b2a06546eb20662156b8a59b77aca086301486
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
A llvm/test/CodeGen/WebAssembly/fake-use.ll
Log Message:
-----------
[WebAssembly] Remove FAKE_USEs before ExplicitLocals (#160768)
`FAKE_USE`s are essentially no-ops, so they have to be removed before
running ExplicitLocals so that `drop`s will be correctly inserted to
drop those values used by the `FAKE_USE`s.
---
This is reapplication of #160228, which broke Wasm waterfall. This PR
additionally prevents `FAKE_USE`s uses from being stackified.
Previously, a 'def' whose first use was a `FAKE_USE` was able to be
stackified as `TEE`:
- Before
```
Reg = INST ... // Def
FAKE_USE ..., Reg, ... // Insert
INST ..., Reg, ...
INST ..., Reg, ...
```
- After RegStackify
```
DefReg = INST ... // Def
TeeReg, Reg = TEE ... DefReg
FAKE_USE ..., TeeReg, ... // Insert
INST ..., Reg, ...
INST ..., Reg, ...
```
And this assumes `DefReg` and `TeeReg` are stackified.
But this PR removes `FAKE_USE`s in the beginning of ExplicitLocals. And
later in ExplicitLocals we have a routine to unstackify registers that
have no uses left:
https://github.com/llvm/llvm-project/blob/7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp#L257-L269
(This was added in #149626. Then it didn't seem it would trigger the
same assertions for `TEE`s because it was fixing the bug where a
terminator was removed in CFGSort (#149097).
Details here:
https://github.com/llvm/llvm-project/pull/149432#issuecomment-3091444141)
- After `FAKE_USE` removal and unstackification
```
DefReg = INST ...
TeeReg, Reg = TEE ... DefReg
INST ..., Reg, ...
INST ..., Reg, ...
```
And now `TeeReg` is unstackified. This triggered the assertion here,
that `TeeReg` should be stackified:
https://github.com/llvm/llvm-project/blob/7b28fcd2b182ba2c9d2d71c386be92fc0ee3cc9d/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp#L316
This prevents `FAKE_USE`s' uses from being stackified altogether,
including `TEE` transformation. Even when it is not a `TEE`
transformation and just a single use stackification, it does not trigger
the assertion but there's no point stackifying it given that it will be
deleted.
---
Fixes https://github.com/emscripten-core/emscripten/issues/25301.
Commit: d6072986cd40a3c009d2963a2b33501e047c7dc4
https://github.com/llvm/llvm-project/commit/d6072986cd40a3c009d2963a2b33501e047c7dc4
Author: Alireza Torabian <alireza.torabian at huawei.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
A llvm/test/Transforms/LoopFusion/da_separate_loops.ll
M llvm/test/Transforms/LoopFusion/simple.ll
Log Message:
-----------
[LoopFusion] Detecting legal dependencies for fusion using DA info (#146383)
Loop fusion pass will use the information provided by the recent
DA patch to fuse additional legal loops, including those with
forward loop-carried dependencies.
Commit: d77d3a78472410128f6d0b9f71bd36fb26b72feb
https://github.com/llvm/llvm-project/commit/d77d3a78472410128f6d0b9f71bd36fb26b72feb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Shard/Transforms/ShardingPropagation.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for modernize-use-emplace in ShardingPropagation.cpp (NFC)
Commit: 57947ace14ebfadba46a99aa80589e021c757037
https://github.com/llvm/llvm-project/commit/57947ace14ebfadba46a99aa80589e021c757037
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll
Log Message:
-----------
[SLP]Correctly set the insert point for insertlements with copyable arguments
Need to find the last insertelement instruction in the list for the
copyable arguments, otherwise wrong def-use chain may be built
Fixes #160671
Commit: b86aaacf28b358b187071bc87075f1faa2d65c4e
https://github.com/llvm/llvm-project/commit/b86aaacf28b358b187071bc87075f1faa2d65c4e
Author: Andrew Lazarev <alazarev at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__tree
R libcxx/include/__type_traits/is_generic_transparent_comparator.h
R libcxx/include/__type_traits/make_transparent.h
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
Log Message:
-----------
Revert "[libc++] Avoid constructing additional objects when using map::at" (#160738)
Reverts llvm/llvm-project#157866
It breaks a lot of sanitizer buildbots
Commit: 70eb6cc662c9771afb47be4d553667c4b3c4e437
https://github.com/llvm/llvm-project/commit/70eb6cc662c9771afb47be4d553667c4b3c4e437
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port b86aaacf28b3
Commit: 078a4e93dabf2b7e474e538c5dd4f1b5cb7b76e8
https://github.com/llvm/llvm-project/commit/078a4e93dabf2b7e474e538c5dd4f1b5cb7b76e8
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
Log Message:
-----------
[clang] Load `-fbasic-block-sections=list=` through the VFS (#160785)
This PR loads the path from `-fbasic-block-sections=list=<path>` through
the VFS rather than going straight to the real file system. This matches
the behavior of other input files of the compiler.
Commit: d8a296523af503327c86252daaf6a57898e503c1
https://github.com/llvm/llvm-project/commit/d8a296523af503327c86252daaf6a57898e503c1
Author: Francisco Geiman Thiesen <franciscogthiesen at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/BitVector.h
M llvm/unittests/ADT/BitVectorTest.cpp
Log Message:
-----------
[ADT] Adding bidirectional iterator functionality + unit tests (#160726)
This feature is needed for #160415 , kuhar suggested that I split that
PR into 2 so that the ADT work is checking in first.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 3008367910fccb2d5d9ebf71769c7b8a49db4534
https://github.com/llvm/llvm-project/commit/3008367910fccb2d5d9ebf71769c7b8a49db4534
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/tools/offload-arch/LevelZeroArch.cpp
Log Message:
-----------
[offload-arch] Fix warnings
This patch fixes:
clang/tools/offload-arch/LevelZeroArch.cpp:94:1: error: extra ';'
outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
clang/tools/offload-arch/LevelZeroArch.cpp:95:1: error: extra ';'
outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
clang/tools/offload-arch/LevelZeroArch.cpp:96:1: error: extra ';'
outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
clang/tools/offload-arch/LevelZeroArch.cpp:173:55: error: missing
field 'type' initializer [-Werror,-Wmissing-field-initializers]
Commit: 0e17fcf93b6c4a53e23c3ba8ee8961ff3b1a7fba
https://github.com/llvm/llvm-project/commit/0e17fcf93b6c4a53e23c3ba8ee8961ff3b1a7fba
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
A clang/include/clang/Analysis/Analyses/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/CMakeLists.txt
A clang/lib/Analysis/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/Analysis/LifetimeSafety/benchmark.py
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Implement support for lifetimebound attribute (#158489)
Add support for `lifetimebound` attributes in the lifetime safety
analysis to track loans from function parameters to return values.
Implemented support for `lifetimebound` attributes on function
parameters
This change replaces the single `AssignOriginFact` with two separate
operations: `OriginFlowFact` and `KillOriginFact`. The key difference is
in semantics:
* Old `AssignOriginFact`: Replaced the destination origin's loans
entirely with the source origin's loans.
* New `OriginFlowFact`: Can now optionally merge the source origin's
loans to the destination's existing loans.
* New `KillOriginFact`: Clears all loans from an origin.
For function calls with `lifetimebound` parameters, we kill the the
return value' origin first then use `OriginFlowFact` to accumulate loans
from multiple parameters into the return value's origin - enabling
tracking multiple lifetimebound arguments.
- Added a new `LifetimeAnnotations.h/cpp` to provide helper functions
for inspecting and inferring lifetime annotations
- Moved several functions from `CheckExprLifetime.cpp` to the new file
to make them reusable
The `lifetimebound` attribute is a key mechanism for expressing lifetime
dependencies between function parameters and return values. This change
enables the lifetime safety analysis to properly track these
dependencies, allowing it to detect more potential dangling reference
issues.
Commit: 0963cc262708034e41c3ecf412c4597fbec284c5
https://github.com/llvm/llvm-project/commit/0963cc262708034e41c3ecf412c4597fbec284c5
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
Log Message:
-----------
[clang][DebugInfo][NFC] Simplify CollectRecordLambdaFields (#160690)
This patch creates a helper to retrieve the name from a lambda capture
and only calls `createFieldType` once.
This will simplify reviewing some upcoming changes in this function.
Commit: 4a194064dc9e1fddabf7ed9f3b364d07cf6c9613
https://github.com/llvm/llvm-project/commit/4a194064dc9e1fddabf7ed9f3b364d07cf6c9613
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 0e17fcf93b6c
Commit: 85aeb6ab777862be0b79976a34c13ff2954ca238
https://github.com/llvm/llvm-project/commit/85aeb6ab777862be0b79976a34c13ff2954ca238
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
Log Message:
-----------
[clang-tidy] add readability-redundant-parentheses (#159911)
This check wants to detect a common happened case that forgetting to
remove parenthese during modifying code.
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: ba3415bc524667e12990ac86b6897f3840b20a76
https://github.com/llvm/llvm-project/commit/ba3415bc524667e12990ac86b6897f3840b20a76
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port 85aeb6ab7778
Commit: bad92c9c1c054a24742a3fc85045d21e5fd8703d
https://github.com/llvm/llvm-project/commit/bad92c9c1c054a24742a3fc85045d21e5fd8703d
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M lld/test/wasm/mutable-global-exports.s
M lld/wasm/Writer.cpp
Log Message:
-----------
[lld][WebAssembly] Fix check for exporting mutable globals (#160787)
We were not actually checking whether the global in question was
actually mutable before reporting the error.
Commit: 8a9aa183ac593d72c4713a0a9117774e7e50a3e7
https://github.com/llvm/llvm-project/commit/8a9aa183ac593d72c4713a0a9117774e7e50a3e7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtin-masked.c
M clang/test/Sema/builtin-masked.c
A clang/test/Sema/builtin-masked.cpp
A clang/test/SemaObjC/builtin-masked.m
Log Message:
-----------
[Clang][FIX] Fix type qualifiers on vector builtins (#160185)
Summary:
These were not stripping qualifiers when using them to infer the types,
leading to errors when mixiing const and non-const.
Commit: 663414817b2669cee9d828c909822d3b4b9f5bbb
https://github.com/llvm/llvm-project/commit/663414817b2669cee9d828c909822d3b4b9f5bbb
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
Log Message:
-----------
[SPIRV][NFC] Update issue number in XFAIL test for non-uniform resource index (#160381)
Commit: be23cdc858b860fbcc17c1f260d8a127a24d90b6
https://github.com/llvm/llvm-project/commit/be23cdc858b860fbcc17c1f260d8a127a24d90b6
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/LiveRangeEdit.h
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
Log Message:
-----------
[RegAlloc] Account for use availability when applying rematerializable weight discount (#159180)
This aims to fix the issue that caused https://reviews.llvm.org/D106408
to be reverted.
CalcSpillWeights will reduce the weight of an interval by half if it's
considered rematerializable, so it will be evicted before others.
It does this by checking TII.isTriviallyReMaterializable. However
rematerialization may still fail if any of the defining MI's uses aren't
available at the locations it needs to be rematerialized.
LiveRangeEdit::canRematerializeAt calls allUsesAvailableAt to check this
but CalcSpillWeights doesn't, so the two diverge.
This fixes it by also checking allUsesAvailableAt in CalcSpillWeights.
In practice this has zero change AArch64/X86-64/RISC-V as measured on
llvm-test-suite, but prevents weights from being perturbed in an
upcoming patch which enables more rematerialization by re-attempting
https://reviews.llvm.org/D106408
Commit: f6ded0be897e2878612dd903f7e8bb85448269e5
https://github.com/llvm/llvm-project/commit/f6ded0be897e2878612dd903f7e8bb85448269e5
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/python/CMakeLists.txt
Log Message:
-----------
[MLIR][Python] don't generate type stubs when cross-compiling (#160793)
Stubgen doesn't work when cross-compiling (stubgen will run in the host
interpreter and then fail to find the extension module for the host
arch). So disable it when `CMAKE_CROSSCOMPILING=ON`.
Commit: 55906e0abb685d52a5a134c83ad230229e76de3b
https://github.com/llvm/llvm-project/commit/55906e0abb685d52a5a134c83ad230229e76de3b
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
A llvm/test/tools/llvm-dwarfdump/verify_stmt_seq.yaml
Log Message:
-----------
[DWARFVerifier] Verify that DW_AT_LLVM_stmt_sequence is set correctly (#152807)
Sometimes DW_AT_LLVM_stmt_sequence won't point to the correct offset.
This feature helps us debug when/where it went wrong.
Added a new test and manually tempered with the value to show the
intended verification result.
---------
Signed-off-by: Peter Rong <PeterRong at meta.com>
Commit: 1867ca7afeea5eded105f868720b832ac2a4e204
https://github.com/llvm/llvm-project/commit/1867ca7afeea5eded105f868720b832ac2a4e204
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/Mustache.cpp
Log Message:
-----------
[llvm] Add benchmarks for Mustache (#160164)
The mustache library still has many issues with performance. While not
critical, template rendering is fairly simple, and should be fast. This
is hard to reason about without a benchmark. Since there is no standard
benchmark suite for Mustache, we can construct some benchmarks that will
stress our implementation.
This commit adds a new benchmark suite (MustacheBench) that tests
several
key performance areas:
- Parsing (Complex): Measures the one-time parse cost of a large
template.
- Parsing (Small): Measures the parse cost of a small template with deep
keys.
- Data Traversal: Stresses hot, cached data traversal using a
5k-iteration loop inside the template.
- Context Stack: Tests the render cost of deeply nested sections
(50 levels).
- Array Iteration: Benchmarks section iteration over a 100,000-item
array.
- Partial Rendering: Tests partial tag performance inside a large loop.
- String Escaping: Measures HTML-escaping a large string.
- String Unescaped (Triple): Baseline for {{{...}}} syntax.
- String Unescaped (Ampersand): Baseline for {{& ...}} syntax.
- Output Buffer: Tests rendering a single 1MB string.
Initial results show that Partial rendering is by far the slowest
operation. The cost per-item is ~3x higher than simple iteration,
because partial templates are being re-parsed on every call instead of
being cached. It also shows that the logic for HTML escaping is very
expensive likely due to the character by character parsing done to
escapes.
Commit: cc0fecf619301c68a7c885b4e2f2215144abab5a
https://github.com/llvm/llvm-project/commit/cc0fecf619301c68a7c885b4e2f2215144abab5a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/global_float_array.mlir
Log Message:
-----------
[MLIR][MLIRToLLVM] Fix zero fp value to array translation (#160713)
The translator should not generate zeroinitilizer on fp all zero values,
since it may affect signedness of zeroes
Fixes #160437
Commit: 2810a489d233baa68f405ed9c4a83675509df098
https://github.com/llvm/llvm-project/commit/2810a489d233baa68f405ed9c4a83675509df098
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M libcxx/utils/compare-benchmarks
M libcxx/utils/visualize-historical
Log Message:
-----------
[libc++] Use pandas.DataFrame in compare-benchmarks
This opens the door to performing more advanced computations on the
data we're comparing.
Commit: 7ad70d2793ec9baba1f343d82c8457b744c74164
https://github.com/llvm/llvm-project/commit/7ad70d2793ec9baba1f343d82c8457b744c74164
Author: Thurston Dang <thurston at google.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
Log Message:
-----------
[msan] Handle AVX512/AVX10 vrndscale (#160624)
Uses the updated handleAVX512VectorGenericMaskedFP() from
https://github.com/llvm/llvm-project/pull/159966
Commit: 9440f40cfbe7a62aed9e5726901a2ef935a60d54
https://github.com/llvm/llvm-project/commit/9440f40cfbe7a62aed9e5726901a2ef935a60d54
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll
M llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll
Log Message:
-----------
[LoongArch] Support vector types for hasAndNot to enable more DAG combines (#159056)
After this commit, DAGCombiner will have more opportunities to optimize
vector types `and+...+not` to `andn`.
Many combines in DAGCombiner will be enabled, but only shows changes
after combining `and(add(not))` to `and(not(sub))` in the tests of this
commit.
Commit: 8553bd2b29ad2b17a9a884f14da6c43b606ec776
https://github.com/llvm/llvm-project/commit/8553bd2b29ad2b17a9a884f14da6c43b606ec776
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
M llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
Log Message:
-----------
[LoongArch] Override shouldScalarizeBinop to enable `extract(binop)->binop(extract)` combination (#159726)
Commit: 7275c178bd989bd431ae8aaff57d62d6fba1cc4f
https://github.com/llvm/llvm-project/commit/7275c178bd989bd431ae8aaff57d62d6fba1cc4f
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
Log Message:
-----------
[VPlan] Fix packed replication of struct types (#160274)
I ran into this crash when #158690 caused a loop with a struct call to
be vectorized.
If we have a replicate recipe in a branch-on-mask predicated region
that's used by a widened recipe in another block then it will be packed
together with the other lanes via a VPPredInstPHIRecipe.
If we're replicating a call with a struct return type then we currently
crash. The code that handles structs in packScalarIntoVectorizedValue
seemed to be untested at least on test/Transforms/LoopVectorize.
There's two places that need to be fixed. The poison value that the
scalar is packed into needs to use toVectorizedTy to correctly handle
structs (not to be confused with toVectorTy!)
The other is that VPPredInstPHIRecipe expects its operand to be an
InsertElementInstr when stringing together the different lanes. For
structs this will be an InsertVlaueInstr, and the value for the previous
lane will be at the back of a chain of InsertValueInstrs.
Commit: b4b89a688c290f8c5a5f4f9427d4781e9b1a4ce8
https://github.com/llvm/llvm-project/commit/b4b89a688c290f8c5a5f4f9427d4781e9b1a4ce8
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/GenericSSAContext.h
Log Message:
-----------
[Unifomity] Fix type of ValueRefNull (NFC)
ValueRefNull has no current users.
Commit: c4a134f59108c8a5e41d9f2539b0ee96f5cbccec
https://github.com/llvm/llvm-project/commit/c4a134f59108c8a5e41d9f2539b0ee96f5cbccec
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
Log Message:
-----------
[profcheck] Add unknown branch weights for inlined strcmp/strncmp (#160455)
The strcmp/strncmp inliner creates new conditional branches but was
failing to add profile metadata. This caused the ProfileVerifierPass to
fail when profcheck is enabled.
This patch fixes the issue by explicitly adding unknown branch weights
to these branches.
Issue #147390
Commit: 1e01c029961c0dd3dd70b68e029581dc6ef9c17b
https://github.com/llvm/llvm-project/commit/1e01c029961c0dd3dd70b68e029581dc6ef9c17b
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
Log Message:
-----------
[DAGCombiner] Remove `NoSignedZerosFPMath` uses in `visitFADD` (#160635)
Remove these global flags and use node level flags instead.
Commit: b928695c2fb8968764f0ae04f8a1ee62ffc9c94d
https://github.com/llvm/llvm-project/commit/b928695c2fb8968764f0ae04f8a1ee62ffc9c94d
Author: co63oc <co63 at 163.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMutate.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
Log Message:
-----------
[compiler-rt] fix typos (#160799)
fix typos
Commit: 6679e43937a87db3ce59a02f0cfc86951a4881e4
https://github.com/llvm/llvm-project/commit/6679e43937a87db3ce59a02f0cfc86951a4881e4
Author: Koakuma <koachan at protonmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/test/CodeGen/sparcv9-abi.c
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/test/CodeGen/SPARC/64abi.ll
Log Message:
-----------
[clang][SPARC] Pass 16-aligned structs with the correct alignment in CC (#155829)
Pad argument registers to preserve overaligned structs in LLVM IR.
Additionally, since i128 values will be lowered as split i64 pairs in
the backend, correctly set the alignment of such arguments as 16 bytes.
This should make clang compliant with the ABI specification and fix
https://github.com/llvm/llvm-project/issues/144709.
Commit: 114b3b8b04fe5aae4143e30078637015a9e077ce
https://github.com/llvm/llvm-project/commit/114b3b8b04fe5aae4143e30078637015a9e077ce
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-09-25 (Thu, 25 Sep 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsExpandPseudo.cpp
M llvm/test/CodeGen/Mips/atomic-min-max.ll
Log Message:
-----------
[Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (#159717)
Modify instr movn/movz to mixture of beq, move, and sc.
Because atomic-min-max.ll test broken on the expensive builder, I revert
https://github.com/llvm/llvm-project/pull/149983 and resubmit this PR.
The broken reason:
In i16/i8 function expandAtomicBinOpSubword, we use two successor
after loop2MBB, one does not specify the second parameter, the other
use BranchProbability::getOne() that means 100% probability. This is
contradictory. And the second successor is also specified incorrectly.
The changess:
* llvm/lib/Target/Mips/MipsExpandPseudo.cpp:
Change loop2MBB`s second successor to correct one and delete the
second parameter BranchProbability::getOne().
* llvm/test/CodeGen/Mips/atomic-min-max.ll:
Add -verify-machineinstrs option in RUN command;
Modify i16 test and i8 test according to the changes.
Fix #145411.
Commit: de59bc42ed84e062360eb3a9e591a195bfb1104f
https://github.com/llvm/llvm-project/commit/de59bc42ed84e062360eb3a9e591a195bfb1104f
Author: Josh Hutton <55123932+JoshHuttonCode at users.noreply.github.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[AMDGPU] Avoid constraining RC based on folded into operand (NFC) (#160743)
The RC of the folded operand does not need to be constrained based on
the RC of the current operand we are folding into.
The purpose of this PR is to facilitate this PR:
https://github.com/llvm/llvm-project/pull/151033
Commit: a274ffe2597ca53d828d08d44af0f44d3b823507
https://github.com/llvm/llvm-project/commit/a274ffe2597ca53d828d08d44af0f44d3b823507
Author: Pete Chou <petechou at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
A llvm/test/CodeGen/AMDGPU/postra-machine-sink-livein-subrange.mir
Log Message:
-----------
[MachineSink] Remove subrange of live-ins from super register as well. (#159145)
Post-RA machine sinking could sink a copy of sub-register into
a successor. However, the sub-register might not be removed from the
live-in bitmask of its super register in successor and then a later
pass, e.g, if-converter, may add an implicit use of the register from
live-in resulting in an use of an undefined register. This change makes
sure subrange of live-ins from super register could be removed as well.
Commit: fe2dc19a8bb11675dd3c1b01adb1c711dc82086d
https://github.com/llvm/llvm-project/commit/fe2dc19a8bb11675dd3c1b01adb1c711dc82086d
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvrepl128vei.ll
Log Message:
-----------
[LoongArch] Refine 256-bit vector_shuffle legalization for LASX (#160254)
Commit: 77a3d431ff95a69736da42ec2b12e26b9e1e4bcc
https://github.com/llvm/llvm-project/commit/77a3d431ff95a69736da42ec2b12e26b9e1e4bcc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
A clang/test/DebugInfo/CXX/lambda-capture-packs.cpp
Log Message:
-----------
[clang][DebugInfo][test] Add tests for lambda capture packs (#160705)
We didn't have coverage for this yet. And I'm planning on making some
chnges in this area. These tests will be useful for that.
Commit: beed796ea02a54ec44a30db092e3f5d045390434
https://github.com/llvm/llvm-project/commit/beed796ea02a54ec44a30db092e3f5d045390434
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/shuffle-as-permute-and-shuffle.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
Log Message:
-----------
[LoongArch] Custom legalize vector_shuffle to xvpermi.d when possible (#160429)
Commit: 8cd917bc80eb9882cdc38d49ed82d855820d7e6c
https://github.com/llvm/llvm-project/commit/8cd917bc80eb9882cdc38d49ed82d855820d7e6c
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
Log Message:
-----------
[AMDGPU] Skip debug uses in SIInsertWaitcnts::shouldFlushVmCnt (#160818)
Commit: 3257dc35fe9ed872788e90c948cb4bb593b8fa05
https://github.com/llvm/llvm-project/commit/3257dc35fe9ed872788e90c948cb4bb593b8fa05
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/test/CodeGen/ARM/fnegs.ll
M llvm/test/CodeGen/ARM/fnmscs.ll
Log Message:
-----------
[ARM] Remove `UnsafeFPMath` uses in code generation part (#160801)
Factor out from #151275
Remove all UnsafeFPMath uses but ABI tags related part.
Commit: 368d59986e769511437781fdd45cd5f787f35980
https://github.com/llvm/llvm-project/commit/368d59986e769511437781fdd45cd5f787f35980
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M lldb/test/Shell/ObjectFile/ELF/elf-no-shdrs-pt-notes.yaml
Log Message:
-----------
[lldb][test] Fix elf-no-shdrs-pt-notes.yaml on Windows (#160827)
Windows paths have different slashes, but I don't think we care about
the exact paths there anyway so I've just checked for the final
filename.
Fixes #160652
Commit: 2cacf7117ba0fb7c134413a1a51302f8d6649052
https://github.com/llvm/llvm-project/commit/2cacf7117ba0fb7c134413a1a51302f8d6649052
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
[ARM] Improve comment on the 'J' inline asm modifier. (#160712)
An inline asm constraint "Jr", in AArch32, means that if the input value
is a compile-time constant in the range -4095 to +4095, then it can be
inserted into the assembly language as an immediate operand, and
otherwise it will be placed in a register.
The comment in the Arm backend said "It is not clear what this
constraint is intended for". I believe the answer is that that range of
immediate values are the ones you can use in a LDR or STR instruction.
So it's suitable for cases like this:
asm("str %0,[%1,%2]" : : "r"(data), "r"(base), "Jr"(offset) : "memory");
in the same way that the "Ir" constraint is suitable for the immediate
in a data-processing instruction such as ADD or EOR.
Commit: 9de1bc0336540ad643249ec216d9c02f9b3b3786
https://github.com/llvm/llvm-project/commit/9de1bc0336540ad643249ec216d9c02f9b3b3786
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
Log Message:
-----------
[LoongArch] Generate [x]vldi instructions with special constant splats (#159258)
Commit: 8c122e5d3bcbdd82c34a406c6d3029060306521a
https://github.com/llvm/llvm-project/commit/8c122e5d3bcbdd82c34a406c6d3029060306521a
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/cpu_feature.py
Log Message:
-----------
[lldb][test] Make Linux cpuinfo check more robust (#160675)
We were looking for any mention of the feature name in cpuinfo, which
could have hit anything including features with common prefixes like
sme, sme2, smefa64.
Luckily this was not a problem but I'm changing this to find the
features line and split the features into a list. Then we are only
looking for exact matches.
Here's the information for one core as an example:
```
processor : 7
BogoMIPS : 200.00
Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid <...>
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x0
CPU part : 0xd0f
CPU revision : 0
```
(and to avoid any doubt, this is from a CPU simulated in Arm's FVP, it's
not real)
Note that the layout of the label, colon, values is sometimes aligned
but not always. So I trim whitespace a few times to normalise that.
This repeats once for each core so we only need to find one features
line.
Commit: 9b270fcb376ccdef333ae717f37d04d90defd115
https://github.com/llvm/llvm-project/commit/9b270fcb376ccdef333ae717f37d04d90defd115
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Set default rounding mode round to nearest for llvm.set.rounding (#160823)
- Fix
https://github.com/llvm/llvm-project/pull/156591#issuecomment-3335218842
- As per https://cdrdv2.intel.com/v1/dl/getContent/671200 default
rounding mode is **round to nearest**.
Commit: aa08b1a9963f33ded658d3ee655429e1121b5212
https://github.com/llvm/llvm-project/commit/aa08b1a9963f33ded658d3ee655429e1121b5212
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)
Split out from #151300 to isolate TargetTransformInfo cost modelling for
fault-only-first loads from VPlan implementation details. This change
adds costing support for vp.load.ff independently of the VPlan work.
For now, model a vp.load.ff as cost-equivalent to a vp.load.
Commit: 656707086e5f6fccd2eb57f5aaf987c328c0f4f1
https://github.com/llvm/llvm-project/commit/656707086e5f6fccd2eb57f5aaf987c328c0f4f1
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
Log Message:
-----------
[compiler-rt] Fix test ifdefs and XFAILs (#160687)
This fixes the ifdefs added in
e9e166e54354330c474457711a8e7a7ca2efd731; we need to include int_lib.h
first before we can expect these defines to be set.
Also remove the XFAILs for aarch64 windows. As this test now became a
no-op on platforms that lack CRT_HAS_128BIT or CRT_HAS_F128 (aarch64
windows lacks the latter), it no longer fails.
Commit: d357e965af90cbcfcd717e9d82502bda68f10d5e
https://github.com/llvm/llvm-project/commit/d357e965af90cbcfcd717e9d82502bda68f10d5e
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir
Log Message:
-----------
[RegisterCoalescer] Mark implicit-defs of super-registers as dead in remat (#159110)
Currently, something like:
```
$eax = MOV32ri -11, implicit-def $rax
%al = COPY $eax
```
Can be rematerialized as:
```
dead $eax = MOV32ri -11, implicit-def $rax
```
Which marks the full $rax as used, not just $al.
With this change, this is rematerialized as:
```
dead $eax = MOV32ri -11, implicit-def dead $rax, implicit-def $al
```
To indicate that only $al is used.
Note: This issue is latent right now, but is exposed when #134408 is
applied, as it results in the register pressure being incorrectly
calculated (unless this patch is applied too).
I think this change is in line with past fixes in this area, notably:
https://github.com/llvm/llvm-project/commit/059cead5ed7aa11ce1eae0bcc751ea0d1e23ea75
https://github.com/llvm/llvm-project/commit/69cd121dd9945429b565b6a5eb8719130de880a7
Commit: 745e1e6ad5d40ff8f1553e62c48554a61611ee76
https://github.com/llvm/llvm-project/commit/745e1e6ad5d40ff8f1553e62c48554a61611ee76
Author: Wenju He <wenju.he at intel.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/NVPTX/machinelicm-no-preheader.mir
Log Message:
-----------
[CodeGen] Ignore requiresStructuredCFG check in canSplitCriticalEdge if successor is loop header (#154063)
This addresses a performance issue for our downstream GPU target that
sets requiresStructuredCFG to true. The issue is that EarlyMachineLICM
pass does not hoist loop invariants because a critical edge is not
split.
The critical edge's destination a loop header. Splitting the critical
edge will not break structured CFG.
Add a nvptx test to demonstrate the issue since the target also
requires structured CFG.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 5d51e006caa6a2ca6c9944200ca69bcb1c38576a
https://github.com/llvm/llvm-project/commit/5d51e006caa6a2ca6c9944200ca69bcb1c38576a
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/ConvertConv2DToImg2Col.cpp
M mlir/test/Dialect/Linalg/convert-conv2d-to-img2col.mlir
Log Message:
-----------
[mlir][linalg] Propagate filter tensor encoding in im2col (#160099)
In the im2col decomposition, propagate the filter tensor encoding (if
specified) through the tensor.collapse_shape op, so that it can be used
by the consuming linalg.generic matmul op.
Signed-off-by: Fabrizio Indirli <Fabrizio.Indirli at arm.com>
Commit: 78af0561376ff2eb01bd0ed7ef3055e5a9954746
https://github.com/llvm/llvm-project/commit/78af0561376ff2eb01bd0ed7ef3055e5a9954746
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
Log Message:
-----------
[VPlan] Run CSE closer to VPlan::execute. (#160572)
Additional CSE opportunities are exposed after converting to concrete
recipes/dissolving regions and materializing various expressions. Run
CSE later, to capitalize on some of the late opportunities.
PR: https://github.com/llvm/llvm-project/pull/160572
Commit: ef5e0c7c83080af7f752dcadbb9972ed3e3a9c39
https://github.com/llvm/llvm-project/commit/ef5e0c7c83080af7f752dcadbb9972ed3e3a9c39
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(pshufb(x,y)) -> pshufb(freeze(x),freeze(y)) (#160835)
Commit: c10befb9d3b2b50e37048f2aba5dda0f77031ba3
https://github.com/llvm/llvm-project/commit/c10befb9d3b2b50e37048f2aba5dda0f77031ba3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(vpermps(x,y)) -> vpermps(freeze(x),freeze(y)) (#160837)
Commit: c7312916b7e228460c1c21c1f5959dc3c1973c4c
https://github.com/llvm/llvm-project/commit/c7312916b7e228460c1c21c1f5959dc3c1973c4c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(permilvar(x,y)) -> permilvar(freeze(x),freeze(y)) (#160836)
Commit: 96675a467ef5811dc1e78b2bec3c90cf0c67ba1c
https://github.com/llvm/llvm-project/commit/96675a467ef5811dc1e78b2bec3c90cf0c67ba1c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Clang.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/split-debug.f90
A flang/test/Integration/debug-split-dwarf.f90
Log Message:
-----------
[flang][Driver] Support -gsplit-dwarf. (#160540)
This flags enables the compiler to generate most of the debug
information in a separate file which can be useful for executable size
and link times. Clang already supports this flag.
I have tried to follow the logic of the clang implementation where
possible. Some functions were moved where they could be used by both
clang and flang. The `addOtherOptions` was renamed to `addDebugOptions`
to better reflect its purpose.
Clang also set the `splitDebugFilename` field of the `DICompileUnit` in
the IR when this option is present. That part is currently missing from
this patch and will come in a follow-up PR.
Commit: 0fff27084b5d4daf218c5a16e2290917dfddbf68
https://github.com/llvm/llvm-project/commit/0fff27084b5d4daf218c5a16e2290917dfddbf68
Author: LeeYoungJoon <dog3hk.dev at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
M llvm/docs/Reference.rst
M llvm/docs/index.rst
Log Message:
-----------
[QualGroup][docs] Reorganize QualGroup docs under Reference section (#160021)
This patch makes the following updates to the `QualGroup` documentation:
✅ 1. Move to Reference section
Relocated the Qualification Working Group (QualGroup) docs from the main
index into the Reference section for better organization and
consistency.
✅ 2. Add link in GettingInvolved
Inserted a proper link to the QualGroup documentation in the
GettingInvolved sync-ups table, improving discoverability for newcomers.
✅ 3. Align structure with Security Group
Revised the documentation layout to follow the same structure pattern as
the Security Group docs, ensuring consistency across LLVM working group
references.
Commit: f6fc5e83d71e643518c63acb5e43847cd1813895
https://github.com/llvm/llvm-project/commit/f6fc5e83d71e643518c63acb5e43847cd1813895
Author: A. Jiang <de34 at live.cn>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
Log Message:
-----------
[libc++][test] Guard non-guaranteed implicit-lifetime-ness cases with `_LIBCPP_VERSION` (#160627)
And add some guaranteed cases (namely, for `expected`, `optional`, and
`variant`) to `is_implicit_lifetime.pass.cpp`.
It's somehow unfortunate that `pair` and `tuple` are not guaranteed to
propagate triviality of copy/move constructors, and MSVC STL fails to do
so due to ABI compatibility. This affects the implicit-lifetime
property.
Commit: 81aafd91fd27f20677402b6a8c8aacbc4928d6d1
https://github.com/llvm/llvm-project/commit/81aafd91fd27f20677402b6a8c8aacbc4928d6d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode/isGuaranteedNotToBeUndefOrPoisonForTargetNode - add X86ISD::PSHUFB handling (#160842)
X86ISD::PSHUFB shuffles can't create undef/poison itself, allowing us to fold freeze(pshufb(x,y)) -> pshufb(freeze(x),freeze(y))
Commit: a27baf9c96a484312a1a32df1e552bcce7a610d1
https://github.com/llvm/llvm-project/commit/a27baf9c96a484312a1a32df1e552bcce7a610d1
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
Log Message:
-----------
[SelectionDAG] Improve v2f16 maximumnum expansion (#160723)
On targets where f32 maximumnum is legal, but maximumnum on vectors of
smaller types is not legal (e.g. v2f16), try unrolling the vector first
as part of the expansion.
Only fall back to expanding the full maximumnum computation into
compares + selects if maximumnum on the scalar element type cannot be
supported.
Commit: 347df234e0558a1818a563ff896d8b434f2c1016
https://github.com/llvm/llvm-project/commit/347df234e0558a1818a563ff896d8b434f2c1016
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpFrame.h
Log Message:
-----------
[clang][bytecode] Remove Program include from InterpFrame.h (#160843)
Program itself is unused in that file, so just include the needed
headers.
Commit: 2100c504d9454e920ecbadfe3b81abacf296fd5e
https://github.com/llvm/llvm-project/commit/2100c504d9454e920ecbadfe3b81abacf296fd5e
Author: Ross Burton <ross.burton at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
[clang] Support building native tools when cross-compiling standalone clang (#160605)
When cross-compiling the LLVM project as a whole (from llvm/), if it
cannot find presupplied tools it will create a native build environment
to build the tools it needs.
However, when doing a standalone build of clang (that is, from clang/
and linking against an existing libLLVM) this doesn't work. Instead a
_target_ binary is built which predictably then fails.
The conventional workaround for this is to build the native tools in a
separate native compile phase and pass the paths to the cross build, for
example see OpenEmbedded[1] or Nix[2]. But we can do better!
The first problem is that LLVM_USE_HOST_TOOLS is only set in the llvm/
CMakeLists.txt, so setup_host_tool() will never consider building a
native binary. This can be solved by setting LLVM_USE_HOST_TOOLS based
on CMAKE_CROSSCOMPILING in clang/CMakeLists.txt in the standalone case.
Now setup_host_tool() will try to build a native tool, but it needs
build_native_tool() from CrossCompile.cmake, so that also needs to be
included.
Finally, the native binary then fails because there's no provider for
the dependency "CONFIGURE_Clang_NATIVE", so use llvm_create_cross_target
to create the native environment.
These few lines mirror what the lldb CMakeLists.txt does in the
standalone case, so there is prior art for this.
[1]
https://git.openembedded.org/openembedded-core/tree/meta/recipes-devtools/clang/clang_git.bb?id=e18d697e92b55e57124e80234369d46575226386#n212
[2]
https://github.com/NixOS/nixpkgs/blob/3354d448f2a26117a74638957b0131ce3da9c8c4/pkgs/development/compilers/llvm/common/tblgen.nix#L54
Commit: 3073bb5fcfbb62910876f22084a5eb0478d3ff8f
https://github.com/llvm/llvm-project/commit/3073bb5fcfbb62910876f22084a5eb0478d3ff8f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode/isGuaranteedNotToBeUndefOrPoisonForTargetNode - add X86ISD::VPERMV handling (#160845)
X86ISD::VPERMV shuffles can't create undef/poison itself, allowing us to fold freeze(vpermps(x,y)) -> vpermps(freeze(x),freeze(y))
Commit: 02746f80c1fa1d17997849a9bf5a41a91523ca41
https://github.com/llvm/llvm-project/commit/02746f80c1fa1d17997849a9bf5a41a91523ca41
Author: David Green <david.green at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll
M llvm/test/CodeGen/ARM/2012-04-10-DAGCombine.ll
M llvm/test/CodeGen/ARM/fnmul.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll
R llvm/test/CodeGen/ARM/fp16.ll
M llvm/test/CodeGen/ARM/sincos.ll
M llvm/test/CodeGen/ARM/vminmaxnm.ll
Log Message:
-----------
[ARM] Remove -fno-unsafe-math from a number of tests. NFC
llvm.convert/to.fp16 and from.fp16 are no longer used / deprecated and do not
need to be tested any more.
Commit: e38e0bde41e084a05de6972a5a9fff81435c7f77
https://github.com/llvm/llvm-project/commit/e38e0bde41e084a05de6972a5a9fff81435c7f77
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/test/CAPI/llvm.c
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir] Add splitDebugFilename field in DIComplileUnitAttr. (#160704)
Mostly mechanical changes to add the missing field.
Commit: 0aad055f30d8148057a71a2f5f1cdb2d1bab2eee
https://github.com/llvm/llvm-project/commit/0aad055f30d8148057a71a2f5f1cdb2d1bab2eee
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
Log Message:
-----------
[X86] Add test showing failure to fold freeze(insertps(x,y,i)) -> insertps(freeze(x),freeze(y),i) (#160852)
Commit: 3fa3e09bdc568db733cf85d020e02e6a8fa0c97f
https://github.com/llvm/llvm-project/commit/3fa3e09bdc568db733cf85d020e02e6a8fa0c97f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode/isGuaranteedNotToBeUndefOrPoisonForTargetNode - add X86ISD::VPERMILPV handling (#160849)
X86ISD::VPERMILPV shuffles can't create undef/poison itself, allowing us to fold freeze(vpermilps(x,y)) -> vpermilps(freeze(x),freeze(y))
Commit: 42dd9260dbd615c075844c6c96ec6665be6c1aed
https://github.com/llvm/llvm-project/commit/42dd9260dbd615c075844c6c96ec6665be6c1aed
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libcxx/utils/visualize-historical
Log Message:
-----------
[libc++] Switch back to plotting on revlist order for visualize-historical
That provides vastly better plots.
Commit: 83ef38a274b76c8877f15d3758d955772f91cf2d
https://github.com/llvm/llvm-project/commit/83ef38a274b76c8877f15d3758d955772f91cf2d
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A offload/test/offloading/fortran/target-no-loop.f90
M openmp/device/src/Workshare.cpp
Log Message:
-----------
[Flang][OpenMP] Enable no-loop kernels (#155818)
Enable the generation of no-loop kernels for Fortran OpenMP code. target
teams distribute parallel do pragmas can be promoted to no-loop kernels
if the user adds the -fopenmp-assume-teams-oversubscription and
-fopenmp-assume-threads-oversubscription flags.
If the OpenMP kernel contains reduction or num_teams clauses, it is not
promoted to no-loop mode.
The global OpenMP device RTL oversubscription flags no longer force
no-loop code generation for Fortran.
Commit: 9be276ec75c087595ebb62fe11b35c1a90371a49
https://github.com/llvm/llvm-project/commit/9be276ec75c087595ebb62fe11b35c1a90371a49
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/trip-multiple-guard-info.ll
Log Message:
-----------
[SCEV] Add tests for computing trip counts with align assumptions.
Commit: eaf36c668c956a90bfb00c47415c4c8550f159c8
https://github.com/llvm/llvm-project/commit/eaf36c668c956a90bfb00c47415c4c8550f159c8
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.cpp
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
Log Message:
-----------
[ASan] Update meminstrinsics to use library memmove rather than internal (#160740)
Currently `memcpy` and `memset` intrinsics map through to the library
implementations if ASan has been inited, whereas `memmove` always calls
`internal_memmove`.
This patch changes `memmove` to use the library implementation if ASan
has been inited.
Commit: bb38b48910967041045997a0c1293ee2ba834196
https://github.com/llvm/llvm-project/commit/bb38b48910967041045997a0c1293ee2ba834196
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/unittests/CMakeLists.txt
Log Message:
-----------
[flang-rt] Set _POSIX_C_SOURCE on Darwin (#160130)
Clang on Darwin enables non-POSIX extensions by default.
This causes some macros to leak, such as HUGE from <math.h>, which
causes some conflicts with Flang symbols (but not with Flang-RT, for
now).
It also causes some Flang-RT extensions to be disabled, such as FDATE,
that checks for _POSIX_C_SOURCE. Setting _POSIX_C_SOURCE avoids these
issues. This is already being done in Flang, but it was not ported to
Flang-RT.
This also fixes check-flang-rt on Darwin, as NoArgv.FdateNotSupported
is broken since the flang runtime was moved to flang-rt.
Fixes #82036
Commit: e2d5efd59ff2d448d371f0f72630934e42a8c12c
https://github.com/llvm/llvm-project/commit/e2d5efd59ff2d448d371f0f72630934e42a8c12c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libc/src/__support/CPP/simd.h
M libc/src/string/memory_utils/generic/inline_strlen.h
M libc/test/src/__support/CPP/simd_test.cpp
Log Message:
-----------
[libc] Update the memory helper functions for simd types (#160174)
Summary:
This unifies the interface to just be a bunch of `load` and `store`
functions that optionally accept a mask / indices for gathers and
scatters with masks.
I had to rename this from `load` and `store` because it conflicts with
the other version in `op_generic`. I might just work around that with a
trait instead.
Commit: acb826e64e773f65ae58eaa98bc8bbb7d07af8d9
https://github.com/llvm/llvm-project/commit/acb826e64e773f65ae58eaa98bc8bbb7d07af8d9
Author: Alexandra Sidorova <asidorov at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/tools/mlir-tblgen/EnumsGen.cpp
Log Message:
-----------
[MLIR][TBLGen] Added compound assignment operator for any BitEnum (#160840)
## Details:
- Added missing compound assignment operators `|=`, `&=`, `^=` to
`mlir-tblgen`
- Replaced the arithmetic operators with added assignment operators for
`BitEnum` in the transformations
- Updated related documentation
## Tickets:
- Closes https://github.com/llvm/llvm-project/issues/158098
Commit: 3e746bd8fb6aece3c6d56dae4a9a7f0a7ec61859
https://github.com/llvm/llvm-project/commit/3e746bd8fb6aece3c6d56dae4a9a7f0a7ec61859
Author: Francisco Geiman Thiesen <franciscogthiesen at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
A mlir/test/Transforms/remove-dead-values-call-segments.mlir
M mlir/test/lib/Dialect/Test/TestDialect.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
Allowing RDV to call `getArgOperandsMutable()` (#160415)
## Problem
`RemoveDeadValues` can legally drop dead function arguments on private
`func.func` callees. But call-sites to such functions aren't fixed if
the call operation keeps its call arguments in a **segmented operand
group** (i.ie, uses `AttrSizedOperandSegments`), unless the call op
implements `getArgOperandsMutable` and the RDV pass actually uses it.
## Fix
When RDV decides to drop callee function args, it should, for each
call-site that implements `CallOpInterface`, **shrink the call's
argument segment** via `getArgOperandsMutable()` using the same dead-arg
indices. This keeps both the flat operand list and the
`operand_segment_sizes` attribute in sync (that's what
`MutableOperandRange` does when bound to the segment).
## Note
This change is a no-op for:
* call ops without segment operands (they still get their flat operands
erased via the generic path)
* call ops whose calle args weren't dropped (public, external,
non-`func-func`, unresolved symbol, etc)
* `llvm.call`/`llvm.invoke` (RDV doesn't drop `llvm.func` args
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 69194be7484adc707a16e09fdcfb3cdbc22d2074
https://github.com/llvm/llvm-project/commit/69194be7484adc707a16e09fdcfb3cdbc22d2074
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
A clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
Log Message:
-----------
[NFC][OpenACC][CIR] Extract 'base' class for Recipe generation (#160603)
It was brought up on a previous review that the CIRGenOpenACCRecipe.h
file was getting too large. I noticed that the 'dependent on template
argument' parts were actually quite small, so I extract a base class in
this patch that allows me to implement it in the .cpp file, plus
minimize the amount of code that needs instantiating.
Commit: 7ab7bc7274dcb2c429bf85cf3488c0627b4f04f7
https://github.com/llvm/llvm-project/commit/7ab7bc7274dcb2c429bf85cf3488c0627b4f04f7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[MLIR] Fix LivenessAnalysis/RemoveDeadValues handling of dead function arguments (#160755)
In #153973 I added the correctly handling of block arguments,
unfortunately this was gated on operation that also have results. This
wasn't intentional and this excluded operations like function from being
correctly processed.
Commit: 84df4123e645ad93839e5b5b48c9f94bdd27a6e1
https://github.com/llvm/llvm-project/commit/84df4123e645ad93839e5b5b48c9f94bdd27a6e1
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
Log Message:
-----------
[CodeGen] Adjust global-split remat heuristic to match LICM (#160709)
This heuristic was originally added in 40c4aa with the stated purpose of
avoiding global split on live long ranges created by MachineLICM
hoisting trivially rematerializable instructions. In the meantime,
various backends have introduced non-trivial rematerialization cases,
MachineLICM gained an explicitly triviality check, and we've reworked
our APIs to match naming wise. Let's move this heuristic back to truely
trivial remat only.
This is a functional change, though somewhat hard to hit. This change
will cause non-trivially rematerializable instructions to be globally
split more often. This is likely a good thing since non-trivial remat
may not be legal at all possible points in the live interval, but may
cost slightly more compile time.
I don't have a motivating example; I found it when reviewing the callers
of isRemMaterializable(MI).
Commit: 78da5926471194407e959afce3e42d4e12f3ef06
https://github.com/llvm/llvm-project/commit/78da5926471194407e959afce3e42d4e12f3ef06
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
Log Message:
-----------
[RegAlloc] Add additional tracing in InlineSpiller::rematerializeFor (#160761)
We didn't have trace logging for two cases in this routine which makes
it sometimes hard to tell what is going on. In addition to debug trace
statements, add comments to explain the logic behind the early exits
which don't mark the virtual register live. Suggestions on how to word
these more precisely very welcome; I'm not clear I understand all the
intrinicies of this code myself.
Commit: bba91727789bed302758dac282107a44c7b33504
https://github.com/llvm/llvm-project/commit/bba91727789bed302758dac282107a44c7b33504
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/LiveRangeEdit.cpp
Log Message:
-----------
[RegAlloc] Strengthen asserts in LiveRangeEdit::scanRemattable [nfc] (#160765)
We should always be able to find the VNInfo in the original live
interval which corresponds to the subset we're trying to spill, and the
only cases where we have a VNInfo without a definition instruction are
if the vni is unused, or corresponds to a phi. Adjust the code structure
to explicitly check for PHIDef, and assert the stronger conditions.
Commit: d404c3781be0214ea37a0f93b1bcb9176f3e420f
https://github.com/llvm/llvm-project/commit/d404c3781be0214ea37a0f93b1bcb9176f3e420f
Author: Shaoce SUN <sunshaoce at outlook.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[Clang][RVV][SVE] Cache getScalableVectorType lookups (#160108)
Currently, RVV/SVE intrinsics are cached, but the corresponding type
construction is not. As a result, `ASTContext::getScalableVectorType`
can become a performance hotspot, since every query must run through a
long sequence of type checks and macro expansions.
Commit: 0b8c7758e7369d6c87276bc4e37acede766c116d
https://github.com/llvm/llvm-project/commit/0b8c7758e7369d6c87276bc4e37acede766c116d
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/ldexp.ll
Log Message:
-----------
[AArch64][GlobalISel] Add support for ldexp (#160517)
Commit: def68dccf71dbcbd2c846138dc9402dcde5a8397
https://github.com/llvm/llvm-project/commit/def68dccf71dbcbd2c846138dc9402dcde5a8397
Author: Gleb Popov <6yearold at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
A llvm/test/tools/llvm-tli-checker/ifuncs.yaml
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
Log Message:
-----------
llvm-tli-checker: Take ifunc symbols into account (#158596)
FreeBSD libc has a lot of symbols that are ifuncs, which makes TLI
checker believe they are not available. This change makes the tool
consider symbols with the STT_GNU_IFUNC type.
Commit: 550d425a719cb8296dd8df4484a1b6a2c6b5b140
https://github.com/llvm/llvm-project/commit/550d425a719cb8296dd8df4484a1b6a2c6b5b140
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/LiveInterval.cpp
Log Message:
-----------
[RegAlloc] Add printer and dump for VNInfo [nfc] (#160758)
Uses the existing format of the LiveRange printer, and just factors it
out so that you can do vni->dump() when debugging, or log a vni in a
debug print statement.
Commit: 9412769c1e03a928ba83ee24da084e26ca713dbf
https://github.com/llvm/llvm-project/commit/9412769c1e03a928ba83ee24da084e26ca713dbf
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/LiveRangeEdit.cpp
Log Message:
-----------
Revert "[RegAlloc] Strengthen asserts in LiveRangeEdit::scanRemattable [nfc]" (#160897)
Reverts llvm/llvm-project#160765. Failures on buildbot indicate second
assertion does not in fact hold.
Commit: 23473247c2aad142b8259ed70e569e932357c962
https://github.com/llvm/llvm-project/commit/23473247c2aad142b8259ed70e569e932357c962
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode][NFC] Use switches for pointer type distinction (#160879)
In the important places. They are all fully covered switch statements so
we know where to add code when adding a new pointer type.
Commit: 129394e3f2cfb7fbac7b71a968a38328c82e9c8d
https://github.com/llvm/llvm-project/commit/129394e3f2cfb7fbac7b71a968a38328c82e9c8d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-27 (Sat, 27 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/X86/atomic-bit-test.ll
Log Message:
-----------
Greedy: Make trySplitAroundHintReg try to match hints with subreg copies (#160294)
This is essentially the same patch as
116ca9522e89f1e4e02676b5bbe505e80c4d4933;
when trying to match a physreg hint, try to find a compatible physreg if
there is
a subregister copy. This has the slight difference of using getSubReg on
the hint
instead of getMatchingSuperReg (the other use should also use getSubReg
instead,
it's faster).
At the moment this turns out to have very little effect. The adjacent
code needs
better handling of subregisters, so continue adding this piecemeal. The
X86 test
shows a net reduction in real instructions, plus a few new kills.
Commit: 0e3c3165ea33043b8fa0457e535f50ca59312278
https://github.com/llvm/llvm-project/commit/0e3c3165ea33043b8fa0457e535f50ca59312278
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/Frontend/Utils.h
M clang/lib/Frontend/CompilerInstance.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ModuleDependencyCollector.h
M llvm/include/llvm/Support/FileCollector.h
M llvm/lib/Support/FileCollector.cpp
M llvm/tools/dsymutil/Reproducer.cpp
M llvm/unittests/Support/FileCollectorTest.cpp
Log Message:
-----------
[llvm][clang] Use the VFS in `FileCollector` (#160788)
This PR changes `llvm::FileCollector` to use the `llvm::vfs::FileSystem`
API for making file paths absolute instead of using
`llvm::sys::fs::make_absolute()` directly. This matches the behavior of
the compiler on most other input files.
Commit: 88324f1cabc89c841df6928bd1c79b1604194b22
https://github.com/llvm/llvm-project/commit/88324f1cabc89c841df6928bd1c79b1604194b22
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Simplify align_up/down implementation (#160880)
Fix a double assignment to a local variable and use the new
popToAPSInt() overload.
Commit: d636dc835826e063d9d1023ff8f56299e78c4d79
https://github.com/llvm/llvm-project/commit/d636dc835826e063d9d1023ff8f56299e78c4d79
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M libcxx/utils/compare-benchmarks
Log Message:
-----------
[libc++] Support comparison of more than two data sets in compare-benchmarks
Commit: 446b9dcfeb02f680277a6b84a7eee11fcf5fbbbc
https://github.com/llvm/llvm-project/commit/446b9dcfeb02f680277a6b84a7eee11fcf5fbbbc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Use initializer list (#160898)
Commit: e8e563be1fe54a22b69cbccedcd755b39eab37d4
https://github.com/llvm/llvm-project/commit/e8e563be1fe54a22b69cbccedcd755b39eab37d4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Reduce code duplication in SmallDenseMap (NFC) (#160813)
This patch reduces code duplication by having allocateBuckets take a
larger role. Specifically, allocateBuckets now checks to see if we
need to allocate heap memory and initializes Small appropriately.
With this patch, allocateBuckets mirrors deallocateBuckets cleanly.
Both methods handle the Small mode without asserting and are
responsible for constructing and destructing LargeRep.
Commit: 6598e313739adf20520c7b904c0cd44d136d1b69
https://github.com/llvm/llvm-project/commit/6598e313739adf20520c7b904c0cd44d136d1b69
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
Log Message:
-----------
[ADT] Refactor SmallPtrSetIterator (NFC) (#160814)
SmallPtrSetIterator and its base class SmallPtrSetIteratorImpl
collectively have the following responsibilities:
- type-safe user-facing iterator interface
- type-erased iterator increment/dereference core
- DebugEpochBase via inheritance
This patch refactors the two classes so that SmallPtrSetIteratorImpl
implements everything except the type-safe user-facing interface.
Benefits:
- DebugEpochBase::HandleBase is now part of the type-erased class.
- AdvanceIfNotValid is now private in SmallPtrSetIteratorImpl.
- SmallPtrSetIterator is a very thin wrapper around
SmallPtrSetIteratorImpl and should generate very little code on its
own.
Commit: 88ef27463e56de7b80df5679c90bf32b81b4e104
https://github.com/llvm/llvm-project/commit/88ef27463e56de7b80df5679c90bf32b81b4e104
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/StringTable.h
Log Message:
-----------
[ADT] Apply Rule of Five to StringTable::Iterator (#160815)
StringTable::Iterator has a user-defined copy assignment operator, a
defaulted copy constructor, and a defaulted move constructor.
This patch makes the copy assignment operator defaulted and adds a
defaulted move assignment operator to adhere to the Rule of Five while
making the operators constexpr.
Commit: 8f9385c6c9f17f81be08eac9d8f56de612ad184f
https://github.com/llvm/llvm-project/commit/8f9385c6c9f17f81be08eac9d8f56de612ad184f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/ProgramStack.h
Log Message:
-----------
[Support] Consolidate runOnNewStack (NFC) (#160816)
This patch consolidates two implementations of runOnNewStack with
"if constexpr".
Commit: 6d1c19bb1926fae44619a3531b2e0d0b1259cd25
https://github.com/llvm/llvm-project/commit/6d1c19bb1926fae44619a3531b2e0d0b1259cd25
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/docs/BugLifeCycle.rst
Log Message:
-----------
[llvm] Proofread BugLifeCycle.rst (#160817)
Commit: f026cb0909b380f87b748971576e0e30396c3342
https://github.com/llvm/llvm-project/commit/f026cb0909b380f87b748971576e0e30396c3342
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M bolt/lib/Target/AArch64/CMakeLists.txt
Log Message:
-----------
[BOLT][AArch64] Fix BUILD_SHARED_LIBS after #158738 (#160854)
Link BOLTUtils against the AArch64 target to support the new option
that enables instrumentation without LSE (see #158738)
This fixes shared library builds, eg:
https://lab.llvm.org/staging/#/builders/220/builds/1537
Note: the link points to a collapsing builder.
Commit: f8b79e68cf86016b2849dacf8eb16846557db231
https://github.com/llvm/llvm-project/commit/f8b79e68cf86016b2849dacf8eb16846557db231
Author: David Green <david.green at arm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
Log Message:
-----------
[ARM] Add extra mulh tests with known-bits. NFC
Commit: fc71b1ce242a1ae16c293422d14628e724fbc412
https://github.com/llvm/llvm-project/commit/fc71b1ce242a1ae16c293422d14628e724fbc412
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Support/DXILABI.cpp
Log Message:
-----------
[NFC][LLVM] Fix line endings for DXILABI.cpp (#160791)
Fix line ending to Unix style by running dos2unix on this file.
Commit: 8eb0ab708e03739ae840542ce95e8fa9ba3c623a
https://github.com/llvm/llvm-project/commit/8eb0ab708e03739ae840542ce95e8fa9ba3c623a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/SROA.h
M llvm/lib/Support/rpmalloc/rpmalloc.h
M llvm/lib/Support/rpmalloc/rpnew.h
Log Message:
-----------
[NFC][LLVM] Use Unix line endings for a few source files (#160794)
Commit: 2a72522c52bb1f58609b6f53e8304542cfd3eb34
https://github.com/llvm/llvm-project/commit/2a72522c52bb1f58609b6f53e8304542cfd3eb34
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/SMLoc.h
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[NFC][LLVM] Pass/return SMLoc by value instead of const reference (#160797)
SMLoc itself encapsulates just a pointer, so there is no need to pass or
return it by reference.
Commit: d2239fbf432ecf3df64966a421340aaa6b518d2c
https://github.com/llvm/llvm-project/commit/d2239fbf432ecf3df64966a421340aaa6b518d2c
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGAtomic.cpp
M clang/test/CodeGen/atomic-test-and-set.c
M clang/test/DebugInfo/KeyInstructions/atomic.c
Log Message:
-----------
[clang][CodeGen] Fix sub-optimal clang CodeGen for __atomic_test_and_set (#160098)
Clang CodeGen for `__atomic_test_and_set` would emit a `store`
instruction that stores an `i1` value:
```cpp
bool f(void *ptr) {
return __atomic_test_and_set(ptr, __ATOMIC_RELAXED);
}
```
```llvm
%1 = atomicrmw xchg ptr %0, i8 1 monotonic, align 1
%tobool = icmp ne i8 %1, 0
store i1 %tobool, ptr %atomic-temp, align 1
```
which could lead to suboptimal binary code, for example on x86_64:
```asm
f:
mov al, 1
xchg byte ptr [rdi], al
test al, al
setne al
setne byte ptr [rsp - 1]
ret
```
The last `setne` instruction is obviously redundant. This patch fixes
this issue by first zero-extending `%tobool` to an `i8` before the
store. This effectively eliminates the last `setne` instruction in the
binary code sequence. The `test` and `setne` on `al` is kept still,
though.
-----
I'm quite conservative about the codegen in this patch. Vanilla gcc
actually emits simpler code for `__atomic_test_and_set`:
```cpp
bool f(void *ptr) {
return __atomic_test_and_set(ptr, __ATOMIC_RELAXED);
}
```
```asm
f:
mov eax, 1
xchg al, BYTE PTR [rdi]
ret
```
It seems like gcc assumes `ptr` would always point to a valid `bool`
value as required by the ABI. I'm not sure if we should also make this
assumption.
Related to #121943 .
Commit: c06f35422d6b049ef6a6b1d7de07597845b841e6
https://github.com/llvm/llvm-project/commit/c06f35422d6b049ef6a6b1d7de07597845b841e6
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-appending-limits.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-limits-multiples.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-offset-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-register-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-mix.ll
Log Message:
-----------
[DirectX] Adding missing descriptor table validations (#153276)
This patch adds 2 small validation to DirectX backend. First, it checks
if registers in descriptor tables are not overflowing, meaning they
don't try to bind registers over the maximum allowed value, this is
checked both on the offset and on the number of descriptors inside the
range; second, it checks if samplers are being mixed with other resource
types.
Closes: #153057, #153058
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Co-authored-by: Joao Saffran <{ID}+{username}@users.noreply.github.com>
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 7d2f6fd177fcf79564e68c9999a38b5af9982cbb
https://github.com/llvm/llvm-project/commit/7d2f6fd177fcf79564e68c9999a38b5af9982cbb
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/lib/BinaryFormat/DXContainer.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Invalid-Version.ll
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
Log Message:
-----------
[DirectX] Updating DXContainer Yaml to represent Root Signature 1.2 (#159659)
This PR updates the YAML representation of DXContainer to support Root
Signature 1.2, this also requires updating the write logic to support
testing.
Commit: 3aaa58fd903b26831f986140acbfdac4e07d4f12
https://github.com/llvm/llvm-project/commit/3aaa58fd903b26831f986140acbfdac4e07d4f12
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/complex.c
Log Message:
-----------
[Clang] Fix Codegen UO real/imag crash on scalar with type promotion (#160609)
Fixing codegen crash when compiling real/imag unary operators on scalar
with type promotion
Ref: #160583
Commit: d6e20c42c1f916fa925f0b1c2c37f3098ada1686
https://github.com/llvm/llvm-project/commit/d6e20c42c1f916fa925f0b1c2c37f3098ada1686
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/IO.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/OpenMP/simd-only.mlir
Log Message:
-----------
[flang] Clean-up for fir.do_loop generation in lowering. (#160630)
This patch changes two things:
1. We do not need to use the loop counter's last value
for regular do-loops in Lowering.
2. The loop counter's increment is implied by fir.do_loop
operation, so there is no need to increment it explicitly.
The last point has been especially confusing to me, because it was
unclear why we have an explicit increment if it is implied.
It looks like CFGConversion somehow still makes the final code
correct, i.e. the counter is not incremented twice.
Anyway, the new lowering should look more concise.
Commit: e7dfa2c456ba68b41c9d1199dc87b1f756342af9
https://github.com/llvm/llvm-project/commit/e7dfa2c456ba68b41c9d1199dc87b1f756342af9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll
Log Message:
-----------
[X86] shuffle-strided-with-offset-512.ll - add missing prefixes (#160921)
Commit: 12b74111b24d8ed511a382a913cda706128c8336
https://github.com/llvm/llvm-project/commit/12b74111b24d8ed511a382a913cda706128c8336
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrAltivec.td
M llvm/lib/Target/PowerPC/PPCInstrHTM.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
Log Message:
-----------
[NFC][PowerPC] Consolidate predicate definitions into PPC.td (#160579)
Consolidate predicate definitions into top level entry point for PowerPC
target `PPC.td` and
remove duplicate definitions for 32/64 bit sub-target checks.
Commit: 65d730b4a5aaea91493305dd32e27bc8e033a0ac
https://github.com/llvm/llvm-project/commit/65d730b4a5aaea91493305dd32e27bc8e033a0ac
Author: Maksim Sabianin <maksim.sabianin at intel.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/Frontend/Offloading/OffloadWrapper.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/tools/llvm-offload-wrapper/llvm-offload-wrapper.cpp
Log Message:
-----------
[SYCL] Add offload wrapping for SYCL kind (#147508)
This patch adds an Offload Wrapper for the SYCL kind. This is an
essential step for SYCL offloading and the compilation flow. The usage
of offload wrapping is added to the clang-linker-wrapper tool.
Modifications:
Implemented `bundleSYCL()` function to handle SYCL image bundling.
Implemented `wrapSYCLBinaries()` function that is invoked from
clang-linker-wrapper.
SYCL Offload Wrapping uses specific data structures such as
`__sycl.tgt_device_image` and `__sycl.tgt_bin_desc`. Each SYCL image
maintains its own symbol table (unlike shared global tables in other
targets). Therefore, symbols are encoded explicitly during the offload
wrapping. Also, images refer to their own Offloading Entries arrays
unlike other targets.
The proposed `__sycl.tgt_device_image` uses Version 3 to differentiate
from images generated by Intel DPC++. The structure proposed in this
patch doesn't have fields deprecated in DPC++.
Commit: 4ff986af637f76117b5e70190f144fe7ce10533e
https://github.com/llvm/llvm-project/commit/4ff986af637f76117b5e70190f144fe7ce10533e
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/Object/DXContainer.h
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
A llvm/test/ObjectYAML/DXContainer/RootSignature-StaticSamplers1.3.yaml
M llvm/unittests/Object/DXContainerTest.cpp
Log Message:
-----------
[DirectX] Updating DXContainer logic to read version 1.2 of static samplers (#160184)
This PR is updating `Object/DXContainer.h` so that we can read data from
root signature version 1.2, which adds flags into static samplers.
Commit: 4bdf545c4d8771c2e69ebcf8ef809b6bc4f3de19
https://github.com/llvm/llvm-project/commit/4bdf545c4d8771c2e69ebcf8ef809b6bc4f3de19
Author: Aaron Puchert <aaron.puchert at sap.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ThrowKeywordMissingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/throw-keyword-missing.cpp
Log Message:
-----------
Add note for base class to bugprone-throw-keyword-missing (#160751)
It might not always be clear which base the check found that has
"exception" in its name. So we add a note to point to that class.
Ideally we'd point to the `CXXBaseSpecifier`, but it seems we can't bind
to that.
Commit: 0e35f56d40d3b4fe44fd69066ba94f54cb9b844a
https://github.com/llvm/llvm-project/commit/0e35f56d40d3b4fe44fd69066ba94f54cb9b844a
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/CMakeLists.txt
A clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
A clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][Dependency Scanning][NFC] Move `DependencyScanningAction` to its own header and source files (#160795)
This is the first of three PRs to land
https://github.com/llvm/llvm-project/pull/160207 in smaller pieces.
This PR is an NFC. It moves `DependencyScanningAction` to its own source
file, so we can later implement a `CompilerInstanceWithContext` in the
new file.
Part of work for rdar://136303612.
Commit: ff98e516136a2e4c77934c52e6c7cef65a9fadee
https://github.com/llvm/llvm-project/commit/ff98e516136a2e4c77934c52e6c7cef65a9fadee
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Tooling/DependencyScanning/BUILD.gn
Log Message:
-----------
[gn build] Port 0e35f56d40d3
Commit: 37282bcee10dc20d0469d014e566f42377f0c22c
https://github.com/llvm/llvm-project/commit/37282bcee10dc20d0469d014e566f42377f0c22c
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M clang/include/clang/CodeGen/BackendUtil.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[clang] Load `-fembed-offload-object=` through the VFS (#160906)
This PR loads the path from `-fembed-offload-object=<path>` through the
VFS rather than going straight to the real file system. This matches the
behavior of other input files of the compiler. This technically changes
behavior in that `-fembed-offload-object=-` no longer loads the file
from stdin, but I don't think that was the intention of the original
code anyways.
Commit: f7e8350f0bcbe46a046cbedfef1e6e56928ea87b
https://github.com/llvm/llvm-project/commit/f7e8350f0bcbe46a046cbedfef1e6e56928ea87b
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/test/builtins/Unit/fixunstfdi_test.c
M compiler-rt/test/builtins/Unit/multc3_test.c
Log Message:
-----------
Revert "[compiler-rt] Disable tests for unavailable builtins (#158664)"
This reverts commit e9e166e54354330c474457711a8e7a7ca2efd731,
and the follow-up fix 656707086e5f6fccd2eb57f5aaf987c328c0f4f1.
These changes unlocked tests to run on architectures where they
didn't run before, showing up as test failures like in
https://lab.llvm.org/buildbot/#/builders/66/builds/19787.
Commit: 9d7628de87823c6e0d536a71dbfaccd3280359dc
https://github.com/llvm/llvm-project/commit/9d7628de87823c6e0d536a71dbfaccd3280359dc
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/Intrinsics.cpp
M llvm/test/TableGen/intrinsic-struct.td
M llvm/test/TableGen/intrinsic-varargs.td
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
Log Message:
-----------
[Intrinsic] Unify IIT_STRUCT{2-9} into ITT_STRUCT to support upto 257 return values
- Currently, Intrinsic can only have up to 9 return values. In case new
intrinsics require more than 9 return values, additional ITT_STRUCTxxx
values need to be added to support > 9 return values. Instead, this
patch unifies them into a single IIT_STRUCT followed by a BYTE
specifying the minimal 2 (encoded as 0) and maximal 257 (encoded as
255) return values.
Commit: e28a5596966d586525e8719e5c58afc7cf48a5d9
https://github.com/llvm/llvm-project/commit/e28a5596966d586525e8719e5c58afc7cf48a5d9
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
A llvm/test/CodeGen/DirectX/rootsignature-validation-deny-no-binding.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-deny-multiple-shader.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-deny-root-descriptor.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-deny-single-shader.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-not-dening-shader.ll
Log Message:
-----------
[DirectX] Validating Root flags are denying shader stage (#160919)
Root Signature Flags, allow flags to block compilation of certain shader
stages. This PR implements a validation and notify the user if they
compile a root signature that is denying such shader stage.
Closes: https://github.com/llvm/llvm-project/issues/153062
Previously approved: https://github.com/llvm/llvm-project/pull/153287
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Co-authored-by: Joao Saffran <{ID}+{username}@users.noreply.github.com>
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: b427182c606edf787591298d15fe65d3348fe8f0
https://github.com/llvm/llvm-project/commit/b427182c606edf787591298d15fe65d3348fe8f0
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
A llvm/test/CodeGen/AMDGPU/uniform-alignbit.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] Ensure divergence for v_alignbit (#129159)
Selecting vgpr for the uniform version of this pattern may lead to
unnecessary vgpr and waterfall loops.
Commit: e9185af70a4898d050899aa83aa350e570459128
https://github.com/llvm/llvm-project/commit/e9185af70a4898d050899aa83aa350e570459128
Author: cmtice <cmtice at google.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M compiler-rt/test/fuzzer/fork-sigusr.test
M compiler-rt/test/fuzzer/sigint.test
M compiler-rt/test/fuzzer/sigusr.test
M compiler-rt/test/msan/allocator_mapping.cpp
M compiler-rt/test/nsan/Posix/allocator_mapping.cpp
Log Message:
-----------
[compiler-rt] Fix some tests to work with lit internal shell. (#160728)
This is part of our work to migrate lit tests to use internal shell by
default (performance improvements).
Commit: 1871808e1a5f8c6ea9518c9b73b990114d2e4052
https://github.com/llvm/llvm-project/commit/1871808e1a5f8c6ea9518c9b73b990114d2e4052
Author: Yuxuan Chen <ych at fb.com>
Date: 2025-09-26 (Fri, 26 Sep 2025)
Changed paths:
M .github/workflows/pr-code-lint.yml
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/GDBIndex.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/test/AArch64/constant-island-alignment.s
A bolt/test/AArch64/instrumentation_sequence.s
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-gdb-generated-gdb11.test
M bolt/test/X86/dwarf5-dwarf4-gdb-index-types-lld-generated.test
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A clang/test/CodeGenHLSL/builtins/isnan-overloads.hlsl
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M clang/test/DebugInfo/KeyInstructions/atomic.c
A clang/test/Driver/Inputs/basic_gpu_tree/bin/keep
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A clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
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A clang/test/SemaObjC/builtin-masked.m
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/offload-arch/CMakeLists.txt
A clang/tools/offload-arch/LevelZeroArch.cpp
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M compiler-rt/lib/asan/asan_interceptors_memintrinsics.cpp
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
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M compiler-rt/lib/msan/msan_linux.cpp
M compiler-rt/lib/scudo/standalone/primary64.h
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M flang/lib/Frontend/CompilerInvocation.cpp
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M flang/lib/Lower/Bridge.cpp
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M libcxx/test/std/numerics/c.math/isnormal.pass.cpp
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M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/Analysis/AssumptionCache.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/LiveRangeEdit.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVObject.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/Frontend/Offloading/OffloadWrapper.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Support/Alignment.h
M llvm/include/llvm/Support/AllocatorBase.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/FileCollector.h
M llvm/include/llvm/Support/PGOOptions.h
M llvm/include/llvm/Support/ProgramStack.h
M llvm/include/llvm/Support/SMLoc.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Transforms/Instrumentation/DataFlowSanitizer.h
M llvm/include/llvm/Transforms/Scalar/SROA.h
R llvm/include/llvm/Transforms/Vectorize/EVLIndVarSimplify.h
M llvm/lib/Analysis/AssumptionCache.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/BinaryFormat/DXContainer.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineStripDebug.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocScore.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/ARMWinEH.cpp
M llvm/lib/Support/BinaryStreamReader.cpp
M llvm/lib/Support/BinaryStreamWriter.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/DXILABI.cpp
M llvm/lib/Support/FileCollector.cpp
M llvm/lib/Support/Mustache.cpp
M llvm/lib/Support/PGOOptions.cpp
M llvm/lib/Support/TextEncoding.cpp
M llvm/lib/Support/YAMLParser.cpp
M llvm/lib/Support/rpmalloc/rpmalloc.h
M llvm/lib/Support/rpmalloc/rpnew.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/Mips/MipsExpandPseudo.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrAltivec.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrHTM.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrGISel.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/DropUnnecessaryAssumes.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Utils/ProfileVerify.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
R llvm/lib/Transforms/Vectorize/EVLIndVarSimplify.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Analysis/CostModel/AMDGPU/canonicalize.ll
M llvm/test/Analysis/CostModel/AMDGPU/fadd.ll
M llvm/test/Analysis/CostModel/AMDGPU/fma.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmul.ll
M llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/ScalarEvolution/trip-multiple-guard-info.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
A llvm/test/CodeGen/AArch64/arm64-cvt-simd-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/dp-3source.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
R llvm/test/CodeGen/AArch64/madd-lohi.ll
A llvm/test/CodeGen/AArch64/movi64_sve.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
A llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
R llvm/test/CodeGen/AMDGPU/gfx1250-scratch-scope-se.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
A llvm/test/CodeGen/AMDGPU/postra-machine-sink-livein-subrange.mir
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
A llvm/test/CodeGen/AMDGPU/s_uaddo_usubo_pseudo.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
M llvm/test/CodeGen/AMDGPU/udiv64.ll
A llvm/test/CodeGen/AMDGPU/uniform-alignbit.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll
M llvm/test/CodeGen/ARM/2012-04-10-DAGCombine.ll
M llvm/test/CodeGen/ARM/fadds.ll
M llvm/test/CodeGen/ARM/fmuls.ll
M llvm/test/CodeGen/ARM/fnegs.ll
M llvm/test/CodeGen/ARM/fnmscs.ll
M llvm/test/CodeGen/ARM/fnmul.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll
R llvm/test/CodeGen/ARM/fp16.ll
M llvm/test/CodeGen/ARM/fp_convert.ll
M llvm/test/CodeGen/ARM/fsubs.ll
M llvm/test/CodeGen/ARM/neon-spfp.ll
M llvm/test/CodeGen/ARM/sincos.ll
M llvm/test/CodeGen/ARM/vminmaxnm.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll
A llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Invalid-Version.ll
A llvm/test/CodeGen/DirectX/isnan.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-appending-limits.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-deny-no-binding.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-limits-multiples.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-appending-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-deny-multiple-shader.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-deny-root-descriptor.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-deny-single-shader.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-offset-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-register-overflow.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-mix.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-not-dening-shader.ll
A llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll
M llvm/test/CodeGen/LoongArch/lasx/bitreverse.ll
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
A llvm/test/CodeGen/LoongArch/lasx/extract-binop.ll
M llvm/test/CodeGen/LoongArch/lasx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lasx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-frecipe.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-frsqrte.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-max-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-min-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr-d-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr-d.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl-ins-gr2vr.ll
A llvm/test/CodeGen/LoongArch/lasx/intrinsic-replgr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-replgr2vr.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-set.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-setallnez.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-setanyeqz.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/adda.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-pair-elements.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvrepl128vei.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
M llvm/test/CodeGen/LoongArch/lasx/shuffle-as-permute-and-shuffle.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-add.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-and.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-or.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-smax.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-smin.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-umax.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-umin.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-reduce-xor.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
A llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll
M llvm/test/CodeGen/LoongArch/lsx/bitreverse.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
A llvm/test/CodeGen/LoongArch/lsx/extract-binop.ll
M llvm/test/CodeGen/LoongArch/lsx/fdiv-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt-reciprocal-estimate.ll
M llvm/test/CodeGen/LoongArch/lsx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-fcmp.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-frecipe.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-frsqrte.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-max-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-min-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr-d-invalid-imm.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr-d.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-pickve2gr.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-repl-ins-gr2vr.ll
A llvm/test/CodeGen/LoongArch/lsx/intrinsic-replgr2vr-d.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-replgr2vr.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-set.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-setallnez.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-setanyeqz.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/adda.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vreplvei.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf4i.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-add.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-and.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-or.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-smax.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-smin.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-umax.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-umin.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-reduce-xor.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-any-ext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-byte-shift.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
M llvm/test/CodeGen/Mips/atomic-min-max.ll
M llvm/test/CodeGen/NVPTX/combine-wide.ll
A llvm/test/CodeGen/NVPTX/machinelicm-no-preheader.mir
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/RISCV/GlobalISel/fpr-gpr-copy-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/SPARC/64abi.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/isnan.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
A llvm/test/CodeGen/WebAssembly/fake-use.ll
M llvm/test/CodeGen/X86/atomic-bit-test.ll
A llvm/test/CodeGen/X86/basic-block-sections-cfg.ll
M llvm/test/CodeGen/X86/basic-block-sections-clusters-error.ll
M llvm/test/CodeGen/X86/debug-loclists.ll
M llvm/test/CodeGen/X86/fadd-combines.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/X86/isel-llvm.set.rounding.ll
A llvm/test/CodeGen/X86/isel-set-invalid-rounding.ll
M llvm/test/CodeGen/X86/masked_store_trunc.ll
M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
M llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir
M llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll
M llvm/test/CodeGen/X86/usub_inc_iv.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
M llvm/test/DebugInfo/X86/convert-loclist.ll
M llvm/test/DebugInfo/X86/ranges_always_default.ll
M llvm/test/DebugInfo/X86/split-dwarf-v5-ranges.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
M llvm/test/MC/AMDGPU/gfx12_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopk_alias.s
M llvm/test/MC/AMDGPU/wave_any.s
A llvm/test/MC/AMDGPU/wavesize-feature-unsupported-target.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_wave64_feature.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopk.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx9_wave32_feature.txt
M llvm/test/MC/ELF/cfi-sframe-fre-cases.s
M llvm/test/MC/X86/encoder-fail.s
A llvm/test/ObjectYAML/DXContainer/RootSignature-StaticSamplers1.3.yaml
A llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/intrinsic-struct.td
M llvm/test/TableGen/intrinsic-varargs.td
A llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
M llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
M llvm/test/Transforms/DropUnnecessaryAssumes/basic.ll
A llvm/test/Transforms/Inline/dilocation-loop-metadata-update.ll
M llvm/test/Transforms/InstCombine/AMDGPU/ptr-replace-alloca.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/assume-align.ll
M llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll
M llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2i-d2i.ll
M llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2ll-d2ll.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
A llvm/test/Transforms/LoopFusion/da_separate_loops.ll
M llvm/test/Transforms/LoopFusion/simple.ll
A llvm/test/Transforms/LoopInterchange/bail-out-all-deps.ll
M llvm/test/Transforms/LoopInterchange/confused-dependence.ll
M llvm/test/Transforms/LoopInterchange/legality-for-scalar-deps.ll
M llvm/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll
M llvm/test/Transforms/LoopInterchange/unique-dep-matrix.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
A llvm/test/Transforms/LoopVectorize/AArch64/epilogue-vectorization-fix-scalar-resume-values.ll
M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-loop-backedge-elimination-epilogue.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
R llvm/test/Transforms/LoopVectorize/RISCV/evl-iv-simplify.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
A llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/recursive.ll
A llvm/test/Transforms/PGOProfile/chr-lifetimes.ll
A llvm/test/Transforms/PGOProfile/profcheck-synthetic.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
A llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll
M llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
M llvm/test/tools/llvm-cov/mcdc-export-json.test
M llvm/test/tools/llvm-debuginfo-analyzer/COFF/01-coff-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/01-dwarf-compare-logical-elements.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/01-dwarf-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/pr-57040-incorrect-function-compare.test
M llvm/test/tools/llvm-debuginfo-analyzer/WebAssembly/01-wasm-compare-logical-elements.test
A llvm/test/tools/llvm-dwarfdump/verify_stmt_seq.yaml
M llvm/test/tools/llvm-objdump/MachO/function-starts.test
A llvm/test/tools/llvm-tli-checker/ifuncs.yaml
M llvm/tools/dsymutil/Reproducer.cpp
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-offload-wrapper/llvm-offload-wrapper.cpp
M llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/unittests/ADT/BitVectorTest.cpp
M llvm/unittests/ADT/ImmutableSetTest.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
M llvm/unittests/Support/AlignmentTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Support/FileCollectorTest.cpp
M llvm/unittests/Support/MustacheTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Tooling/DependencyScanning/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/lit/tests/shtest-readfile-external.py
M llvm/utils/lit/tests/shtest-readfile.py
M llvm/utils/llvm-test-mustache-spec/llvm-test-mustache-spec.cpp
M mlir/docs/DefiningDialects/Operations.md
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/examples/standalone/python/StandaloneExtensionNanobind.cpp
M mlir/examples/standalone/python/StandaloneExtensionPybind11.cpp
M mlir/examples/standalone/test/CAPI/CMakeLists.txt
M mlir/examples/standalone/test/CAPI/standalone-capi-test.c
M mlir/examples/standalone/test/python/smoketest.py
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir-c/Rewrite.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/include/mlir/IR/Builders.h
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/GPU/Transforms/ParallelLoopMapper.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ConvertConv2DToImg2Col.cpp
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Shard/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/python/CMakeLists.txt
M mlir/test/CAPI/llvm.c
M mlir/test/CMakeLists.txt
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/GPU/mapping.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/Linalg/convert-conv2d-to-img2col.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
A mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
A mlir/test/Target/LLVMIR/global_float_array.mlir
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
A mlir/test/Transforms/remove-dead-values-call-segments.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/lib/Dialect/Linalg/TestDataLayoutPropagation.cpp
M mlir/test/lib/Dialect/Test/TestDialect.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/test/python/dialects/python_test.py
M mlir/test/python/integration/dialects/pdl.py
M mlir/tools/mlir-tblgen/EnumsGen.cpp
M mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
M mlir/unittests/Analysis/Presburger/MatrixTest.cpp
R offload/test/offloading/fortran/target-declare-mapper-parent-allocatable.f90
A offload/test/offloading/fortran/target-no-loop.f90
M openmp/device/src/Workshare.cpp
Log Message:
-----------
Merge branch 'main' into users/yuxuanchen1997/libcxx-is-clock
Compare: https://github.com/llvm/llvm-project/compare/3af9f2dced94...1871808e1a5f
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