[all-commits] [llvm/llvm-project] 68a253: [lldb][RISCV] Use uint64_t for emulating ADDI (#16...

[Ivan Tadeu Ferreira Antunes Filho via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 68a253da6498abe20b0e61e9dce488943aaf2c28
      https://github.com/llvm/llvm-project/commit/68a253da6498abe20b0e61e9dce488943aaf2c28
  Author: Ivan Tadeu Ferreira Antunes Filho <antunesi at google.com>
  Date:   2025-09-25 (Thu, 25 Sep 2025)

  Changed paths:
    M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp

  Log Message:
  -----------
  [lldb][RISCV] Use uint64_t for emulating ADDI (#160550)

In RISC-V, the same instruction is used for both signed and unsigned
additions.

Signed integer overflow is undefined behavior in C++, but signed integer
overflow is defined behavior when using ADDI in RISC-V.

As we are emulating the RISC-V behavior we should be using uint.


This fix the failure with ubsan introduced by #159842:
lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp:807:40:
runtime error: signed integer overflow: -9223372036854775808 + -16
cannot be represented in type 'int64_t' (aka 'long')



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