[all-commits] [llvm/llvm-project] 25c0da: [NVPTX] Fix NaN + overflow semantics of f2ll/d2i (...

[Lewis Crawford via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 25c0da8b0d004b7b32061691dbac81e854d1f6dd
      https://github.com/llvm/llvm-project/commit/25c0da8b0d004b7b32061691dbac81e854d1f6dd
  Author: Lewis Crawford <lcrawford at nvidia.com>
  Date:   2025-09-25 (Thu, 25 Sep 2025)

  Changed paths:
    M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
    M llvm/lib/Analysis/ConstantFolding.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
    M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
    M llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2i-d2i.ll
    M llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2ll-d2ll.ll

  Log Message:
  -----------
  [NVPTX] Fix NaN + overflow semantics of f2ll/d2i (#159530)

Fix the NaN-handling semantics of various NVVM intrinsics converting
from fp types to integer types.

Previously in ConstantFolding, NaN inputs would be constant-folded to 0.
However, v9.0 of the PTX spec states that:

In float-to-integer conversions, depending upon conversion types, NaN
input results in following value:
 * Zero if source is not `.f64` and destination is not `.s64`, .`u64`.
* Otherwise `1 << (BitWidth(dst) - 1)` corresponding to the value of
`(MAXINT >> 1) + 1` for unsigned type or `MININT` for signed type.

Also, support for constant-folding +/-Inf and values which
overflow/underflow the integer output type has been added (they clamp to
min/max int).

Because of this NaN-handling semantic difference, we also need to
disable transforming several intrinsics to FPToSI/FPToUI, as the LLVM
intstruction will return poison, but the intrinsics have defined
behaviour for these edge-cases like NaN/Inf/overflow.



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