[all-commits] [llvm/llvm-project] d34f73: [RISCV] Add MC layer support for Andes XAndesVSInt...

[Rux124 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d34f738562d824c237ec35cfff3ec34f57ba41b0
      https://github.com/llvm/llvm-project/commit/d34f738562d824c237ec35cfff3ec34f57ba41b0
  Author: Rux124 <jhlee755 at andestech.com>
  Date:   2025-09-23 (Tue, 23 Sep 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M clang/test/Preprocessor/riscv-target-features-andes.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
    M llvm/test/CodeGen/RISCV/attributes-andes.ll
    M llvm/test/CodeGen/RISCV/features-info.ll
    A llvm/test/MC/RISCV/xandesvsinth-valid.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Add MC layer support for Andes XAndesVSIntH extension. (#159514)

Add MC layer support for Andes XAndesVSIntH extension. The spec is
available at:
https://github.com/andestech/andes-v5-isa/releases/tag/ast-v5_4_0-release



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