[all-commits] [llvm/llvm-project] f74184: [MemProf] Add NodeId field to ContextNode for debu...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Fri Sep 19 15:05:34 PDT 2025
Branch: refs/heads/users/boomanaiden154/main.clang-rewrite-tests-using-subshells-to-set-env-variables
Home: https://github.com/llvm/llvm-project
Commit: f74184ccc9053268a5baba129fcfde554cf0d255
https://github.com/llvm/llvm-project/commit/f74184ccc9053268a5baba129fcfde554cf0d255
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-09-15 (Mon, 15 Sep 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/ThinLTO/X86/memprof-indirectcall.ll
M llvm/test/ThinLTO/X86/memprof-inlined.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/dot.ll
M llvm/test/Transforms/MemProfContextDisambiguation/duplicate-context-ids.ll
M llvm/test/Transforms/MemProfContextDisambiguation/indirectcall.ll
M llvm/test/Transforms/MemProfContextDisambiguation/inlined.ll
M llvm/test/Transforms/MemProfContextDisambiguation/tailcall-nonunique.ll
Log Message:
-----------
[MemProf] Add NodeId field to ContextNode for debugging (#158736)
This has been handy locally for debugging cloning issues. The NodeIds
are assigned sequentially on creation and included in the dumps and the
dot graphs.
No measurable memory increase was found for a large thin link.
I only changed one test
(Transforms/MemProfContextDisambiguation/basic.ll)
to actually check the emitted NodeIds, most ignore them.
Commit: e5bbaa9c8fb6e06dbcbd39404039cc5d31df4410
https://github.com/llvm/llvm-project/commit/e5bbaa9c8fb6e06dbcbd39404039cc5d31df4410
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/test/CodeGen/PowerPC/i64_fp.ll
Log Message:
-----------
PPC: Split 64bit target feature into 64bit and 64bit-support (#157206)
This was being used for 2 different purposes.
The TargetMachine constructor prepends +64bit based on isPPC64
triples as a mode switch. The same feature name was also explicitly
added to different processors, making it impossible to perform a pure
feature check for whether 64-bit mode is enabled ir not. i.e.,
checkFeatures("+64bit") would be true even for ppc32 triples.
The comment in tablegen suggests it's relevant to track which processors
support 64-bit mode independently of whether that's the active compile
target, so replace that with a new feature.
Commit: 1dc84648a8831fb5d065d762c26aaa685a76f782
https://github.com/llvm/llvm-project/commit/1dc84648a8831fb5d065d762c26aaa685a76f782
Author: Qi Zhao <zhaoqi01 at loongson.cn>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for vector type `nor`
Commit: 0d927752f3f0391ee6c6444796262255963a06d9
https://github.com/llvm/llvm-project/commit/0d927752f3f0391ee6c6444796262255963a06d9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-15 (Mon, 15 Sep 2025)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
Log Message:
-----------
[RISCV] Use X_X0 instead of literal 0. NFC (#158753)
Commit: e2040f5ba3c4f54599776e6f4118881c501bf1f8
https://github.com/llvm/llvm-project/commit/e2040f5ba3c4f54599776e6f4118881c501bf1f8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-15 (Mon, 15 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
Log Message:
-----------
[RISCV][GISel] Remove shouldBeInFConstantPool. Always convert G_FCONSTANT to G_CONSTANT without F/D. (#158717)
We can unconditionally convert to G_CONSTANT. G_CONSTANT will go through
its own legalization and call the integer shouldBeInConstantPool.
Commit: c72bd381fca75b3284fd7a45eb125c3c3181b9bb
https://github.com/llvm/llvm-project/commit/c72bd381fca75b3284fd7a45eb125c3c3181b9bb
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-15 (Mon, 15 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[NFC][DecoderEmitter] Remove unused `emitPredicateMatchAux` (#158771)
Commit: 28373708280a52ecd3181591f7c3935ffceafbcc
https://github.com/llvm/llvm-project/commit/28373708280a52ecd3181591f7c3935ffceafbcc
Author: capitan-davide <dcunial at proton.me>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/ClangTidyOptions.cpp
M clang-tools-extra/clang-tidy/modernize/UseEqualsDefaultCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Fix a couple of suspicious StringRef::data() usages (#158480)
Closes https://github.com/llvm/llvm-project/issues/156150
Updates a couple of clang-tidy checks to use C++17 `std::string` member
functions that accepts a `StringViewLike` template parameter.
Commit: 14f2531894edd7f13ebf22891055c0ae1e1df451
https://github.com/llvm/llvm-project/commit/14f2531894edd7f13ebf22891055c0ae1e1df451
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
M llvm/test/CodeGen/X86/apx/ndd-false-deps-asm.mir
M llvm/test/CodeGen/X86/apx/shl.ll
M llvm/test/CodeGen/X86/apx/sub.ll
Log Message:
-----------
[X86][APX] Compress non-redundant NDD ADD to LEA (#158254)
Commit: 64dba812a3a8fc86b4ddbf34ad5bc5b5329cfca8
https://github.com/llvm/llvm-project/commit/64dba812a3a8fc86b4ddbf34ad5bc5b5329cfca8
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Add a few DecoderTableInfo helpers (NFC) (#158776)
Commit: ea9acc97f1fa8b430c74237968d06b2e60b0ccb1
https://github.com/llvm/llvm-project/commit/ea9acc97f1fa8b430c74237968d06b2e60b0ccb1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
CodeGen: Surface shouldRewriteCopySrc utility function (#158524)
Change shouldRewriteCopySrc to return the common register
class and expose it as a utility function. I've found myself
reproducing essentially the same logic in multiple places. The
purpose of this function is to jsut work through the API constraints
of which combination of register class and subreg indexes you have.
i.e. you need to use a different function if you have 0, 1, or 2
subregister indexes involved in a pair of copy-like operations.
Commit: c8b5b6e0a61a66a0a09798fdc6c91340a0718f0d
https://github.com/llvm/llvm-project/commit/c8b5b6e0a61a66a0a09798fdc6c91340a0718f0d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/constant-builtins-vector.cpp
Log Message:
-----------
[clang][ExprConst] Reject unary vector shuffles (#158589)
This is not implemented at compile time and asserts in assertion builds,
so reject it here.
Fixed the coding style in `BuiltinShuffleVector` at the same time.
Fixes #158471
Commit: bc44ff200b8abe7a10bbc3d7f70d0c54a8c27fa4
https://github.com/llvm/llvm-project/commit/bc44ff200b8abe7a10bbc3d7f70d0c54a8c27fa4
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sadd-sat.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/ssub-sat.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/uadd-sat.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/usub-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sadd-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/ssub-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uadd-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/usub-sat.ll
Log Message:
-----------
[LoongArch] Make {sadd,ssub,uadd,usub}.sat legal for lsx/lasx (#158209)
Commit: 85d2a4670cbbd9b98cfb8952ae4d4c932f8ebfd1
https://github.com/llvm/llvm-project/commit/85d2a4670cbbd9b98cfb8952ae4d4c932f8ebfd1
Author: Tom <41913303+t-a-james at users.noreply.github.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/DerivedMethodShadowingBaseMethodCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/DerivedMethodShadowingBaseMethodCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/derived-method-shadowing-base-method.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/derived-method-shadowing-base-method.cpp
Log Message:
-----------
[clang-tidy] New bugprone-derived-method-shadowing-base-method (#154746)
This PR introduces a new bugprone check to find methods in derived
classes that hide methods with the same signature in base classes.
The best description of what this new check does is the unit test code
in
`clang-tools-extra/test/clang-tidy/checkers/bugprone/derived-method-shadowing-base-method.cpp`.
---------
Co-authored-by: Tom James <tom.james at siemens.com>
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: 008f9f30bc91bad94686540508805a219589684c
https://github.com/llvm/llvm-project/commit/008f9f30bc91bad94686540508805a219589684c
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Turn some methods into static functions (NFC) (#158789)
DecoderTableBuilder will be removed. Move out the class the methods that
will remain.
Commit: 5bf399ba957e015e510210e0354cdc72ea1bf88d
https://github.com/llvm/llvm-project/commit/5bf399ba957e015e510210e0354cdc72ea1bf88d
Author: Petr Hosek <phosek at google.com>
Date: 2025-09-15 (Mon, 15 Sep 2025)
Changed paths:
M libc/startup/baremetal/fini.h
M libc/startup/baremetal/init.h
Log Message:
-----------
[libc] Move preinit/init/fini arrays to namespace (#158746)
In change #146863 we moved definitions of preinit/init/fini arrays to
header but unintentionally moved outside of the namespace. Since the
namespace also controls the visibility (through LIBC_NAMESPACE_DECL), as
a consequence these symbols no longer have the hidden visibility which
changes the codegen from:
```
4: 4c11 ldr r4, [pc, #0x44] @ 0x4c <__libc_init_array+0x4c>
6: 4812 ldr r0, [pc, #0x48] @ 0x50 <__libc_init_array+0x50>
8: 447c add r4, pc
a: 4478 add r0, pc
c: 1b00 subs r0, r0, r4
```
to:
```
4: 4813 ldr r0, [pc, #0x4c] @ 0x54 <__libc_init_array+0x54>
6: 4914 ldr r1, [pc, #0x50] @ 0x58 <__libc_init_array+0x58>
8: 4478 add r0, pc
a: 4479 add r1, pc
c: 6804 ldr r4, [r0]
e: 6808 ldr r0, [r1]
10: 1b00 subs r0, r0, r4
```
The `ldr` will trigger a fault in case where these symbols aren't
pointing to a valid memory location which is sometimes the case when the
array is empty.
Commit: 5b7f92863a44a58e5ffab694a8e6733d9519b976
https://github.com/llvm/llvm-project/commit/5b7f92863a44a58e5ffab694a8e6733d9519b976
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/aarch64-ptrauth.c
Log Message:
-----------
[PAC][clang] Add new features to pauthtest ABI (#113150)
Enable init/fini address discrimination, type info vtable pointer
discrimination and AArch64 jump table hardening as part of pauthtest ABI.
Commit: 1dd94a23587b35ff5316a53fe7228c3fbe345c42
https://github.com/llvm/llvm-project/commit/1dd94a23587b35ff5316a53fe7228c3fbe345c42
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/rv32xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
Log Message:
-----------
[RISCV] Add helper method for shift-and-add extensions (#158638)
Not an NFC, as it improves consistency, enabling some cases
for XAndesPerf and XTheadBa.
Commit: 20b861028bc54513d76b39ca4f396b49231683fd
https://github.com/llvm/llvm-project/commit/20b861028bc54513d76b39ca4f396b49231683fd
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/CXX/drs/cwg30xx.cpp
M clang/www/cxx_dr_status.html
M clang/www/make_cxx_dr_status
Log Message:
-----------
[clang][NFC] Update C++ DR status page
Proposed resolution for CWG3005 underwent cosmetic word reshuffling on 2025-09-12, so no changes to the test are needed.
Commit: 5c71710543b66a6c187d543785860307a2e483c5
https://github.com/llvm/llvm-project/commit/5c71710543b66a6c187d543785860307a2e483c5
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port 85d2a4670cbb
Commit: 63dc07f7d5b3da816afcf9c234e117c2780e71ed
https://github.com/llvm/llvm-project/commit/63dc07f7d5b3da816afcf9c234e117c2780e71ed
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
Log Message:
-----------
[libclang/python] Fix numResults field type of CCRStructure (#158598)
Fix the type of the `numResults` field of `CCRStructure`, as pointed out
here:
https://github.com/llvm/llvm-project/pull/140539#discussion_r2317808734
Commit: 7af659d0f117802627fc47f73ca5dd20439c5d7b
https://github.com/llvm/llvm-project/commit/7af659d0f117802627fc47f73ca5dd20439c5d7b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Don't perform implication checks with many predicates (#158652)
When adding a new predicate to a union, we currently do a bidirectional
implication for all the contained predicates. This means that the number
of implication checks is quadratic in the number of total predicates (if
they don't end up being eliminated).
Fix this by not checking for implication if the number of predicates
grows too large. The expectation is that if there is a large number of
predicates, we should be discarding them later anyway, as expanding them
would be too expensive.
Fixes https://github.com/llvm/llvm-project/issues/156114.
Commit: 67c335c66395d15841cd540e0e8cb04e9efb666b
https://github.com/llvm/llvm-project/commit/67c335c66395d15841cd540e0e8cb04e9efb666b
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
A flang/test/Transforms/DoConcurrent/allocatable.f90
A flang/test/Transforms/DoConcurrent/host_eval.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
A flang/test/Transforms/DoConcurrent/map_shape_info.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
A flang/test/Transforms/DoConcurrent/non_reference_to_device.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
A flang/test/Transforms/DoConcurrent/runtime_sized_array.f90
A flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
Log Message:
-----------
[NFC][flang][OpenMP] `do concurrent` to device mapping lit tests (#155992)
Adds more lit tests for `do concurrent` device mapping.
PR stack:
- https://github.com/llvm/llvm-project/pull/155754
- https://github.com/llvm/llvm-project/pull/155987
- https://github.com/llvm/llvm-project/pull/155992 ◀️
- https://github.com/llvm/llvm-project/pull/155993
- https://github.com/llvm/llvm-project/pull/157638
- https://github.com/llvm/llvm-project/pull/156610
- https://github.com/llvm/llvm-project/pull/156837
Commit: 5169bb4c812c1006f4ecfa4bded7aa92d35e3b72
https://github.com/llvm/llvm-project/commit/5169bb4c812c1006f4ecfa4bded7aa92d35e3b72
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/Headers/avx2intrin.h
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/tmmintrin.h
M clang/lib/Headers/xmmintrin.h
M clang/test/CodeGen/X86/sse.c
Log Message:
-----------
[clang][x86] Change SLLDQ/SRLDQ byte shift intrinsics to use vXi8 types instead of vXi64 (#158671)
As noted on #156494 and #157403 - its much easier to work with the byte
shift intrinsics if we treat them as vXi8 types instead of vXi64 types
which will require bitcasting
We already do this for the PALIGNR intrinsics which are a more advanced
version of the same shuffle
Commit: 7ba702195136b448d6f35ae3ea4075059cb0df82
https://github.com/llvm/llvm-project/commit/7ba702195136b448d6f35ae3ea4075059cb0df82
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8-literal16.txt
Log Message:
-----------
[AMDGPU][MC] Keep MCOperands unencoded. (#158685)
We have proper encoding facilities to encode operands and instructions;
there's no need to pollute the MC representation with encoding details.
Supposed to be an NFCI, but happens to fix some re-encoded instruction
codes in disassembler tests.
The 64-bit operands are to be addressed in following patches introducing
MC-level representation for lit() and lit64() modifiers, to then be
respected by both the assembler and disassembler.
Commit: 29c55d0f7bb993668243efad0dbbc3fc1a9a5d2a
https://github.com/llvm/llvm-project/commit/29c55d0f7bb993668243efad0dbbc3fc1a9a5d2a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Improve error detection in BitCastPrim op (#158575)
Reject bitcasts to pointer types unless it's to `nullptr_t` and always
reject bitcasts to member pointer types.
Fixes #156174
Commit: 788a25a0f71bfa5e5e1c12ad093993b115d10e7a
https://github.com/llvm/llvm-project/commit/788a25a0f71bfa5e5e1c12ad093993b115d10e7a
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
Log Message:
-----------
[AArch64] Break up `AArch64FrameLowering::emitEpilogue` (NFCI) (#157889)
This is much smaller than #157485 (as the epilogue code was already a
reasonable size); however, this change will allow some further tidy up
of methods shared between the prologue and epilogue code (in a follow-up
patch).
Commit: 0002960d85736c37ac18b31b8cc590be924e20e1
https://github.com/llvm/llvm-project/commit/0002960d85736c37ac18b31b8cc590be924e20e1
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/test/Lower/HLFIR/actual_target_for_dummy_pointer.f90
A flang/test/Lower/call-character-array-to-polymorphic-pointer.f90
Log Message:
-----------
[flang] fix passing characters to polymorphic array pointers (#157813)
The existing code failed to detect character array as being character
because of the extra fir.array type indirection. Use
`fir::getFortranElementType` for a more generic type handling.
Fixes #150749.
Commit: 2a296bac684045452ac33fef0de522f44d57d0bc
https://github.com/llvm/llvm-project/commit/2a296bac684045452ac33fef0de522f44d57d0bc
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
A flang/test/Lower/OpenACC/acc-firstprivate-derived-pointer-component.f90
A flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
A flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
Log Message:
-----------
[flang][openacc] implement firstprivate of scalar derived type (#158636)
Commit: dd29fbd7e59bbc6c537f8e827634ea7e206a3d73
https://github.com/llvm/llvm-project/commit/dd29fbd7e59bbc6c537f8e827634ea7e206a3d73
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FortranVariableInterface.cpp
Log Message:
-----------
[flang] fix some FIR verifiers that did not return expected failure (#158686)
Some `return` were missing before `emitOpError`, leading the compiler to
print an error and continue, leading to the same error to be raised
again and again at each verifier pass without a proper abort.
Commit: 27d730b5dbde03d9b9c1074092e94d025c70099f
https://github.com/llvm/llvm-project/commit/27d730b5dbde03d9b9c1074092e94d025c70099f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpState.h
Log Message:
-----------
[clang][bytecode] Create InterpState allocator on demand (#158802)
We often don't need it (especially in C), so make this optional and
create it only when we first allocate something.
Commit: e6526cf778d0c0bfe0de44bc2a89e96bcbeb1551
https://github.com/llvm/llvm-project/commit/e6526cf778d0c0bfe0de44bc2a89e96bcbeb1551
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
Log Message:
-----------
[AArch64][SME] Reuse ZT0 spill slot (#158593)
Previously, we'd allocate a new spill slot each time we needed to spill
ZT0, which grows the stack size for each spill. Saving the spill slot in
FuncInfo will also allow us to reload the spill on entry to exception
handlers.
Commit: bc931a596b67a01763ccfffdcae688bb2f54e2d6
https://github.com/llvm/llvm-project/commit/bc931a596b67a01763ccfffdcae688bb2f54e2d6
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/test/Target/SPIRV/module.mlir
Log Message:
-----------
[mlir][spirv] Update spirv validation for module.mlir (#158678)
This is to check that the new `spirv-val` behaviour works correctly.
Subsequent PRs will add validation to other target tests. This requires
the most recent SPIRV-Tools to work; for existing build directories
using bundled SPIR-V tools, running `SPIRVTools-update` cmake target
should update them accordingly.
The minimum required SPIRV-Tools version is commit
`14d42009a9435c34ea55b26cc8d92240c428a052`, merged in
https://github.com/KhronosGroup/SPIRV-Tools/pull/6292
Commit: 72aa9467627e3a19794a65a11a829640bf56a0c5
https://github.com/llvm/llvm-project/commit/72aa9467627e3a19794a65a11a829640bf56a0c5
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/regcoalesce-64-bit-only-regs.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
[AMDGPU] Drop high 32 bits of aperture registers (#158725)
Fixes: SWDEV-551181
Commit: 82830e8b05e3f41a528d9338c9c93b9aff82729c
https://github.com/llvm/llvm-project/commit/82830e8b05e3f41a528d9338c9c93b9aff82729c
Author: Nathan Gauër <brioche at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/cmake/modules/CMakeLists.txt
Log Message:
-----------
Revert "[clang] fix clang_cmake_builddir" (#158684)
Reverts llvm/llvm-project#155844
Romaric is OOO for the next 2 weeks and I don't have the context on the
other part (clspv) to propose a fix forward.
Reverting for now.
Commit: b9f84bce6797d846b065827e8acd5c8b41631e75
https://github.com/llvm/llvm-project/commit/b9f84bce6797d846b065827e8acd5c8b41631e75
Author: Roger Ferrer Ibáñez <rofirrim at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/AST/StmtOpenMP.h
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
Log Message:
-----------
[Clang][OpenMP] Add an additional class to hold data that will be shared between all loop transformations (#155849)
This is preparatory work for the implementation of `#pragma omp fuse` in
https://github.com/llvm/llvm-project/pull/139293
**Note**: this change builds on top of
https://github.com/llvm/llvm-project/pull/155848
This change adds an additional class to hold data that will be shared
between all loop transformations: those that apply to canonical loop
nests (the majority) and those that apply to canonical loop sequences
(`fuse` in OpenMP 6.0).
This class is not a statement by itself and its goal is to avoid having
to replicate information between classes.
Also simplfiy the way we handle the "generated loops" information as we
currently only need to know if it is zero or non-zero.
Commit: 76efbc068a6ab6ffa10b801df07155a6a69530e7
https://github.com/llvm/llvm-project/commit/76efbc068a6ab6ffa10b801df07155a6a69530e7
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
Log Message:
-----------
[AMDGPU] Fix codegen to emit COPY instead of S_MOV_B64 for aperture regs (#158754)
Commit: f5022bd03e7beab522ab3684228d531ef5c0789a
https://github.com/llvm/llvm-project/commit/f5022bd03e7beab522ab3684228d531ef5c0789a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
Log Message:
-----------
[lldb][test] import-std-module: skip vector tests
This unblocks https://github.com/llvm/llvm-project/pull/158606. The tests are failing because libc++ is now using lambdas in function bodies in the vector header. Ever since https://github.com/llvm/llvm-project/issues/149477 we bail out of importing types when we encounter lambdas. Until we fix ASTImport of `clang::LambdaExpr` nodes properly, this will need to be skipped.
Commit: 10be515f1e000e6fb69f546e3a79537a617def24
https://github.com/llvm/llvm-project/commit/10be515f1e000e6fb69f546e3a79537a617def24
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpState.h
Log Message:
-----------
[clang][bytecode][NFC] InterpState: get ASTContext from interp::Context (#158852)
Access the Parent state one less time.
Commit: a1a7361e1c22fc176c0b5c89b22907c1a3c1d28f
https://github.com/llvm/llvm-project/commit/a1a7361e1c22fc176c0b5c89b22907c1a3c1d28f
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M flang/test/Transforms/DoConcurrent/host_eval.f90
Log Message:
-----------
[flang][OpenMP] Fix failure reported on #155992 (#158813)
Adds a requirement on a test to run only when amd gpu is a registered
target. We need to do this since the test uses `-triple
amdgcn-amd-amdhsa` when invoking flang.
Commit: fbb587c65653395dc97a360e0cd0d1cf9ed0e875
https://github.com/llvm/llvm-project/commit/fbb587c65653395dc97a360e0cd0d1cf9ed0e875
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[clang][docs] Fix formatting of structor_decl_linkage_names DocBrief
The backticks weren't highlighting correctly.
Commit: a0a82ee19d6f2ff1013407ba4c973bfe5428423f
https://github.com/llvm/llvm-project/commit/a0a82ee19d6f2ff1013407ba4c973bfe5428423f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
Log Message:
-----------
[lldb][lldb-dap] Disable more DAP tests on Windows (#158906)
Flakey on Windows on Arm:
https://lab.llvm.org/buildbot/#/builders/141/builds/11540
See #137660
Commit: 6ae9fcd68b8c32323fe8ed1605e4bcbdf13f6724
https://github.com/llvm/llvm-project/commit/6ae9fcd68b8c32323fe8ed1605e4bcbdf13f6724
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
A clang/test/Driver/DTLTO/ps5-dtlto.c
Log Message:
-----------
[PS5] Enable support for DTLTO in the PS5 Clang driver (#158041)
DTLTO support was added for most targets via the shared `addLTOOptions`
helper. The PS5 driver does not call that helper, so it did not inherit
the feature. Implement the equivalent DTLTO handling in the PS5 driver.
Unlike other drivers, we add LTO-related options unconditionally. This
makes sense because the linker decides whether to perform LTO based on
input file types, not the presence of `-flto` on the compiler command
line. Other drivers only add these options when `-flto` is specified.
Internal-Ref: TOOLCHAIN-19896
Commit: 46fcece2a8015980fa51bece0d87311af10da553
https://github.com/llvm/llvm-project/commit/46fcece2a8015980fa51bece0d87311af10da553
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_load.ll
A llvm/test/Transforms/LoopVectorize/cse-gep-source-element-type.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
Log Message:
-----------
[VPlan] Extend CSE to eliminate GEPs (#156699)
The motivation for this patch is to close the gap between the
VPlan-based CSE and the legacy CSE, to make it easier to remove the
legacy CSE. Before this patch, stubbing out the legacy CSE leads to 22
test failures, and after this patch, there are only 12 failures, and all
of them seem to have a single root cause:
VPlanTransforms::createInterleaveGroups() and
VPInterleaveGroup::execute(). The improvements from this patch are of
course welcome.
While developing the patch, a miscompile was found when GEP
source-element-types differ, and this has been fixed.
Co-authored-by: Florian Hahn <flo at fhahn.com>
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 3a5cc953dce0e142e935335a4cdbc5821ddf6d11
https://github.com/llvm/llvm-project/commit/3a5cc953dce0e142e935335a4cdbc5821ddf6d11
Author: YixingZhang007 <yixing.zhang at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
Log Message:
-----------
[SPIRV] Add FPEncoding operand support for OpTypeFloat (#156871)
This PR introduces support for `FPEncoding` operand for SPIR-V
instruction `OpTypeFloat`, with the following main changes:
1. Introduces `FPEncoding` enum class to represent floating-point
encodings, such as `BFloat16KHR`, in SPIR-V.
2. Updates SPIR-V instruction `OpTypeFloat` to accept `FPEncoding` as
its second input operand.
3. Updates SPIR-V type creation to handle new encoding requirements.
This PR enables support for the BFloat floating-point type in SPIR-V.
Commit: 3946c5061d708b1e7604db63e9b604cb0fce7dd6
https://github.com/llvm/llvm-project/commit/3946c5061d708b1e7604db63e9b604cb0fce7dd6
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/DebugInfoMetadata.h
A llvm/include/llvm/Transforms/Utils/DebugSSAUpdater.h
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
M llvm/unittests/Transforms/Utils/CMakeLists.txt
A llvm/unittests/Transforms/Utils/DebugSSAUpdaterTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
Add DebugSSAUpdater class to track debug value liveness (#135349)
This patch adds a class that uses SSA construction, with debug values as
definitions, to determine whether and which debug values for a
particular variable are live at each point in an IR function. This will
be used by the IR reader of llvm-debuginfo-analyzer to compute variable
ranges and coverage, although it may be applicable to other debug info
IR analyses.
Commit: eb624dc758f0cacb9be306de2d347235c66e6910
https://github.com/llvm/llvm-project/commit/eb624dc758f0cacb9be306de2d347235c66e6910
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port 3946c5061d70
Commit: 7936b6f1133516c427c478104606d9276da6f81b
https://github.com/llvm/llvm-project/commit/7936b6f1133516c427c478104606d9276da6f81b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
[MLIR] Turn `RemarkFormat` into an enum class (NFC) (#158733)
This is fixing a gcc warning and aligning with the other enums in the
file.
Commit: c6c60e1ec2c83bb12107160a90f31b6eeafbf7bf
https://github.com/llvm/llvm-project/commit/c6c60e1ec2c83bb12107160a90f31b6eeafbf7bf
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/combine-storetomstore.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-vector-match-sve2.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-stores.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
Log Message:
-----------
[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)
Add the following fold AArch64 DAGCombine:
Fold setcc_merge_zero(
pred, insert_subvector(undef, signext_inreg(vNi1), 0),
!= splat(0))
-> setcc_merge_zero(pred, insert_subvector(undef, shl(vNi1), 0),
!= splat(0))
as the comparison (!= 0) depends only on bit 0 of the input, the left
shift is sufficient.
Commit: aa1a6948467362a97f2bf10772a491938b20534c
https://github.com/llvm/llvm-project/commit/aa1a6948467362a97f2bf10772a491938b20534c
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-splat-vector.ll
Log Message:
-----------
[LLVM][GlobalISel] Make CSEMIRBuilder::buildConstant scalable vector aware. (#158299)
Commit: 8fab81121ebd047274f3171eb2902cb564b3e377
https://github.com/llvm/llvm-project/commit/8fab81121ebd047274f3171eb2902cb564b3e377
Author: John Brawn <john.brawn at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/test/Transforms/LoopStrengthReduce/AArch64/prefer-all.ll
Log Message:
-----------
[LSR] Add an addressing mode that considers all addressing modes (#158110)
The way that loops strength reduction works is that the target has to
upfront decide whether it wants its addressing to be preindex,
postindex, or neither. This choice affects:
* Which potential solutions we generate
* Whether we consider a pre/post index load/store as costing an AddRec
or not.
None of these choices are a good fit for either AArch64 or ARM, where
both preindex and postindex addressing are typically free:
* If we pick None then we count pre/post index addressing as costing one
addrec more than is correct so we don't pick them when we should.
* If we pick PreIndexed or PostIndexed then we get the correct cost for
that addressing type, but still get it wrong for the other and also
exclude potential solutions using offset addressing that could have less
cost.
This patch adds an "all" addressing mode that causes all potential
solutions to be generated and counts both pre and postindex as having
AddRecCost of zero. Unfortuntely this reveals problems elsewhere in how
we calculate the cost of things that need to be fixed before we can make
use of it.
Commit: c5474cdc27d99f6ebab1d501f93ec1aa6dc8235b
https://github.com/llvm/llvm-project/commit/c5474cdc27d99f6ebab1d501f93ec1aa6dc8235b
Author: Ross Brunton <bruntonross at protonmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M offload/unittests/OffloadAPI/common/Fixtures.hpp
Log Message:
-----------
[Offload] Make `ASSERT_ERROR` output more readable (#157653)
Commit: a134b0621798d0c07a6c5ea23d8e8388b04c26ad
https://github.com/llvm/llvm-project/commit/a134b0621798d0c07a6c5ea23d8e8388b04c26ad
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Driver/clang_f_opts.c
M flang/docs/ReleaseNotes.md
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/loop-fuse.f90
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
Reapply "Introduce -fexperimental-loop-fusion to clang and flang (#158844)
This PR is a reapplication of
https://github.com/llvm/llvm-project/pull/142686
Commit: 92f5d8df361bb1bb6dea88f86faeedfd295ab970
https://github.com/llvm/llvm-project/commit/92f5d8df361bb1bb6dea88f86faeedfd295ab970
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M libcxx/include/string
M libcxx/src/filesystem/format_string.h
M libcxx/test/benchmarks/containers/string.bench.cpp
R libcxx/test/libcxx-03/strings/basic.string/string.modifiers/resize_default_initialized.pass.cpp
M libcxx/test/libcxx/input.output/filesystems/class.directory_entry/directory_entry.mods/last_write_time.pass.cpp
M libcxx/test/libcxx/input.output/filesystems/convert_file_time.pass.cpp
R libcxx/test/libcxx/strings/basic.string/string.modifiers/resize_default_initialized.pass.cpp
Log Message:
-----------
[libc++] Replace __resize_default_init with resize_and_overwrite (#157121)
Since `__resize_default_init` is only ever used inside the dylib we can
remove the libc++-internal API and switch to the public one. This patch
inlines a bunch of functions that aren't required anymore and simplifies
the code that way.
Commit: fba26bc1a5cf7cf367474965c144659f62588e7d
https://github.com/llvm/llvm-project/commit/fba26bc1a5cf7cf367474965c144659f62588e7d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/test/Dialect/SCF/for-loop-peeling.mlir
Log Message:
-----------
[MLIR] Fix SCF loop specialization (peeling) to work on scf.for with non-index type (#158707)
The current code would crash with integer. This is visible on this
modified example (the original with index was incorrect)
Commit: ff25184f356e0e2fa6e3606160b30f7da9ea525c
https://github.com/llvm/llvm-project/commit/ff25184f356e0e2fa6e3606160b30f7da9ea525c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/Statistic.h
Log Message:
-----------
Make NoopStatistic constructor constexpr (NFC) (#159045)
This makes it friendly to -Wglobal-constructors environments. This class
is used when Statistics are disabled, the matching class,
TrackingStatistic, was made constexpr a while back already in
7e5682ee6201c for other reasons.
Commit: 45f1440d9a3a2f6108242a1fce16faf52a3f4645
https://github.com/llvm/llvm-project/commit/45f1440d9a3a2f6108242a1fce16faf52a3f4645
Author: Tobias Stadler <mail at stadler-tobias.de>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Remarks/BitstreamRemarkParser.cpp
M llvm/lib/Remarks/BitstreamRemarkParser.h
Log Message:
-----------
Reland "[Remarks] BitstreamRemarkParser: Refactor error handling" (#158667)
Reland #156511 after fixing a build failure not caught by clang. The
default implementation of `parseRecord` is currently unused. Apparently,
clang doesn't type check uninstantiated methods in class templates. To
avoid this footgun, we `= delete` the impl for now.
Original message:
In preparation of larger changes to the bitstream remark format,
refactor the error handling code in the BitstreamRemarkParser.
Main change: move the various static helper methods into the parser
helper classes, so we don't need to pass around as many args. Calling
`error(...)` inside the helper classes now automatically prepends the
current block being parsed to the error message.
NFCI (except for error messages on invalid bitstream files).
Pull Request: https://github.com/llvm/llvm-project/pull/158667
Commit: c366cbdc619dc15f92dcedda4b9e256a26ef94b3
https://github.com/llvm/llvm-project/commit/c366cbdc619dc15f92dcedda4b9e256a26ef94b3
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Semantics/OpenACC/acc-loop.f90
Log Message:
-----------
[flang][acc] Allow nested gang loops inside acc routines (#158693)
The following commit incorrectly prohibited nested gang loops inside acc
routines. This PR limits the restriction to loops within kernels
constructs only.
https://github.com/llvm/llvm-project/commit/8470027f257a3304b2abe50e5663bcd711f6ca29
Commit: 18507a7a6bf1c82e2614b3995320ebab8dd60ef2
https://github.com/llvm/llvm-project/commit/18507a7a6bf1c82e2614b3995320ebab8dd60ef2
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Remove base pointers from subscripts (NFCI) (#157083)
This patch removes base pointers from subscripts when delinearization
fails. Previously, in such cases, the pointer type SCEVs were used
instead of offset SCEVs derived from them.
For example, here is a portion of the debug output when analyzing
`strong0` in `test/Analysis/DependenceAnalysis/StrongSIV.ll`:
```
testing subscript 0, SIV
src = {(8 + %A),+,4}<nuw><%for.body>
dst = {(8 + %A),+,4}<nuw><%for.body>
Strong SIV test
Coeff = 4, i64
SrcConst = (8 + %A), ptr
DstConst = (8 + %A), ptr
Delta = 0, i64
UpperBound = (-1 + %n), i64
Distance = 0
Remainder = 0
```
As shown above, the `SrcConst` and `DstConst` are pointer values rather
than integer offsets. `%A` should be removed.
This change is necessary for #157086, since
`ScalarEvolution::willNotOverflow` expects integer type SCEVs as
arguments. This change alone alone should not affect the analysis
results.
Commit: ea59be552f1db4f8f2e8a3edd909f17802339970
https://github.com/llvm/llvm-project/commit/ea59be552f1db4f8f2e8a3edd909f17802339970
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/is_fpclass.ll
Log Message:
-----------
[ValueTracking] Don't take sign bit from NaN operands (#157250)
Closes https://github.com/llvm/llvm-project/issues/157238.
Commit: 66a8f47066caad76458190d820b7f4bea7c602c5
https://github.com/llvm/llvm-project/commit/66a8f47066caad76458190d820b7f4bea7c602c5
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLPVectorizer][NFC] Save stride in a map. (#157706)
In order to avoid recalculating stride of strided load twice save it in
a map.
Commit: 3c7c8929d415ab773c88e7e0a668930738f98e56
https://github.com/llvm/llvm-project/commit/3c7c8929d415ab773c88e7e0a668930738f98e56
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/TableGen/HwModeEncodeDecode3.td
M llvm/test/TableGen/RegisterEncoder.td
M llvm/utils/TableGen/CodeEmitterGen.cpp
Log Message:
-----------
[TableGen][CodeEmitter] Refactor addCodeToMergeInOperand (NFC) (#158674)
* Use streams to avoid dealing with std::string
* Print operand masks in hex
* Make the output more succinct
Commit: 666e4313ebc03587f27774139ad8f780bac15c3e
https://github.com/llvm/llvm-project/commit/666e4313ebc03587f27774139ad8f780bac15c3e
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
Log Message:
-----------
[NFC][LV] Improve ee with sideeffects legality test (#158275)
Addressing postcommit comments for
54fc5367f63cca8e011d93bbd55764b0a7ecbbd5
Commit: 33c33d0e0d143fb6197f191921d2b6e4470855da
https://github.com/llvm/llvm-project/commit/33c33d0e0d143fb6197f191921d2b6e4470855da
Author: jiang1997 <jieke at live.cn>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCooperativeMatrixOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/invalid.mlir
Log Message:
-----------
[MLIR] Use IntValidAlignment for alignment attributes (#158137)
This PR refactors alignment validation in MLIR's MemRef and SPIRV
dialects:
- Use `IntValidAlignment` for consistent type safety across MemRef and
SPIRV dialects
- Eliminate duplicate validation logic in `MemRefOps.cpp`
- Adjust error messages in `invalid.mlir` to match improved validation
This is the first of two PRs addressing issue #155677.
Commit: 311d78f2a1d80fd6b7700a0199c146accd2c7d3c
https://github.com/llvm/llvm-project/commit/311d78f2a1d80fd6b7700a0199c146accd2c7d3c
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M offload/test/offloading/force-usm.cpp
Log Message:
-----------
[OpenMP] Fix force-usm test after #157182 (#159095)
The refactoring lead to an additional data transfer. This changes the
assumed transfers in the check-strings to work with that changed
behavior.
Commit: e7101dac9cbdad08696a05b4b73ed76c20a6f2fc
https://github.com/llvm/llvm-project/commit/e7101dac9cbdad08696a05b4b73ed76c20a6f2fc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/JIT.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/JIT.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[Offload] Copy loaded images into managed storage (#158748)
Summary:
Currently we have this `__tgt_device_image` indirection which just takes
a reference to some pointers. This was all find and good when the only
usage of this was from a section of GPU code that came from an ELF
constant section. However, we have expanded beyond that and now need to
worry about managing lifetimes. We have code that references the image
even after it was loaded internally. This patch changes the
implementation to instaed copy the memory buffer and manage it locally.
This PR reworks the JIT and other image handling to directly manage its
own memory. We now don't need to duplicate this behavior externally at
the Offload API level. Also we actually free these if the user unloads
them.
Upside, less likely to crash and burn. Downside, more latency when
loading an image.
Commit: 148e099b39a25ea4336faeef485c53819b269fc2
https://github.com/llvm/llvm-project/commit/148e099b39a25ea4336faeef485c53819b269fc2
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-target-default-as.mlir
Log Message:
-----------
[MLIR][OpenMP] Set default address space for OpenMPIRBuilder (#158689)
Extension of https://github.com/llvm/llvm-project/pull/158152 for MLIR.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: ce073a9445a2eaf5810ea734e2dcad6f14441218
https://github.com/llvm/llvm-project/commit/ce073a9445a2eaf5810ea734e2dcad6f14441218
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
R llvm/test/TableGen/AsmPredicateCondsEmission.td
A llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td
A llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td
A llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td
A llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
R llvm/test/TableGen/DecoderEmitterBitwidthSpecialization.td
R llvm/test/TableGen/DecoderEmitterFnTable.td
R llvm/test/TableGen/VarLenDecoder.td
R llvm/test/TableGen/trydecode-emission.td
R llvm/test/TableGen/trydecode-emission2.td
R llvm/test/TableGen/trydecode-emission3.td
R llvm/test/TableGen/trydecode-emission4.td
Log Message:
-----------
[NFC][TableGen] Move decoder tests to DecoderEmitter directory (#159040)
Commit: 334013b090eef5b97cef8bc1817ed9ff67680488
https://github.com/llvm/llvm-project/commit/334013b090eef5b97cef8bc1817ed9ff67680488
Author: James Y Knight <jyknight at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/Statistic.h
Log Message:
-----------
Mark STATISTIC variables as maybe_unused when stats are disabled. (#159103)
PR #159045 made the constructor constexpr, which allows
`-Wunused-variable` to trigger. However, we don't really care if a
statistic is unused if `LLVM_ENABLE_STATS` is 0.
Commit: b3fa92fd4edce2d9be61eb289a179a98bcf13880
https://github.com/llvm/llvm-project/commit/b3fa92fd4edce2d9be61eb289a179a98bcf13880
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][Decoder] Make predicate/decocder generation functions return a string (NFC) (#159089)
These functions will see more uses in a future patch.
This also resolves a FIXME.
Commit: 2771d35e2aaf76cf3716954d6094a822e56dfda5
https://github.com/llvm/llvm-project/commit/2771d35e2aaf76cf3716954d6094a822e56dfda5
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[NFC ]Add a helper function isTailCall for getting libcall in SelectionDAG (#155256)
Based on comment of
https://github.com/llvm/llvm-project/pull/153600#discussion_r2285729269,
Add a helper function isTailCall for getting libcall in SelectionDAG.
Commit: 7e71877835a567ada4d0e57413a5f64de3545033
https://github.com/llvm/llvm-project/commit/7e71877835a567ada4d0e57413a5f64de3545033
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Wrapper for `std::accumulate` accepting a `range`. (#158702)
Commit: a4c5a747c5507d0c45524e45082389089fa9a791
https://github.com/llvm/llvm-project/commit/a4c5a747c5507d0c45524e45082389089fa9a791
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
Log Message:
-----------
AMDGPU: Regenerate baseline test checks for some gfx12 mc tests (#159098)
Commit: 44b686e52ec462c173d0b114172db2a783215116
https://github.com/llvm/llvm-project/commit/44b686e52ec462c173d0b114172db2a783215116
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/test/CodeGen/AArch64/pr157252.mir
Log Message:
-----------
[AArch64] Unfold adds when eliminating frame index with scalable offset (#158597)
Fixes https://github.com/llvm/llvm-project/issues/157252.
Peephole optimization tends to fold:
```
add %gpr1, %stack, 0
subs %gpr2, %gpr1, 0
```
to
```
adds %gpr2, %stack, 0
```
This patch undoes the fold in `rewriteAArch64FrameIndex` to process
`adds` on the stack object.
Commit: a42aac5f83e272f83207844dde1530b86e6fcf2b
https://github.com/llvm/llvm-project/commit/a42aac5f83e272f83207844dde1530b86e6fcf2b
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/DebugSSAUpdater.h
Log Message:
-----------
[DebugInfo] Fix memory leak in DebugSSAUpdater (#159107)
Fixes an issue in commit 3946c50, PR #135349.
The DebugSSAUpdater class performs raw pointer allocations. It frees
these properly in reset(), but does not do so in its destructor - as an
immediate fix, this patch adds a destructor which frees the allocations
correctly.
I'll be merging this immediately to fix the issue, but will be open to
post-commit review and/or producing a better fix in a follow-up commit.
Commit: eeced0d073ee387d98e39fdcada2277ad81cd4a9
https://github.com/llvm/llvm-project/commit/eeced0d073ee387d98e39fdcada2277ad81cd4a9
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-snop-padding.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/neighboring-mfma-padding.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
[AMDGPU] Use larger immediate values in S_NOP (#158990)
The S_NOP instruction has an immediate operand which is one less than
the number of cycles to delay for. The maximum value that may be encoded
in this field was increased in GFX8 and again in GFX12.
Commit: 175bab32d7f37bfb854b89c0da7e9f4aa427bc70
https://github.com/llvm/llvm-project/commit/175bab32d7f37bfb854b89c0da7e9f4aa427bc70
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-fma.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-vfmulc-fadd.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc-fadd.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
M llvm/test/CodeGen/X86/dag-combiner-fma-folding.ll
M llvm/test/CodeGen/X86/fma-do-not-commute.ll
M llvm/test/CodeGen/X86/fma_patterns.ll
M llvm/test/CodeGen/X86/fma_patterns_wide.ll
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
Log Message:
-----------
[X86] Don't rely on global -fp-contract=fast on X86 CodeGen tests (#158026)
IR has the `contract` to indicate that contraction is allowed. Testing
shouldn't rely on global flag to perform contraction. This is a
prerequisite before making backends rely only on the IR to perform
contraction. See more here:
https://discourse.llvm.org/t/allowfpopfusion-vs-sdnodeflags-hasallowcontract/80909/5
Commit: beb6bab87e6370087049bb900155d5ca164acc15
https://github.com/llvm/llvm-project/commit/beb6bab87e6370087049bb900155d5ca164acc15
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in LowerGpuOpsToROCDLOps.cpp (NFC)
Commit: f017bcb3e375843dc146eda823fcdd4c95a10153
https://github.com/llvm/llvm-project/commit/f017bcb3e375843dc146eda823fcdd4c95a10153
Author: Hsiangkai Wang <hsiangkai.wang at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-khr-coop-matrix.mlir
Log Message:
-----------
[mlir][gpu][spirv] Add conversion for gpu.subgroup_mma_elementwise mulf (#158832)
gpu.subgroup_mma_elementwise supports mulf op type. Add conversion for it.
Commit: babdad3fdbc66b4992654f9b7dc0fa4da85bd843
https://github.com/llvm/llvm-project/commit/babdad3fdbc66b4992654f9b7dc0fa4da85bd843
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
Log Message:
-----------
AMDGPU: Try to unspill VGPRs after rewriting MFMAs to AGPR form (#154323)
After replacing VGPR MFMAs with the AGPR form, we've alleviated VGPR
pressure which may have triggered spills during allocation. Identify
these spill slots, and try to reassign them to newly freed VGPRs,
and replace the spill instructions with copies.
Fixes #154260
Commit: 9865f7ec2bb15f3d8aa25c7e9305393422597dc5
https://github.com/llvm/llvm-project/commit/9865f7ec2bb15f3d8aa25c7e9305393422597dc5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/WinogradConv2D.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in WinogradConv2D.cpp (NFC)
Commit: 30633f30894129919050f24fdd1f8f6bc46beae0
https://github.com/llvm/llvm-project/commit/30633f30894129919050f24fdd1f8f6bc46beae0
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/ChainedIncludesSource.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/driver/cc1_main.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
Log Message:
-----------
[clang] Initialize the file system explicitly (#158381)
This PR is a part of the effort to make the VFS used in the compiler
more explicit and consistent.
Instead of creating the VFS deep within the compiler (in
`CompilerInstance::createFileManager()`), clients are now required to
explicitly call `CompilerInstance::createVirtualFileSystem()` and
provide the base VFS from the outside.
This PR also helps in breaking up the dependency cycle where creating a
properly configured `DiagnosticsEngine` requires a properly configured
VFS, but creating properly configuring a VFS requires the
`DiagnosticsEngine`.
Both `CompilerInstance::create{FileManager,Diagnostics}()` now just use
the VFS already in `CompilerInstance` instead of taking one as a
parameter, making the VFS consistent across the instance sub-object.
Commit: 08a58b2cea3c11cb94b565e50a85de4d7b78fe65
https://github.com/llvm/llvm-project/commit/08a58b2cea3c11cb94b565e50a85de4d7b78fe65
Author: Rajveer Singh Bharadwaj <rajveer.developer at icloud.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
A llvm/test/Transforms/InstCombine/redundant-fcmp.ll
Log Message:
-----------
[InstCombine] Optimize redundant floating point comparisons in `or`/`and` inst's (#158097)
Resolves #157371
We can eliminate one of the `fcmp` when we have two same `olt` or `ogt`
instructions matched in `or`/`and` simplification.
Commit: 3388d40684742e950b3c5d1d2dafe5a40695cfc1
https://github.com/llvm/llvm-project/commit/3388d40684742e950b3c5d1d2dafe5a40695cfc1
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
A compiler-rt/cmake/caches/hexagon-builtins-baremetal.cmake
Log Message:
-----------
[cmake] Add cmake file for hexagon-builtins baremetal (#151500)
This will be used to build hexagon-builtins for baremetal.
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: d2fbca8a85991019c061cc83f18d3030e843d0d7
https://github.com/llvm/llvm-project/commit/d2fbca8a85991019c061cc83f18d3030e843d0d7
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/test/Lower/HLFIR/eoshift.f90
Log Message:
-----------
[flang] Allow polymorphic type mismatch for hlfir.eoshift. (#158718)
When the ARRAY has polymorphic type, its element type may not match
the element type of BOUNDARY.
Fixes #158382.
Commit: 6aab826e2334fe454c5e2349d871f16d7d011a4c
https://github.com/llvm/llvm-project/commit/6aab826e2334fe454c5e2349d871f16d7d011a4c
Author: guan jian <148229859+rez5427 at users.noreply.github.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/xor-min-max.ll
Log Message:
-----------
[DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (#155141)
Hi, I compared the following LLVM IR with GCC and Clang, and there is a small difference between the two. The LLVM IR is:
```
define i64 @test_smin_neg_one(i64 %a) {
%1 = tail call i64 @llvm.smin.i64(i64 %a, i64 -1)
%retval.0 = xor i64 %1, -1
ret i64 %retval.0
}
```
GCC generates:
```
cmp x0, 0
csinv x0, xzr, x0, ge
ret
```
Clang generates:
```
cmn x0, #1
csinv x8, x0, xzr, lt
mvn x0, x8
ret
```
Clang keeps flipping x0 through x8 unnecessarily.
So I added the following folds to DAGCombiner:
fold (xor (smax(x, C), C)) -> select (x > C), xor(x, C), 0
fold (xor (smin(x, C), C)) -> select (x < C), xor(x, C), 0
alive2: https://alive2.llvm.org/ce/z/gffoir
---------
Co-authored-by: Yui5427 <785369607 at qq.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: ee66d967db6b812ed82a14dda369a3cae79f6632
https://github.com/llvm/llvm-project/commit/ee66d967db6b812ed82a14dda369a3cae79f6632
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Inline a couple of trivial functions (NFC) (#159099)
Commit: 3ef066f8a369e1fe10f5408d535ce782fb39490f
https://github.com/llvm/llvm-project/commit/3ef066f8a369e1fe10f5408d535ce782fb39490f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Change SmallSetVector to SetVector (NFC) (#159108)
SmallSetVector is too optimistic, there are usually more than 16 unique
decoders and predicates. Modernize `typedef` to `using` while here.
Commit: 341cdbc9703d3cdd151f897b63548387f0017f49
https://github.com/llvm/llvm-project/commit/341cdbc9703d3cdd151f897b63548387f0017f49
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
Log Message:
-----------
[AMDGPU] Elide bitcast fold i64 imm to build_vector (#154115)
Elide bitcast combine to build_vector in case of i64 immediate that can
be materialized through 64b mov
Commit: f9f62ef4ae555a86878411e696b8b747851fc337
https://github.com/llvm/llvm-project/commit/f9f62ef4ae555a86878411e696b8b747851fc337
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/BasicAliasAnalysis.h
M llvm/include/llvm/Analysis/TypeBasedAliasAnalysis.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
A llvm/test/Transforms/InstCombine/may-alias-errno.ll
Log Message:
-----------
[AA] Refine ModRefInfo taking into account `errnomem` location
Ensure alias analyses mask out `errnomem` location, refining the
resulting modref info, when the given access/location does not
alias errno. This may occur either when TBAA proves there is no
alias with errno (e.g., float TBAA for the same root would be
disjoint with the int-only compatible TBAA node for errno); or
if the memory access size is larger than the integer size, or
when the underlying object is a potentially-escaping alloca.
Previous discussion: https://discourse.llvm.org/t/rfc-modelling-errno-memory-effects/82972.
Commit: 3eea01e73117c2b916930cd64c1acbcdc5ace44d
https://github.com/llvm/llvm-project/commit/3eea01e73117c2b916930cd64c1acbcdc5ace44d
Author: Damian Heaton <Damian.Heaton at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2p1-dots-partial-reduction.ll
Log Message:
-----------
[AArch64] Add ISel support for partial reductions to use SVE2.1 udot/sdot (#158310)
This allows dot products with scalable 8xi16 vectors (and fixed-length
vectors which are converted into a scalable vector) accumulating into a
4xi32 vector to lower into a single instruction (`udot`/`sdot`), rather
than a sequence of `umlalb`s and `umlalt`s`.
Commit: 3938ce96ad97acd26f4a7610d5cd3b2dac796c29
https://github.com/llvm/llvm-project/commit/3938ce96ad97acd26f4a7610d5cd3b2dac796c29
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/Twine.h
Log Message:
-----------
[ADT] Update comments in Twine.h (NFC) (#158783)
Twine now stores integers by value, so this patch updates comments
accordingly.
Commit: b27bb09f6d02e750c4126aeffb7a2ecf0d6ab783
https://github.com/llvm/llvm-project/commit/b27bb09f6d02e750c4126aeffb7a2ecf0d6ab783
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/AST/TypeBase.h
Log Message:
-----------
[AST] Simplify TypeIsArrayType (NFC) (#158784)
This patch simplifies replaces TypeIsArrayType. If
std::is_same<ArrayType, ArrayType> is true, then
std::is_base_of<ArrayType, ArrayType> must also be true, so
std::is_base_of<ArrayType, ArrayType> alone is sufficient.
Commit: 096b8a8b89f3234972770e0581e059073d106b7c
https://github.com/llvm/llvm-project/commit/096b8a8b89f3234972770e0581e059073d106b7c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/PackedVector.h
M llvm/unittests/ADT/PackedVectorTest.cpp
Log Message:
-----------
[ADT] Fix an indexing bug in PackedVector (#158785)
PackedVector is like std::vector<int> except that we can store small
elements (e.g. 2-bit elements) in a packed manner using a BitVector as
the underlying storage.
The problem is that for bit size 3 and beyond, the calculation of
indices into the underlying BitVector is not correct. For example,
around line 50, we see a "for" loop to retrieve an unsigned integer
value:
for (unsigned i = 0; i != BitNum-1; ++i)
val = T(val | ((Bits[(Idx << (BitNum-1)) + i] ? 1UL : 0UL) << i));
Suppose that BitNum is 4 (that is, 4-bit item). Here is the mapping
between the PackedVector index and the corresponding BitVector
indices.
Idx 0: 0, 1, 2, 3
Idx 1: 8, 9, 10, 11
Idx 2: 16, 17, 18, 19
That is, we use 4 bits out of every 8 bits. This is because the index
calculation uses "<<". The index should really be Idx * BitNum + i.
FWIW, all the methods in PackedVector consistently use the shift-based
index calculation, so the user would never encounter a bug except
possibly as excessive storage use.
This patch fixes the index calculation. Now, in size(), I didn't want
to do integer division:
return Bits.size() / BitNum;
so this patch adds a separate variable NumElements to keep track of
the number of elements.
The unit test checks for the expected size of the underlying
BitVector.
Commit: 99a0139e28f7c69583684efb1907451fc9d0b0bf
https://github.com/llvm/llvm-project/commit/99a0139e28f7c69583684efb1907451fc9d0b0bf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
Log Message:
-----------
[Support] Remove offsetof in AMDHSAKernelDescriptor.h (#158786)
This patch removes offsetof. Note that we already include <cstddef>
and that <cstddef> defines offsetof.
Commit: 3fe05ba24fcaeeb0280e9c364d1b193aadbd2348
https://github.com/llvm/llvm-project/commit/3fe05ba24fcaeeb0280e9c364d1b193aadbd2348
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/docs/GarbageCollection.rst
Log Message:
-----------
[llvm] Proofread GarbageCollection.rst (#158787)
Commit: 0864965e54a2ae050898ca0a3bb1d07f8fabe954
https://github.com/llvm/llvm-project/commit/0864965e54a2ae050898ca0a3bb1d07f8fabe954
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Replace opcode mask with booleans (NFC) (#159113)
Extracted from #155889, which removes inclusion of `MCDecoderOps.h`.
Commit: c3fb2e1cee954338acb83955b157e0a2e82a4849
https://github.com/llvm/llvm-project/commit/c3fb2e1cee954338acb83955b157e0a2e82a4849
Author: yonghong-song <yhs at fb.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
A llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMCInstLower.cpp
M llvm/lib/Target/BPF/BPFMCInstLower.h
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
A llvm/lib/Target/BPF/BPFTargetLoweringObjectFile.cpp
A llvm/lib/Target/BPF/BPFTargetLoweringObjectFile.h
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/CMakeLists.txt
A llvm/test/CodeGen/BPF/jump_table_blockaddr.ll
A llvm/test/CodeGen/BPF/jump_table_global_var.ll
A llvm/test/CodeGen/BPF/jump_table_switch_stmt.ll
Log Message:
-----------
[BPF] Support Jump Table (#149715)
Add jump table (switch statement and computed goto) support for BPF
backend.
A `gotox <reg>` insn is implemented and the `<reg>` holds the target
insn where the gotox will go.
For a switch statement like
```
...
switch (ctx->x) {
case 1: ret_user = 18; break;
case 20: ret_user = 6; break;
case 16: ret_user = 9; break;
case 6: ret_user = 16; break;
case 8: ret_user = 14; break;
case 30: ret_user = 2; break;
default: ret_user = 1; break;
}
...
```
and the final binary
```
The final binary:
4: 67 01 00 00 03 00 00 00 r1 <<= 0x3
5: 18 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r2 = 0x0 ll
0000000000000028: R_BPF_64_64 BPF.JT.0.0
7: 0f 12 00 00 00 00 00 00 r2 += r1
...
Symbol table:
4: 0000000000000000 240 OBJECT GLOBAL DEFAULT 4 BPF.JT.0.0
5: 0000000000000000 4 OBJECT GLOBAL DEFAULT 6 ret_user
6: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND bar
7: 00000000000000f0 256 OBJECT GLOBAL DEFAULT 4 BPF.JT.0.1
and
[ 4] .jumptables PROGBITS 0000000000000000 0001c8 0001f0 00 0 0 1
```
Note that for the above example, `-mllvm -bpf-min-jump-table-entries=5`
should be in compilation flags as the current default
bpf-min-jump-table-entries is 13. For example.
```
clang --target=bpf -mcpu=v4 -O2 -mllvm -bpf-min-jump-table-entries=5 -S -g test.c
```
For computed goto like
```
int foo(int a, int b) {
__label__ l1, l2, l3, l4;
void *jt1[] = {[0]=&&l1, [1]=&&l2};
void *jt2[] = {[0]=&&l3, [1]=&&l4};
int ret = 0;
goto *jt1[a % 2];
l1: ret += 1;
l2: ret += 3;
goto *jt2[b % 2];
l3: ret += 5;
l4: ret += 7;
return ret;
}
```
The final binary:
```
12: bf 23 20 00 00 00 00 00 r3 = (s32)r2
13: 67 03 00 00 03 00 00 00 r3 <<= 0x3
14: 18 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r2 = 0x0 ll
0000000000000070: R_BPF_64_64 BPF.JT.0.0
16: 0f 32 00 00 00 00 00 00 r2 += r3
17: bf 11 20 00 00 00 00 00 r1 = (s32)r1
18: 67 01 00 00 03 00 00 00 r1 <<= 0x3
19: 18 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r3 = 0x0 ll
0000000000000098: R_BPF_64_64 BPF.JT.0.1
21: 0f 13 00 00 00 00 00 00 r3 += r1
[ 4] .jumptables PROGBITS 0000000000000000 000160 000020 00 0 0 1
4: 0000000000000000 16 OBJECT GLOBAL DEFAULT 4 BPF.JT.0.0
5: 0000000000000010 16 OBJECT GLOBAL DEFAULT 4 BPF.JT.0.1
```
A more complicated test with both switch-statement triggered jump table
and compute gotos:
```
$ cat test3.c
struct simple_ctx {
int x;
int y;
int z;
};
int ret_user, ret_user2;
void bar(void);
int foo(struct simple_ctx *ctx, struct simple_ctx *ctx2, int a, int b)
{
__label__ l1, l2, l3, l4;
void *jt1[] = {[0]=&&l1, [1]=&&l2};
void *jt2[] = {[0]=&&l3, [1]=&&l4};
int ret = 0;
goto *jt1[a % 2];
l1: ret += 1;
l2: ret += 3;
goto *jt2[b % 2];
l3: ret += 5;
l4: ret += 7;
bar();
switch (ctx->x) {
case 1: ret_user = 18; break;
case 20: ret_user = 6; break;
case 16: ret_user = 9; break;
case 6: ret_user = 16; break;
case 8: ret_user = 14; break;
case 30: ret_user = 2; break;
default: ret_user = 1; break;
}
return ret;
}
```
Compile with
```
clang --target=bpf -mcpu=v4 -O2 -S test3.c
clang --target=bpf -mcpu=v4 -O2 -c test3.c
```
The binary:
```
/* For computed goto */
13: bf 42 20 00 00 00 00 00 r2 = (s32)r4
14: 67 02 00 00 03 00 00 00 r2 <<= 0x3
15: 18 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r1 = 0x0 ll
0000000000000078: R_BPF_64_64 BPF.JT.0.1
17: 0f 21 00 00 00 00 00 00 r1 += r2
18: bf 32 20 00 00 00 00 00 r2 = (s32)r3
19: 67 02 00 00 03 00 00 00 r2 <<= 0x3
20: 18 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r3 = 0x0 ll
00000000000000a0: R_BPF_64_64 BPF.JT.0.2
22: 0f 23 00 00 00 00 00 00 r3 += r2
/* For switch statement */
39: 67 01 00 00 03 00 00 00 r1 <<= 0x3
40: 18 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r2 = 0x0 ll
0000000000000140: R_BPF_64_64 BPF.JT.0.0
42: 0f 12 00 00 00 00 00 00 r2 += r1
```
You can see jump table symbols are all different.
Commit: 1327288324c5084a6f09100fa78f2e084836a282
https://github.com/llvm/llvm-project/commit/1327288324c5084a6f09100fa78f2e084836a282
Author: Alexey Karyakin <akaryaki at quicinc.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
A llvm/test/CodeGen/Hexagon/vsubsat.ll
Log Message:
-----------
[Hexagon] Lowering saturating subtraction (#158726)
Saturating arithmetic can be expressed by llvm.uadd/usub.sat generic
intrinsics.
Commit: b22448c9ba90efb3a2a6a7bdb8ffeeee9fcabb62
https://github.com/llvm/llvm-project/commit/b22448c9ba90efb3a2a6a7bdb8ffeeee9fcabb62
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
A llvm/test/CodeGen/PowerPC/vsx-ldst-with-length.ll
Log Message:
-----------
[PowerPC] Add intrinsic definition for load and store with Right Length Left-justified (#148873)
Commit: e75e28ad3c9558c2cca32cd16cd5681b5219ff8d
https://github.com/llvm/llvm-project/commit/e75e28ad3c9558c2cca32cd16cd5681b5219ff8d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/doacross-clause.f90
M flang/test/Parser/OpenMP/if-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/lastprivate-clause.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/masked-unparse.f90
M flang/test/Parser/OpenMP/master-unparse.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
M flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Parser/OpenMP/tile-size.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-full.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M flang/test/Parser/OpenMP/unroll-partial.f90
M flang/test/Semantics/OpenMP/simd-only.f90
Log Message:
-----------
[flang][OpenMP] Use OmpDirectiveSpecification in Omp[Begin|End]LoopDi… (#159087)
…rective
This makes accessing directive components, such as directive name or the
list of clauses simpler and more uniform across different directives. It
also makes the parser simpler, since it reuses existing parsing
functionality.
The changes are scattered over a number of files, but they all share the
same nature:
- getting the begin/end directive from OpenMPLoopConstruct,
- getting the llvm::omp::Directive enum, and the source location,
- getting the clause list.
Commit: 0cf668889823e7dc526b0b3039c22452f61538f2
https://github.com/llvm/llvm-project/commit/0cf668889823e7dc526b0b3039c22452f61538f2
Author: Fangrui Song <i at maskray.me>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/MC/MCContext.h
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
A llvm/test/CodeGen/X86/symbol-name.ll
M llvm/test/MC/ELF/cgprofile.s
M llvm/test/MC/ELF/symbol-names.s
Log Message:
-----------
MC: Better handle backslash-escaped symbols (#158780)
The MCContext::getOrCreateSymbol change in #138817 was a workaround.
With #158106, we can replace `getOrCreateSymbol` with `parseSymbol`, in
llvm/lib/MC/MCParser to handle backslash-escaped symbols.
Commit: 4be1099607c97b9f28cd30d56149e7c6428c216c
https://github.com/llvm/llvm-project/commit/4be1099607c97b9f28cd30d56149e7c6428c216c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/Transforms/CodeGenPrepare/unfold-pow2-test-vec.ll
Log Message:
-----------
[RISCV] Improve fixed vector handling in isCtpopFast. (#158380)
Previously we considered fixed vectors fast if Zvbb or Zbb is
enabled. Zbb only helps if the vector type will end up being
scalarized.
Commit: ba5ca37f40b82e287a3e0469fb0f0ea48b651aca
https://github.com/llvm/llvm-project/commit/ba5ca37f40b82e287a3e0469fb0f0ea48b651aca
Author: John Harrison <harjohn at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M lldb/source/Host/common/Socket.cpp
M lldb/tools/lldb-mcp/lldb-mcp.cpp
Log Message:
-----------
[lldb-mcp] Launch lldb on demand, if needed. (#158701)
Adding support for launching lldb with `-O protocol start MCP` if a
valid ~/.lldb/lldb-mcp-*.json` file is not found.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 371048ef220719a5aa89ba5cf05cc212e659af40
https://github.com/llvm/llvm-project/commit/371048ef220719a5aa89ba5cf05cc212e659af40
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/docs/Dialects/SPIR-V.md
Log Message:
-----------
[mlir][spirv][nfc] Update documentation to describe the testing strategy (#158962)
Commit: d0c0986387b333589951c29e2b5205d08c67c668
https://github.com/llvm/llvm-project/commit/d0c0986387b333589951c29e2b5205d08c67c668
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/test/python/CMakeLists.txt
Log Message:
-----------
[MLIR][Python] add `not` to `MLIR_PYTHON_TEST_DEPENDS` (#159124)
[lit complains if these aren't
found](https://github.com/llvm/llvm-project/blob/95fc948c0a07953ae9d0973854336e197e36d349/llvm/utils/lit/lit/llvm/config.py#L466-L482)
(even if they're not used by a test...) so make sure to include all of
them in `MLIR_PYTHON_TEST_DEPENDS`.
Commit: 55e6b3260dcb2b2131317516bf63cc81bd9f5bed
https://github.com/llvm/llvm-project/commit/55e6b3260dcb2b2131317516bf63cc81bd9f5bed
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/BPF/BUILD.gn
Log Message:
-----------
[gn build] Port c3fb2e1cee95
Commit: 7bc91f3580836c13cfcf511147585a5f2f00a7f5
https://github.com/llvm/llvm-project/commit/7bc91f3580836c13cfcf511147585a5f2f00a7f5
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/Driver/DTLTO/dtlto.c
M clang/test/Driver/DTLTO/ps5-dtlto.c
Log Message:
-----------
[DTLTO][TEST] XFAIL Clang driver tests for Multicall toolchains (#159129)
Previously I masked issues with Multicall + DTLTO (see #148908) due to
an incomplete understanding of how the Multicall toolchain works.
This patch reverts those incorrect changes and instead marks the
affected tests XFAIL when running under Multicall.
Issue #159125 tracks fixing DTLTO with Multicall.
Commit: 40f2da5c04042dcf6ae8dfc757d31a32da7f329e
https://github.com/llvm/llvm-project/commit/40f2da5c04042dcf6ae8dfc757d31a32da7f329e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Add hasREV8Like helper to RISCVSubtarget. NFC (#158775)
Commit: f209d63b042e3b3455b67ecb08908135dd9d31fe
https://github.com/llvm/llvm-project/commit/f209d63b042e3b3455b67ecb08908135dd9d31fe
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
Log Message:
-----------
[SelectionDAGBuilder][PPC] Use getShiftAmountConstant. (#158400)
The PowerPC changes are caused by shifts created by different IR
operations being CSEd now. This allows consecutive loads to be turned
into vectors earlier. This has effects on the ordering of other combines
and legalizations. This leads to some improvements and some regressions.
Commit: 198ea2332584bf838a893522b870e1bf033ce7a4
https://github.com/llvm/llvm-project/commit/198ea2332584bf838a893522b870e1bf033ce7a4
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[CAS] Disable OnDiskCAS build on Solaris (#159122)
OnDiskCAS implementation receives error `No record locks available`
on Solaris. Disable building on Solaris for now to fix buildbot failure.
Commit: b8efe1c64746e832bc3313ec2f6a23f09f2d2dd9
https://github.com/llvm/llvm-project/commit/b8efe1c64746e832bc3313ec2f6a23f09f2d2dd9
Author: Vy Nguyen <vyng at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/Driver/clang_f_opts.c
Log Message:
-----------
[clang][nfc] Fix tests to avoid writing output to unreachable location (#159138)
Note: this was originally done in (#158698) but was reverted in the
pr/158844 (which re-applied the original rev)
Commit: b76dc2b9ba7d402d1c9909b87322f2b0008ce3a6
https://github.com/llvm/llvm-project/commit/b76dc2b9ba7d402d1c9909b87322f2b0008ce3a6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M libc/src/__support/CPP/simd.h
M libc/src/__support/CPP/type_traits/is_unsigned.h
M libc/src/string/memory_utils/generic/inline_strlen.h
M libc/test/src/__support/CPP/simd_test.cpp
Log Message:
-----------
[libc] Clean up mask helpers after allowing implicit conversions (#158681)
Summary:
I landed a change in clang that allows integral vectors to implicitly
convert to boolean ones. This means I can simplify the interface and
remove the need to cast to bool on every use. Also do some other
cleanups of the traits.
Commit: 0648c5183f3202060862cd6cba8e6f2395052929
https://github.com/llvm/llvm-project/commit/0648c5183f3202060862cd6cba8e6f2395052929
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
Log Message:
-----------
AMDGPU: Fix some broken regclass numbers in mir tests (#159102)
Commit: 9e9edb583400ffc647622445459d700d0ad61b3d
https://github.com/llvm/llvm-project/commit/9e9edb583400ffc647622445459d700d0ad61b3d
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/CAS/OnDiskCommon.cpp
Log Message:
-----------
[CAS] Fix build for older macOS SDK (before 13.0) (#159133)
Fix a build failure and back-deployment problem for macOS before 13.0.
Commit: 3c4ab4fdefcbd34106163899d7e2914246328616
https://github.com/llvm/llvm-project/commit/3c4ab4fdefcbd34106163899d7e2914246328616
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaConvertIntegerTypeToSignless.cpp
M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
Log Message:
-----------
[mlir][tosa] Handle unsigned constants in `TosaConvertIntegerTypeToSignless` (#156483)
This commit fixes handling of unsigned constant data in the
`TosaConvertIntegerTypeToSignless` pass. Previously, the type of the
"values" attribute would remain unsigned, which caused an error in the
const ops verifier:
```
error: 'tosa.const' op expected same attr/result element types
%input_zp = "tosa.const"() {values = dense<17> : tensor<1xui8>} : () -> tensor<1xui8>
^
note: see current operation: %0 = "tosa.const"() <{values = dense<17> : tensor<1xui8>}> : () -> tensor<1xi8>
```
Now the constant data in "values" is transformed to signless as well.
Commit: 181979822743ddaf4c197e1587c0c89b5f4240a4
https://github.com/llvm/llvm-project/commit/181979822743ddaf4c197e1587c0c89b5f4240a4
Author: Druzhkov Sergei <serzhdruzhok at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] Add stdio redirection (#158609)
As far as I understand, lldb-dap does not currently support stdio
redirection. I have added support for this via a new field in the launch
configuration named `stdio`. It was inspired by the same named field in
[CodeLLDB](https://github.com/vadimcn/codelldb/blob/master/MANUAL.md#stdio-redirection).
Commit: f854009307d3f3750d3358510ef632571683acb5
https://github.com/llvm/llvm-project/commit/f854009307d3f3750d3358510ef632571683acb5
Author: Akhil Goel <akhil.goel at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
Log Message:
-----------
[mlir][arith][NFC] Minor Revisions to Comments (#158757)
This is a minor nitpick PR to fix a few comments.
Commit: 46fd8d0db2f7f7361823efae067edddb6acc237c
https://github.com/llvm/llvm-project/commit/46fd8d0db2f7f7361823efae067edddb6acc237c
Author: Amit Kumar Pandey <pandey.kumaramit2023 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M compiler-rt/lib/dfsan/dfsan.cpp
M compiler-rt/lib/fuzzer/FuzzerCorpus.h
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/hwasan/hwasan_report.cpp
Log Message:
-----------
Reapply "[NFC] Fix CodeQL violations in compiler-rt. (#157793)" (#157913) (#159097)
Fix below buildbot failure.
```
/var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/compiler-rt/lib/fuzzer/FuzzerDriver.cpp:172:42: error: use of undeclared identifier 'uint'
172 | Printf("Flag: %s %u\n", Name, (uint)Val);
```
Replace uint with uint32_t cast.
This reverts commit 8062b166762b51f1c3a9168e7031babde3e330a8.
Commit: fd59fd563f342c8900b0d6ff5039741cb263b6ed
https://github.com/llvm/llvm-project/commit/fd59fd563f342c8900b0d6ff5039741cb263b6ed
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
[AMDGPU] Add aperture classes to VS_64 (#158823)
Should not do anything.
Commit: 90d96b3e9c90cccefe1c1af75b57de1b8e248c42
https://github.com/llvm/llvm-project/commit/90d96b3e9c90cccefe1c1af75b57de1b8e248c42
Author: Druzhkov Sergei <serzhdruzhok at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[NFC][lldb-dap] Fix typo in invalidated event (#158338)
Fixed a typo in the `invalidated` event according to
[DAP](https://microsoft.github.io/debug-adapter-protocol/specification#Events_Invalidated)
specification. While the field is `frameId` elsewhere, it must be
`stackFrameId` in this event.
Commit: dd56becdbc31cce16973172f0a447207ddf67861
https://github.com/llvm/llvm-project/commit/dd56becdbc31cce16973172f0a447207ddf67861
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/CAS/MappedFileRegionArena.cpp
Log Message:
-----------
[CAS] Fix alignment error from MappedFileRegionArena (#159128)
Fix a bug that when an alignment error can happen when reading a slice
of file from existing MappedFileRegionArena.
Commit: e24f90190c772b6fdd915cd0a2e55cbd468c3024
https://github.com/llvm/llvm-project/commit/e24f90190c772b6fdd915cd0a2e55cbd468c3024
Author: Brad Smith <brad at comstyle.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/Driver/ToolChains/FreeBSD.h
M clang/test/Driver/aarch64-features.c
Log Message:
-----------
[Driver] Enable outline atomics for FreeBSD/aarch64 (#156089)
Commit: f74583fbe8f4aed755a8c0882cb40cd629e0d598
https://github.com/llvm/llvm-project/commit/f74583fbe8f4aed755a8c0882cb40cd629e0d598
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[offload] Fix build with debug libomptarget (#159144)
Currently get this error
```
offload/plugins-nextgen/common/src/PluginInterface.cpp:859:63: error: member reference type 'StringRef' is not a pointer; did you mean to use '.'?
```
We pass the full image binary now so we can't really print anything
useful here.
Seems introduced in https://github.com/llvm/llvm-project/pull/158748.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Commit: 7779882b4d27c231fbadc718734d5fc44bb44629
https://github.com/llvm/llvm-project/commit/7779882b4d27c231fbadc718734d5fc44bb44629
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
Log Message:
-----------
[DA] Add option to run only SIV routines (#157084)
This patch introduces a new option, `da-run-siv-routines-only`, which
runs only the SIV family routines in the DA. This is useful for testing
(regression tests, not dependence tests) as it helps detect behavioral
changes in the SIV routines. Actually, regarding the test cases added in
#157085, fixing the incorrect result requires changes across multiple
functions (at a minimum, `exactSIVtest`, `gcdMIVtest` and
`symbolicRDIVtest`). It is difficult to address all of them at once.
This patch also generates the CHECK directives using the new option for
`ExactSIV.ll` as it is necessary for subsequent patches. However, I
believe it will also be useful for other `xxSIV.ll` tests. Notably, the
SIV family routines tend to be affected by other routines, as they are
typically invoked at the beginning of the overall analysis.
Commit: 95388b2f2370d02fbe0b3c191470714edc179e44
https://github.com/llvm/llvm-project/commit/95388b2f2370d02fbe0b3c191470714edc179e44
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/invalid.mlir
Log Message:
-----------
[OpenACC] verify acc:DataOp operand not BlockArgument (#159148)
Similar to #158095, check that the operand of acc::DataOp is not a
BlockArgument before trying to get its defining operation so it will not
segfault and instead produce a clean error.
Commit: 027bccc4692923d0f1ba3d4d970071f747c2255c
https://github.com/llvm/llvm-project/commit/027bccc4692923d0f1ba3d4d970071f747c2255c
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/GlobalObject.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/StaticDataAnnotator.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/GlobalObjectTest.cpp
Log Message:
-----------
[NFCI][Globals] In GlobalObjects::setSectionPrefix, do conditional update if existing prefix is not equivalent to the new one. Returns whether prefix changed. (#158460)
Before this change, `setSectionPrefix` overwrites existing section
prefix with new one unconditionally.
After this change, `setSectionPrefix` checks for equivalences, updates
conditionally and returns whether an update happens.
Update the existing callers to make use of the return value. [PR
155337](https://github.com/llvm/llvm-project/pull/155337/files#diff-cc0c67ac89807f4453f0cfea9164944a4650cd6873a468a0f907e7158818eae9)
is a motivating use case whether the 'update' semantic is needed.
Commit: 32203e64455a722b89e1813e9d56870bb0a8dcf5
https://github.com/llvm/llvm-project/commit/32203e64455a722b89e1813e9d56870bb0a8dcf5
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
Log Message:
-----------
[DA] Add test where ExactSIV misses dependency due to overflow (NFC) (#157085)
This patch adds test cases where DA fails to detect dependencies due to
overflow during analysis. For now, they are added to `ExactSIV.ll`, but
`symbolicRDIVtest` and `gcdMIVtest` also exhibit similar issues and will
need to be fixed as well.
Commit: e07af8cbbfa2bd67c655e44ce648ede91a6ef8c7
https://github.com/llvm/llvm-project/commit/e07af8cbbfa2bd67c655e44ce648ede91a6ef8c7
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/Sema/HeuristicResolver.h
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][HeuristicResolver] Use HeuristicResolver to implement getApproximateType() in SemaCodeComplete (#156282)
This patch ports over the remaining functionality present in
SemaCodeComplete's getApproximateType() but not in HeuristicResolver,
into HeuristicResolver, and uses HeuristicResolver to reimplement
getApproximateType().
This has the effect of enhancing both code completion (which now
benefit from the full range of HeuristicResolver's capabilities), and
existing consumers of HeuristicResolver like clangd's go-to-definition
whose behaviour now has parity with code completion.
Fixes https://github.com/clangd/clangd/issues/2432
Commit: 81c55e67ad7d42afafd3952fa39af3aaaea6a9ba
https://github.com/llvm/llvm-project/commit/81c55e67ad7d42afafd3952fa39af3aaaea6a9ba
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Support/Windows/Program.inc
M llvm/unittests/Support/ProgramTest.cpp
Log Message:
-----------
Fix ExecuteAndWait with empty environment on Windows (#158719)
CreateProcessW requires that the environemnt block to be always double
null-terminated even with an empty environemnt.
https://learn.microsoft.com/en-us/windows/win32/procthread/environment-variables
The attached test fails this way without the fix.
C:\Users\hiroshi\upstream\llvm-project\llvm\unittests\Support\ProgramTest.cpp(697):
error: Value of: ExecutionFailed
Actual: true
Expected: false
Couldn't execute program
'C:\Users\hiroshi\upstream\llvm-project\build\unittests\Support\SupportTests.exe':
The parameter is incorrect. (0x57)
Commit: 26549262b3b7ad265d25586be4dca38d37d26069
https://github.com/llvm/llvm-project/commit/26549262b3b7ad265d25586be4dca38d37d26069
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/AST.h
M clang-tools-extra/clangd/Hover.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExpandDeducedType.cpp
M clang-tools-extra/clangd/unittests/ASTTests.cpp
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExpandDeducedTypeTests.cpp
Log Message:
-----------
[clangd] Use HeuristicResolver to try to resolve dependent 'auto' (#156283)
Fixes https://github.com/clangd/clangd/issues/2431
Commit: b7bf9dd9ae20aacf2f82b14c08c7316a588ba90c
https://github.com/llvm/llvm-project/commit/b7bf9dd9ae20aacf2f82b14c08c7316a588ba90c
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/MC/MCDwarf.cpp
M llvm/test/DebugInfo/X86/DW_AT_LLVM_stmt_seq_sec_offset.ll
M llvm/test/MC/ELF/debug-loc-label.s
Log Message:
-----------
Reapply "[DebugLine] Correct debug line emittion" (#158343) (#158379)
This reverts commit aabf18d7184298566993e3141606cd79ff617d2d.
#157529 included a test that used clang, which doesn't exists in some
CI. #158343 reverts it.
This PR reapplies the original patch with the incorrect test removed.
### Context
#99710 introduced `.loc_label` so we can terminate a line sequence.
However, it did not advance PC properly. This is problematic for
1-instruction functions as it will have zero-length sequence. The test
checked in that PR shows the problem:
```
# CHECK-LINE-TABLE: Address Line Column File ISA Discriminator OpIndex Flags
# CHECK-LINE-TABLE-NEXT: ------------------ ------ ------ ------ --- ------------- ------- -------------
# CHECK-LINE-TABLE-NEXT: 0x00000028: 05 DW_LNS_set_column (1)
# CHECK-LINE-TABLE-NEXT: 0x0000002a: 00 DW_LNE_set_address (0x0000000000000000)
# CHECK-LINE-TABLE-NEXT: 0x00000035: 01 DW_LNS_copy
# CHECK-LINE-TABLE-NEXT: 0x0000000000000000 1 1 1 0 0 0 is_stmt
# CHECK-LINE-TABLE-NEXT: 0x00000036: 00 DW_LNE_end_sequence
# CHECK-LINE-TABLE-NEXT: 0x0000000000000000 1 1 1 0 0 0 is_stmt end_sequence
```
Both rows having PC 0x0 is incorrect, and parsers won't be able to parse
them. See more explanation why this is wrong in #154851.
### Design
This PR attempts to fix this by advancing the PC to the next available
Label, and advance to the end of the section if no Label is available.
### Implementation
- `emitDwarfLineEndEntry` will advance PC to the `CurrLabel`
- If `CurrLabel` is null, its probably a fake LineEntry we introduced in
#110192. In that case look for the next Label
- If still not label can be found, use `null` and
`emitDwarfLineEndEntry` is smart enough to advance PC to the end of the
section
- Rename `LastLabel` to `PrevLabel`, "last" can mean "previous" or
"final", this is ambigous.
- Updated the tests to emit a correct label.
### Note
This fix should render #154986 and #154851 obsolete, they were temporary
fixes and don't resolve the root cause.
Commit: 2d8782766cffd8f72884e794f8a4dafcb0971b97
https://github.com/llvm/llvm-project/commit/2d8782766cffd8f72884e794f8a4dafcb0971b97
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
Log Message:
-----------
[clangd] Show type hint for simple cases of dependent 'auto' (#156284)
Fixes https://github.com/clangd/clangd/issues/2275
Commit: 480ad3d86818f76ed80060ccdcff03b14d1557b1
https://github.com/llvm/llvm-project/commit/480ad3d86818f76ed80060ccdcff03b14d1557b1
Author: David Pagan <dave.pagan at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/OpenMPKinds.def
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_defaultmap_codegen_03.cpp
M clang/test/OpenMP/target_defaultmap_messages.cpp
Log Message:
-----------
[clang][OpenMP] 6.0: Add defaultmap implicit-behavior 'private' (#158712)
Per OpenMP 6.0 specification, section 7.9.9
Argument keywords, page 291, L17
Semantics, page 292, L15-16
The behavior of 'private' should be described in the same manner as that
of 'firstprivate'
15 ... If implicit-behavior is firstprivate, 16 the attribute is a
data-sharing attribute of firstprivate.
Relevant OpenMP 6.0 issues
defaultmap clause new implicit-behavior 'private' should be documented
https://github.com/OpenMP/spec/issues/4571
Issue 4571: Add missing sentence about private to defaultmap
https://github.com/OpenMP/spec/pull/4577
Testing:
Updated 'defaultmap' error message and codegen LIT tests to verify
behavior of 'private' in OpenMP 6.0.
Commit: 081fe1d517f13f204ff06f50cb68fb6508dba0d7
https://github.com/llvm/llvm-project/commit/081fe1d517f13f204ff06f50cb68fb6508dba0d7
Author: Kim Gräsman <kim.grasman at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/AST/Type.h
Log Message:
-----------
Add IWYU export pragma to Type.h (#159154)
According to 249167a8982afc3f55237baf1532c5c8ebd850b3, users are
expected to include Type.h, which acts as a facade header for
TypeBase.h.
Add an IWYU export pragma to help IWYU reason about the relationship.
Commit: 158eeb344b22eb29591aa7883c40b9a85c988565
https://github.com/llvm/llvm-project/commit/158eeb344b22eb29591aa7883c40b9a85c988565
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
Log Message:
-----------
[AMDGPU] Change `scale_sel` to be 4 bits (#157900)
The latest SP changes updated it to use `OP_SEL[0:3]` instead of
`OP_SEL[0:2]`.
Fixes SWDEV-554472.
Commit: 8122ccdca9dd38d15927ba35d2c13fec1160320e
https://github.com/llvm/llvm-project/commit/8122ccdca9dd38d15927ba35d2c13fec1160320e
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
Log Message:
-----------
[AMDGPU] Set TGID_EN_X/Y/Z when cluster ID intrinsics are used (#159120)
Hardware initializes a single value in ttmp9 which is either the
workgroup ID X or cluster ID X. Most of this patch is a refactoring to
use a single `PreloadedValue` enumerator for this value, instead of two
enumerators `WORKGROUP_ID_X` and `CLUSTER_ID_X` referring to the same
value.
This makes it simpler to have a single attribute
`amdgpu-no-workgroup-id-x` indicating that this value is not used, which
in turns sets the TGID_EN_X bit appropriately to tell the hardware
whether to initialize it.
All of the above applies to Y and Z similarly.
Fixes: LWPSCGFX13-568
Co-authored-by: Jay Foad <jay.foad at amd.com>
Commit: 20d4e5cb8c51dc191e06554dd0d0def84a9edd0a
https://github.com/llvm/llvm-project/commit/20d4e5cb8c51dc191e06554dd0d0def84a9edd0a
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
R llvm/test/MC/WebAssembly/tag-section-decoding.ll
A llvm/test/MC/WebAssembly/tag-section-decoding.s
R llvm/test/MC/WebAssembly/tag-section.ll
A llvm/test/MC/WebAssembly/tag-section.s
Log Message:
-----------
[MC][WebAssembly] Convert tag section tests to assembly. NFC (#159141)
This avoids relying on higher level llvm internals such as the
well-known `__cpp_exception` tag but otherwise the tests remain
essentially unchanged.
Commit: 9277bcd1ab83fbfecfaaa5e15f3821808c5a6e38
https://github.com/llvm/llvm-project/commit/9277bcd1ab83fbfecfaaa5e15f3821808c5a6e38
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/GlobalObject.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/StaticDataAnnotator.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/unittests/IR/CMakeLists.txt
R llvm/unittests/IR/GlobalObjectTest.cpp
Log Message:
-----------
Revert "[NFCI][Globals] In GlobalObjects::setSectionPrefix, do conditional update if existing prefix is not equivalent to the new one. Returns whether prefix changed." (#159159)
Reverts llvm/llvm-project#158460 due to buildbot failures
Commit: ca8c5ef26243830a8d18d0d6ef1b514ab28efa8d
https://github.com/llvm/llvm-project/commit/ca8c5ef26243830a8d18d0d6ef1b514ab28efa8d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-identifier-naming in OpenACC.cpp (NFC)
Commit: c24b8e92fcc3c9a638b274cbd12d50d40f14c17e
https://github.com/llvm/llvm-project/commit/c24b8e92fcc3c9a638b274cbd12d50d40f14c17e
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/Driver/DTLTO/dtlto.c
M clang/test/Driver/DTLTO/ps5-dtlto.c
Log Message:
-----------
[DTLTO][TEST] Loosen Clang driver test regexes to fix buildbots (#159158)
Make the test regexes more permissive to fix buildbot failures caused by
the merge of PR #159129. This mirrors the earlier fix in PR #148908. We
retain cross-project-test coverage to verify that the path content is
correct.
A follow-up will update the tests to robustly check the Clang executable
filename, likely along the lines of PR #159151.
Short-term unbreak to keep the buildbots green without reverting a chain
of commits.
Commit: 984be7c5a7e34857577093c74dd9270227c0f887
https://github.com/llvm/llvm-project/commit/984be7c5a7e34857577093c74dd9270227c0f887
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] Disable more noisy GCC warnings (#159044)
This disables the following very noisy warning:
In file included from /usr/include/c++/13/string:51,
from /usr/include/c++/13/bits/locale_classes.h:40,
from /usr/include/c++/13/bits/ios_base.h:41,
from /usr/include/c++/13/streambuf:43,
from /usr/include/c++/13/bits/streambuf_iterator.h:35,
from /usr/include/c++/13/iterator:66,
from ../include/llvm/ADT/ADL.h:13,
from ../include/llvm/ADT/DenseMap.h:17,
from ../lib/Transforms/Vectorize/VPlanAnalysis.h:12,
from ../lib/Transforms/Vectorize/VPlan.h:27,
from ../lib/Transforms/Vectorize/LoopVectorizationPlanner.h:27, from
../lib/Transforms/Vectorize/VPlanConstruction.cpp:14:
In static member function ‘static _Up* std::__copy_move<_IsMove, true,
std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp =
llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove =
true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II =
llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>&
llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T
= llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1071:25,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T,
N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*;
unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at
../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void*
__builtin_memmove(void*, const void*, long unsigned int)’ forming offset
24 is out of the bounds [0, 24] of object ‘<anonymous>’ with type
‘llvm::DomTreeBuilder::SemiNCAInfo<llvm::DominatorTreeBase<llvm::VPBlockBase,
false> >::RootsT’ {aka ‘llvm::SmallVector<llvm::VPBlockBase*, 1>’}
[-Warray-bounds=]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from
../lib/Transforms/Vectorize/VPlanDominatorTree.h:23,
from ../lib/Transforms/Vectorize/VPlanConstruction.cpp:17:
../include/llvm/Support/GenericDomTreeConstruction.h: In static member
function ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note:
‘<anonymous>’ declared here
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
In static member function ‘static _Up* std::__copy_move<_IsMove, true,
std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp =
llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove =
true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II =
llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>&
llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T
= llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1094:14,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T,
N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*;
unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at
../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void*
__builtin_memmove(void*, const void*, long unsigned int)’ forming offset
24 is out of the bounds [0, 24] of object ‘<anonymous>’ with type
‘llvm::DomTreeBuilder::SemiNCAInfo<llvm::DominatorTreeBase<llvm::VPBlockBase,
false> >::RootsT’ {aka ‘llvm::SmallVector<llvm::VPBlockBase*, 1>’}
[-Warray-bounds=]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/llvm/Support/GenericDomTreeConstruction.h: In static member
function ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note:
‘<anonymous>’ declared here
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
In a regular build, there's currently 14 such warning instances, but
since they are so large and noisy, they are very disruptive, and they
don't seem to be an actual issue in the LLVM code base.
With the -Warray-bounds warning disabled, the build instead ends up with
9 similar warnings of the kind -Wstringop-overread:
In file included from /usr/include/c++/13/string:51,
from /usr/include/c++/13/bits/locale_classes.h:40,
from /usr/include/c++/13/bits/ios_base.h:41,
from /usr/include/c++/13/streambuf:43,
from /usr/include/c++/13/bits/streambuf_iterator.h:35,
from /usr/include/c++/13/iterator:66,
from ../include/llvm/ADT/ADL.h:13,
from ../include/llvm/ADT/DenseMap.h:17,
from ../lib/Transforms/Vectorize/VPlanAnalysis.h:12,
from ../lib/Transforms/Vectorize/VPlan.h:27,
from ../lib/Transforms/Vectorize/LoopVectorizationPlanner.h:27, from
../lib/Transforms/Vectorize/VPlanConstruction.cpp:14:
In static member function ‘static _Up* std::__copy_move<_IsMove, true,
std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp =
llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove =
true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II =
llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>&
llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T
= llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1071:25,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T,
N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*;
unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at
../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void*
__builtin_memmove(void*, const void*, long unsigned int)’ reading
between 9 and 34359738360 bytes from a region of size 8
[-Wstringop-overread]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from
../lib/Transforms/Vectorize/VPlanDominatorTree.h:23,
from ../lib/Transforms/Vectorize/VPlanConstruction.cpp:17:
../include/llvm/Support/GenericDomTreeConstruction.h: In static member
function ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note: at
offset 16 into source object ‘<anonymous>’ of size 24
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
In static member function ‘static _Up* std::__copy_move<_IsMove, true,
std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp =
llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove
= true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove =
true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II =
llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at
/usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>&
llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T
= llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1094:14,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T,
N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*;
unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at
../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void*
__builtin_memmove(void*, const void*, long unsigned int)’ reading
between 9 and 34359738352 bytes from a region of size 8
[-Wstringop-overread]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/llvm/Support/GenericDomTreeConstruction.h: In static member
function ‘static void
llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&,
BatchUpdatePtr) [with DomTreeT =
llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note: at
offset 16 into source object ‘<anonymous>’ of size 24
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
Disable both of these, as they are extremely spammy and seem to alert on
things that aren't an issue in LLVM.
Commit: 0df46c4f5a130d1c9046494bfab903a6c415a810
https://github.com/llvm/llvm-project/commit/0df46c4f5a130d1c9046494bfab903a6c415a810
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
Revert "[CMake] Disable more noisy GCC warnings (#159044)"
This reverts commit 984be7c5a7e34857577093c74dd9270227c0f887.
Commit: 06aaa0e02fa008fe15d2b1873627e067a3c9db7d
https://github.com/llvm/llvm-project/commit/06aaa0e02fa008fe15d2b1873627e067a3c9db7d
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] Disable more noisy GCC warnings (#159044)
This disables the following very noisy warning:
In file included from /usr/include/c++/13/string:51,
from /usr/include/c++/13/bits/locale_classes.h:40,
from /usr/include/c++/13/bits/ios_base.h:41,
from /usr/include/c++/13/streambuf:43,
from /usr/include/c++/13/bits/streambuf_iterator.h:35,
from /usr/include/c++/13/iterator:66,
from ../include/llvm/ADT/ADL.h:13,
from ../include/llvm/ADT/DenseMap.h:17,
from ../lib/Transforms/Vectorize/VPlanAnalysis.h:12,
from ../lib/Transforms/Vectorize/VPlan.h:27,
from ../lib/Transforms/Vectorize/LoopVectorizationPlanner.h:27, from ../lib/Transforms/Vectorize/VPlanConstruction.cpp:14:
In static member function ‘static _Up* std::__copy_move<_IsMove, true, std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp = llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>& llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T = llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1071:25,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T, N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*; unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at ../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void* __builtin_memmove(void*, const void*, long unsigned int)’ forming offset 24 is out of the bounds [0, 24] of object ‘<anonymous>’ with type ‘llvm::DomTreeBuilder::SemiNCAInfo<llvm::DominatorTreeBase<llvm::VPBlockBase, false> >::RootsT’ {aka ‘llvm::SmallVector<llvm::VPBlockBase*, 1>’} [-Warray-bounds=]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../lib/Transforms/Vectorize/VPlanDominatorTree.h:23,
from ../lib/Transforms/Vectorize/VPlanConstruction.cpp:17:
../include/llvm/Support/GenericDomTreeConstruction.h: In static member function ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note: ‘<anonymous>’ declared here
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
In static member function ‘static _Up* std::__copy_move<_IsMove, true, std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp = llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>& llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T = llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1094:14,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T, N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*; unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at ../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void* __builtin_memmove(void*, const void*, long unsigned int)’ forming offset 24 is out of the bounds [0, 24] of object ‘<anonymous>’ with type ‘llvm::DomTreeBuilder::SemiNCAInfo<llvm::DominatorTreeBase<llvm::VPBlockBase, false> >::RootsT’ {aka ‘llvm::SmallVector<llvm::VPBlockBase*, 1>’} [-Warray-bounds=]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/llvm/Support/GenericDomTreeConstruction.h: In static member function ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note: ‘<anonymous>’ declared here
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
In a regular build, there's currently 14 such warning instances,
but since they are so large and noisy, they are very disruptive,
and they don't seem to be an actual issue in the LLVM code base.
With the -Warray-bounds warning disabled, the build instead ends
up with 9 similar warnings of the kind -Wstringop-overread:
In file included from /usr/include/c++/13/string:51,
from /usr/include/c++/13/bits/locale_classes.h:40,
from /usr/include/c++/13/bits/ios_base.h:41,
from /usr/include/c++/13/streambuf:43,
from /usr/include/c++/13/bits/streambuf_iterator.h:35,
from /usr/include/c++/13/iterator:66,
from ../include/llvm/ADT/ADL.h:13,
from ../include/llvm/ADT/DenseMap.h:17,
from ../lib/Transforms/Vectorize/VPlanAnalysis.h:12,
from ../lib/Transforms/Vectorize/VPlan.h:27,
from ../lib/Transforms/Vectorize/LoopVectorizationPlanner.h:27, from ../lib/Transforms/Vectorize/VPlanConstruction.cpp:14:
In static member function ‘static _Up* std::__copy_move<_IsMove, true, std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp = llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>& llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T = llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1071:25,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T, N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*; unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at ../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void* __builtin_memmove(void*, const void*, long unsigned int)’ reading between 9 and 34359738360 bytes from a region of size 8 [-Wstringop-overread]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../lib/Transforms/Vectorize/VPlanDominatorTree.h:23,
from ../lib/Transforms/Vectorize/VPlanConstruction.cpp:17:
../include/llvm/Support/GenericDomTreeConstruction.h: In static member function ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note: at offset 16 into source object ‘<anonymous>’ of size 24
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
In static member function ‘static _Up* std::__copy_move<_IsMove, true, std::random_access_iterator_tag>::__copy_m(_Tp*, _Tp*, _Up*) [with _Tp = llvm::VPBlockBase*; _Up = llvm::VPBlockBase*; bool _IsMove = true]’,
inlined from ‘_OI std::__copy_move_a2(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:506:30,
inlined from ‘_OI std::__copy_move_a1(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:533:42,
inlined from ‘_OI std::__copy_move_a(_II, _II, _OI) [with bool _IsMove = true; _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:540:31,
inlined from ‘_OI std::move(_II, _II, _OI) [with _II = llvm::VPBlockBase**; _OI = llvm::VPBlockBase**]’ at /usr/include/c++/13/bits/stl_algobase.h:665:38,
inlined from ‘llvm::SmallVectorImpl<T>& llvm::SmallVectorImpl<T>::operator=(llvm::SmallVectorImpl<T>&&) [with T = llvm::VPBlockBase*]’ at ../include/llvm/ADT/SmallVector.h:1094:14,
inlined from ‘llvm::SmallVector<T, N>& llvm::SmallVector<T, N>::operator=(llvm::SmallVector<T, N>&&) [with T = llvm::VPBlockBase*; unsigned int N = 1]’ at ../include/llvm/ADT/SmallVector.h:1259:36,
inlined from ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’ at ../include/llvm/Support/GenericDomTreeConstruction.h:578:14:
/usr/include/c++/13/bits/stl_algobase.h:437:30: warning: ‘void* __builtin_memmove(void*, const void*, long unsigned int)’ reading between 9 and 34359738352 bytes from a region of size 8 [-Wstringop-overread]
437 | __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);
| ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/llvm/Support/GenericDomTreeConstruction.h: In static member function ‘static void llvm::DomTreeBuilder::SemiNCAInfo<DomTreeT>::CalculateFromScratch(DomTreeT&, BatchUpdatePtr) [with DomTreeT = llvm::DominatorTreeBase<llvm::VPBlockBase, false>]’:
../include/llvm/Support/GenericDomTreeConstruction.h:578:25: note: at offset 16 into source object ‘<anonymous>’ of size 24
578 | DT.Roots = FindRoots(DT, PostViewBUI);
| ~~~~~~~~~^~~~~~~~~~~~~~~~~
Disable both of these, as they are extremely spammy and seem to
alert on things that aren't an issue in LLVM.
Commit: f15fbd1e9e90f0d639d7283c64ee08f9cd2d0e31
https://github.com/llvm/llvm-project/commit/f15fbd1e9e90f0d639d7283c64ee08f9cd2d0e31
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/vk_binding_attr.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
Log Message:
-----------
[HLSL] Use static create methods to initialize individual resources (#156544)
Use static methods `__createFromBinding` and `__createFromImplicitBinding` to initialize individual resources in Sema
HLSL instead of calling resource constructor with binding information per proposal update https://github.com/llvm/wg-hlsl/pull/336.
Initialization of resources in arrays will be updated in a separate change because that happens in the codegen layer.
Test updates include the use of the `llvm-cxxfilt` tool which takes care of demangling of function names for a more readable test baseline.
Commit: 8b3c91c4fb1b8efaccb71894684e4fb16b0e8945
https://github.com/llvm/llvm-project/commit/8b3c91c4fb1b8efaccb71894684e4fb16b0e8945
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/GlobalObject.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/StaticDataAnnotator.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/GlobalObjectTest.cpp
Log Message:
-----------
Re-apply "[NFCI][Globals] In GlobalObjects::setSectionPrefix, do conditional update if existing prefix is not equivalent to the new one. Returns whether prefix changed." (#159161)
This is a reland of https://github.com/llvm/llvm-project/pull/158460
Test failures are gone once I undo the changes in codegenprepare.
Commit: 4a094095a42d43ba8f7326efa3e9fdc9f03bc467
https://github.com/llvm/llvm-project/commit/4a094095a42d43ba8f7326efa3e9fdc9f03bc467
Author: Alan Li <me at alanli.org>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/lib/Dialect/MemRef/Transforms/FlattenMemRefs.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
A mlir/test/Dialect/Vector/flatten-memref-and-emulate-narrow-types.mlir
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
Log Message:
-----------
[MLIR] Make 1-D memref flattening a prerequisite for vector narrow type emulation (#157771)
Addresses: https://github.com/llvm/llvm-project/issues/115653
We already have utilities to flatten memrefs into 1-D. This change makes
memref flattening a prerequisite for vector narrow type emulation,
ensuring that emulation patterns only need to handle 1-D scenarios.
Commit: f562e2a6f5b362f0deabd0234dfdeb702c9b2d5e
https://github.com/llvm/llvm-project/commit/f562e2a6f5b362f0deabd0234dfdeb702c9b2d5e
Author: David Green <david.green at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/reduce-add.ll
M llvm/test/Analysis/CostModel/ARM/reduce-and.ll
M llvm/test/Analysis/CostModel/ARM/reduce-bit.ll
M llvm/test/Analysis/CostModel/ARM/reduce-fminmax.ll
M llvm/test/Analysis/CostModel/ARM/reduce-fp.ll
M llvm/test/Analysis/CostModel/ARM/reduce-or.ll
M llvm/test/Analysis/CostModel/ARM/reduce-smax.ll
M llvm/test/Analysis/CostModel/ARM/reduce-smin.ll
M llvm/test/Analysis/CostModel/ARM/reduce-umax.ll
M llvm/test/Analysis/CostModel/ARM/reduce-umin.ll
Log Message:
-----------
[ARM] Update a number of reduction tests to use -cost-kind=all. NFC
Commit: ec7a5b4028d192bf1f674554ffd2cfab5ae31412
https://github.com/llvm/llvm-project/commit/ec7a5b4028d192bf1f674554ffd2cfab5ae31412
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/include/llvm/Option/ArgList.h
Log Message:
-----------
[Option] Mark getLastArg(NoClaim) as noinline. (#157163)
After https://github.com/llvm/llvm-project/pull/156730,
getLastArg(NoClaim) are now just below the inlining threshold and
inlining them causes +0.44% code size increase for Clang and a
corresponding compile-time increase without helping compile-time.
Mark them as noinline to recover the original codesize.
http://llvm-compile-time-tracker.com/compare.php?from=a271d07488a85ce677674bbe8101b10efff58c95&to=3b7b312476da2a2b1fd44815532edf9987da337e&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/157163
Commit: a3762fb2405475c46c18a647f18d342f5e2332e3
https://github.com/llvm/llvm-project/commit/a3762fb2405475c46c18a647f18d342f5e2332e3
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[AMDGPU] Add missing bf16-pk-insts feature to gfx1250 (#159167)
Commit: 0021a6b78cac45604416aef7c28436e83c9ce09e
https://github.com/llvm/llvm-project/commit/0021a6b78cac45604416aef7c28436e83c9ce09e
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/XeVMDialect.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/xevm.mlir
Log Message:
-----------
[MLIR][XeVM] Add xevm blockload and blockstore op definition. (#158118)
Add op definition for subgroup block load and store ops:
xevm.blockload and xevm.blockstore
links to related specs:
cl_intel_subgroup: https://registry.khronos.org/OpenCL/extensions/intel/cl_intel_subgroups.html#_add_a_new_section_6_13_x_sub_group_read_and_write_functions
cl_intel_subgroup_local_block_io:
https://registry.khronos.org/OpenCL/extensions/intel/cl_intel_subgroup_local_block_io.html
SPV_INTEL_subgroups:
https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_subgroups.html
Commit: 0ed9a4fb86aeaf24b8a8290d00432095ce0b5d64
https://github.com/llvm/llvm-project/commit/0ed9a4fb86aeaf24b8a8290d00432095ce0b5d64
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn build] Port 8b3c91c4fb1b
Commit: 973f26a2b42c8a81471f5e3da3549f1db3b1ffb2
https://github.com/llvm/llvm-project/commit/973f26a2b42c8a81471f5e3da3549f1db3b1ffb2
Author: Théo Degioanni <theo.degioanni.llvm.deluge062 at simplelogin.fr>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[GitHub] [NFC] Add moxinilian to IRDL CODEOWNERS (#159135)
This is so I get notified when an IRDL file is updated.
Commit: 22625538cb13df55cc2ff71831f55b8042f9a26c
https://github.com/llvm/llvm-project/commit/22625538cb13df55cc2ff71831f55b8042f9a26c
Author: David Green <david.green at arm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
A llvm/test/Analysis/CostModel/ARM/abs.ll
Log Message:
-----------
[ARM] Add a quick abs scalar costmodel test. NFC
Commit: 66524ee7d0fd0f932924f1927459d68d6375fdc3
https://github.com/llvm/llvm-project/commit/66524ee7d0fd0f932924f1927459d68d6375fdc3
Author: Tulio Magno Quites Machado Filho <tuliom at redhat.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M openmp/docs/SupportAndFAQ.rst
Log Message:
-----------
[OpenMP] Document how to specify flags to device libraries (#159053)
Add an explanation on how to use RUNTIMES_<triple>_CMAKE_CXX_FLAGS in
order to specify different compiler flags for OpenMP device libraries.
Commit: 59e43fe5d8588d4b77b2ebd5683e6206428743c9
https://github.com/llvm/llvm-project/commit/59e43fe5d8588d4b77b2ebd5683e6206428743c9
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
Enable string-length wide-reads by default in bazel. (#159177)
Commit: 4ab8dabc252f802134bfea6193f9a274f0bdc143
https://github.com/llvm/llvm-project/commit/4ab8dabc252f802134bfea6193f9a274f0bdc143
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
A llvm/test/CodeGen/AMDGPU/lower-intrinsics-cluster-barrier.ll
Log Message:
-----------
[AMDGPU] Add s_cluster_barrier on gfx1250 (#159175)
Commit: 0e5c32bd6d305f417d1b4fc023616711206eccc4
https://github.com/llvm/llvm-project/commit/0e5c32bd6d305f417d1b4fc023616711206eccc4
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[MLIR][Vector] Add unrolling pattern for vector StepOp (#157752)
This PR adds unrolling pattern for vector.step op to VectorUnroll
transform.
Commit: 7c861bcedf61607b6c087380ac711eb7ff918ca6
https://github.com/llvm/llvm-project/commit/7c861bcedf61607b6c087380ac711eb7ff918ca6
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Support/Windows/Program.inc
Log Message:
-----------
Fix comment from https://github.com/llvm/llvm-project/pull/158719 (#159157)
Commit: 9855d546a4bfc607631d0e2aa5bae366d9483351
https://github.com/llvm/llvm-project/commit/9855d546a4bfc607631d0e2aa5bae366d9483351
Author: cmtice <cmtice at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M lldb/docs/dil-expr-lang.ebnf
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILLexer.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/frame/var-dil/expr/Literals/TestFrameVarDILLiterals.py
Log Message:
-----------
[LLDB] Add boolean literals to DIL. (#157992)
This adds the ability to recognize (and create ValueObjects for) boolean
literals ("true", "false") to DIL. This is a preliminary step to adding
type casting (and also for the ternary op).
Commit: e87e028847638b1d405a92d818c67355e916f566
https://github.com/llvm/llvm-project/commit/e87e028847638b1d405a92d818c67355e916f566
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/resources/res-array-global-dyn-index.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-multi-dim.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-subarray-many.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-subarray-one.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-unbounded.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
Log Message:
-----------
[HLSL] Use static create methods to initialize resources in arrays (#157005)
Use static methods `__createFromBinding` and `__createFromImplicitBinding` to initialize resources in resource arrays
instead of calling resource constructors with binding information, per proposal update https://github.com/llvm/wg-hlsl/pull/336.
Test updates include the use of the `llvm-cxxfilt` tool which takes care of demangling of function names for a more readable test baseline.
Commit: 82acc31fd4b26723b61dae76da120c0c649d0b97
https://github.com/llvm/llvm-project/commit/82acc31fd4b26723b61dae76da120c0c649d0b97
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/MC/MCDecoderOps.h
M llvm/test/TableGen/DecoderEmitter/additional-encoding.td
M llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
M llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
M llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
M llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Merge OPC_Decode with OPC_TryDecode (#159178)
OPC_Decode is a specialized OPC_TryDecode. The difference between them
is that OPC_TryDecode performs a "completeness check", while OPC_Decode
asserts that the check passes.
The check is just a boolean test, which is nothing compared to the
complexity of the decoding process, so there is no point in having a
special opcode that optimizes the check.
Commit: 87bceae3fc64359c5a6ca362b466f8e938f4986c
https://github.com/llvm/llvm-project/commit/87bceae3fc64359c5a6ca362b466f8e938f4986c
Author: Vy Nguyen <vyng at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/Rewriter/objc-string-concat-1.m
Log Message:
-----------
[clang][nfc]Disable warning triggered in tests (#159216)
Commit: 7bdd88c1e3a70d8213f8bc68403fbd844f11b00c
https://github.com/llvm/llvm-project/commit/7bdd88c1e3a70d8213f8bc68403fbd844f11b00c
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/lib/Dialect/Vector/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Vector/Transforms/LowerVectorShuffle.cpp
A mlir/test/Dialect/Vector/vector-shuffle-lowering.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][Vector] Add patterns to lower `vector.shuffle` (#157611)
This PR adds patterns to lower `vector.shuffle` with inputs with
different vector sizes more efficiently. The current LLVM lowering for
these cases degenerates to a sequence of `vector.extract` and
`vector.insert` operations. With this PR, the smaller input is promoted
to larger vector size by introducing an extra `vector.shuffle`.
Commit: 96ce9f9d646efbba6aa52555004ac7ffe269b799
https://github.com/llvm/llvm-project/commit/96ce9f9d646efbba6aa52555004ac7ffe269b799
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-control-flow.ll
Log Message:
-----------
[AMDGPU] Prevent re-visits in LowerBufferFatPointers (#159168)
Fixes https://github.com/iree-org/iree/issues/22001
The visitor in SplitPtrStructs would re-visit instructions if an
instruction earlier in program order caused a recursive visit() call via
getPtrParts(). This would cause instructions to be processed multiple
times.
As a consequence of this, PHI nodes could be added to the Conditionals
array multiple times, which would to a conditinoal that was already
simplified being processed multiple times. After the code moved to
InstSimplifyFolder, this re-processing, combined with more agressive
simplifications, would lead to an attempt to replace an instruction with
itself, causing an assertion failure and crash.
This commit resolves the issue and adds the reduced form of the crashing
input as a test.
Commit: 799b80d47abe27d3dbf6ae19cda426021c90d045
https://github.com/llvm/llvm-project/commit/799b80d47abe27d3dbf6ae19cda426021c90d045
Author: hev <wangrui at loongson.cn>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
Log Message:
-----------
[LoongArch] Fix instruction selection failure for BUILD_VECTOR on LA32 (#158788)
Fixes #158625
Commit: cbd99c55a343096d74ecb2fb0825aa54350210cb
https://github.com/llvm/llvm-project/commit/cbd99c55a343096d74ecb2fb0825aa54350210cb
Author: Luo, Yuanke <lyk_03 at hotmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/R600Packetizer.cpp
A llvm/test/TableGen/DFAPacketizer.td
M llvm/utils/TableGen/DFAPacketizerEmitter.cpp
Log Message:
-----------
[TableGen] Add mapping from processor ID to resource index for packetizer (#158182)
Tablegen would generate code to access TargetResourceIndices with
processor ID.
The TargetProcResourceIndexStart[] array is generated for each processor
which has itineraries. The processor which doesn't has itineraries is excluded
from the array. When a target has mixed processors, the processor ID may
exceed the array size and cause the error.
This patch is to generate a table mapping processor with itineraries to
resource index, so that scheduler can get the correct resource index with
processor ID.
Commit: 046d6a39983a9a4ea97343167c92cf8a0a6ff325
https://github.com/llvm/llvm-project/commit/046d6a39983a9a4ea97343167c92cf8a0a6ff325
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/test/Fir/convert-to-llvm.fir
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[Flang][OpenMP] Additional global address space modifications for device (#119585)
A prior PR added a portion of the global address space modifications
required for declare target to, this PR seeks to add
a small amount more leftover from that PR.
The intent is to allow for more correct IR that the backends (in
particular AMDGPU) can treat more aptly for optimisations and code
correctness
1/3 required PRs to enable declare target to mapping, should look at PR
3/3 to check for full green passes (this one will fail a number due to
some dependencies).
Co-authored-by: Raghu Maddhipatla raghu.maddhipatla at amd.com
Commit: 6b07b05daad59141546b0b4a6ce7887f9660cf96
https://github.com/llvm/llvm-project/commit/6b07b05daad59141546b0b4a6ce7887f9660cf96
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/tools/llvm-mca/llvm-mca.cpp
Log Message:
-----------
llvm-mca: Remove unnecessary reconstruction of Triple (#159213)
Commit: 35d6ee63ae0db05c1e1ee2f21a19f5270b24136d
https://github.com/llvm/llvm-project/commit/35d6ee63ae0db05c1e1ee2f21a19f5270b24136d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/tools/llvm-mca/llvm-mca.cpp
Log Message:
-----------
llvm-mca: Error on MCSubtargetInfo construction failure (#159215)
Replace assert with a handled error. The same should probably
be done for all of the MC constructors.
Commit: 049310353ed37d98749fbb060273618230a42787
https://github.com/llvm/llvm-project/commit/049310353ed37d98749fbb060273618230a42787
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/Driver/clang_f_opts.c
Log Message:
-----------
NFC: Use descriptive FileCheck prefixes for exec/input-charset
Fixes incorrect use of `INPUT-CHARSET` for `exec-charset` test, etc.
Commit: 2cc8d27b41ef055df71b8e4ffa4c34f031b02dee
https://github.com/llvm/llvm-project/commit/2cc8d27b41ef055df71b8e4ffa4c34f031b02dee
Author: Tomás Longeri <tlongeri at google.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix bazel build after 4a09409 (#159217)
Commit: d05b7f1bb3e16ce37c1d17cfb170440e09244ce1
https://github.com/llvm/llvm-project/commit/d05b7f1bb3e16ce37c1d17cfb170440e09244ce1
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang-tools-extra/CMakeLists.txt
M clang-tools-extra/clang-tidy/CMakeLists.txt
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidy.h
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.h
M clang-tools-extra/clang-tidy/ClangTidyForceLinker.h
M clang-tools-extra/clang-tidy/ClangTidyModule.h
M clang-tools-extra/clang-tidy/ClangTidyOptions.cpp
M clang-tools-extra/clang-tidy/ClangTidyOptions.h
M clang-tools-extra/clang-tidy/clang-tidy-config.h.cmake
A clang-tools-extra/clang-tidy/custom/CMakeLists.txt
A clang-tools-extra/clang-tidy/custom/CustomTidyModule.cpp
A clang-tools-extra/clang-tidy/custom/QueryCheck.cpp
A clang-tools-extra/clang-tidy/custom/QueryCheck.h
M clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
A clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
M clang-tools-extra/docs/clang-tidy/index.rst
M clang-tools-extra/test/clang-tidy/check_clang_tidy.py
A clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/clang-tidy.yml
A clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/incorrect-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/checkers/custom/query-incorrect-query.cpp
A clang-tools-extra/test/clang-tidy/checkers/custom/query-partially-active-check.cpp
A clang-tools-extra/test/clang-tidy/checkers/custom/query.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/append-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/empty-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/override-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/root-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/vfsoverlay.yaml
A clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check-not-enable.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
M clang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
Log Message:
-----------
[clang-tidy] support query based custom check (#131804)
## summary
### Design for Compatibility
For new field design
1. we must make sure the required fields do not change in quiet long
time.
2. we should tolerant the unknown optional field (do not exist now) in
the future.
For large project integration (3rd party)
1. For config itself, since we can tolerant the unknown optional fields
and required fields should not change, the user can decide whether to
use custom check from third-party.
2.For clang-query, if there are some break change, since the query will
be parsed at check time, the user can disable the check and it will not
damage the whole clang-tidy
----
Inherit from #123734
RFC:
https://discourse.llvm.org/t/support-query-based-clang-tidy-external-check/85331
this patch introduce query based custom check by `CustomChecks` options.
The major improvement compared with #123734:
1. don't need to define config yaml file in command line
4. all behavior including `InheritFromParantConfig` is same as other
config.
6. change configuration schema from KV structured to List structured to
make extend new function easier.
7. Split bind string and diag message to two field to give more freedom
to design query.
example:
```yaml
Checks: -*,custom-call-main-function
CustomChecks:
- Name: call-main-function
Query: |
match callExpr(
callee(
functionDecl(isMain()).bind("fn")
)
).bind("callee")
Diagnostic:
- BindName: fn
Message: main function.
Level: Note
- BindName: callee
Message: call to main function.
Level: Warning
```
```c++
int main(); // note: main function.
void bar() {
main(); // warning: call to main function. [custom-call-main-function]
}
```
---
To make this PR don't do too much things that hard to review, here are
some possible features not included in this PR
- support language
- support traverse
- easier used template string in diagnostics message
---------
Co-authored-by: DeNiCoN <denicon1234 at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: f7f7abcde48fe1bcf6eaecd06bf2946bdaaf200d
https://github.com/llvm/llvm-project/commit/f7f7abcde48fe1bcf6eaecd06bf2946bdaaf200d
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/propagate-amdgpu-cluster-dims.ll
Log Message:
-----------
[NFC][AMDGPU] Add a missing test case about cluster dims (#159179)
Commit: 7dc7d0e1294cd29fb13b53aaca3f97c266bcbd3d
https://github.com/llvm/llvm-project/commit/7dc7d0e1294cd29fb13b53aaca3f97c266bcbd3d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
Log Message:
-----------
AMDGPU: Remove subtarget feature hacking in AsmParser (#159227)
The wavesize hacking part was already done in
createAMDGPUMCSubtargetInfo, and we can move the default
target hack there too.
Commit: a57c583861d209f440ffa937a29979e116b4716e
https://github.com/llvm/llvm-project/commit/a57c583861d209f440ffa937a29979e116b4716e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/tools/llvm-ml/llvm-ml.cpp
Log Message:
-----------
llvm-ml: Error on MCSubtargetInfo construction failure (#159221)
Replace assert with an error.
Commit: a90a7efc59f816fe0e7ad2a437f8693393432237
https://github.com/llvm/llvm-project/commit/a90a7efc59f816fe0e7ad2a437f8693393432237
Author: Hubert Tong <hstong at ca.ibm.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/Driver/clang_f_opts.c
Log Message:
-----------
Revert "NFC: Use descriptive FileCheck prefixes for exec/input-charset"
This reverts commit 049310353ed37d98749fbb060273618230a42787.
Commit: ee9348002ae065e208c1d4ce487d13c34ae53f86
https://github.com/llvm/llvm-project/commit/ee9348002ae065e208c1d4ce487d13c34ae53f86
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M clang/test/Driver/clang_f_opts.c
Log Message:
-----------
NFC: Use descriptive FileCheck prefixes for exec/input-charset
Fixes incorrect use of `INPUT-CHARSET` for `exec-charset` test, etc.
Commit: ef45c9756ad571e5dda3558b3fe6272237b83c26
https://github.com/llvm/llvm-project/commit/ef45c9756ad571e5dda3558b3fe6272237b83c26
Author: Weibo He <NewSigma at 163.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-builtins.c
M clang/test/CodeGenCoroutines/coro-eh-cleanup.cpp
M clang/test/CodeGenCoroutines/coro-lambda.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
M llvm/docs/Coroutines.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Coroutines/CoroInstr.h
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Analysis/GlobalsModRef/nonescaping-noalias.ll
M llvm/test/Assembler/auto_upgrade_intrinsics.ll
M llvm/test/Instrumentation/AddressSanitizer/coro-byval-param.ll
M llvm/test/Instrumentation/HWAddressSanitizer/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/ArgAddr.ll
M llvm/test/Transforms/Coroutines/coro-align16.ll
M llvm/test/Transforms/Coroutines/coro-align32.ll
M llvm/test/Transforms/Coroutines/coro-align64-02.ll
M llvm/test/Transforms/Coroutines/coro-align64.ll
M llvm/test/Transforms/Coroutines/coro-align8-02.ll
M llvm/test/Transforms/Coroutines/coro-align8.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O0.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O2.ll
M llvm/test/Transforms/Coroutines/coro-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-alloca-06.ll
M llvm/test/Transforms/Coroutines/coro-alloca-07.ll
M llvm/test/Transforms/Coroutines/coro-alloca-08.ll
M llvm/test/Transforms/Coroutines/coro-alloca-09.ll
M llvm/test/Transforms/Coroutines/coro-alloca-loop-carried-address.ll
M llvm/test/Transforms/Coroutines/coro-alloca-outside-frame.ll
M llvm/test/Transforms/Coroutines/coro-alloca-with-addrspace.ll
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-infinite-loop-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-start-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-coro-id-async-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-declaration.ll
M llvm/test/Transforms/Coroutines/coro-async-dyn-align.ll
M llvm/test/Transforms/Coroutines/coro-async-end-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-no-cse-swift-async-context-addr.ll
M llvm/test/Transforms/Coroutines/coro-async-nomerge.ll
M llvm/test/Transforms/Coroutines/coro-async-phi.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-handle-in-ramp.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch-cleanuppad.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch.ll
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values-not_used_in_frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/Coroutines/coro-debug-spill-dbg.declare.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
M llvm/test/Transforms/Coroutines/coro-early-twice.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-00.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-00.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-frame-unreachable.ll
M llvm/test/Transforms/Coroutines/coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-lifetime-end.ll
M llvm/test/Transforms/Coroutines/coro-materialize.ll
M llvm/test/Transforms/Coroutines/coro-noalias-param.ll
M llvm/test/Transforms/Coroutines/coro-only-destroy-when-complete.ll
M llvm/test/Transforms/Coroutines/coro-padding.ll
M llvm/test/Transforms/Coroutines/coro-param-copy.ll
M llvm/test/Transforms/Coroutines/coro-readnone-02.ll
M llvm/test/Transforms/Coroutines/coro-readnone.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca.ll
M llvm/test/Transforms/Coroutines/coro-retcon-frame.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-private.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value2.ll
M llvm/test/Transforms/Coroutines/coro-retcon-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon-remat.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values2.ll
M llvm/test/Transforms/Coroutines/coro-retcon-unreachable.ll
M llvm/test/Transforms/Coroutines/coro-retcon-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon.ll
M llvm/test/Transforms/Coroutines/coro-spill-after-phi.ll
M llvm/test/Transforms/Coroutines/coro-spill-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise-02.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise.ll
M llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-00.ll
M llvm/test/Transforms/Coroutines/coro-split-01.ll
M llvm/test/Transforms/Coroutines/coro-split-02.ll
M llvm/test/Transforms/Coroutines/coro-split-alloc.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels-inlined.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-00.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-01.ll
M llvm/test/Transforms/Coroutines/coro-split-final-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-hidden.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail-chain-pgo-counter-promo.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail-ppc64le.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail1.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail10.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail12.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail13.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail2.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail3.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail4.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail5.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail6.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail7.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail8.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail9.ll
M llvm/test/Transforms/Coroutines/coro-split-no-lifetime.ll
M llvm/test/Transforms/Coroutines/coro-split-noinline.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-swifterror.ll
M llvm/test/Transforms/Coroutines/coro-zero-alloca.ll
M llvm/test/Transforms/Coroutines/ex0.ll
M llvm/test/Transforms/Coroutines/ex1.ll
M llvm/test/Transforms/Coroutines/ex2.ll
M llvm/test/Transforms/Coroutines/ex3.ll
M llvm/test/Transforms/Coroutines/ex4.ll
M llvm/test/Transforms/Coroutines/ex5.ll
M llvm/test/Transforms/Coroutines/no-suspend.ll
M llvm/test/Transforms/Coroutines/phi-coro-end.ll
M llvm/test/Transforms/Coroutines/remarks.ll
M llvm/test/Transforms/Coroutines/swift-async-dbg.ll
M llvm/test/Transforms/FunctionAttrs/noreturn.ll
M llvm/test/Transforms/LICM/sink-with-coroutine.ll
M llvm/unittests/Transforms/Coroutines/ExtraRematTest.cpp
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
Reapply "[Coroutines] Add llvm.coro.is_in_ramp and drop return value of llvm.coro.end #153404" (#155339)
As mentioned in #151067, current design of llvm.coro.end mixes two
functionalities: querying where we are and lowering to some code. This
patch separate these functionalities into independent intrinsics by
introducing a new intrinsic llvm.coro.is_in_ramp.
Commit: be6129ab6b08965c50f68490f330bb7e2015b6cf
https://github.com/llvm/llvm-project/commit/be6129ab6b08965c50f68490f330bb7e2015b6cf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
Log Message:
-----------
llvm-exegesis: Error on MCSubtargetInfo construction failure (#159223)
Commit: a2644537505989b227a3bbb19ea8ff6976c1dba7
https://github.com/llvm/llvm-project/commit/a2644537505989b227a3bbb19ea8ff6976c1dba7
Author: Weibo He <NewSigma at 163.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-builtins.c
M clang/test/CodeGenCoroutines/coro-eh-cleanup.cpp
M clang/test/CodeGenCoroutines/coro-lambda.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
M llvm/docs/Coroutines.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Coroutines/CoroInstr.h
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Analysis/GlobalsModRef/nonescaping-noalias.ll
M llvm/test/Assembler/auto_upgrade_intrinsics.ll
M llvm/test/Instrumentation/AddressSanitizer/coro-byval-param.ll
M llvm/test/Instrumentation/HWAddressSanitizer/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/ArgAddr.ll
M llvm/test/Transforms/Coroutines/coro-align16.ll
M llvm/test/Transforms/Coroutines/coro-align32.ll
M llvm/test/Transforms/Coroutines/coro-align64-02.ll
M llvm/test/Transforms/Coroutines/coro-align64.ll
M llvm/test/Transforms/Coroutines/coro-align8-02.ll
M llvm/test/Transforms/Coroutines/coro-align8.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O0.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O2.ll
M llvm/test/Transforms/Coroutines/coro-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-alloca-06.ll
M llvm/test/Transforms/Coroutines/coro-alloca-07.ll
M llvm/test/Transforms/Coroutines/coro-alloca-08.ll
M llvm/test/Transforms/Coroutines/coro-alloca-09.ll
M llvm/test/Transforms/Coroutines/coro-alloca-loop-carried-address.ll
M llvm/test/Transforms/Coroutines/coro-alloca-outside-frame.ll
M llvm/test/Transforms/Coroutines/coro-alloca-with-addrspace.ll
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-infinite-loop-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-start-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-coro-id-async-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-declaration.ll
M llvm/test/Transforms/Coroutines/coro-async-dyn-align.ll
M llvm/test/Transforms/Coroutines/coro-async-end-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-no-cse-swift-async-context-addr.ll
M llvm/test/Transforms/Coroutines/coro-async-nomerge.ll
M llvm/test/Transforms/Coroutines/coro-async-phi.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-handle-in-ramp.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch-cleanuppad.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch.ll
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values-not_used_in_frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/Coroutines/coro-debug-spill-dbg.declare.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
M llvm/test/Transforms/Coroutines/coro-early-twice.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-00.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-00.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-frame-unreachable.ll
M llvm/test/Transforms/Coroutines/coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-lifetime-end.ll
M llvm/test/Transforms/Coroutines/coro-materialize.ll
M llvm/test/Transforms/Coroutines/coro-noalias-param.ll
M llvm/test/Transforms/Coroutines/coro-only-destroy-when-complete.ll
M llvm/test/Transforms/Coroutines/coro-padding.ll
M llvm/test/Transforms/Coroutines/coro-param-copy.ll
M llvm/test/Transforms/Coroutines/coro-readnone-02.ll
M llvm/test/Transforms/Coroutines/coro-readnone.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca.ll
M llvm/test/Transforms/Coroutines/coro-retcon-frame.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-private.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value2.ll
M llvm/test/Transforms/Coroutines/coro-retcon-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon-remat.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values2.ll
M llvm/test/Transforms/Coroutines/coro-retcon-unreachable.ll
M llvm/test/Transforms/Coroutines/coro-retcon-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon.ll
M llvm/test/Transforms/Coroutines/coro-spill-after-phi.ll
M llvm/test/Transforms/Coroutines/coro-spill-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise-02.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise.ll
M llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-00.ll
M llvm/test/Transforms/Coroutines/coro-split-01.ll
M llvm/test/Transforms/Coroutines/coro-split-02.ll
M llvm/test/Transforms/Coroutines/coro-split-alloc.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels-inlined.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-00.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-01.ll
M llvm/test/Transforms/Coroutines/coro-split-final-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-hidden.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail-chain-pgo-counter-promo.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail-ppc64le.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail1.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail10.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail12.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail13.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail2.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail3.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail4.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail5.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail6.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail7.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail8.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail9.ll
M llvm/test/Transforms/Coroutines/coro-split-no-lifetime.ll
M llvm/test/Transforms/Coroutines/coro-split-noinline.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-swifterror.ll
M llvm/test/Transforms/Coroutines/coro-zero-alloca.ll
M llvm/test/Transforms/Coroutines/ex0.ll
M llvm/test/Transforms/Coroutines/ex1.ll
M llvm/test/Transforms/Coroutines/ex2.ll
M llvm/test/Transforms/Coroutines/ex3.ll
M llvm/test/Transforms/Coroutines/ex4.ll
M llvm/test/Transforms/Coroutines/ex5.ll
M llvm/test/Transforms/Coroutines/no-suspend.ll
M llvm/test/Transforms/Coroutines/phi-coro-end.ll
M llvm/test/Transforms/Coroutines/remarks.ll
M llvm/test/Transforms/Coroutines/swift-async-dbg.ll
M llvm/test/Transforms/FunctionAttrs/noreturn.ll
M llvm/test/Transforms/LICM/sink-with-coroutine.ll
M llvm/unittests/Transforms/Coroutines/ExtraRematTest.cpp
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
Revert "Reapply "[Coroutines] Add llvm.coro.is_in_ramp and drop return value of llvm.coro.end #153404"" (#159236)
Reverts llvm/llvm-project#155339 because of CI fail
Commit: ab0bb6db39cefa5c27aab0ac6af7c33e652ba28b
https://github.com/llvm/llvm-project/commit/ab0bb6db39cefa5c27aab0ac6af7c33e652ba28b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-16 (Tue, 16 Sep 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
Log Message:
-----------
[RISCV][GISel] Update rv32 s64 G_SADDE legalizer test. (#159153)
We were testing 2 s32 G_SADDE instead of a single s64 G_SADDE.
Similar for s128 on RV64.
Commit: c286a427b977fc1df0871ceed9916070a38a1d22
https://github.com/llvm/llvm-project/commit/c286a427b977fc1df0871ceed9916070a38a1d22
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
A offload/test/offloading/fortran/do-concurrent-to-omp-saxpy-2d.f90
A offload/test/offloading/fortran/do-concurrent-to-omp-saxpy.f90
Log Message:
-----------
[NFC][flang][do concurent] Add saxpy offload tests for OpenMP mapping (#155993)
Adds end-to-end tests for `do concurrent` offloading to the device.
PR stack:
- https://github.com/llvm/llvm-project/pull/155754
- https://github.com/llvm/llvm-project/pull/155987
- https://github.com/llvm/llvm-project/pull/155992
- https://github.com/llvm/llvm-project/pull/155993 ◀️
- https://github.com/llvm/llvm-project/pull/157638
- https://github.com/llvm/llvm-project/pull/156610
- https://github.com/llvm/llvm-project/pull/156837
Commit: 6d5c94203652a52b51b37ad4768bc1a7066f029c
https://github.com/llvm/llvm-project/commit/6d5c94203652a52b51b37ad4768bc1a7066f029c
Author: Tang Jiajun <jiajun.tang at intel.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCUDA.cpp
A clang/test/SemaCUDA/consteval-func.cu
Log Message:
-----------
[clang] [CUDA] Support calling `consteval` function between different target. (#158688)
In CUDA, calling `consteval` functions cross excution space is allowed.
So the function with `consteval` attribute need be treated as a
`__host__ __device__` function.
Commit: ec2ce347735f931c884197fdb4db669e5fb9c5e0
https://github.com/llvm/llvm-project/commit/ec2ce347735f931c884197fdb4db669e5fb9c5e0
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
Log Message:
-----------
[RISCV] Lower (select c, (1 << X) + 1, 0) -> (shXadd c, c) (#158969)
Commit: 5399ca97c4fe61770b5e7d0aeebd8aadf1ea52bc
https://github.com/llvm/llvm-project/commit/5399ca97c4fe61770b5e7d0aeebd8aadf1ea52bc
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[clang][sema][NFC] Use a for-range loop in checkBuiltinVerboseTrap (#159114)
We don't use `I` at all, so use a for-range loop.
Commit: b3a1c777824527bf771c7187a0b685feb7ef04f7
https://github.com/llvm/llvm-project/commit/b3a1c777824527bf771c7187a0b685feb7ef04f7
Author: Umesh Kalvakuntla <80587349+Umesh-k26 at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[X86] Fixes for AMD znver5 enablement (#159237)
- cpuid bit for prefetchi is different from Intel
(https://docs.amd.com/v/u/en-US/24594_3.37)
- Fix cpu family model numbers
Commit: ac1012d315fd4cac2a4ac535a00daed682481dc0
https://github.com/llvm/llvm-project/commit/ac1012d315fd4cac2a4ac535a00daed682481dc0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
llvm-mc: Error on MCSubtargetInfo construction failure (#159226)
We have inconsistent handling of null returns on target MC constructors.
Most tools report an error, but some assert. It's currently not possible
to test this with any in-tree targets. Make this a clean error so in the
future targets can fail the construction.
Commit: 09966960c692be63b192448e8c2b6bfebad3c3b8
https://github.com/llvm/llvm-project/commit/09966960c692be63b192448e8c2b6bfebad3c3b8
Author: David Green <david.green at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Transforms/InstCombine/may-alias-errno.ll
Log Message:
-----------
[BasicAA] Handle scalable vectors in new errno aliasing checks. (#159248)
This is a minor fixup for scalable vectors after f9f62ef4ae555a. It
handles them in the same way as other memory locations that are larger
than errno, preventing the failure on implicit conversion from a
scalable location.
Commit: e8028b2ecb5bda10a45cfa383beee0654d92e611
https://github.com/llvm/llvm-project/commit/e8028b2ecb5bda10a45cfa383beee0654d92e611
Author: Daniel Kuts <kutz at ispras.ru>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Object/Archive.cpp
Log Message:
-----------
[llvm] Validate Parent object before dereference (#157460)
Fixes #157449
Commit: b90af2df59ac3a96761151be1d035cb6fe58cd31
https://github.com/llvm/llvm-project/commit/b90af2df59ac3a96761151be1d035cb6fe58cd31
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] Merge if statements for GCC warning disabling. NFC. (#159172)
Commit: 50f81531b46cb57737a41b6f20d7280377f9fb39
https://github.com/llvm/llvm-project/commit/50f81531b46cb57737a41b6f20d7280377f9fb39
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/CMakeLists.txt
Log Message:
-----------
[MLIR] Fix compilation after #157771 (#159257)
The original PR broke pretty much all our bots.
Apologies for the noise in the previous PR.
Commit: 5829652a6def4031853104b43ee6dfd331162352
https://github.com/llvm/llvm-project/commit/5829652a6def4031853104b43ee6dfd331162352
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/clusterlaunchcontrol.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
Log Message:
-----------
[MLIR][NVVM] Add clusterlaunchcontrol Ops (#156585)
This change adds the `clusterlaunchcontrol.try.cancel` and
`clusterlaunchcontrol.query.cancel` Ops to the NVVM dialect.
Tests are added in `clusterlaunchcontrol.mlir`.
PTX Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-clusterlaunchcontrol-try-cancel
Commit: 2155f17d39f3969ef841c85ef1102a214ab22b30
https://github.com/llvm/llvm-project/commit/2155f17d39f3969ef841c85ef1102a214ab22b30
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode] Optimize InitElem{,Pop} (#159084)
Try harder to avoid creating a new `Pointer` for the element.
Commit: ff05dc4526dce68f10450d77a1da2b8061e80dc2
https://github.com/llvm/llvm-project/commit/ff05dc4526dce68f10450d77a1da2b8061e80dc2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Add some popToAPSInt convenience API (#159252)
Add a variant that takes a QualType and one that takes an expression.
That way we don't have to repeat the clunky classify() calls all over
the place.
Commit: 41cef78227eb909181cb9360099b2d92de8d649f
https://github.com/llvm/llvm-project/commit/41cef78227eb909181cb9360099b2d92de8d649f
Author: Gábor Spaits <gaborspaits1 at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
A llvm/test/Transforms/SimplifyCFG/unreachable-multi-basic-block-funclet.ll
Log Message:
-----------
Reland "[BasicBlockUtils] Handle funclets when detaching EH pad blocks" (#158435)
When removing EH Pad blocks, the value defined by them becomes poison. These poison values are then used by `catchret` and `cleanupret`, which is invalid. This commit replaces those unreachable `catchret` and `cleanupret` instructions with `unreachable`.
Commit: 2ef58b603883c724805fc209ca753987efce3957
https://github.com/llvm/llvm-project/commit/2ef58b603883c724805fc209ca753987efce3957
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/test/Driver/DTLTO/dtlto.c
A clang/test/Driver/DTLTO/filename.py
M clang/test/Driver/DTLTO/ps5-dtlto.c
Log Message:
-----------
[DTLTO][TEST] Make Clang driver tests more robust (#159151)
The Clang driver tests tried to match the Clang executable name via a
regular expression. This failed on some buildbots where the name was not
anticipated.
Make the test more robust by extracting the filename with Python and
appending a line to the output. This is then captured into a FileCheck
variable and used directly in the check for the executable name.
Should fix buildbot failures caused by the merge of PR #159129.
Commit: a393f20e4085521165a5e8de82869f1355f8cc55
https://github.com/llvm/llvm-project/commit/a393f20e4085521165a5e8de82869f1355f8cc55
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-simplify-boolean-expr in TosaOps.cpp (NFC)
Commit: c87be722d60467dfc651186c1b1b058ce2e34644
https://github.com/llvm/llvm-project/commit/c87be722d60467dfc651186c1b1b058ce2e34644
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
A clang/test/Modules/Inputs/glob-delete-with-virtual-dtor/glob-delete-with-virtual-dtor.h
A clang/test/Modules/Inputs/glob-delete-with-virtual-dtor/module.modulemap
A clang/test/Modules/glob-delete-with-virtual-dtor.cpp
A clang/test/PCH/Inputs/glob-delete-with-virtual-dtor.h
A clang/test/PCH/glob-delete-with-virtual-dtor.cpp
Log Message:
-----------
[win][clang] Align scalar deleting destructors with MSABI (#139566)
While working on vector deleting destructors support
([GH19772](https://github.com/llvm/llvm-project/issues/19772)), I
noticed that MSVC produces different code in scalar deleting destructor
body depending on whether class defined its own operator delete. In
MSABI deleting destructors accept an additional implicit flag parameter
allowing some sort of flexibility. The mismatch I noticed is that
whenever a global operator delete is called, i.e. `::delete`, in the
code produced by MSVC the implicit flag argument has a value that makes
the 3rd bit set, i.e. "5" for scalar deleting destructors "7" for vector
deleting destructors.
Prior to this patch, clang handled `::delete` via calling global
operator delete direct after the destructor call and not calling class
operator delete in scalar deleting destructor body by passing "0" as
implicit flag argument value. This is fine until there is an attempt to
link binaries compiled with clang with binaries compiled with MSVC. The
problem is that in binaries produced by MSVC the callsite of the
destructor won't call global operator delete because it is assumed that
the destructor will do that and a destructor body generated by clang
will never do.
This patch removes call to global operator delete from the callsite and
add additional check of the 3rd bit of the implicit parameter inside of
scalar deleting destructor body.
---------
Co-authored-by: Tom Honermann <tom at honermann.net>
Commit: 75469bb376b7fa931d03ea95f6b7142d27ef0e51
https://github.com/llvm/llvm-project/commit/75469bb376b7fa931d03ea95f6b7142d27ef0e51
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/for-loop-peeling.mlir
A mlir/test/Dialect/SCF/trip_count.mlir
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
Log Message:
-----------
[MLIR] Add a getStaticTripCount method to LoopLikeOpInterface (#158679)
This patch adds a `getStaticTripCount` to the LoopLikeOpInterface,
allowing loops to optionally return a static trip count when possible.
This is implemented on SCF ForOp, revamping the implementation of
`constantTripCount`, removing redundant duplicate implementations from
SCF.cpp.
Commit: 46ad5408fc8e31e97f5b1191320ca449c00f4191
https://github.com/llvm/llvm-project/commit/46ad5408fc8e31e97f5b1191320ca449c00f4191
Author: Hsiangkai Wang <hsiangkai.wang at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
Log Message:
-----------
[mlir][gpu][vector] Lower Vector dialect to GPU for element-wise ops only (#159091)
Current convertVectorToMMAOps starts from vector.contract and finds its
dependencies as the targets to convert. In GPU dialect, we have
gpu.subgroup_mma_elementwise operation. We should be able to lower
element-wise operations to GPU MMA operations without vector.contract.
This patch adds this case to the pattern.
Commit: a044d6118208704ee15046abb6060c331e86b481
https://github.com/llvm/llvm-project/commit/a044d6118208704ee15046abb6060c331e86b481
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-clear-upper-regs.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-forwarding.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-misc-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
Log Message:
-----------
[AArch64] Update IssueWidth for Neoverse V1, N1, N3 (#154495)
Recently the IssueWidth in the scheduling model was reduced for
Neoverse-V2 and N2. This patch does the same for Neoverse-V1, N1 and N3.
On Neoverse-V1, various values of IssueWidth (15, 8, 7, 6, 5) were tried
with runs of various workloads.
The highest overall geomean score was achieved with an issue width of 8.
No significant regressions were noted.
On Neoverse-N1, various values of IssueWidth (8, 6, 5, 4, 3) were tried
with runs of various workloads.
The highest overall geomean score was achieved with an issue width of 3.
No significant regressions were noted.
On Neoverse-N3, it makes sense to do exactly the same as was done for
N2. It is proposed to use an issue width of 5.
Related V2 PR: https://github.com/llvm/llvm-project/pull/142565
Related N2 PR: https://github.com/llvm/llvm-project/pull/145717
Commit: 559cfefee1b2d739f4d4ccd89767c63713917122
https://github.com/llvm/llvm-project/commit/559cfefee1b2d739f4d4ccd89767c63713917122
Author: Mary Kassayova <mary.kassayova at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/test/CodeGen/AArch64/sme-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
A llvm/test/CodeGen/AArch64/sme-streaming-checkvl-mir.ll
A llvm/test/CodeGen/AArch64/sme-streaming-checkvl.ll
M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/spill-reload-remarks.ll
Log Message:
-----------
[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)
This patch adds a new codegen-only pseudo-instruction,
`CHECK_MATCHING_VL`, used when transitioning between non-streaming /
streaming-compatible callers and streaming-enabled callees. The pseudo
verifies that the current SVE vector length (VL) matches the streaming
vector length (SVL); if they differ, we trap.
Commit: 3f6cd761bac2d66cbbfb1d8c3a8407d4f0583093
https://github.com/llvm/llvm-project/commit/3f6cd761bac2d66cbbfb1d8c3a8407d4f0583093
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
Log Message:
-----------
[clang][bytecode] Remove InterpFrame::IsBottom flag (#159279)
The bottom frame is the one without a parent. No need to save that
information separately.
Commit: 4c7de930b3e265f04d86425cbbbc5f78536ce4b2
https://github.com/llvm/llvm-project/commit/4c7de930b3e265f04d86425cbbbc5f78536ce4b2
Author: Elam Cohavi <53015791+elamc-2 at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/docs/Dialects/Affine.md
Log Message:
-----------
[mlir][doc] fix `affine` op header link (#158650)
Commit: 76a11c769d3cc2c1d986e86f58d9fb25fe9830c6
https://github.com/llvm/llvm-project/commit/76a11c769d3cc2c1d986e86f58d9fb25fe9830c6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
Reapply "[libc++] Mark __{emplace,push}_back_slow_path as noinline (#94379)" (#158606)
This reverts commit 7f2e9b17098f42c85ef469b029bb84ef4eea189c.
The LLDB failures have been resolved in trunk.
Commit: 948482d83110257036c5fb50c65073bc74cd6c7f
https://github.com/llvm/llvm-project/commit/948482d83110257036c5fb50c65073bc74cd6c7f
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/test/Target/SPIRV/arithmetic-ops.mlir
M mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir
M mlir/test/Target/SPIRV/array.mlir
M mlir/test/Target/SPIRV/atomic-ops.mlir
M mlir/test/Target/SPIRV/barrier-ops.mlir
M mlir/test/Target/SPIRV/bit-ops.mlir
M mlir/test/Target/SPIRV/cast-ops.mlir
M mlir/test/Target/SPIRV/composite-op.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/Target/SPIRV/group-ops.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
M mlir/test/Target/SPIRV/image.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/khr-cooperative-matrix-ops.mlir
M mlir/test/Target/SPIRV/matrix.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/Target/SPIRV/mesh-ops.mlir
M mlir/test/Target/SPIRV/non-uniform-ops.mlir
M mlir/test/Target/SPIRV/ocl-ops.mlir
M mlir/test/Target/SPIRV/physical-storage-buffer.mlir
M mlir/test/Target/SPIRV/primitive-ops.mlir
M mlir/test/Target/SPIRV/spec-constant.mlir
M mlir/test/Target/SPIRV/tensorARM.mlir
M mlir/test/Target/SPIRV/terminator.mlir
M mlir/test/Target/SPIRV/undef.mlir
Log Message:
-----------
[mlir][spirv] Add validation and missing capabilities in Target tests (#159139)
This change adds calls to `spirv-val` in selected Target tests and fixes
missing and broken capabilities. Tests that require fixes beyond simple
capability changes are left untouched.
Commit: b29c7ded31d81ca47aed0157c543c8b6a0f5866c
https://github.com/llvm/llvm-project/commit/b29c7ded31d81ca47aed0157c543c8b6a0f5866c
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
Log Message:
-----------
[AArch64] Fold uaddv(a) to a if the all lanes except the 0th are zeros (#159086)
Fixes https://github.com/llvm/llvm-project/issues/158741
Commit: 0969e2c4203ce5ba7c6a042c6542ce45c0ebbae4
https://github.com/llvm/llvm-project/commit/0969e2c4203ce5ba7c6a042c6542ce45c0ebbae4
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/test/Other/cgscc-devirt-iteration.ll
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/LICM/promote-capture.ll
Log Message:
-----------
[CaptureTracking] Fix handling for non-returning read-only calls (#158979)
We currently infer `captures(none)` for calls that are read-only,
nounwind and willreturn. As pointed out in
https://github.com/llvm/llvm-project/issues/129090, this is not correct
even with this set of pre-conditions, because the function could
conditionally cause UB depending on the address.
As such, change this logic to instead report `captures(address)`. This
also allows dropping the nounwind and willreturn checks, as these can
also only capture the address.
Commit: 56ebbebadad13688b1991703870f21c06c068fb5
https://github.com/llvm/llvm-project/commit/56ebbebadad13688b1991703870f21c06c068fb5
Author: sstipano <sstipano7 at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
Log Message:
-----------
[AMDGPU][NFC] Add back -new-reg-bank-select flag. (#159181)
Commit: b7f68cb08ca6e6d4a935640e8065d54b1590d144
https://github.com/llvm/llvm-project/commit/b7f68cb08ca6e6d4a935640e8065d54b1590d144
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsExpandPseudo.cpp
M llvm/test/CodeGen/Mips/atomic-min-max.ll
Log Message:
-----------
[Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2 (#149983)
Fix #145411.
Commit: 88c64f76ed2ca226da99b99f60d316b1519fc7d8
https://github.com/llvm/llvm-project/commit/88c64f76ed2ca226da99b99f60d316b1519fc7d8
Author: Gábor Spaits <gaborspaits1 at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
R llvm/test/Transforms/SimplifyCFG/unreachable-multi-basic-block-funclet.ll
Log Message:
-----------
Revert "Reland "[BasicBlockUtils] Handle funclets when detaching EH p… (#159292)
…ad blocks" (#158435)"
This reverts commit 41cef78227eb909181cb9360099b2d92de8d649f.
Commit: 0a7a7d56fc882653335beba0d1f8ea9f26089c22
https://github.com/llvm/llvm-project/commit/0a7a7d56fc882653335beba0d1f8ea9f26089c22
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[llvm][CAS] Enable CAS on 32-bit systems again (#159302)
dd56becdbc31cce16973172f0a447207ddf67861 has fixed the alignment problem
we were seeing on Arm 32-bit.
Commit: 47bd16736245f0d95f868267f26a72080c85004f
https://github.com/llvm/llvm-project/commit/47bd16736245f0d95f868267f26a72080c85004f
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LexicalScopes.h
Log Message:
-----------
[DebugInfo] Remove class and function names from Doxygen comments in LexicalScopes.h (NFC) (#159310)
Duplication of function and class name in the comment is discouraged in
https://llvm.org/docs/CodingStandards.html#doxygen-use-in-documentation-comments.
Commit: 2c764c6fafaacf53a0d873c6db066e7849654f0e
https://github.com/llvm/llvm-project/commit/2c764c6fafaacf53a0d873c6db066e7849654f0e
Author: David Green <david.green at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/abs.ll
Log Message:
-----------
[ARM] Correct attributes on abs.ll costmodel test. NFC
Adding mve was a mistake and preventing it from testing the expected
architecture levels.
Commit: 4c16cfff6f31ed7d7942a1dacc5848d281f28e6f
https://github.com/llvm/llvm-project/commit/4c16cfff6f31ed7d7942a1dacc5848d281f28e6f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll
Log Message:
-----------
[NFC][LLVM][AArch64] Add use-constant-int-for-* RUN lines to global-isel tests.
CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll
Commit: 152ed59a9f2c644d1888f11b9ba0e7245fd26a54
https://github.com/llvm/llvm-project/commit/152ed59a9f2c644d1888f11b9ba0e7245fd26a54
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/InstCombine/exact.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/SCCP/overdefined-ext.ll
Log Message:
-----------
[NFC][LLVM][Tests] Add RUN lines to verify Constant{Int/FP} based splats.
llvm/test/Transforms/Attributor/nofpclass.ll
llvm/test/Transforms/InstCombine/exact.ll
llvm/test/Transforms/InstCombine/load-store-forward.ll
llvm/test/Transforms/SCCP/overdefined-ext.ll
Commit: 1773341f2cf932c6b4fe531ad5da3def545def31
https://github.com/llvm/llvm-project/commit/1773341f2cf932c6b4fe531ad5da3def545def31
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/test/Transforms/InstSimplify/ConstProp/bswap.ll
Log Message:
-----------
[NFC] Regenerate checks - llvm/test/Transforms/InstSimplify/ConstProp/bswap.ll
Commit: 5f34d530d2c6c67a1b2d3e64db3d681462c54514
https://github.com/llvm/llvm-project/commit/5f34d530d2c6c67a1b2d3e64db3d681462c54514
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
Log Message:
-----------
llvm-mc-assemble-fuzzer: Error on MCSubtargetInfo construct failure (#159224)
Commit: 07a79285d2d63615070173e6768b6e0174c18084
https://github.com/llvm/llvm-project/commit/07a79285d2d63615070173e6768b6e0174c18084
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Support/raw_socket_stream.cpp
Log Message:
-----------
Fix _WIN32 Wundef warning; NFC (#159301)
The `_WIN32` macro is tested for defined-ness everywhere else. The
instance here triggers a warning when compiling with `-Wundef`.
Commit: 9690a718b8d5344583eadfbc5bf2249d7d39b777
https://github.com/llvm/llvm-project/commit/9690a718b8d5344583eadfbc5bf2249d7d39b777
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/infer-align-from-assumption.ll
Log Message:
-----------
[IR][CaptureTracking] Consider assume operand bundles captures(none) (#159083)
Something like `call void @llvm.assume(i1 true) ["align"(ptr %p, i64 8)]`
is equivalent to placing an `align 8` attribute on the parameter
and should not be considered as capturing.
Commit: 1dbb932fd8681930ed98fe621bbe4bdaa5aeaa5c
https://github.com/llvm/llvm-project/commit/1dbb932fd8681930ed98fe621bbe4bdaa5aeaa5c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
A llvm/test/MachineVerifier/AMDGPU/test_copy_physregs_llt_virtreg.mir
M llvm/test/MachineVerifier/test_copy_physregs_x86.mir
Log Message:
-----------
GlobalISel: Relax verifier between physreg and typed vreg (#159281)
Accept mismatched register size and type size if the type is legal
for the register class.
For AMDGPU boolean registers have 2 possible interpretations depending
on the use context type. e.g., these are both equally valid:
%0:_(s1) = COPY $vcc
%1:_(s64) = COPY $vcc
vcc is a 64-bit register, which can be interpreted as a 1-bit or 64-bit
value depending on the use context. SelectionDAG has never required
exact
match between the register size and the used value type. You can assign
a type with a smaller size to a larger register class. Relax the
verifier
to match. There are several hacks holding together these copies in
various places, and this is preparation to remove one of them.
The x86 test change is from what I would consider an X86 usage bug. X86
defines an FR32 register class and F16 register class, but the F16
register
class is functionally an alias of F32 with the same members and size.
There's
no need to have the F16 class.
Commit: 17e008db17be5cf01daf13265adc93d1da257fca
https://github.com/llvm/llvm-project/commit/17e008db17be5cf01daf13265adc93d1da257fca
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Bitcode/upgrade-vector-partial-reduce-add-intrinsic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-addv.mir
M llvm/test/CodeGen/AArch64/complex-deinterleaving-cdot.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-unrolled-cdot.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/partial-reduction-add.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
M llvm/test/CodeGen/AArch64/sve2p1-dots-partial-reduction.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvqdotq.ll
M llvm/test/CodeGen/RISCV/rvv/partial-reduction-add.ll
M llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/VectorCombine/intrinsic-scalarize.ll
Log Message:
-----------
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
The partial reduction intrinsics are no longer experimental, because
they've been used in production for a while and are unlikely to change.
Commit: aac8eb85b223f48bf4b543bcd644e9a62e5d1c0e
https://github.com/llvm/llvm-project/commit/aac8eb85b223f48bf4b543bcd644e9a62e5d1c0e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
Log Message:
-----------
AMDGPU: Fixes for regbankselecting copies of i1 physregs to sgprs (#159283)
If the source register of a copy was a physical sgpr copied to an
s1 value, this would assert.
Commit: d8e1c20a061f4bc2cc87f3f286312f016e571469
https://github.com/llvm/llvm-project/commit/d8e1c20a061f4bc2cc87f3f286312f016e571469
Author: Usha Gupta <usha.gupta at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Clarify norecurse attribute definition when a function could occur in a cycle in dynamic call-graph (#157087)
Update the definition of the `norecurse` attribute to forbid marking a
function as `norecurse` if any call path from its body may reach it
(possibly through an external function without a visible definition).
This makes it clear that `norecurse` excludes both direct and mutual
recursion, even when recursion could arise through callees in separate
modules.
This kind of scenario only arises when norecurse is forced through a llvm user option `-mllvm -force-attribute=<fname>:norecurse`
There are a few examples in
https://github.com/llvm/llvm-project/issues/157081 which shows that the
function attribute inference incorrectly infers norecurse when the
behavior (as per new definition) is not enforced.
Commit: 01ee9fe66c6bd334a66d2d10bbde3ecc5d014df9
https://github.com/llvm/llvm-project/commit/01ee9fe66c6bd334a66d2d10bbde3ecc5d014df9
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
Log Message:
-----------
[clang-tidy] Fix bazel build after #131804 (lazy style). (#159289)
This PR provides a quick fix for the bazel builds that got broken by
#131804. That PR introduced a new CMake option that enables custom
clang-tidy checks that are provided by cmake-query. This PR disables
those checks, which is the minimal fix. A more proper fix would
introduce a new `custom` check that is added to the tool if a particular
flag value is set; however, the library depends on clang-query, which
isn't part of the bazel build, yet, and I don't want to spend the time
now to make all of that work as well. The discussion in the PR provides
my current state in case somebody wants to pick up that work.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 385c9f5b0244b6e9ff33856852aafc04e6b370a3
https://github.com/llvm/llvm-project/commit/385c9f5b0244b6e9ff33856852aafc04e6b370a3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
Log Message:
-----------
[MLIR] Cleanup `constantTripCount()` (NFC) (#159307)
Add post-merge review comments on #158679
Commit: 5cbaf5552e9cab25dc3eb760ffb5ab7d3dd59249
https://github.com/llvm/llvm-project/commit/5cbaf5552e9cab25dc3eb760ffb5ab7d3dd59249
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
M clang/test/Analysis/ArrayBound/assumption-reporting.c
M clang/test/Analysis/ArrayBound/verbose-tests.c
Log Message:
-----------
[analyzer] Show element count in ArrayBound underflow reports (#158639)
The underflow reports of checker security.ArrayBound previously
displayed the (negative) byte offset of the accessed location; but those
numbers were a bit hard to decipher (especially when the elements were
large structs), so this commit replaces the byte offset with an index
value (if the offset is an integer multiple of the size of the accessed
element).
This change only affects the content of the messages; the checker will
find the same issues before and after this commit.
Commit: 6a16f1a6f4aca8957c9c1f672f2572c662ddf562
https://github.com/llvm/llvm-project/commit/6a16f1a6f4aca8957c9c1f672f2572c662ddf562
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][ExprConst] Assert that EvaluateAsInitializer has non-null VD (#159274)
Both the expression (the initializer) as well as the VarDecl can't be
null here. Assert that.
Commit: 6a726e9a4d3d05f9aecf366fb6488d63135f04f3
https://github.com/llvm/llvm-project/commit/6a726e9a4d3d05f9aecf366fb6488d63135f04f3
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
M llvm/test/Transforms/LoopStrengthReduce/duplicated-phis.ll
Log Message:
-----------
[SCEV] Add more tests for MUL/UDIV folds.
Add additional test coverage for
https://github.com/llvm/llvm-project/pull/157656 covering cases where
the dividend is not a multiple of the divisor, causing the revert of
70012fda631.
Commit: ce5124856e019792783de9630d0c5a1f0aaf2d9d
https://github.com/llvm/llvm-project/commit/ce5124856e019792783de9630d0c5a1f0aaf2d9d
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
Log Message:
-----------
[Clang] Fix an incorrect assertion in `Sema::CheckAddressOfOperand` (#159314)
Not all non-type template arguments are modeled as
NonTypeTemplateParmDecl.
Fixes #151531
Commit: fe8e703aaf2c1a7eeceb153aa7a51bab4c06dab5
https://github.com/llvm/llvm-project/commit/fe8e703aaf2c1a7eeceb153aa7a51bab4c06dab5
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseStmt.cpp
Log Message:
-----------
[clang][Parse] Use consistent Scope::ScopeFlags enum values (NFC) (#159275)
Commit 438863a changed the underlying type of the Scope::ScopeFlags from
int to unsigned. This triggers type mismatch warnings from specific
compilers when the enum's values are combined in operations with integer
literal 0. Regardless of these warnings, similar code in other places
uses Scope::NoScope instead of literal 0. For consistency and to avoid
these warnings, we change the uses of literal 0 to Scope::NoScope.
Commit: e969bd71221bd45b5a64aaed5ae1d227b7242c0f
https://github.com/llvm/llvm-project/commit/e969bd71221bd45b5a64aaed5ae1d227b7242c0f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/State.cpp
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][ExprConst] Move getLangOpts() to interp::State subclasses (#159280)
Instead of having `State::getLangOpts()`, which does a virtual call to
`getASTContext()` to call `getLangOpts()` on that, just move
`getLangOpts()` to the subclasses so we can do that without the virtual
call. We never call `getLangOpts()` in `State.cpp`, so it's not needed
in the base class.
Commit: f78150d2d477b31b46d1afdd255020689f2ddccf
https://github.com/llvm/llvm-project/commit/f78150d2d477b31b46d1afdd255020689f2ddccf
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
M llvm/test/Transforms/LoopStrengthReduce/duplicated-phis.ll
Log Message:
-----------
Reapply "[SCEV] Fold (C1 * A /u C2) -> A /u (C2 /u C1), if C2 > C1." (#158328)
This reverts commit fd58f235f8c5bd40d98acfd8e7fb11d41de301c7.
The recommit contains an extra check to make sure that D is a multiple of
C2, if C2 > C1. This fixes the issue causing the revert fd58f235f8c. Tests
have been added in 6a726e9a4d3d0.
Original message:
If C2 >u C1 and C1 >u 1, fold to A /u (C2 /u C1).
Depends on https://github.com/llvm/llvm-project/pull/157555.
Alive2 Proof: https://alive2.llvm.org/ce/z/BWvQYN
PR: https://github.com/llvm/llvm-project/pull/157656
Commit: eb8e8e87c6b5256f55551cf24f96a4cc54177a42
https://github.com/llvm/llvm-project/commit/eb8e8e87c6b5256f55551cf24f96a4cc54177a42
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.h
Log Message:
-----------
[NFC] Fic clangIR build after #158679
The commit from #158679 added getStaticTripCount to LoopLikeOpInterface,
which the CIRLoopOpInterface uses. However, it doesn't include APInt.
This patch adds an include for APInt to CIRLoopOpInterface, plus a
'using', as we're likely to run into this again.
Commit: e8aa0b688af4f190f6da359f8b3d442bc7cd82a1
https://github.com/llvm/llvm-project/commit/e8aa0b688af4f190f6da359f8b3d442bc7cd82a1
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
Log Message:
-----------
[LV]: Ensure fairness when selecting epilogue VF. (#155547)
Consider IC when deciding if epilogue profitable for scalable vectors,
same as fixed-width vectors.
Commit: db204d92191b370891ef69c621c092a5c9c417bf
https://github.com/llvm/llvm-project/commit/db204d92191b370891ef69c621c092a5c9c417bf
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/MC/MCDecoder.h
M llvm/test/TableGen/BitOffsetDecoder.td
M llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
M llvm/test/TableGen/DecoderEmitter/operand-decoder.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Inline `insertBits()` (NFC) (#159353)
`tmp` is always of integer type, so we can use bitwise OR and shift.
Commit: 1f05682d7634d644cd6fd7141c84ee3ab58c26ab
https://github.com/llvm/llvm-project/commit/1f05682d7634d644cd6fd7141c84ee3ab58c26ab
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGDecl.cpp
Log Message:
-----------
[clang] Remove redundant conditions (NFC) (#159349)
Commit: 170c0c52250dab52cbb63de25ad16ff97a407cbf
https://github.com/llvm/llvm-project/commit/170c0c52250dab52cbb63de25ad16ff97a407cbf
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/box-address.f90
Log Message:
-----------
[Flang] Handle unused entry dummies before processing shape (#157732)
Check for unused entry dummy arrays with BaseBoxType that calls
genUnusedEntryPointBox() before processing array shapes.
Fixes #132648
Commit: 1c2d7b3065dc143289d1e05caeeb7f77fac6575a
https://github.com/llvm/llvm-project/commit/1c2d7b3065dc143289d1e05caeeb7f77fac6575a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Fix a warning
This patch fixes:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19079:7: error:
unused variable 'VT' [-Werror,-Wunused-variable]
Commit: d6315a260baddd5454a02878a78f0e9ae41860d9
https://github.com/llvm/llvm-project/commit/d6315a260baddd5454a02878a78f0e9ae41860d9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[clang][BufferUsage] Fix a StringRef lifetime issue (#159109)
The code before assigned the `std::string` returned from
`tryEvaluateString()` to the `StringRef`, but it was possible that the
underlying data of that string vanished in the meantime, passing invalid
stack memory to `ParsePrintfString`.
Fix this by using two different code paths for the `getCharByteWidth()
== 1` case and the `tryEvaluateString()` one.
Commit: 2b2b580c8d4560e724cca7ca856ce7171c3a4628
https://github.com/llvm/llvm-project/commit/2b2b580c8d4560e724cca7ca856ce7171c3a4628
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx11.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/spillv16.ll
Log Message:
-----------
[AMDGPU][CodeGen][True16] Track waitcnt as vgpr32 instead of vgpr16 for D16 Instructions in GFX11 (#157795)
It seems the VMEM access on hi/lo half could interfere the other half.
Track waitcnt of vgpr32 instead of vgpr16 for 16bit reg in GFX11.
---------
Co-authored-by: Joe Nash <joseph.nash at amd.com>
Commit: 901eaeeb8d8e0e1ec3f2deba9fe8ef292b448757
https://github.com/llvm/llvm-project/commit/901eaeeb8d8e0e1ec3f2deba9fe8ef292b448757
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
Log Message:
-----------
[Support] Consolidate has_FlowTraits in YAMLTraits.h (NFC) (#159241)
has_FlowTraits has two implementations:
- "class has_FlowTraits" says false on non-class types.
- "struct has_FlowTraits" checks for a "flow" member on class types.
This patch eliminates the former because std::is_class is redundant if
we are checking to see if &U::flow is well formed. The comment block
being removed in this patch has been around since 2012. I'd assume
that host compilers have improved since then. Note that we are now
using is_detected, which wasn't the case back in 2012.
Commit: 36c0eabd0cc077d4b83524771a4d0c85aed54fde
https://github.com/llvm/llvm-project/commit/36c0eabd0cc077d4b83524771a4d0c85aed54fde
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/docs/Passes.rst
Log Message:
-----------
[llvm] Proofread Passes.rst (#159243)
Commit: 562fe413e06aa12fc91eb22ca9c7386239f5af4a
https://github.com/llvm/llvm-project/commit/562fe413e06aa12fc91eb22ca9c7386239f5af4a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/ilist_node.h
Log Message:
-----------
[ADT] Use std::conditional_t to simplify ilist_select_iterator_type (NFC) (#159240)
Without this patch, ilist_select_iterator_type uses a boolean template
parameter to select one of two types. This patch converts that to
std::conditional_t, which is simpler than the two-class solution.
Commit: 80f9c72a1e045aa012b88c1b32cc6c5bb008a3db
https://github.com/llvm/llvm-project/commit/80f9c72a1e045aa012b88c1b32cc6c5bb008a3db
Author: Anton Shepelev <44649959+amemov at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/rsqrtf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/rsqrtf16.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/rsqrtf16.cpp
A libc/src/math/rsqrtf16.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/rsqrtf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/rsqrtf16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math][c23] Add rsqrtf16() function (#137545)
Addresses #132818
Part of #95250
Commit: 8ed489914e5bdfe65e1c8fdeec335f21cd7b33a1
https://github.com/llvm/llvm-project/commit/8ed489914e5bdfe65e1c8fdeec335f21cd7b33a1
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/cmake/caches/PGO.cmake
Log Message:
-----------
Revert "[Clang][CMake] Use IRPGO instead of FE PGO for Cmake Caches (#155957)" (#159367)
This reverts commit 7fca1f841b4c226d50ab7bad64de5db225d4193b.
PR #55957 breaks the BOLT buildbot bolt-aarch64-ubuntu-clang:
https://lab.llvm.org/staging/#/builders/126
Example build:
https://lab.llvm.org/staging/#/builders/126/builds/2628
> ld.lld:
/home/buildbot/workspace/bolt-aarch64-ubuntu-clang/llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:10194:
bool llvm::LoopVectorizePass::processLoop(llvm::Loop*): Assertion
`!verifyFunction(*F, &dbgs())' failed.
Commit: b2f38637cd3635a186da9d3a8776fe0b395f01de
https://github.com/llvm/llvm-project/commit/b2f38637cd3635a186da9d3a8776fe0b395f01de
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/test/CodeGen/Hexagon/isel-uinttofp-v32i1tov32f32.ll
A llvm/test/CodeGen/Hexagon/isel-uinttofp-v64i1tov64f16.ll
Log Message:
-----------
[Hexagon] Added v32i1/v64i1 to v32f32/v64f16 lowering (#159355)
This patch introduces uint_to_fp conversions from v32i1 and v64i1
predicate vectors to v32f32 and v64f16 floating-point vectors.
Patch-by: Santanu Das
Co-authored-by: quic-santdas <quic_santdas at quicinc.com>
Commit: acc3a6234a91369b818fdd6482ded0ac32d8ffa6
https://github.com/llvm/llvm-project/commit/acc3a6234a91369b818fdd6482ded0ac32d8ffa6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__hash_table
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.modifiers/erase_range.pass.cpp
Log Message:
-----------
Revert "[libc++] Optimize __hash_table::erase(iterator, iterator) (#1… (#158769)
…52471)"
This reverts commit e4eccd6a3c2415c10bb8217c247d7aca76cc9ad5.
This was causing ASan failures in some situations involving unordered
multimap containers. Details and a reproducer were posted on the
original PR (#152471).
Commit: 51a840e762f506c2473f9f0cbc01b6336f99e6d1
https://github.com/llvm/llvm-project/commit/51a840e762f506c2473f9f0cbc01b6336f99e6d1
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
M compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
Log Message:
-----------
[sanitizer_common][tsan][Darwin] Improve message for unsupported vm config on Apple platforms (#158665)
An existing log message is triggered in InitializePlatformEarly if the
address space max is not as sufficient for TSAN.
Some Apple platforms expand the address space limit, but reserve much of
the space TSAN needs. Therefore, we now check that the kernel has not
mapped over the address space that we intend to use.
IsAddressInMappedRegion is added to sanitizer_common. This introduces a
new dependency on mach_vm_region_recurse during TSAN startup, so this
intentionally fails softly (to avoid breaking current users who may be
in a sandbox that doesn't allow this).
rdar://135265279
Commit: d2738c0690c3fd6a10fc1ae8c5e1ec9345d06b2d
https://github.com/llvm/llvm-project/commit/d2738c0690c3fd6a10fc1ae8c5e1ec9345d06b2d
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/attr-args.c
Log Message:
-----------
Fix crash in 'malloc' referring to function without a argument (#159371)
As reported in #159080, patch #68059 didn't correctly check for the
argument count of the target function from malloc to ensure it has an
argument. This patch corrects that check.
Fixes: #159080
---------
Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
Commit: de4fdccb7a1632923cca19e0e30b0476afb9f3ce
https://github.com/llvm/llvm-project/commit/de4fdccb7a1632923cca19e0e30b0476afb9f3ce
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Test lit when it is changed (#159359)
This patch makes it so that we run the lit tests when lit is changed.
This can make it much easier to catch portability issues with the tests
(like tests not working properly on Windows). It's also helpful as we
spend time working on enabling the internal shell by default.
Commit: c919109aa96cae7b72eb9cc3f1559706e36a3c0b
https://github.com/llvm/llvm-project/commit/c919109aa96cae7b72eb9cc3f1559706e36a3c0b
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
Log Message:
-----------
[scudo] Move the trace point in releaseToOSMaybe (#159204)
Move the trace point until right before the mark free blocks call for
the primary. This avoids adding extra calculations on a fast path.
Commit: 05c4681668d0acd15a5a06e91be94916acd1c799
https://github.com/llvm/llvm-project/commit/05c4681668d0acd15a5a06e91be94916acd1c799
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/SCCP/relax-range-checks.ll
Log Message:
-----------
[SCCP] Relax two-instruction range checks (#158495)
If we know x in R1, the range check `x in R2` can be relaxed into `x in
Union(R2, Inverse(R1))`. The latter one may be more efficient if we can
represent it with one icmp.
Fixes regressions introduced by
https://github.com/llvm/llvm-project/pull/156497.
Proof for `(X & -Pow2) == C -> (X - C) < Pow2`:
https://alive2.llvm.org/ce/z/HMgkuu
Compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=ead4f3e271fdf6918aef2ede3a7134811147d276&to=bee3d902dd505cf9b11499ba4f230e4e8ae96b92&stat=instructions%3Au
Commit: 57d67bec6d708b8266f09d06d7841739d4f53d5a
https://github.com/llvm/llvm-project/commit/57d67bec6d708b8266f09d06d7841739d4f53d5a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[DAG] getNode() - reuse result type instead of calling getValueType again. NFC. (#159381)
We have assertions above confirming VT == N1.getValueType() for INSERT_VECTOR_ELT nodes.
Commit: af39a17a699eb0688782cb5f21412cd391bd44a0
https://github.com/llvm/llvm-project/commit/af39a17a699eb0688782cb5f21412cd391bd44a0
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/modernize/return-braced-init-list.cpp
Log Message:
-----------
[clang-tidy] Enable `modernize-return-braced-init-list`'s tests in C++11 (#158196)
The check supports C++11, but isn't tested in it.
Commit: 7a098aecb65cc6ca9c877825c9436a51c36ab48d
https://github.com/llvm/llvm-project/commit/7a098aecb65cc6ca9c877825c9436a51c36ab48d
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Implement computeKnownBitsForTargetNode for SHL_ADD (#159105)
Commit: 6922f0e0aca40c9a5d160da89453443f902c2951
https://github.com/llvm/llvm-project/commit/6922f0e0aca40c9a5d160da89453443f902c2951
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Remove dead vector.partial.reduce DAGCombine (NFC) (#159362)
This intrinsic is already lowered in SelectionDAGBuilder.cpp into
ISD::PARTIAL_REDUCE_UMLA, so the DAGCombine will never trigger. The
optimisations we were doing are also superseded by generic ones in
DAGCombiner.cpp.
Commit: bf684e0f2f97c56cdea9e36b6dacde48dc5cc269
https://github.com/llvm/llvm-project/commit/bf684e0f2f97c56cdea9e36b6dacde48dc5cc269
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang-rt/lib/runtime/namelist.cpp
M flang/docs/Extensions.md
Log Message:
-----------
[flang][runtime] Disable namelist storage sequence input when defined (#158708)
The runtime supports a near-universal extension to namelist input that
allows reading a sequence of values into a storage sequence beginning at
an array element, e.g. &NML A(2)=1. 2. 3. / .
Disable this extension when the type of the array has a defined
formatted READ subroutine defined. That defined input procedure may
itself not be using list-directed input, and might not notice a
following slash or new input item name as such.
Fixes https://github.com/llvm/llvm-project/issues/158496.
Commit: 615977a5bc63fc346d35dff68f69a64be6822301
https://github.com/llvm/llvm-project/commit/615977a5bc63fc346d35dff68f69a64be6822301
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/resolve127.f90
Log Message:
-----------
[flang] Fix name resolution bug (#158749)
When the current scope is an implied DO loop nested within a derived
type declaration, it is possible for name resolution to mistakenly
resolve a name to a component rather than to a name in the outer scope.
Fix.
Fixes https://github.com/llvm/llvm-project/issues/158412.
Commit: 2b0f25d9c3fbabce9e53f349ee6775157755e91d
https://github.com/llvm/llvm-project/commit/2b0f25d9c3fbabce9e53f349ee6775157755e91d
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bug158405.f90
Log Message:
-----------
[flang] Fix crash in error recovery (#158750)
Code to attach a procedure's declaration to an error message did not
allow for ENTRY names, which can be in the global scope.
Fixes https://github.com/llvm/llvm-project/issues/158405.
Commit: 8fb02fae9957e828e91b4844bc7514fb319ec5d9
https://github.com/llvm/llvm-project/commit/8fb02fae9957e828e91b4844bc7514fb319ec5d9
Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
A compiler-rt/test/asan/TestCases/Darwin/sandbox-vm-region-recurse.cpp
Log Message:
-----------
[sanitizer-common][Darwin] Improve mach_vm_region_recurse error handling (#158670)
Some sanitizers use mach_vm_region_recurse on macOS to find a
sufficiently large gap to allocate shadow memory. Some sandboxes do not
allow this.
When we get KERN_DENIED, we suggest to the user that it may have been
blocked by the sandbox.
For error codes other than KERN_INVALID_ADDRESS and KERN_DENIED, we make
sure to log a message and not use the address.
rdar://160625998
Commit: deb2861b07e503b729b854edbffdeae7cd4a1aa6
https://github.com/llvm/llvm-project/commit/deb2861b07e503b729b854edbffdeae7cd4a1aa6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/lib/Semantics/runtime-type-info.cpp
Log Message:
-----------
[flang] Allow for equivalent types in non-TBP defined I/O (#158755)
Non-extensible derived type -- those with SEQUENCE or BIND(C) -- are
allowed as monomorphic "dtv" dummy arguments to defined I/O subroutines.
Fortran's type rules admit structural equivalence for these types, and
it's possible that I/O might be attempted in a scope using a
non-extensible type that's equivalent to a non-type-bound generic
interface's specific procedure's "dtv" dummy argument's type, but not
defined in the same place.
Fixes https://github.com/llvm/llvm-project/issues/158673.
This is an IBM Fortran test case that doesn't need to be duplicated in
LLVM.
Commit: 1b777752ef1b4532710ffe443466c743b9d54e98
https://github.com/llvm/llvm-project/commit/1b777752ef1b4532710ffe443466c743b9d54e98
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang-rt/lib/runtime/unit.cpp
Log Message:
-----------
[flang][runtime] Block bad left tabbing in child I/O (#158758)
Child I/O subroutines are not supposed to use T or TL control edit
descriptors in formats to move the position in the current record to a
point before where it stood at the time of their calls (F'2023
12.6.4.8.3 paragraph 18), but we should also guard against attempts to
do so, using the same means used to prevent such attempts in
non-advancing I/O.
Fixes https://github.com/llvm/llvm-project/issues/158723.
Commit: a20f123bab318ae40950d4713b86d9f18d21bba9
https://github.com/llvm/llvm-project/commit/a20f123bab318ae40950d4713b86d9f18d21bba9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Remove unused SDTypeProfile. NFC (#159156)
Commit: fdd989dac0f2bf06501dd115917f403cbfb9dc35
https://github.com/llvm/llvm-project/commit/fdd989dac0f2bf06501dd115917f403cbfb9dc35
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/lib/Parser/characters.cpp
A flang/test/Parser/utf8-01.f90
Log Message:
-----------
[flang] Fix UTF-8 minimality checks (#159142)
UTF-8 encodings are required to be minimal, but the checks for
minimality of 3-byte and 4-byte sequences were incorrect. Fix.
Commit: 59c77e7ec1ad65d630df227a9df13b5f78929b7a
https://github.com/llvm/llvm-project/commit/59c77e7ec1ad65d630df227a9df13b5f78929b7a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-do-forall.h
A flang/test/Semantics/definable07.f90
Log Message:
-----------
[flang] Check I/O implied DO indices better (#159150)
We're not checking READ statement implied DO index variables at all, and
we're not checking them for definability.
Commit: ae46b9ed64d8012435040b4f5924644995f9739f
https://github.com/llvm/llvm-project/commit/ae46b9ed64d8012435040b4f5924644995f9739f
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang-rt/lib/runtime/namelist.cpp
Log Message:
-----------
[flang][runtime] Fix bug with NAMELIST in child input (#159173)
Don't let "hitSlash_" flag in child input propagate back to the parent
input statement's state when the child input was NAMELIST and the
NAMELIST input has properly consumed the terminal '/' character. (It can
get set if NAMELIST item input ran into it.) The current failure to
reset that flag is causing list-directed parent input to stop early.
Fixes https://github.com/llvm/llvm-project/issues/159127.
Commit: d90a313b5e90771c0956b5fdd2814bc93bf414de
https://github.com/llvm/llvm-project/commit/d90a313b5e90771c0956b5fdd2814bc93bf414de
Author: Ryan Cowan <ryan at holycowman.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization-nan.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmaximum.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmin-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fminimum.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)
Enabling scalarisation for `G_VECREDUCE_FMIN` and `G_VECREDUCE_FMAX`
allows for more instructions to be handled such as `v2fp128`.
Commit: 48f00e81338e637b8210d3320527d4f389d5343b
https://github.com/llvm/llvm-project/commit/48f00e81338e637b8210d3320527d4f389d5343b
Author: Dave Bartolomeo <dave_bartolomeo at apple.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
A clang/lib/StaticAnalyzer/Core/PlistDiagnostics.h
M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
A clang/lib/StaticAnalyzer/Core/SarifDiagnostics.h
A clang/test/Analysis/diagnostics/Inputs/expected-plists/plist-html.c.plist
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-diagnostic-test.c.sarif
A clang/test/Analysis/diagnostics/plist-html.c
M clang/test/Analysis/diagnostics/sarif-multi-diagnostic-test.c
Log Message:
-----------
[analyzer] Prevent triplicate warnings for `sarif-html` (#158112)
When `-analyzer-output=sarif-html` is specified, the analyzer was
reporting each warning to the console three times. This is because the
code to create the diagnostic consumers for `sarif-html` was calling the
code for `sarif` and `html` separately, each of which also creates its
own console text consumer. Then the `sarif-html` code itself created a
third.
The fix is to factor out the creation of the SARIF and HTML consumers
from the text consumers, so `sarif-html` just calls the code to create
the SARIF and HTML consumers without the text consumers.
The same fix applies for `plist-html`.
I've updated one of the SARIF tests to specify `sarif-html`. This test
would fail in the regular `-verify` validation due to the triplicated
warnings, but now passes with my fix.
Fixes #158103
rdar://160383710
Commit: 2ce04d0a410d3c7c6b13b869bd34ec462d285a91
https://github.com/llvm/llvm-project/commit/2ce04d0a410d3c7c6b13b869bd34ec462d285a91
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Refactor a long `if` into an early `return` (#156410)
Commit: 97dfc09c235d23f8da33dddbb902e9e03eb51b44
https://github.com/llvm/llvm-project/commit/97dfc09c235d23f8da33dddbb902e9e03eb51b44
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
A clang/test/AST/cfi-unchecked-callee.cpp
M clang/test/Frontend/cfi-unchecked-callee-attribute.cpp
Log Message:
-----------
[clang] Do not diagnose conflicting types for cfi_unchecked_callee (#157762)
Clang would complain about conflicting types between a function
declaration and definition if the declaraion was marked with the
attribute but the definition wasn't. Do not treat this as an error. It
should only be necessary to mark the declaration with the attribute.
Commit: c9285166214db4236f26312f68bba91f6437bd6f
https://github.com/llvm/llvm-project/commit/c9285166214db4236f26312f68bba91f6437bd6f
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/SFrame.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSFrame.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCSFrame.cpp
A llvm/test/MC/ELF/cfi-sframe-encoding.s
A llvm/test/MC/ELF/cfi-sframe-fre-cases.s
M llvm/test/MC/ELF/cfi-sframe.s
Log Message:
-----------
[SFrames] Emit and relax FREs (#158154)
This PR emits and relaxes the FREs generated in the previous PR.
After this change llvm emits usable sframe sections that can be
linked with the gnu linker. There are a few remaining cfi directives to
handle before they are generally usable, however.
The output isn't identical with gnu-gas in every case (this code
produces
fewer identical FREs in a row than gas), but I'm reasonably sure that
they are correct regardless. There are even more size optimizations that
can be done later.
Also, while working on the tests, I found a few bugs in older portions
and cleaned those up.
This is a fairly big commit, but I'm not sure how to make it smaller.
Commit: d0bdc5d94502b9fb829bb7cb5f9d2f5bbccdbb2f
https://github.com/llvm/llvm-project/commit/d0bdc5d94502b9fb829bb7cb5f9d2f5bbccdbb2f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/postmortem/netbsd-core/TestNetBSDCore.py
Log Message:
-----------
[lldb][test] Disable parallel module loading for TestNetBSDCore.py (#159395)
Since #157170 this test has been flakey on several LLDB buildbots. I
suspect it's to do with mutli-threading, there are more details in
#159377.
Disable parallel loading for now so we are not spamming people making
unrelated changes.
Commit: a50c11a71515bacb0ece27fceec52fc120e85710
https://github.com/llvm/llvm-project/commit/a50c11a71515bacb0ece27fceec52fc120e85710
Author: David Green <david.green at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/test/CodeGen/AArch64/aarch64-tail-dup-size.ll
M llvm/test/CodeGen/AArch64/global-merge-external.ll
M llvm/test/CodeGen/AArch64/local-bounds-single-trap.ll
Log Message:
-----------
[AArch64] Enable GlobalMerge on externals (#158592)
GlobalMerge has been enabled for minsize for a while, this patch enables
it more generally. In my testing it did not affect performance very
much, especially with the linker relaxations we already perform, but
should help reduce code size a little.
Commit: 5f8bce4900b65b509ca1f9bf0a616409a77ced37
https://github.com/llvm/llvm-project/commit/5f8bce4900b65b509ca1f9bf0a616409a77ced37
Author: David Green <david.green at arm.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
Log Message:
-----------
[GlobalISel] Remove virtual from GISelValueTracking computeKnownBitsImpl. (#158558)
As far as I understand, GISelValueTracking::computeKnownBitsImpl does
not need to be virtual, as no-one is specializing / overriding it, which
means it is not necessary for the destructor either.
Commit: 00dc72fa1f328ae52554c5d404460de7381cb7f7
https://github.com/llvm/llvm-project/commit/00dc72fa1f328ae52554c5d404460de7381cb7f7
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CAS] LLVM_ENABLE_ONDISK_CAS requires `flock` on UNIX (#159207)
As a follow up to #159122, after figure out reason why CAS unit tests
are failing on Solaris, update the CMake configuration to build ondisk
CAS implementation. We now check the existance of `flock` before
enabling the configuration.
In the future, we can find ways to support OnDiskCAS on other platforms
that do not have `flock`. This can techinically be done with a POSIX
compilant file lock but that will put a restriction on the usage of CAS.
Commit: 087f4fc91b9665dced0007f82a38a0ddb0be79fd
https://github.com/llvm/llvm-project/commit/087f4fc91b9665dced0007f82a38a0ddb0be79fd
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
Log Message:
-----------
[HLSL] Remove resource constructors with binding (#157008)
Removes resource constructors that take binding information per proposal update https://github.com/llvm/wg-hlsl/pull/336. The constructors are replaced by static `__createFromBinding` and `__createFromImplicitBinding` methods on the resource class.
Commit: 6fdecaa7709a395c3ad5f47928f0290fbd0446c9
https://github.com/llvm/llvm-project/commit/6fdecaa7709a395c3ad5f47928f0290fbd0446c9
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang-tools-extra/CMakeLists.txt
M clang-tools-extra/clang-tidy/CMakeLists.txt
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidy.h
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.h
M clang-tools-extra/clang-tidy/ClangTidyForceLinker.h
M clang-tools-extra/clang-tidy/ClangTidyModule.h
M clang-tools-extra/clang-tidy/ClangTidyOptions.cpp
M clang-tools-extra/clang-tidy/ClangTidyOptions.h
M clang-tools-extra/clang-tidy/clang-tidy-config.h.cmake
R clang-tools-extra/clang-tidy/custom/CMakeLists.txt
R clang-tools-extra/clang-tidy/custom/CustomTidyModule.cpp
R clang-tools-extra/clang-tidy/custom/QueryCheck.cpp
R clang-tools-extra/clang-tidy/custom/QueryCheck.h
M clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
R clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
M clang-tools-extra/docs/clang-tidy/index.rst
M clang-tools-extra/test/clang-tidy/check_clang_tidy.py
R clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/clang-tidy.yml
R clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/incorrect-clang-tidy.yml
R clang-tools-extra/test/clang-tidy/checkers/custom/query-incorrect-query.cpp
R clang-tools-extra/test/clang-tidy/checkers/custom/query-partially-active-check.cpp
R clang-tools-extra/test/clang-tidy/checkers/custom/query.cpp
R clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/append-clang-tidy.yml
R clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/empty-clang-tidy.yml
R clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/override-clang-tidy.yml
R clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/root-clang-tidy.yml
R clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/vfsoverlay.yaml
R clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check-not-enable.cpp
R clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
M clang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
Log Message:
-----------
Revert "[clang-tidy] support query based custom check" (#159380)
Reverts llvm/llvm-project#131804.
This breaks a build bot; see discussion in the original PR. I could
reproduce this problem locally. The problem is that the original PR
makes use of `registerCustomChecks` in `ClangTidy.cpp` but does not add
the new custom module to the dependencies of the target that builds that
file. Adding the dependency would create a cyclic dependency, so the fix
doesn't seem obvious. See details in the PR description.
Commit: 2bf62e767119369e90670ca5bdd73a54193041e2
https://github.com/llvm/llvm-project/commit/2bf62e767119369e90670ca5bdd73a54193041e2
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
Log Message:
-----------
Revert "[clang-tidy] Fix bazel build after #131804 (lazy style)." (#159382)
Reverts llvm/llvm-project#159289.
This is a fix for #131804, which is being reverted.
Commit: 0227b791ff0860dca9c5a79fe229cfb1cb886db1
https://github.com/llvm/llvm-project/commit/0227b791ff0860dca9c5a79fe229cfb1cb886db1
Author: Zhixun Tan <phisiart at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/include/mlir/Analysis/DataFlow/DeadCodeAnalysis.h
M mlir/lib/Analysis/DataFlow/DeadCodeAnalysis.cpp
Log Message:
-----------
[mlir][nfc] Minor cleanups in DeadCodeAnalysis (#159232)
* Remove `getOperandValuesImpl` since its only used once.
* Extract common logic from
`DeadCodeAnalysis::visitRegion{BranchOperation,Terminator}` into a new
function `DeadCodeAnalysis::visitRegionBranchEdges`.
In particular, both functions do the following:
* Detect live region branch edges (similar to CFGEdge);
* For each edge, mark the successor program point as executable (so that
subsequent program gets visited);
* For each edge, store the information of the predecessor op and
arguments (so that other analyses know what states to join into the
successor program point).
One caveat is that, before this PR, in `visitRegionTerminator`, the
successor program point is only marked as live if it is the start of a
block; after this PR, the successor program point is consistently marked
as live regardless what it is, which makes the behavior equal to
`visitBranchOperation`. This minor fix improves consistency, but at this
point it is still NFC, because the rest of the dataflow analysis
framework only cares about liveness at block level, and the liveness
information in the middle of a block isn't read anyway. This probably
will change once
[early-exits](https://discourse.llvm.org/t/rfc-region-based-control-flow-with-early-exits-in-mlir/76998)
are supported.
Commit: 9e3ec0e371e08eaf3a876072ea8ea4187d86e2e0
https://github.com/llvm/llvm-project/commit/9e3ec0e371e08eaf3a876072ea8ea4187d86e2e0
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang-rt/lib/runtime/misc-intrinsic.cpp
Log Message:
-----------
[Flang][runtime] Fix RENAME intrinsic, remove trailing blanks (#159123)
The RENAME intrinsic did not correctly remove trailing spaces from
filenames. This PR introduces code to remove trailing blanks as
documented by GFortran.
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 453e4102bd32b892e7fda2aea3f3ef9e9b038580
https://github.com/llvm/llvm-project/commit/453e4102bd32b892e7fda2aea3f3ef9e9b038580
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Integration/debug-dwarf-flags.f90
A flang/test/Transforms/debug-dwarf-version.fir
Log Message:
-----------
[flang] Lowering support for -gdwarf-N flag. (#159137)
This PR builds on the https://github.com/llvm/llvm-project/pull/158314
and adds the lowering support for `-gdwarf-N` flag. The changes to pass
the information to `AddDebugInfo` pass are mostly mechanical. The
`AddDebugInfo` pass adds `ModuleFlagsOp` in the module which gets
translated to correct llvm metadata during mlir->llvmir translation.
There is minor correction where the version is set to 0 in case no
-debug-version flag is provided. Previously it was set to 2 in this case
due to misreading of clang code.
Commit: 6bbf734ecac35a5a1c3bcb680d20519dfd46da11
https://github.com/llvm/llvm-project/commit/6bbf734ecac35a5a1c3bcb680d20519dfd46da11
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
A clang/test/CodeGen/AArch64/ptrauth-fmv.c
A clang/test/CodeGen/AArch64/resolver-attributes.c
Log Message:
-----------
[FMV] Set default attributes on the resolver functions (#141573)
There is a number of attributes that is expected to be set on functions
by default. This patch implements setting more such attributes on the
FMV resolver functions generated by Clang. On AArch64, this makes the
resolver functions use the default PAC and BTI hardening settings.
Commit: 2caf4c1b26878ebfb8112ddfea35777d8017affa
https://github.com/llvm/llvm-project/commit/2caf4c1b26878ebfb8112ddfea35777d8017affa
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/AST/QualTypeNames.cpp
M clang/unittests/AST/CMakeLists.txt
A clang/unittests/AST/QualTypeNamesTest.cpp
Log Message:
-----------
[AST] Fix an assertion failure in TypeName::getFullyQualifiedName (#159312)
This popped up during our internal integrates of upstream changes. It
started happening after ba9d1c41c41d568a798e0a8c38a89d294647c28d, which
started using `TemplateSpecializationType` in this place and the code
was not prepared to handle it.
Commit: 4ff113f0aa906b130cd19d2a2a61a477c336c315
https://github.com/llvm/llvm-project/commit/4ff113f0aa906b130cd19d2a2a61a477c336c315
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Process/Utility/HistoryUnwind.cpp
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Log Message:
-----------
[lldb] Add unreachable after fully covered switches, avoid GCC warnings. NFC. (#159327)
This avoids the following kind of warning with GCC:
warning: control reaches end of non-void function [-Wreturn-type]
Commit: ea8555b33e745c8643b20bbf61414328843b5a62
https://github.com/llvm/llvm-project/commit/ea8555b33e745c8643b20bbf61414328843b5a62
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Avoid warning about comparison of different signedness. NFC. (#159337)
This fixes the following warning when compiled with GCC:
../lib/Target/AArch64/AArch64ISelLowering.cpp: In function ‘bool shouldLowerTailCallStackArg(const llvm::MachineFunction&, const llvm::CCValAssign&, llvm::SDValue, llvm::ISD::ArgFlagsTy, int)’:
../lib/Target/AArch64/AArch64ISelLowering.cpp:9310: warning: comparison of integer expressions of different signedness: ‘uint64_t’ {aka ‘long unsigned int’} and ‘int64_t’ {aka ‘long int’} [-Wsign-compare]
9310 | if (SizeInBits / 8 != MFI.getObjectSize(FI))
|
Commit: 1c5fcb13e0ef82bacdab3b1d0a63a95f29e76306
https://github.com/llvm/llvm-project/commit/1c5fcb13e0ef82bacdab3b1d0a63a95f29e76306
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/source/Host/common/File.cpp
M lldb/source/Host/windows/Host.cpp
Log Message:
-----------
[lldb] Avoid build warnings when building for Windows. NFC. (#159345)
This avoids the following warnings from Clang:
../../lldb/source/Host/windows/Host.cpp:324:3: warning: default label in switch which covers all enumeration values [-Wcovered-switch-default]
324 | default:
| ^
../../lldb/source/Host/common/File.cpp:662:26: warning: cast from 'const void *' to 'char *' drops const qualifier [-Wcast-qual]
662 | .write((char *)buf, num_bytes);
| ^
Commit: 95f213f37c8e1800f7769885a5cd0f0da994a085
https://github.com/llvm/llvm-project/commit/95f213f37c8e1800f7769885a5cd0f0da994a085
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
[clang] Add unreachable after fully covered switches, avoid GCC warnings. NFC. (#159330)
This avoids the following warnings:
../../clang/lib/AST/ExprConstant.cpp: In member function ‘bool {anonymous}::IntExprEvaluator::VisitBuiltinCallExpr(const clang::CallExpr*, unsigned int)’:
../../clang/lib/AST/ExprConstant.cpp:14104:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
14104 | }
| ^
../../clang/lib/AST/ExprConstant.cpp:14105:3: note: here
14105 | case Builtin::BIstrlen:
| ^~~~
../../clang/lib/Driver/ToolChains/CommonArgs.cpp: In function ‘std::string clang::driver::tools::complexRangeKindToStr(clang::LangOptionsBase::ComplexRangeKind ’:
../../clang/lib/Driver/ToolChains/CommonArgs.cpp:3523:1: warning: control reaches end of non-void function [-Wreturn-type]
3523 | }
| ^
Commit: 6db244a58626e885ba010b3d6813191485e18e90
https://github.com/llvm/llvm-project/commit/6db244a58626e885ba010b3d6813191485e18e90
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M llvm/tools/llvm-lipo/llvm-lipo.cpp
Log Message:
-----------
Add parentheses to clarify operator ordering in asserts. NFC. (#159333)
This avoids the following kind of warning with GCC:
../tools/llvm-lipo/llvm-lipo.cpp: In function ‘void printInfo(llvm::LLVMContext&, llvm::ArrayRef<llvm::object::OwningBinary<llvm::object::Binary> >)’:
../tools/llvm-lipo/llvm-lipo.cpp:464:34: warning: suggest parentheses around ‘& ’ within ‘||’ [-Wparentheses]
464 | Binary->isArchive() && "expected MachO binary");
| ~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
Commit: f0090bacc14db0e262c276670ff0afeadbf4d309
https://github.com/llvm/llvm-project/commit/f0090bacc14db0e262c276670ff0afeadbf4d309
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
Log Message:
-----------
[AMDGPU] Fold copies of constant physical registers into their uses (#154410)
Co-authored-by: Jay Foad <Jay.Foad at amd.com>
Co-authored-by: Jay Foad <Jay.Foad at amd.com>
Commit: 4e3aa76d7f5629e7577f837d0e2397cafd85e6c5
https://github.com/llvm/llvm-project/commit/4e3aa76d7f5629e7577f837d0e2397cafd85e6c5
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvm] Pretty printing for trap intrinsics (#159385)
Commit: e56b479d9f096171287e23169ce23295046535c0
https://github.com/llvm/llvm-project/commit/e56b479d9f096171287e23169ce23295046535c0
Author: Benedikt Lukas Huber <benedikt.huber at tuwien.ac.at>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
A llvm/test/CodeGen/Hexagon/vararg-musl.ll
Log Message:
-----------
[Hexagon] Bugfix in VarArg lowering: Special case for musl (#157564)
While debugging #145206 I found that a possible cause for the problem is
the call to printf, which is variadic.
In a musl environment VarArgs are treated like *non* VarArgs.
The handling of this special case was bypassed by the commit
a4f85515c20566a3c059aacd1ee3554b598f33f0.
The reason is that the arguement `TreatAsVarArg` is only set to `true`
in
an *non* musl env. `TreatAsVarArg` determines the result of
`isVarArg()`.
The `CCIfArgVarArg` class only checks each individual
variable, but not whether `isVarArg()` is true.
Without the special case, the unnamed arguments are always passed
on the stack, as is standard calling convention. But with musl
also unnamed arguments can be passed in registers.
Possibly, this fixes #145206.
Commit: 432b58915ad7257c432a403efe194e5033a53ab0
https://github.com/llvm/llvm-project/commit/432b58915ad7257c432a403efe194e5033a53ab0
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/include/llvm/CodeGen/LexicalScopes.h
M llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/LexicalScopes.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
A llvm/test/DebugInfo/AArch64/debug-types.ll
A llvm/test/DebugInfo/AArch64/populate-abstract-sp-once.ll
A llvm/test/DebugInfo/Generic/inlined-static-var.ll
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
M llvm/unittests/CodeGen/LexicalScopesTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
Log Message:
-----------
[DebugInfo][DwarfDebug] Separate creation and population of abstract subprogram DIEs (#159104)
With this change, construction of abstract subprogram DIEs is split in
two stages/functions:
creation of DIE (in DwarfCompileUnit::getOrCreateAbstractSubprogramDIE)
and its population with children (in
DwarfCompileUnit::constructAbstractSubprogramScopeDIE).
With that, abstract subprograms can be created/referenced from
DwarfDebug::beginModule, which should solve the issue with static local
variables DIE creation of inlined functons with optimized-out
definitions. It fixes https://github.com/llvm/llvm-project/issues/29985.
LexicalScopes class now stores mapping from DISubprograms to their
corresponding llvm::Function's. It is supposed to be built before
processing of each function (so, now LexicalScopes class has a method
for "module initialization" alongside the method for "function
initialization"). It is used by DwarfCompileUnit to determine whether a
DISubprogram needs an abstract DIE before DwarfDebug::beginFunction is
invoked.
DwarfCompileUnit::getOrCreateSubprogramDIE method is added, which can
create an abstract or a concrete DIE for a subprogram. It accepts
llvm::Function* argument to determine whether a concrete DIE must be
created.
This is a temporary fix for
https://github.com/llvm/llvm-project/issues/29985. Ideally, it will be
fixed by moving global variables and types emission to
DwarfDebug::endModule (https://reviews.llvm.org/D144007,
https://reviews.llvm.org/D144005).
Some code proposed by Ellis Hoag <ellis.sparky.hoag at gmail.com> in
https://github.com/llvm/llvm-project/pull/90523 was taken for this
commit.
Commit: f549bb2ddc9c106724d4f443aaf2cbe75d25942d
https://github.com/llvm/llvm-project/commit/f549bb2ddc9c106724d4f443aaf2cbe75d25942d
Author: lntue <lntue at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M libc/src/__support/math/rsqrtf16.h
M libc/test/src/math/rsqrtf16_test.cpp
M libc/test/src/math/smoke/rsqrtf16_test.cpp
Log Message:
-----------
[libc][math] Adjust rsqrtf16 exception checks. (#159411)
Commit: def202048586dad7029c9458a39dcb0e3cdb6c33
https://github.com/llvm/llvm-project/commit/def202048586dad7029c9458a39dcb0e3cdb6c33
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.h
Log Message:
-----------
[lldb] Recognize MTE fault Mach exceptions (#159117)
Recognize an MTE tag fault Mach exception. A tag fault is an error
reported by Arm's Memory Tagging Extension (MTE) when a memory access
attempts to use a pointer with a tag that doesn't match the tag stored
with the memory. LLDB will print the tag and address to make the issue
easier to diagnose.
This was hand tested by debugging an MTE enabled binary on an iPhone 17
running iOS 26.
rdar://113575216
Commit: b241cc9bd581a3e6900d0090f427e9dcc4a19a07
https://github.com/llvm/llvm-project/commit/b241cc9bd581a3e6900d0090f427e9dcc4a19a07
Author: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Fix llvm::concat_iterator for `ValueT == common_base_class *` (#144744)
Fix `llvm::concat_iterator` for the case of `ValueT` being a pointer to
a common base class to which the result of dereferencing any iterator in
`ItersT` can be casted to.
Commit: 3a2eb08de659bf0b87291377cfcf7fa8b8e70bf7
https://github.com/llvm/llvm-project/commit/3a2eb08de659bf0b87291377cfcf7fa8b8e70bf7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/AST/BUILD.gn
Log Message:
-----------
[gn build] Port 2caf4c1b2687
Commit: e8fd84de173979e0af73f87ed190d35fee6bbae1
https://github.com/llvm/llvm-project/commit/e8fd84de173979e0af73f87ed190d35fee6bbae1
Author: lntue <lntue at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M libc/test/src/math/smoke/rsqrtf16_test.cpp
Log Message:
-----------
[libc] Temporarily disable floating point exception check for rsqrtf16 on aarch64. (#159417)
Commit: 4bac9d4911a14c5d444f8a6b94c449e5a2c4a332
https://github.com/llvm/llvm-project/commit/4bac9d4911a14c5d444f8a6b94c449e5a2c4a332
Author: Ying Wang <yingwang1555 at linux.alibaba.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
A llvm/test/CodeGen/RISCV/bfloat-convert-half.ll
Log Message:
-----------
[RISCV] Add isel for bitcasting between bfloat and half types (#158828)
There is no RISCV isel for bitcast between f16 and bf16 which will
trigger "cannot select" fatal error.
Co-authored-by: Ying Wang <wy446777 at alibaba-inc.com>
Commit: 2c2fec331d550a894b7af1de4ed492119a7733eb
https://github.com/llvm/llvm-project/commit/2c2fec331d550a894b7af1de4ed492119a7733eb
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Simplify FilterChooser::getIslands() (NFC) (#159218)
Also turn the method into a static function so it can be used without
an instance of the class.
Commit: 6ad0f8e16b223707827efbf2cd0825b793b1db14
https://github.com/llvm/llvm-project/commit/6ad0f8e16b223707827efbf2cd0825b793b1db14
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/test/Driver/DTLTO/dtlto.c
M clang/test/Driver/DTLTO/ps5-dtlto.c
Log Message:
-----------
[DTLTO][TEST] Make Clang driver tests even more robust (#159418)
Remove XFAILs for llvm-driver. DTLTO is still incompatible with
llvm-driver, but these tests now pass after #159151.
Modify a missed regex to use filename.py (missed in #159151).
Tighten overly greedy regexes to prevent spurious failures.
Commit: aa5558d12cbbb6a039955fcb174129b57d182642
https://github.com/llvm/llvm-project/commit/aa5558d12cbbb6a039955fcb174129b57d182642
Author: Muzammil <55665739+Muzammiluddin-Syed-ECE at users.noreply.github.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/test/Conversion/ArithToAMDGPU/scaling-extf.mlir
M mlir/test/Conversion/ArithToAMDGPU/scaling-truncf.mlir
Log Message:
-----------
[mlir][ArithToAMDGPU] limit scaling truncf/extf support to gfx950 (#155431)
The current chip guard fails to prevent scaling_extf/truncf patterns
from being applied on gfx1100 which does not have scaling support.
---------
Signed-off-by: Muzammiluddin Syed <muzasyed at amd.com>
Commit: 0d989b2aefe8d8f66981f1d39f56ce0214b5de86
https://github.com/llvm/llvm-project/commit/0d989b2aefe8d8f66981f1d39f56ce0214b5de86
Author: Martin Storsjö <martin at martin.st>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
Log Message:
-----------
[clang] Avoid warnings about enum mismatch in ternary expressions. NFC. (#159338)
This avoids the following kind of warning when built with GCC:
../../clang/lib/Sema/SemaStmtAttr.cpp: In function ‘clang::Attr* ProcessStmtAttribute(clang::Sema&, clang::Stmt*, const clang::ParsedAttr&, clang::SourceRange)’:
../../clang/lib/Sema/SemaStmtAttr.cpp:677:30: warning: enumerated mismatch in conditional expression: ‘clang::diag::<unnamed enum>’ vs ‘clang::diag::<unnamed enum>’ [-Wenum-compare]
676 | S.Diag(A.getLoc(), A.isRegularKeywordAttribute()
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
677 | ? diag::err_keyword_not_supported_on_targe
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
678 | : diag::warn_unhandled_ms_attribute_ignore )
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
These enums are non-overlapping, but due they are defined in different
enum scopes due to how they are generated with tablegen.
Commit: 5cb7bf63eda283fb2b079458010467f00d52d78c
https://github.com/llvm/llvm-project/commit/5cb7bf63eda283fb2b079458010467f00d52d78c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/FormatVariadicDetails.h
Log Message:
-----------
[Support] Simplify has_StreamOperator (NFC) (#159242)
Without this patch, we are doing a roundtrip on types. Specifically,
if decltype(...) is well formed, std::is_same_v evaluates to a boolean
value. We then pass the boolean value to std::enable_if_t, go through
the sizeof(char)/sizeof(double) trick, and then come back to a boolean
value.
This patch simplifies all this by having test() return
std::is_same<...>. The "caller" attaches ::value, so effectively we
are using std::is_same<...>::value when decltype(...) is well formed,
bypassing std::enable_if_t and the sizeof(char)/sizeof(double) trick.
If we did not care about the return type of the shift operator, we
could use llvm::is_detected, but the return type check doesn't allow
us to simplify things that far.
Commit: dffd7f3d9a3294d21205251b986e76ec841cc750
https://github.com/llvm/llvm-project/commit/dffd7f3d9a3294d21205251b986e76ec841cc750
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[LLVM] Fix offload and update CUDA ABI for all SM values (#159354)
Summary:
Turns out the new CUDA ABI now applies retroactively to all the other
SMs if you upgrade to CUDA 13.0. This patch changes the scheme, keeping
all the SM flags consistent but using an offset.
Fixes: https://github.com/llvm/llvm-project/issues/159088
Commit: 7dc8753e8eebdde4e9e42d194c0ba1d56d59e924
https://github.com/llvm/llvm-project/commit/7dc8753e8eebdde4e9e42d194c0ba1d56d59e924
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Exclude LoopVectorize tests introduced in #155301 (#159440)
Commit: f992b5b3715a387ad2ead21f0c20445d95395607
https://github.com/llvm/llvm-project/commit/f992b5b3715a387ad2ead21f0c20445d95395607
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] exclude test introduced in #158328 (#159441)
Commit: e556dc0b232b553d7894a22603d8ee46e78fbd99
https://github.com/llvm/llvm-project/commit/e556dc0b232b553d7894a22603d8ee46e78fbd99
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/cuda-bad-arch.cu
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
A llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[AMDGPU] Add gfx1251 subtarget (#159430)
Commit: 835d6b3d1754f927cd384d7d4a444f3934a1fb00
https://github.com/llvm/llvm-project/commit/835d6b3d1754f927cd384d7d4a444f3934a1fb00
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] exclude LV test introduced in #155547 (#159443)
Commit: 7fb3a91418df61a81b1386eba3c29bc0df9e0787
https://github.com/llvm/llvm-project/commit/7fb3a91418df61a81b1386eba3c29bc0df9e0787
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[PatternMatch] Introduce match functor (NFC) (#159386)
A common idiom is the usage of the PatternMatch match function within a
functional algorithm like all_of. Introduce a match functor to shorten
this idiom.
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 6c8fcd6089b936d9211faff4ef4b16d1024902a9
https://github.com/llvm/llvm-project/commit/6c8fcd6089b936d9211faff4ef4b16d1024902a9
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/SFrame.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSFrame.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCSFrame.cpp
R llvm/test/MC/ELF/cfi-sframe-encoding.s
R llvm/test/MC/ELF/cfi-sframe-fre-cases.s
M llvm/test/MC/ELF/cfi-sframe.s
Log Message:
-----------
Revert "[SFrames] Emit and relax FREs (#158154)" (#159436)
Breaks some buildbots
This reverts commit c9285166214db4236f26312f68bba91f6437bd6f.
Commit: 96f2ab28fcf010fffc83b7c87707f27bf637fb92
https://github.com/llvm/llvm-project/commit/96f2ab28fcf010fffc83b7c87707f27bf637fb92
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
Log Message:
-----------
[RISCV][NFC] Merge some WriteRes entries in SiFive7 scheduling model (#159448)
NFC.
Commit: 1c4c7bd808e7de02a1d1ec7432333f14de132a95
https://github.com/llvm/llvm-project/commit/1c4c7bd808e7de02a1d1ec7432333f14de132a95
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vw-web-simplification.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (#143102)
As reported in https://github.com/llvm/llvm-project/issues/141034
SelectionDAG::getNode had some unexpected
behaviors when trying to create vectors with UNDEF elements. Since
we treat both UNDEF and POISON as undefined (when using isUndef())
we can't just fold away INSERT_VECTOR_ELT/INSERT_SUBVECTOR based on
isUndef(), as that could make the resulting vector more poisonous.
Same kind of bug existed in DAGCombiner::visitINSERT_SUBVECTOR.
Here are some examples:
This fold was done even if vec[idx] was POISON:
INSERT_VECTOR_ELT vec, UNDEF, idx -> vec
This fold was done even if any of vec[idx..idx+size] was POISON:
INSERT_SUBVECTOR vec, UNDEF, idx -> vec
This fold was done even if the elements not extracted from vec could
be POISON:
sub = EXTRACT_SUBVECTOR vec, idx
INSERT_SUBVECTOR UNDEF, sub, idx -> vec
With this patch we avoid such folds unless we can prove that the
result isn't more poisonous when eliminating the insert.
Fixes https://github.com/llvm/llvm-project/issues/141034
Commit: 4a8008ce226b23c829173da2a6b16473ebd6259c
https://github.com/llvm/llvm-project/commit/4a8008ce226b23c829173da2a6b16473ebd6259c
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
Log Message:
-----------
[AMDGPU] Mark cluster_workgroup_id_* intrinsics always uniform (#159439)
Commit: 221f8eef9d807f7fb46defb0f2f1c8067b143a23
https://github.com/llvm/llvm-project/commit/221f8eef9d807f7fb46defb0f2f1c8067b143a23
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
M llvm/test/Verifier/AMDGPU/llvm.amdgcn.cooperative.atomic.ll
Log Message:
-----------
[AMDGPU] Add gfx1251 runlines to cooperative atomcis tests. NFC (#159437)
Commit: 5f105fe806ec228545e64d3dff6a62a434b61033
https://github.com/llvm/llvm-project/commit/5f105fe806ec228545e64d3dff6a62a434b61033
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Update documentation about DWARF registers mapping. NFC (#159447)
Commit: 7cc5989593711ea4d6b5e13879b2ec3ba9a88171
https://github.com/llvm/llvm-project/commit/7cc5989593711ea4d6b5e13879b2ec3ba9a88171
Author: lntue <lntue at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/new.h
M libc/src/__support/big_int.h
M libc/src/__support/math_extras.h
Log Message:
-----------
[libc] Some MSVC compatibility fixes in src/__support. (#159428)
Commit: 6af5b41e4b4e303589ff709efaf783828dc3f75a
https://github.com/llvm/llvm-project/commit/6af5b41e4b4e303589ff709efaf783828dc3f75a
Author: Justin Stitt <justinstitt at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
A clang/test/Frontend/cir-not-built.c
M clang/test/lit.cfg.py
Log Message:
-----------
[CIR] Change unreachable to diagnostic for ill-equipped clang (#152614)
Commit: e86a8e33f9170b5582a33ba133257a61db27dd99
https://github.com/llvm/llvm-project/commit/e86a8e33f9170b5582a33ba133257a61db27dd99
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
AMDGPU: Set RegTupleAlignUnits on _Lo256_Align2 class (#159383)
Commit: d57aa484e12ae7a76228bca4de01139fdd1f5373
https://github.com/llvm/llvm-project/commit/d57aa484e12ae7a76228bca4de01139fdd1f5373
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Constrain regclass when replacing SGPRs with VGPRs (#159369)
Commit: 1d2007ba6f7bacda8848e35298a1833e79f4abd5
https://github.com/llvm/llvm-project/commit/1d2007ba6f7bacda8848e35298a1833e79f4abd5
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/unittests/Expression/CMakeLists.txt
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Fix OP_deref evaluation for large integer results (#159460)
When evaluating any DWARF expression that ended in OP_deref and whose
previous value on the dwarf stack -- the pointer address for the deref
-- was a load address, we were treating the result itself as a pointer,
calling Process:FixCodeAddress(result). This is wrong: there's no
guarantee that the result is a pointer itself.
Commit: 1a4685df13282ae5c1d7dce055a71a7130bfab3c
https://github.com/llvm/llvm-project/commit/1a4685df13282ae5c1d7dce055a71a7130bfab3c
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/unittests/Expression/CMakeLists.txt
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
Revert "[lldb] Fix OP_deref evaluation for large integer results (#159460)"
This reverts commit 1d2007ba6f7bacda8848e35298a1833e79f4abd5.
Commit: c744f6168f6f817c7a2dcd493a8e29a0c1f8a3bb
https://github.com/llvm/llvm-project/commit/c744f6168f6f817c7a2dcd493a8e29a0c1f8a3bb
Author: Druzhkov Sergei <serzhdruzhok at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/EventHelper.h
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Add memory event (#158437)
This patch adds support for the `memory` event from the
[DAP](https://microsoft.github.io/debug-adapter-protocol/specification#Events_Memory).
After this event is emitted, VS Code refetches the corresponding memory
range and re-renders the memory view. I think this patch and
[PR](https://github.com/llvm/llvm-project/pull/151884) can improve
experience for users who use `setVariable` request.
Commit: bb263f5a4d5be259c0f6110ee2561850d079b37a
https://github.com/llvm/llvm-project/commit/bb263f5a4d5be259c0f6110ee2561850d079b37a
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/examples/IRTransforms/SimplifyCFG.cpp
Log Message:
-----------
[examples] Fix invalid #ifndef LLVM_*_LINK_INTO_TOOLS (#144340)
The setting LLVM_SIMPLIFYCFG_LINK_INTO_TOOLS doesn't exist, it's called
LLVM_EXAMPLEIRTRANSFORMS_LINK_INTO_TOOLS
Commit: 53e9d31fd4d76f9b0792859021e297e7a521477d
https://github.com/llvm/llvm-project/commit/53e9d31fd4d76f9b0792859021e297e7a521477d
Author: cmtice <cmtice at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Add missing bazel dependency for __support_math_rsqrt16 (#159473)
Commit: 18420d833d895f0e90d951a6adbef3e4e663e36a
https://github.com/llvm/llvm-project/commit/18420d833d895f0e90d951a6adbef3e4e663e36a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/Target/Target.td
Log Message:
-----------
CodeGen: Do not define LOCAL_ESCAPE with ptr_rc (#158765)
ptr_rc is used to resolve an operand to a register class. This
is not used with a virtual register, but a label so remove
the use.
Commit: d46715aaa0203cc95f3749d386745ae293f0109f
https://github.com/llvm/llvm-project/commit/d46715aaa0203cc95f3749d386745ae293f0109f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/tools/driver/cc1as_main.cpp
Log Message:
-----------
clang: Emit error if assembler fails to construct subtarget (#159219)
We do not have consistent or good error handling of this situation.
Some tools check for errors, some just assert. The backend has no
proper way of reporting an invalid subtarget specification.
MCSubtargetInfo
currently does unreasonable things like spam warnings to errs, and then
silently proceed in an invalid state. I have a patch which starts
returning
null on some invalid subtargets, but all the tools need to start
erroring
cleanly first. I don't think there is a reliable way to test this today.
It
would have to be an incomplete backend. Ideally we would thread through
some kind of error context from the target to report the reason it's
an invalid subtarget.
Commit: 5cc41936f22da6edd4a85927774df17b1e7c945e
https://github.com/llvm/llvm-project/commit/5cc41936f22da6edd4a85927774df17b1e7c945e
Author: John Harrison <harjohn at google.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Protocol/MCP/Server.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
Log Message:
-----------
[lldb-mcp] Fix servers accepting more than one client. (#158357)
This fixes an issue where the MCP server would stop the main loop after
the first client disconnects.
This moves the MainLoop out of the Server instance and lifts the server
up into the ProtocolServerMCP object instead. This allows us to register
the client with the main loop used to accept and process requests.
Commit: 7f3661128b1e5dda69586afcff99a8f662e4126f
https://github.com/llvm/llvm-project/commit/7f3661128b1e5dda69586afcff99a8f662e4126f
Author: Wenju He <wenju.he at intel.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M libclc/clc/include/clc/clcfunc.h
M libclc/clc/include/clc/misc/shuffle2_def.inc
M libclc/clc/include/clc/misc/shuffle_def.inc
M libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc
M libclc/clc/lib/generic/atomic/clc_atomic_def.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
Log Message:
-----------
[libclc] Remove __attribute__((always_inline)) (#158791)
always_inline doesn't guarantee performance improvement.
Target-specific optimizations decide whether inlining is profitable.
Changes to amdgcn--amdhsa.bc:
* _Z9__clc_logDv16_f and _Z15__clc_remainderDv16_fS_ are not inlined.
* sincos vector function code size has doubled due to apparent
duplication.
Also replace typo _CLC_DECL with _CLC_DEF for function definition.
Commit: 658bb98e00016680a5157a19c453a1c6f1f909db
https://github.com/llvm/llvm-project/commit/658bb98e00016680a5157a19c453a1c6f1f909db
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Increase IndexWidth DAGISelMatcherEmitter. (#159479)
RISC-V has over a million bytes in the table.
Commit: bb013a4a220d423e64ecadd3f337b7f95368786d
https://github.com/llvm/llvm-project/commit/bb013a4a220d423e64ecadd3f337b7f95368786d
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/unittests/Expression/CMakeLists.txt
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
Reland "Revert "[lldb] Fix OP_deref evaluation for large integer resu… (#159482)
…lts (#159460)""
The original had an issue on "AArch-less" bots.
Fixed it with some ifdefs around the presence of the AArch ABI plugin.
This reverts commit 1a4685df13282ae5c1d7dce055a71a7130bfab3c.
Commit: aa8b6245182c122127af7c6ac179f9743bca0d78
https://github.com/llvm/llvm-project/commit/aa8b6245182c122127af7c6ac179f9743bca0d78
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Remove unnecessary operand legalization for WMMAs (#159370)
The operand constraints already express this constraint, and
InstrEmitter will respect them.
Commit: 38f2a1cb9b25ef2967661865458d6a919ce82aaa
https://github.com/llvm/llvm-project/commit/38f2a1cb9b25ef2967661865458d6a919ce82aaa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-uadde-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-uadde-rv64.mir
Log Message:
-----------
[RISCV][GISel] Test legalizing s64 G_UADDE on RV32. And s128 on RV64. NFC (#159412)
Commit: f3c9c6c0c51880109b39411be4e6d742c16210d1
https://github.com/llvm/llvm-project/commit/f3c9c6c0c51880109b39411be4e6d742c16210d1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
Log Message:
-----------
RuntimeLibcalls: Use get_host_tool_path for executables used in benchmark (#153955)
Copied from what the llvm-shlib build is doing.
This reverts commit 0b1b567d9f84e67124c58d69b5aa375357d68c9e.
Commit: 43ec53b8493752669dc24a6e2b6c66c4449a9e76
https://github.com/llvm/llvm-project/commit/43ec53b8493752669dc24a6e2b6c66c4449a9e76
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][HeuristicResolver] Default argument heuristic for template template parameters (#156404)
Fixes https://github.com/clangd/clangd/issues/2478
Commit: 44b7abcc75b005ab87e11e2beac155bf0b155992
https://github.com/llvm/llvm-project/commit/44b7abcc75b005ab87e11e2beac155bf0b155992
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
Log Message:
-----------
Revert "RuntimeLibcalls: Use get_host_tool_path for executables used … (#159488)
…in benchmark (#153955)"
This reverts commit f3c9c6c0c51880109b39411be4e6d742c16210d1.
Fails fuschia bot.
Commit: 91c72e8169208099f85d0129f25c3a706265bc19
https://github.com/llvm/llvm-project/commit/91c72e8169208099f85d0129f25c3a706265bc19
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/cdefined.f90
Log Message:
-----------
[flang] Add a warning for CDEFINED declarations that have initializers (#159456)
CDEFINED declarations are similar to "extern" declarations in C. If they
have initializers, this could lead to linker errors. clang warns about
"extern" declarations with initializers. Add similar warning to flang:
```
$ flang -c cdefined.f90 -pedantic
./cdefined.f90:3:57: warning: CDEFINED variable should not have an initializer [-Wcdefined-init]
integer(c_int), bind(C, name='c_global', CDEFINED) :: c = 4
^
```
Commit: 7ca448e47965005b24d107aff6fab4644b8b81b4
https://github.com/llvm/llvm-project/commit/7ca448e47965005b24d107aff6fab4644b8b81b4
Author: hev <wangrui at loongson.cn>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll
Log Message:
-----------
[LoongArch] Fix MergeBaseOffset for constant pool index operand (#159336)
Fixes #159200
Commit: 1a172b9924948f10f1bd3db07a83fe5e884f7b64
https://github.com/llvm/llvm-project/commit/1a172b9924948f10f1bd3db07a83fe5e884f7b64
Author: woruyu <1214539920 at qq.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ssube-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ssube-rv64.mir
Log Message:
-----------
[RISCV][GISel] Lower G_SSUBE (#157855)
### Summary
Try to implemente Lower G_SSUBE in LegalizerHelper::lower
Commit: c78239e3113986238c4d9012c4d2897f6f5edefd
https://github.com/llvm/llvm-project/commit/c78239e3113986238c4d9012c4d2897f6f5edefd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
Log Message:
-----------
Reapply "RuntimeLibcalls: Use get_host_tool_path for executables used … (#159488) (#159489)
This reverts commit 44b7abcc75b005ab87e11e2beac155bf0b155992.
Add additional if TARGET checks
Commit: e03a7c124d50fa9449a81fe21cc958a18919a4ea
https://github.com/llvm/llvm-project/commit/e03a7c124d50fa9449a81fe21cc958a18919a4ea
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/icmp-range.ll
Log Message:
-----------
[InstCombine] Generalize `foldAndOrOfICmpsUsingRanges` to handle more cases. (#158498)
Closes https://github.com/llvm/llvm-project/issues/158326.
Closes https://github.com/llvm/llvm-project/issues/59555.
Proof for `(X & -Pow2) == C -> (X - C) < Pow2`:
https://alive2.llvm.org/ce/z/HMgkuu
Commit: 27f8f9e1f1dcf00df8c338df29193833e6d807f8
https://github.com/llvm/llvm-project/commit/27f8f9e1f1dcf00df8c338df29193833e6d807f8
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
A llvm/test/CodeGen/RISCV/zibi.ll
Log Message:
-----------
[RISCV][CodeGen] Add CodeGen support of Zibi experimental extension (#146858)
This adds the CodeGen support of Zibi v0.1 experimental extension, which
depends on #127463.
Commit: 8548fa00f1d57c39119a24cfda4ef84232ead7e0
https://github.com/llvm/llvm-project/commit/8548fa00f1d57c39119a24cfda4ef84232ead7e0
Author: Jim Lin <jim at andestech.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
Log Message:
-----------
[RISCV] Match fmaxnum and fminnum to reduction ops. (#159244)
This patch tries to match fmaxnum and fminnum to vector reductions.
Commit: b6e440b3a3f16245ec410e29ff4fcc079e8456ca
https://github.com/llvm/llvm-project/commit/b6e440b3a3f16245ec410e29ff4fcc079e8456ca
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-17 (Wed, 17 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add BUILD rules for fma and fmaf functions. (#159502)
This change adds the capability to build fma/fmaf with Bazel (fmal,
fmaf128 variants are not implemented yet), and run smoke tests.
BUILD rules for regular MPFR-based tests will be added later, since they
require support for building rand/srand as well, which is missing in
Bazel for now.
Commit: 4663d2521c65827ca22884e12a96ddd437377e31
https://github.com/llvm/llvm-project/commit/4663d2521c65827ca22884e12a96ddd437377e31
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopPassManager.cpp
M llvm/test/Other/loop-pm-invalidation.ll
Log Message:
-----------
[NewPM] Don't preserve BlockFrequencyInfo in FunctionToLoopPassAdaptor (#157888)
Function analyses in LoopStandardAnalysisResults are marked as preserved
by the loop pass adaptor, because LoopAnalysisManagerFunctionProxy
manually invalidates most of them.
However the proxy doesn't invalidate BFI, since it is only preserved on
a "lossy" basis: see https://reviews.llvm.org/D86156 and
https://reviews.llvm.org/D110438.
So any changes to the CFG will result in BFI giving incorrect results,
which is fine for loop passes which deal with the lossiness.
But the loop pass adapator still marks it as preserved, which causes the
lossy result to leak out into function passes.
This causes incorrect results when viewed from e.g. LoopVectorizer,
where an innermost loop header may be reported to have a smaller
frequency than its successors.
This fixes this by dropping the call to preserve, and adds a test with
the -O1 pipeline which shows the effects whenever the CFG is changed and
UseBlockFrequencyInfo is set.
I've also dropped it for BranchProbabilityAnalysis too, but I couldn't
test for it since UseBranchProbabilityInfo always seems to be false?
This may be dead code.
Commit: ac2b51e6ce157b430b3823ebc90def9f1d49d36e
https://github.com/llvm/llvm-project/commit/ac2b51e6ce157b430b3823ebc90def9f1d49d36e
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/pr133720.cppm
A clang/test/Modules/pr159424.cppm
Log Message:
-----------
[C++20] [Modules] Fix issues with non-exported in-class friend declarations
Close https://github.com/llvm/llvm-project/issues/159424
Close https://github.com/llvm/llvm-project/issues/133720
For in-class friend declaration, it is hard for the serializer to decide
if they are visible to other modules. But luckily, Sema can handle it
perfectly enough. So it is fine to make all of the in-class friend
declaration as generally visible in ASTWriter and let the Sema to make
the final call. This is safe as long as the corresponding class's
visibility are correct.
Commit: 5e1b416472cdf38af49e895079fb0ab282e861c4
https://github.com/llvm/llvm-project/commit/5e1b416472cdf38af49e895079fb0ab282e861c4
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
Log Message:
-----------
[clang-tidy][NFC] Construct map at compile time (#158166)
The important part of this PR is the changes to
`getDurationInverseForScale`. I changed the other `get*ForScale`
functions so that they all follow the same pattern, but those aren't as
important.
Commit: 5f76369997cc4b75c62d34729266ddb20e4f5ef9
https://github.com/llvm/llvm-project/commit/5f76369997cc4b75c62d34729266ddb20e4f5ef9
Author: lntue <lntue at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M libc/test/src/math/smoke/FmaTest.h
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][math] Update test/src/math/smoke/FmaTest.h to not rely on compiler runtime. (#159503)
Commit: 93faaf47f334cb144e8204704ad4fa97d7c1a74d
https://github.com/llvm/llvm-project/commit/93faaf47f334cb144e8204704ad4fa97d7c1a74d
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/AsmParser/Parser.cpp
M mlir/test/IR/invalid.mlir
Log Message:
-----------
[mlir] Expand error message to include unregistered dialects. (#158028)
It is possible to load unregistered dialects, this can result in a
confusing error message. Mark unregistered but loaded dialects.
This is currently done as a merged list as that is most concise but
requires some additional preprocessing (did merge sort given the other
two lists are, could do it shorter and probably at not too much extra
cost if I just used SetVectors - so alternative which uses less code and
may be preferred as performance not critical here).
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: ddb9c785cd64835de84ecf394401ad98a6f087cd
https://github.com/llvm/llvm-project/commit/ddb9c785cd64835de84ecf394401ad98a6f087cd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/AST/Expr.h
Log Message:
-----------
[clang][Expr][NFC] Fix some doc comments (#159504)
Use proper doc comments here instead of regular comments.
Commit: ddf0f6fe91eda2b0986cda405eaba4318ac08ac5
https://github.com/llvm/llvm-project/commit/ddf0f6fe91eda2b0986cda405eaba4318ac08ac5
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsExpandPseudo.cpp
M llvm/test/CodeGen/Mips/atomic-min-max.ll
Log Message:
-----------
Revert "[Mips] Fix atomic min/max generate mips4 instructions when compiling for mips2" (#159495)
Reverts llvm/llvm-project#149983
Commit: 304454980b9122e8037f857c577a7af981c5c884
https://github.com/llvm/llvm-project/commit/304454980b9122e8037f857c577a7af981c5c884
Author: Abhinav Kumar <96587705+kr-2003 at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/unittests/Interpreter/CMakeLists.txt
Log Message:
-----------
[clang-repl] Disable out of process JIT tests on non-unix platforms (#159404)
Co-authored-by: kr-2003 <kumar.kr.abhinav at gmail.com>
Co-authored-by: Anutosh Bhat <andersonbhat491 at gmail.com>
Commit: e7db709eab7999e6bdb40328c091b8432ae416cc
https://github.com/llvm/llvm-project/commit/e7db709eab7999e6bdb40328c091b8432ae416cc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
Log Message:
-----------
benchmarks: Skip runtime libcalls benchmark for llvm-driver build (#159513)
Apparently if you enable LLVM_TOOL_LLVM_DRIVER_BUILD, many individual
tool binaries are not built and instead create object targets which
are linked into an llvm-driver tool which you need to use instead.
In principle we could reconstruct this command with llvm-driver, but
I can't get a build to complete when I turn this on as a standalone
option.
Commit: c1fca0fa1408a2d2ea24fe43058e53c0d1df82ce
https://github.com/llvm/llvm-project/commit/c1fca0fa1408a2d2ea24fe43058e53c0d1df82ce
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/test/tools/llvm-readobj/ELF/malformed-pt-dynamic.test
M llvm/test/tools/obj2yaml/ELF/program-headers.yaml
M llvm/test/tools/yaml2obj/ELF/program-header-size-offset.yaml
Log Message:
-----------
[llvm][yaml2obj] Modify section header overriding timing (#130942)
yaml2obj should determine the program header offset (and other
properties) based on the intended values rather than the final
`sh_offset` of the section header.
`setProgramHeaderLayout` uses section offsets for determining
`p_offset`. Move section header overriding after
`setProgramHeaderLayout` to prevent `ShOffset` from affecting program
header `p_offset`.
This change adjusts the timing of when the section header is overridden
to ensure that the program headers are set correctly.
More details
[here](https://github.com/llvm/llvm-project/pull/126537#issuecomment-2700421989).
---------
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Signed-off-by: Ruoyu Qiu <qiuruoyu at xiaomi.com>
Co-authored-by: Ruoyu Qiu <qiuruoyu at xiaomi.com>
Commit: 53c386fa84ecd53c4f881e5a9272984563c7bf1b
https://github.com/llvm/llvm-project/commit/53c386fa84ecd53c4f881e5a9272984563c7bf1b
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-pointer-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
Log Message:
-----------
[flang][openacc] allocate scalar derived type private copies in recipes (#159374)
Generate alloca in the init region of recipes for scalar derived types.
Note: I will do the array case separately (currently a TODO), and also
deal with private derived type default initialization which is missing
for PRIVATE (not needed for FIRSTPRIVATE since the value is copied from
the privatized variable).
Commit: 9df83619fbfe5b079c50e88df304d27d3fbf4846
https://github.com/llvm/llvm-project/commit/9df83619fbfe5b079c50e88df304d27d3fbf4846
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
A llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerInvalidHoisting.td
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
Log Message:
-----------
[GlobalISelMatchTable] Don't hoist C++ predicates over operand recorders (#159329)
The pattern optimizations in GlobalISelMatchTable.cpp can extract common
predicates out of pattern alternatives by putting the pattern alternatives into
a GroupMatcher and moving common predicates into the GroupMatcher's predicate
list. This patch adds checks to avoid hoisting a common predicate before
matchers that record named operands that the predicate uses, which would lead
to segfaults when the imported patterns are matched.
See the added test for a concrete example inspired by the AMDGPU backend.
This fixes a bug encountered in #143881.
Commit: cac389405455659a150caf2402d1541d7009cab0
https://github.com/llvm/llvm-project/commit/cac389405455659a150caf2402d1541d7009cab0
Author: Urvi Rav <94829943+ravurvi20 at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/target_uses_allocators_messages.cpp
Log Message:
-----------
[OpenMP 5.2] New syntax for 'uses_allocators' clause (#157025)
This patch updates the parsing changes to handle the new syntax of the
`uses_allocators` clause as defined in OpenMP 5.2(Section 6.8).
```
// Case 1: Allocator without traits
// < 5.2 → error
// ≥ 5.2 → OK, empty traits set
#pragma omp target teams uses_allocators(cgroup_alloc)
// Case 2: Allocator with traits
// Old syntax (< 5.2):
#pragma omp target teams uses_allocators(cgroup_alloc(cgroup_traits))
// New syntax (≥ 5.2):
#pragma omp target teams uses_allocators(traits(cgroup_traits) : cgroup_alloc)
// Case 3: Multiple allocators
// Old syntax (< 5.2), comma-separated:
#pragma omp target teams uses_allocators(cgroup_alloc(cgroup_traits), aligned_alloc(aligned_traits))
// New syntax (≥ 5.2), semicolon-separated:
#pragma omp target teams uses_allocators(traits(cgroup_traits) : cgroup_alloc; traits(aligned_traits) : aligned_alloc)
```
---------
Co-authored-by: urvi-rav <urvi.rav at hpe.com>
Commit: 1aded51d7478df41c30eba85e0fefaca031f23d2
https://github.com/llvm/llvm-project/commit/1aded51d7478df41c30eba85e0fefaca031f23d2
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Prepare to handle diff type sizes (NFC) (#122318)
As depend_diff_types shows, there are several places where the
HasSameSize check can be relaxed for higher analysis precision. As a
first step, return both the source size and the sink size from
getDependenceDistanceStrideAndSize, along with a HasSameSize boolean for
the moment.
Commit: efa7385831503b38b45f8b4eca3e21ba7a261097
https://github.com/llvm/llvm-project/commit/efa7385831503b38b45f8b4eca3e21ba7a261097
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/test/Target/SPIRV/entry-point.mlir
M mlir/test/Target/SPIRV/logical-ops.mlir
M mlir/test/Target/SPIRV/sampled-image.mlir
Log Message:
-----------
[mlir][spirv] Fix entry point, logical ops and sampled image Target tests (#159376)
For the entry point an incorrect combination of execution model and mode
was used as well as arguments were specified for the entry function (the
function should take no arguments). For logical ops the test was failing
as using scalar condition with vector objects are not supported in spv1.0.
Sampled image test was using incorrect *Sampled* and *Dim* values.
Sampled images need to have *Sampled* operand of 0 or 1, but not 2
(`NoSampler`), and `SubpassData` is not allowed.
Commit: d76d0a5139010068aceaedcd3683d9500800ee98
https://github.com/llvm/llvm-project/commit/d76d0a5139010068aceaedcd3683d9500800ee98
Author: David Green <david.green at arm.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
M llvm/test/CodeGen/AArch64/aarch64-mulv.ll
M llvm/test/CodeGen/AArch64/arm64-fp-contract-zero.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/call-rv-marker.ll
M llvm/test/CodeGen/AArch64/callbr-prepare.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll
M llvm/test/CodeGen/AArch64/fnmul.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-fp16.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics.ll
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/ldexp-arm64ec.ll
M llvm/test/CodeGen/AArch64/neon-addlv.ll
M llvm/test/CodeGen/AArch64/ptrauth-fpac.ll
M llvm/test/CodeGen/AArch64/remat-const-float-simd.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sme-avoid-coalescing-locally-streaming.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-uniform-dsp-undef.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-pred.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
Log Message:
-----------
[AArch64] Regenerate and update a number of check lines. NFC
Commit: 88b5c7435e70702d54772c1ec3864013099edc6c
https://github.com/llvm/llvm-project/commit/88b5c7435e70702d54772c1ec3864013099edc6c
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
Log Message:
-----------
[lldb] Correct 32-bit build failure in StopInfoMachException.cpp (#159523)
uintptr_t is usually a good idea when handling pointers, but lldb has to
handle 64-bit addresses that might be from a remote system, on a 32-bit
system.
So I've changed a few instances here to use addr_t which is 64-bit
everywhere.
Before we got:
https://lab.llvm.org/buildbot/#/builders/18/builds/21247
```
../llvm-project/lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp:81:28: error: constexpr variable 'g_mte_tag_mask' must be initialized by a constant expression
81 | static constexpr uintptr_t g_mte_tag_mask = (uintptr_t)0x0f << g_mte_tag_shift;
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../llvm-project/lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp:81:61: note: shift count 56 >= width of type 'uintptr_t' (aka 'unsigned int') (32 bits)
81 | static constexpr uintptr_t g_mte_tag_mask = (uintptr_t)0x0f << g_mte_tag_shift;
| ^
1 error generated.
```
Original code added by #159117.
Commit: 18630b0633bd550ad6675e155f42365ae42eb919
https://github.com/llvm/llvm-project/commit/18630b0633bd550ad6675e155f42365ae42eb919
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang] Remove Diag parameter from Expr::EvaluateKnownConstInt (#159512)
If it's truly a known const int, it won't emit any diagnostics anyway.
And if it did, we wouldn't notice because no call site passed something
non-null.
Commit: 98ebb64a1639fa20e2cfa44bc796dfc28db1f691
https://github.com/llvm/llvm-project/commit/98ebb64a1639fa20e2cfa44bc796dfc28db1f691
Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/MIRPrinter.cpp
Log Message:
-----------
[NFC][MIRPrinter] Use `std::move` to avoid copy (#157832)
Commit: a868f28c6e9beecb2b3fbe8acfbe0d272fabd14d
https://github.com/llvm/llvm-project/commit/a868f28c6e9beecb2b3fbe8acfbe0d272fabd14d
Author: nerix <nerixdev at outlook.de>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[LLDB][ProcessWindows] Set exit status on instance rather than going through all targets (#159308)
When quitting LLDB on Windows while a process was still running, LLDB
would take unusually long to exit. This was due to a temporary deadlock:
The main thread was destroying the processes. In doing so, it iterated
over the target list:
https://github.com/llvm/llvm-project/blob/88c64f76ed2ca226da99b99f60d316b1519fc7d8/lldb/source/Core/Debugger.cpp#L1095-L1098
This locks the list for the whole iteration. Finalizing the process
would eventually lead to `DebuggerThread::StopDebugging`, which
terminates the process and waits for it to exit:
https://github.com/llvm/llvm-project/blob/88c64f76ed2ca226da99b99f60d316b1519fc7d8/lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp#L196
The debugger loop (on a separate thread) would see that the process
exited and call
[`ProcessWindows::OnExitProcess`](https://github.com/llvm/llvm-project/blob/88c64f76ed2ca226da99b99f60d316b1519fc7d8/lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp#L656-L673).
This calls the static function
[`Process::SetProcessExitStatus`](https://github.com/llvm/llvm-project/blob/0a7a7d56fc882653335beba0d1f8ea9f26089c22/lldb/source/Target/Process.cpp#L1098-L1126).
This tries to find the process by its ID from the debugger's target
list. Doing so requires locking the list, so the debugger thread would
then be stuck on
https://github.com/llvm/llvm-project/blob/0a7a7d56fc882653335beba0d1f8ea9f26089c22/lldb/source/Target/TargetList.cpp#L403
After 5s, the main thread would give up waiting. So every exit where the
process was still running would be delayed by about 5s.
Since `ProcessWindows` would find itself when calling
`SetProcessExitStatus`, we can call `SetExitStatus` directly.
This can also make some tests run faster. For example, the DIA PDB tests
previously took 15s to run on my PC (24 jobs) and now take 5s. For all
shell tests, the difference isn't that big (only about 3s), because most
don't run into this and the tests run in parallel.
Commit: 2f6b433f2898f6d431dfefd393c2c7777c740418
https://github.com/llvm/llvm-project/commit/2f6b433f2898f6d431dfefd393c2c7777c740418
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg] Update vectorization logic for linalg.pack (#149156) (#158926)
NOTE: See #149156 for a smilar change for `linalg.unpack`
This PR makes sure that we don't generate unnecessary `tensor.empty`
when vectorizing `linalg.pack`.
To better visualize the changes implemented here, consider this IR:
```mlir
func.func @example(
%src: tensor<64x4xf32>,
%dest: tensor<2x4x16x2xf32>) -> tensor<2x4x16x2xf32> {
%pack = linalg.pack %src
outer_dims_perm = [1, 0]
inner_dims_pos = [0, 1]
inner_tiles = [16, 2]
into %dest : tensor<64x4xf32> -> tensor<2x4x16x2xf32>
return %pack : tensor<2x4x16x2xf32>
}
```
Below is the output after vectorization, BEFORE and AFTER this PR.
BEFORE (note `tensor.empty` and the fact that `%arg1` is not used):
```mlir
func.func @example(%arg0: tensor<64x4xf32>, %arg1: tensor<2x4x16x2xf32>) -> tensor<2x4x16x2xf32> {
%cst = arith.constant 0.000000e+00 : f32
%c0 = arith.constant 0 : index
%0 = vector.transfer_read %arg0[%c0, %c0], %cst {in_bounds = [true, true]} : tensor<64x4xf32>, vector<64x4xf32>
%1 = vector.shape_cast %0 : vector<64x4xf32> to vector<4x16x2x2xf32>
%2 = vector.transpose %1, [2, 0, 1, 3] : vector<4x16x2x2xf32> to vector<2x4x16x2xf32>
%3 = tensor.empty() : tensor<2x4x16x2xf32>
%c0_0 = arith.constant 0 : index
%4 = vector.transfer_write %2, %3[%c0_0, %c0_0, %c0_0, %c0_0] {in_bounds = [true, true, true, true]} : vector<2x4x16x2xf32>, tensor<2x4x16x2xf32>
return %4 : tensor<2x4x16x2xf32>
}
```
AFTER (note that `%arg1` is correctly used):
```mlir
func.func @example(%arg0: tensor<64x4xf32>, %arg1: tensor<2x4x16x2xf32>) -> tensor<2x4x16x2xf32> {
%cst = arith.constant 0.000000e+00 : f32
%c0 = arith.constant 0 : index
%0 = vector.transfer_read %arg0[%c0, %c0], %cst {in_bounds = [true, true]} : tensor<64x4xf32>, vector<64x4xf32>
%1 = vector.shape_cast %0 : vector<64x4xf32> to vector<4x16x2x2xf32>
%2 = vector.transpose %1, [2, 0, 1, 3] : vector<4x16x2x2xf32> to vector<2x4x16x2xf32>
%c0_0 = arith.constant 0 : index
%3 = vector.transfer_write %2, %arg1[%c0_0, %c0_0, %c0_0, %c0_0] {in_bounds = [true, true, true, true]} : vector<2x4x16x2xf32>, tensor<2x4x16x2xf32>
return %3 : tensor<2x4x16x2xf32>
}
```
ADDITIONAL CHANGES:
* Adds missing `CHECK-LABEL` in tests.
* Capitalize LIT test variables names.
Commit: 573b3775e43c7d03d162f868e06253e0ef199bc4
https://github.com/llvm/llvm-project/commit/573b3775e43c7d03d162f868e06253e0ef199bc4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
A llvm/test/CodeGen/X86/avx512-mask-bit-manip.ll
Log Message:
-----------
[X86] Add test coverage for #158649 (#159524)
Demonstrates the failure to keep avx512 mask predicate bit manipulation
patterns (based off the BMI1/BMI2/TBM style patterns) on the predicate
registers - unless the pattern is particularly complex the cost of
transferring to/from gpr outweighs any gains from better scalar
instructions
I've been rather random with the mask types for the tests, I can adjust
later on if there are particular cases of interest
Commit: 85527609a05f64ea7d1ad14f4ae84435ce7efd37
https://github.com/llvm/llvm-project/commit/85527609a05f64ea7d1ad14f4ae84435ce7efd37
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
Log Message:
-----------
[AMDGPU] kernel-argument-dag-lowering.ll - regenerate test coverage (#159526)
Commit: 0384f6c9dbdcce283088b5207a56b1567590f927
https://github.com/llvm/llvm-project/commit/0384f6c9dbdcce283088b5207a56b1567590f927
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
Log Message:
-----------
[VPlanPatternMatch] Introduce match functor (NFC) (#159521)
Follow up on 7fb3a91 ([PatternMatch] Introduce match functor) to
introduce the VPlanPatternMatch version of the match functor to shorten
some idioms.
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: c5062d7d6358d73931b4791c77500f476606b003
https://github.com/llvm/llvm-project/commit/c5062d7d6358d73931b4791c77500f476606b003
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
R mlir/lib/Dialect/SCF/Transforms/IfConditionPropagation.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
R mlir/test/Dialect/SCF/if-cond-prop.mlir
Log Message:
-----------
Revert "[mlir] move if-condition propagation to a standalone pass" (#159535)
Reverts llvm/llvm-project#150278
Multiple post-merge comment remained undressed, and some more
fundamental issues were also reported in #159165
Commit: 4625c8f076a85a4b3799a71b9299424a426a9de3
https://github.com/llvm/llvm-project/commit/4625c8f076a85a4b3799a71b9299424a426a9de3
Author: nerix <nerixdev at outlook.de>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites.test
M lldb/test/Shell/SymbolFile/PDB/type-quals.test
Log Message:
-----------
[LLDB][NativePDB] Add modifiers to modified type name (#159296)
When creating LLDB types from `LF_MODIFIER` records, the type name of
the modified type was used. This didn't include the modifiers
(`const`/`volatile`/`__unaligned`). With this PR, they're included.
The DIA plugin had a test for this. That test also assumed that function
types had a name. I removed that check here, because function/procedure
types themselves in PDB don't have a name:
```
0x1015 | LF_ARGLIST [size = 20, hash = 0xBCB6]
0x0074 (int): `int`
0x1013: `int* __restrict`
0x1014: `int& __restrict`
0x1016 | LF_PROCEDURE [size = 16, hash = 0x3F611]
return type = 0x0003 (void), # args = 3, param list = 0x1015
calling conv = cdecl, options = None
```
I assume DIA gets the name from the function symbol itself. In the
native plugin, that name isn't included and multiple functions with the
same signature will reuse one type, whereas DIA would create a new type
for each function. The
[Shell/SymbolFile/PDB/func-symbols.test](https://github.com/llvm/llvm-project/blob/b29c7ded31d81ca47aed0157c543c8b6a0f5866c/lldb/test/Shell/SymbolFile/PDB/func-symbols.test)
also relies on this.
Commit: 8fcb073e125dac1e049244cc6ee948223d267f76
https://github.com/llvm/llvm-project/commit/8fcb073e125dac1e049244cc6ee948223d267f76
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvm] Use prop-dict for `ubsantrap` (#159470)
https://github.com/llvm/llvm-project/pull/159385#discussion_r2356872047
Commit: 1dc6bf3ff98c25dd29c6db3407c81d2064bc6977
https://github.com/llvm/llvm-project/commit/1dc6bf3ff98c25dd29c6db3407c81d2064bc6977
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/console/TestDAP_console.py
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/startDebugging/TestDAP_startDebugging.py
M lldb/test/API/tools/lldb-dap/step/TestDAP_step.py
M lldb/test/API/tools/lldb-dap/stepInTargets/TestDAP_stepInTargets.py
Log Message:
-----------
[lldb][lldb-dap] Disable all lldb-dap tests on Windows on Arm (#159542)
This reverts the following commits:
a0a82ee19d6f2ff1013407ba4c973bfe5428423f
757bb36a58c7d7151a28c6a5fc7caa2e1f44de87
83b48b13f3a70bf56053e92593270c519859cfd7
b45f1fb377636a34c01e34b89341c97d19975554
d2e153981e62fb2ea781ef456ff744f9893e0733
e2d1bbebbb099c7010a31fad62a9128166ef14a0
71cae12442e7476e6397fd73db05e127bfe2d035
7dd879bdc01297a551196a60bb5a5a90ca4dd1ed
f3b542e3148cfc244f63cb7c987ccf8ebc71942b
Where I had disabled specific tests due to them being flakey on our
Windows on Arm bot.
Clearly this strategy isn't working because
every day I see a new random test failing.
Until something can be done about this, disable
every lldb-dap test on Windows on Arm. The coverage we get is just not
worth spamming contributors
who have nothing to do with lldb-dap.
See #137660
Commit: af66368ff641137bc4bc9818a170d43abfa6df44
https://github.com/llvm/llvm-project/commit/af66368ff641137bc4bc9818a170d43abfa6df44
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclOpenMP.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTCommon.cpp
A clang/test/OpenMP/groupprivate_ast_print.cpp
A clang/test/OpenMP/groupprivate_messages.cpp
M clang/tools/libclang/CIndex.cpp
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[clang] [OpenMP] New OpenMP 6.0 - Parsing and Sema support for groupprivate (#158134)
Commit: 77028d6574acb92a165d4926f8ea1312c71fbfc9
https://github.com/llvm/llvm-project/commit/77028d6574acb92a165d4926f8ea1312c71fbfc9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/test/lib/Dialect/Linalg/TestLinalgRankReduceContractionOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for modernize-use-equals-default in TestLinalgRankReduceContractionOps.cpp (NFC)
Commit: 74090dec4c0df617821dd72febddaa5778816ee8
https://github.com/llvm/llvm-project/commit/74090dec4c0df617821dd72febddaa5778816ee8
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
Log Message:
-----------
[mlir][spirv] Verify SampledImageType Dim (#159397)
This patches adds check for: "It [ImageType] must not have a Dim of
SubpassData. Additionally, starting with version 1.6, it must not have a
Dim of Buffer." as defined in "3.3.6. Type-Declaration Instructions" of
SPIR-V spec.
Commit: 226b0a9170267cbad13a695fa591cfe6ee56d304
https://github.com/llvm/llvm-project/commit/226b0a9170267cbad13a695fa591cfe6ee56d304
Author: moorabbit <moorabbit at proton.me>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
Log Message:
-----------
[Headers][X86] Add constexpr support for some AVX512 masked extension/truncation intrinsics. (#158663)
The following AVX[512] intrinsics are now constexpr:
- `_mm512_mask_cvtepi8_epi32`
- `_mm512_maskz_cvtepi8_epi32`
- `_mm512_mask_cvtepi8_epi64`
- `_mm512_maskz_cvtepi8_epi64`
- ` _mm512_mask_cvtepi16_epi32`
- ` _mm512_maskz_cvtepi16_epi32`
- ` _mm512_mask_cvtepi16_epi64`
- ` _mm512_maskz_cvtepi16_epi64`
- ` _mm512_mask_cvtepi32_epi64`
- ` _mm512_maskz_cvtepi32_epi64`
- ` _mm512_mask_cvtepu8_epi32`
- ` _mm512_maskz_cvtepu8_epi32`
- ` _mm512_mask_cvtepu8_epi64`
- ` _mm512_maskz_cvtepu8_epi64`
- ` _mm512_mask_cvtepu16_epi32`
- ` _mm512_maskz_cvtepu16_epi32`
- `_mm512_mask_cvtepu16_epi64`
- `_mm512_maskz_cvtepu16_epi64`
- `_mm512_mask_cvtepu32_epi64`
- `_mm512_maskz_cvtepu32_epi64`
- `_mm512_mask_cvtepi8_epi16`
- `_mm512_maskz_cvtepi8_epi16`
- `_mm512_mask_cvtepu8_epi16`
- `_mm512_maskz_cvtepu8_epi16`
- `_mm_cvtepi16_epi8`
- `_mm256_cvtepi16_epi8`
- `_mm256_mask_cvtepi16_epi8`
- `_mm256_maskz_cvtepi16_epi8`
This PR is part 1 of a series of PRs fixing [#154539](https://github.com/llvm/llvm-project/issues/154539)
Commit: f5ffedf81a1db4f0e149acb1b49cdc940e8c4233
https://github.com/llvm/llvm-project/commit/f5ffedf81a1db4f0e149acb1b49cdc940e8c4233
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Source.h
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[clang][bytecode] Pass `SourceInfo` objects by value (#159532)
They are only pointer-sized and copying them is cheaper than taking the
const ref.
Commit: 3defab36b73d60e616f5d6fe0e88e435c3dfc0dc
https://github.com/llvm/llvm-project/commit/3defab36b73d60e616f5d6fe0e88e435c3dfc0dc
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Sink repeated code after the switch (NFC) (#159549)
Commit: 15b665b129cf77abd7c51ffb5dc67a21847a37e9
https://github.com/llvm/llvm-project/commit/15b665b129cf77abd7c51ffb5dc67a21847a37e9
Author: sskzakaria <ssskzakaria at proton.me>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/test/CodeGen/X86/avx512vlfp16-builtins.c
Log Message:
-----------
[Headers][X86] Add constexpr support for some AVX512 int to f16 intrinsics. (#159231)
Added constexpr to the remaining intrinsics:
_mm256_cvtepu16_ph
_mm256_mask_cvtepu16_ph
_mm256_maskz_cvtepu16_ph
_mm256_cvtepi32_ph
_mm256_mask_cvtepi32_ph
_mm256_maskz_cvtepi32_ph
_mm256_cvtepu32_ph
_mm256_mask_cvtepu32_ph
_mm256_maskz_cvtepu32_ph
Last part fixing #155798
Commit: f334ac66656ed8c6aca9ff5d6f9422d3b980089a
https://github.com/llvm/llvm-project/commit/f334ac66656ed8c6aca9ff5d6f9422d3b980089a
Author: Ross Brunton <bruntonross at protonmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M offload/tools/deviceinfo/llvm-offload-device-info.cpp
Log Message:
-----------
[Offload] Include product name in llvm-offload-device-info (#159384)
Commit: 0ac13afc2de80badc86f921c02a0c2e3ccb230fa
https://github.com/llvm/llvm-project/commit/0ac13afc2de80badc86f921c02a0c2e3ccb230fa
Author: nerix <nerixdev at outlook.de>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
Log Message:
-----------
[llvm-pdbutil] Pass filename when formatting `setfile` annotation (#149705)
When dumping a PDB with an inlinesite that had a ChangeFile annotation,
the `Filename` wasn't passed to the format string. This hit an assertion
in debug mode and silently failed in release mode.
Commit: e6c27b37d7ed9a00e33ab0ec84f0160617da5cfc
https://github.com/llvm/llvm-project/commit/e6c27b37d7ed9a00e33ab0ec84f0160617da5cfc
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/spirv-amd-toolchain.c
Log Message:
-----------
[Driver][AMDGPU][HIP][SPIRV] Disable optimizations for AMDGCN SPIR-V (#154765)
SPIR-V specific optimizations can inadvertently remove information that
is important for the AMDGPU BE / break certain code patterns we rely on.
Therefore, for AMDGCN flavoured SPIR-V we disable optimizations over IR,
to ensure that we operate directly on the output of Clang CodeGen when
we finalise.
Commit: f68f3b9a7efdcf1bd56744f3c31056f5d03fb212
https://github.com/llvm/llvm-project/commit/f68f3b9a7efdcf1bd56744f3c31056f5d03fb212
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Allow zero-operand m_VPInstruction (NFC) (#159550)
Commit: 1fc9b344889aeb1f83cfee29f61d844ec927a5cd
https://github.com/llvm/llvm-project/commit/1fc9b344889aeb1f83cfee29f61d844ec927a5cd
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/unittests/Host/posix/SupportTest.cpp
Log Message:
-----------
[lldb][test] Disable a procfile test when threading is not enabled (#159559)
As is done for other procfile tests.
Commit: c379127c123e8346f764630dc659e0871099f2fb
https://github.com/llvm/llvm-project/commit/c379127c123e8346f764630dc659e0871099f2fb
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
Log Message:
-----------
[AArch64] Refactor and move common code to `AArch64PrologueEpilogue` (NFCI) (#158920)
This is the final patch in a series reworking the structure of the
prologue/epilogue code. This patch moves some methods from
`AArch64FrameLowering` to `Arch64PrologueEpilogue` as they are only used
by `.emitPrologue/Epilogue`. This includes:
- `shouldCombineCSRLocalStackBump()`
- `shouldCombineCSRLocalStackBumpInEpilogue()`
- `allocateStackSpace()`
- `convertCalleeSaveRestoreToSPPrePostIncDec()`
- `fixupCalleeSaveRestoreStackOffset()`
Common code/methods have been factored into a
`AArch64PrologueEpilogueCommon` base class used by both
`AArch64PrologueEmitter` and `AArch64EpilogueEmitter`.
Finally, some redundant fetching of target classes has been removed from
methods.
Commit: 6acfc029222e244421feb261369b9d1fd388b587
https://github.com/llvm/llvm-project/commit/6acfc029222e244421feb261369b9d1fd388b587
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
[libc++] XFAIL regex tests that are currently failing on macOS (#159260)
It seems that an OS update changed the localization on macOS. This
XFAILs the tests to make sure the CI is green again until the tests can
be updated.
Commit: 69a07420f999f6f93fb3930ecb104a9d19ba1d65
https://github.com/llvm/llvm-project/commit/69a07420f999f6f93fb3930ecb104a9d19ba1d65
Author: Vladimír Štill <git at vstill.eu>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
Log Message:
-----------
[mlir] Fix unqualified APInt in LoopLikeOpInterface tablegen (#159561)
In the recent change adding `getStaticTripCount` there is an omitted
namespace on `APInt` which means the build fails for projects using this
interface outside of `llvm` namespace (or `using llvm::APInt`).
Commit: 868aa5f19cd71e3ff6dfce021f1bd68b4c8248e8
https://github.com/llvm/llvm-project/commit/868aa5f19cd71e3ff6dfce021f1bd68b4c8248e8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__memory/compressed_pair.h
M libcxx/include/ext/hash_map
M libcxx/include/map
M libcxx/include/unordered_map
Log Message:
-----------
[libc++] Introduce _LIBCPP_COMPRESSED_ELEMENT (#134253)
We have multiple classes with an empty base optimization that contains
just a single type. This patch introduces `_LIBCPP_COMPRESSED_ELEMENT`
to refactor these classes to avoid having them essentially twice,
reducing the amount of code significantly.
Commit: 4dc0513f6196d0ead5cf3cdfa23752d88b783a9e
https://github.com/llvm/llvm-project/commit/4dc0513f6196d0ead5cf3cdfa23752d88b783a9e
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[libclang/python] Sync python kinds with Index.h enums (#143264)
Add tests to ensure that all C-enum variants are defined on Python side,
and that the Python bindings do not contain variants not defined on the C side
Commit: 8dae17be2991cd7f0d7fd9aa5aecd064520a14f6
https://github.com/llvm/llvm-project/commit/8dae17be2991cd7f0d7fd9aa5aecd064520a14f6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M libcxx/include/__memory/allocate_at_least.h
M libcxx/include/string
M libcxx/src/string.cpp
Log Message:
-----------
[libc++] Refactor memory allocation in basic_string (#128423)
This patch introduces a string-internal API to make the allocation and
deallocation the long string simpler. Before this we had a lot of code
duplication, so ensuring that things were actually correct was
non-trivial.
Commit: 2ec7959b96ecc85fef3dcb50bab54b9f76f603d4
https://github.com/llvm/llvm-project/commit/2ec7959b96ecc85fef3dcb50bab54b9f76f603d4
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.mir
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-kmcnt-scc-different-block.mir
Log Message:
-----------
[AMDGPU][SIInsertWaitcnts] Track SCC. Insert KM_CNT waits for SCC writes. (#157843)
Add new event SCC_WRITE for s_barrier_signal_isfirst and s_barrier_leave,
instructions that write to SCC, counter is KM_CNT.
Also start tracking SCC for reads and writes.
s_barrier_wait on the same barrier guarantees that the SCC write from
s_barrier_signal_isfirst has landed, no need to insert s_wait_kmcnt.
Commit: 72596b333fef81275d281081cfdb63f3f1eb940a
https://github.com/llvm/llvm-project/commit/72596b333fef81275d281081cfdb63f3f1eb940a
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAnalysisManager.h
M llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Transforms/Scalar/LoopPassManager.cpp
Log Message:
-----------
[NewPM] Remove BranchProbabilityInfo from FunctionToLoopPassAdaptor. NFCI (#159516)
No loop pass seems to use now it after LoopPredication stopped using it
in https://reviews.llvm.org/D111668
Commit: 01b4b2a5b88c4b93d635a5049fa85e569b405982
https://github.com/llvm/llvm-project/commit/01b4b2a5b88c4b93d635a5049fa85e569b405982
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
Log Message:
-----------
[AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (#143881)
This patch mirrors similar patterns for ISD::ADD. The main difference is
that ISD::ADD is commutative, so that a pattern definition for, e.g.,
(add (mul x, y), z), automatically also handles (add z, (mul x, y)).
ISD::PTRADD is not commutative, so we would need to handle these cases
explicitly. This patch only implements (ptradd z, (op x, y)) patterns,
where the nested operation (shift or multiply) is the offset of the
ptradd (i.e., the right operand), since base pointers that are the
result of a shift or multiply seem less likely.
For SWDEV-516125.
Commit: dcd0a2eecca38bbe7813ab1d99639b2d33d9f9ad
https://github.com/llvm/llvm-project/commit/dcd0a2eecca38bbe7813ab1d99639b2d33d9f9ad
Author: Ryan Mansfield <rmansfield at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/test/tools/llvm-size/totals.test
M llvm/tools/llvm-size/llvm-size.cpp
Log Message:
-----------
[llvm-size] Fix --totals option for Mach-O files (#157904)
The --totals option was not working for Mach-O files because the Darwin
segment size calculation skipped the totals accumulation.
---------
Co-authored-by: James Henderson <James.Henderson at sony.com>
Commit: 29620d9b8971c4eea7f5407ca206ba04c6f78d01
https://github.com/llvm/llvm-project/commit/29620d9b8971c4eea7f5407ca206ba04c6f78d01
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpStack.cpp
M clang/lib/AST/ByteCode/InterpStack.h
Log Message:
-----------
[clang][bytecode] Optimize InterpStack (#159400)
Replace `StackChunk::End` with `StackChunk::Size`, mark the allocating
code paths as unlikely and move `grow()` into the header, which allows
us to template this for the `Size` parameter. Since we only push our
primitive types on the stack and all the sizes are aligned to pointer
size multiples, this only results in a few instantiations.
Commit: 81aaca359b2d5a6529d9620fa4181c4d89c83c7c
https://github.com/llvm/llvm-project/commit/81aaca359b2d5a6529d9620fa4181c4d89c83c7c
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/CMakeLists.txt
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[CIR][NFC] Use TableGen to generate LLVM lowering patterns (#159390)
Most lowering patterns have exactly the same class declaration with
different names and different `matchAndRewrite` implementations, yet
their declaration occupies near 1000 lines of code in `LowerToLLVM.h`,
making this file difficult to read and boring to maintain. In this
patch, I migrate their declarations to be generated from `CIROps.td`
using `clang-tblgen`. Some extra `CIR_Op` TableGen fields are introduced
to help this:
- The `CIR_Op` class now defines a `bit` field `hasLLVMLowering` which
defaults to `true`. If its value is `true`, `clang-tblgen` would
generate an LLVM lowering pattern declaration for the operation.
- Some LLVM lowering patterns has bounded recursion. This could be
enabled by setting the `isLLVMLoweringRecursive` field in a `CIR_Op`
record to `true`.
- Some LLVM lowering patterns have defined additional class members.
They could be listed in the `extraLLVMLoweringPatternDecl` field.
Note that in the incubator we have a similar TableGen code generator
that generates LLVM lowering code for CIR builtin ops which has a
one-to-one correspondence to LLVM dialect operations. This patch does
NOT try to upstream it.
Some additional noticeable changes made by this patch:
- This patch adds the `dataLayout` member to every LLVM lowering pattern
class to make the job easier for a code generator. In the future we
might want to add more members to the lowering patterns, and we will
need to update the code generator to make such changes.
Commit: d62505f77d7aad8379b3d6f54b19bac1758ca1c2
https://github.com/llvm/llvm-project/commit/d62505f77d7aad8379b3d6f54b19bac1758ca1c2
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn build] Port 81aaca359b2d
Commit: b405e3249bb64824587e2c5d98751f3d6ce636e0
https://github.com/llvm/llvm-project/commit/b405e3249bb64824587e2c5d98751f3d6ce636e0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add MVendorID, MArchID, and MImpID for sifive-p550. (#159465)
Commit: 31e43e2fb8634f35a70699f636c49c9d2451e81c
https://github.com/llvm/llvm-project/commit/31e43e2fb8634f35a70699f636c49c9d2451e81c
Author: Raghu Maddhipatla <7686592+raghavendhra at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR] [OpenMP] Modify definition of ALLOCATOR clause to support allocator type defined in user program. (#157399)
Earlier only predefined allocator types mentioned in OpenMP spec were allowed. This patch addresses support for user defined allocator type in allocator clause increasing the scope of allocator clause.
Commit: 4f72abd8404efa3de32188429d5f079ad12264e3
https://github.com/llvm/llvm-project/commit/4f72abd8404efa3de32188429d5f079ad12264e3
Author: Walter Erquinigo <werquinigo at nvidia.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/include/lldb/Host/common/NativeProcessProtocol.h
M lldb/include/lldb/Utility/StringExtractorGDBRemote.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
M lldb/source/Utility/StringExtractorGDBRemote.cpp
M lldb/unittests/tools/lldb-server/tests/LLGSTest.cpp
Log Message:
-----------
[LLDB] Add support for the structured data plugins in lldb-server (#159457)
The LLDB client has support for structured data plugins, but lldb-server
doesn't have corresponding support for it. This patch adds the missing
functionality in LLGS for servers to register their supported plugins
and send corresponding async messages.
Commit: 09e0f1e035b348e2cd694e5f4b943a78cb6ad639
https://github.com/llvm/llvm-project/commit/09e0f1e035b348e2cd694e5f4b943a78cb6ad639
Author: Vy Nguyen <vyng at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
Log Message:
-----------
[LLDB]Fix buffer-over-flow bug introduced in 157170 (#159588)
If `pr_name` is longer than 16, it would be a non-null terminated
string. Assigning it to `std::string m_executable_name` would cause an
overflow read. Instead, just copy the name from thread_data.name.
To repro, run the `elf-core/TestLinuxCore.py` with asan
(Question: why is the new variable needed in the first place? can't the
thread_data.name be used?)
Commit: 902ddda120a55789f761165442a375ca6c916752
https://github.com/llvm/llvm-project/commit/902ddda120a55789f761165442a375ca6c916752
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/test/CodeGen/inline-asm-x86-flag-output.c
A llvm/include/llvm/Transforms/Scalar/DropUnnecessaryAssumes.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/CMakeLists.txt
A llvm/lib/Transforms/Scalar/DropUnnecessaryAssumes.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
A llvm/test/Transforms/DropUnnecessaryAssumes/basic.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/pr45682.ll
M llvm/test/Transforms/PhaseOrdering/pr45687.ll
M llvm/test/Transforms/PhaseOrdering/pr98799-inline-simplifycfg-ub.ll
Log Message:
-----------
[DropUnnecessaryAssumes] Add pass for dropping assumes (#159403)
This adds a new pass for dropping assumes that are unlikely to be useful
for further optimization.
It works by discarding any assumes whose affected values are one-use
(which implies that they are only used by the assume, i.e. ephemeral).
This pass currently runs at the start of the module optimization
pipeline, that is post-inline and post-link. Before that point, it is
more likely for previously "useless" assumes to become useful again,
e.g. because an additional user of the value is introduced after
inlining + CSE.
Commit: ad68e5d56c0258cf6c20657bebc9ef0ad5b20551
https://github.com/llvm/llvm-project/commit/ad68e5d56c0258cf6c20657bebc9ef0ad5b20551
Author: Scott Linder <scott.linder at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/LiveDebugVariables.cpp
A llvm/test/DebugInfo/X86/live-debug-vars-bundle.mir
Log Message:
-----------
[LiveDebugVariables] Use bundle-aware iterators consistently (#159471)
Most of the pass works in terms of MachineBasicBlock::iterator
(MachineInstrBundleIterator), but here one is constructed from an
arbitrary instruction which may be within a bundle, causing an
assertion.
Commit: 5399aa1f6aa9548ae5f097db2369cfea50bd7987
https://github.com/llvm/llvm-project/commit/5399aa1f6aa9548ae5f097db2369cfea50bd7987
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
Log Message:
-----------
[gn build] Port 902ddda120a5
Commit: 9b681ea50d1864c15bb4ff2d302caf4e973c8c71
https://github.com/llvm/llvm-project/commit/9b681ea50d1864c15bb4ff2d302caf4e973c8c71
Author: Elvin Wang <elvin.wang at intel.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[IntrinsicEmitter] Make AttributesMap bound inclusive (#158714)
This is a minor fix from comment
https://github.com/llvm/llvm-project/pull/157965/files#r2347317186
introduced in #157965.
Commit: adaf5ba6791e7b32dd6dca2f857d588a5304d7e7
https://github.com/llvm/llvm-project/commit/adaf5ba6791e7b32dd6dca2f857d588a5304d7e7
Author: gbMattN <matthew.nagy at sony.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_file.cpp
Log Message:
-----------
Fix possible underflow in ParseAndSetPath (#159389)
If an empty path is passed, the internal_strlen -1 below will loop round
to become uptr max. Adding this check ensures that this would be caught
Commit: b417161ad0b664dd07933e749ba1604af255ba7b
https://github.com/llvm/llvm-project/commit/b417161ad0b664dd07933e749ba1604af255ba7b
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M flang/lib/Lower/ConvertArrayConstructor.cpp
A flang/test/Lower/array-constructor-exactly-once.f90
Log Message:
-----------
[Flang] Wrap array constructors within a hlfir.exactly_once op (#159442)
When inside a WHERE construct, the array constructor should be generated
within an hlfir.exactly_once region.
Fixes #130532
Commit: 6e47bff24d83ea4db74cf548146baf6170aeb9f0
https://github.com/llvm/llvm-project/commit/6e47bff24d83ea4db74cf548146baf6170aeb9f0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
Log Message:
-----------
[AMDGPU] callee-special-input-vgprs.ll / callee-special-input-vgprs-packed.ll - regenerate test coverage (#159587)
Commit: 44a1f7e7cabebff853ccfbbb669f79673a2ec335
https://github.com/llvm/llvm-project/commit/44a1f7e7cabebff853ccfbbb669f79673a2ec335
Author: David Peixotto <peix at meta.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/test/API/functionalities/postmortem/netbsd-core/TestNetBSDCore.py
Log Message:
-----------
[lldb] Fix unsafe map mutation in ProcessElfCore::FindModuleUUID (#159444)
The `ProcessElfCore::FindModuleUUID` function can be called by multiple
threads at the same time when `target.parallel-module-load` is true. We
were using the `operator[]` to lookup the UUID which will mutate the map
when the key is not present. This is unsafe in a multi-threaded contex
so we now use a read-only `find` operation and explicitly return an
invalid UUID when the key is not present.
The `m_uuids` map can follow a create-then-query pattern. It is
populated in the `DoLoadCore` function which looks like it is only
called in a single-threaded context so we do not need extra locking as
long as we keep the other accesses read-only.
Other fixes I considered
* Use a lock to protect access - We don't need to modify the map after
creation so we can allow concurrent read-only access.
* Store the map in a const pointer container to prevent accidental
mutation in other places.
- Only accessed in one place currently so just added a comment.
* Store the UUID in the NT_FILE_Entry after building the mapping
correctly in `UpdateBuildIdForNTFileEntries`. - The map lets us avoid a
linear search in `FindModuleUUID`.
This commit also reverts the temporary workaround from #159395 which
disabled parallel module loading to avoid the test failure.
Fixes #159377
Commit: 6b99a7bbed8ddb0eebcc8b40b91b8d74a8487165
https://github.com/llvm/llvm-project/commit/6b99a7bbed8ddb0eebcc8b40b91b8d74a8487165
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/unittests/Transforms/Vectorize/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
A llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
Log Message:
-----------
[LV] Provide utility routine to find uncounted exit recipes (#152530)
Splitting out just the recipe finding code from #148626 into a utility
function (along with the extra pattern matchers). Hopefully this makes
reviewing a bit easier.
Added a gtest, since this isn't actually used anywhere yet.
Commit: f7b1b397673a234b62dc4ec68d9afa423fe4f520
https://github.com/llvm/llvm-project/commit/f7b1b397673a234b62dc4ec68d9afa423fe4f520
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 6b99a7bbed8d
Commit: 5b2af16be591172cde8203160d1e01f5815a16ac
https://github.com/llvm/llvm-project/commit/5b2af16be591172cde8203160d1e01f5815a16ac
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/fatlto-err.f90
A flang/test/Driver/lto-fatlto.f90
A flang/test/Driver/lto-lld-flags.f90
Log Message:
-----------
[flang][Driver] Enables lto-partitions and fat-lto-object. (#158125)
Commit: ab00172e2c5d799bbe9daff4347e1319b82400ed
https://github.com/llvm/llvm-project/commit/ab00172e2c5d799bbe9daff4347e1319b82400ed
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMapInfo.h
Log Message:
-----------
[ADT] Simplify isEqualImpl in DenseMapInfo.h (NFC) (#159508)
This patch replaces the recursive implementation of isEqualImpl with a
C++17 fold expression.
Commit: deb95201b2795b74f6269e5b8e126fb2ba8fb380
https://github.com/llvm/llvm-project/commit/deb95201b2795b74f6269e5b8e126fb2ba8fb380
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/ilist_node_options.h
Log Message:
-----------
[ADT] Simplify check_options with std::conjunction (NFC) (#159509)
This patch replaces the recursion with std::conjunction for
readability and brevity.
Commit: d6b7ac830ab4c1b26a1b2eecd15306eccf9cea90
https://github.com/llvm/llvm-project/commit/d6b7ac830ab4c1b26a1b2eecd15306eccf9cea90
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
[IR] Simplify HasCachedHash with is_detected (NFC) (#159510)
With is_detected, we don't need to implement a SFINAE trick on our own.
Commit: df6dce181c6211c1617ed8724897a67940bd3d9d
https://github.com/llvm/llvm-project/commit/df6dce181c6211c1617ed8724897a67940bd3d9d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/docs/GettingStartedVS.rst
Log Message:
-----------
[llvm] Proofread GettingStartedVS.rst (#159511)
Commit: 97e544f617a10011a5415b39a892de9d1aa88fd0
https://github.com/llvm/llvm-project/commit/97e544f617a10011a5415b39a892de9d1aa88fd0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/PointerSumType.h
Log Message:
-----------
[ADT] Use C++17 fold expression in PointerSumType (NFC) (#159560)
This patch simplifes the recursive Checker template with a C++17 fold
expression and "inlines" it right into the `static_assert`.
Commit: 24504c366146fd55352dcb695d81259bb5f5eb88
https://github.com/llvm/llvm-project/commit/24504c366146fd55352dcb695d81259bb5f5eb88
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/unittests/CAS/ProgramTest.cpp
Log Message:
-----------
[test][CAS] Fix unused variable warning in unittest (#159594)
Fix unused variable warning blocking AIX bot.
Commit: 8b9c70dcdbc80f01945c6560232717afd228d532
https://github.com/llvm/llvm-project/commit/8b9c70dcdbc80f01945c6560232717afd228d532
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Vector/Transforms/LowerVectorFromElements.cpp
R mlir/lib/Dialect/Vector/Transforms/LowerVectorToElements.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Conversion/ConvertToSPIRV/vector-unroll.mlir
Log Message:
-----------
[mlir] Move vector.{to_elements,from_elements} unrolling to `VectorUnroll.cpp` (#159118)
This PR moves the patterns that unroll vector.to_elements and
vector.from_elements into the file with other vector unrolling
operations. This PR also adds these unrolling patterns into the
`populateVectorUnrollPatterns`. And renames
`populateVectorToElementsLoweringPatterns`
`populateVectorFromElementsLoweringPatterns` to
`populateVectorToElementsUnrollPatterns`
`populateVectorFromElementsUnrollPatterns`.
Commit: 4fabe6ffae885bddc52500ad59bc535febfaa494
https://github.com/llvm/llvm-project/commit/4fabe6ffae885bddc52500ad59bc535febfaa494
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/test/Transforms/Coroutines/coro-noop-pacbti.ll
M llvm/test/Transforms/Coroutines/coro-noop.ll
Log Message:
-----------
Use internal linkage for __NoopCoro_ResumeDestroy (#159407)
`__NoopCoro_ResumeDestroy` currently has private linkage, which causes
[issues for
Arm64EC](https://github.com/llvm/llvm-project/issues/158341). The
Arm64EC lowering is trying to mangle and add thunks for
`__NoopCoro_ResumeDestroy`, since it sees that it's address is taken
(and, therefore, might be called from x64 code via a function pointer).
MSVC's linker requires that the function be placed in COMDAT (`LNK1361:
non COMDAT symbol '.L#__NoopCoro_ResumeDestroy' in hybrid binary`) which
trips an assert in the verifier (`comdat global value has private
linkage`) and the subsequent linking step fails since the private symbol
isn't in the symbol table.
Since there is no reason to use private linkage for
`__NoopCoro_ResumeDestroy` and other coro related functions have also
been [switched to internal linkage to improve
debugging](https://github.com/llvm/llvm-project/pull/151224), this
change switches to using internal linkage.
Fixes #158341
Commit: b8649098a7fcf598406d8d8b7d68891d1444e9c8
https://github.com/llvm/llvm-project/commit/b8649098a7fcf598406d8d8b7d68891d1444e9c8
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
A mlir/test/Interfaces/TilingInterface/tile-using-custom-op.mlir
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
Log Message:
-----------
[mlir][SCF] Allow using a custom operation to generate loops with `mlir::tileUsingSCF`. (#159506)
This change adds an option to use a custom operation to generate the
inter-tile loops during tiling. When the loop type is set to
`scf::SCFTilingOptions::LoopType::CustomOp`, the method
`mlir::tileUsingSCF` provides two callback functions
1. First one to generate the header of the loop.
2. Second one to generate the terminator of the loop.
These methods receive the information needed to generate the
loops/terminator and expect to return information needed to generate
the code for the intra-tile computation. See comments for more
details.
Presently this is adds support only for tiling. Subsequent commits
will update this to add support for fusion as well.
The PR is split into two commits.
1) The first commit is an NFC that just refactors the code (and cleans
up some naming) to make it easier to add the support for custom loop
operations.
2) The second commit adds the support for using a custom loop operation,
as well as a test to exercise this path.
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
---------
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: 0ade3461ffd78ba91e7abf69ee499d4befe009df
https://github.com/llvm/llvm-project/commit/0ade3461ffd78ba91e7abf69ee499d4befe009df
Author: Aditya Chaudhari <98672108+AdityaC4 at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
Log Message:
-----------
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX/AVX512 subvector insertion intrinsics to be used in constexpr #157709 (#158778)
AVX/AVX512 vector insert intrinsics now support constexpr evaluation in both the AST evaluator and bytecode interpreter paths.
FIXES: #157709
Commit: bbcb5f421d062d79e726abdbe5f014a2119a5567
https://github.com/llvm/llvm-project/commit/bbcb5f421d062d79e726abdbe5f014a2119a5567
Author: Alexey Karyakin <akaryaki at quicinc.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
A llvm/test/CodeGen/Hexagon/hvx-vdeal-vpack.ll
Log Message:
-----------
Shuffle patterns to vdeal + vpack (#159464)
Lowering shuffle patterns to vdeal + vpack caused an assertion because
the vdeal parameter value is negative but an unsigned one was expected.
Commit: b4d274f3d97c72364cc29f650423dca7b5b763ed
https://github.com/llvm/llvm-project/commit/b4d274f3d97c72364cc29f650423dca7b5b763ed
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
A clang/test/CIR/CodeGen/opaque.c
Log Message:
-----------
[CIR] Implement OpaqueValueExpr for Complex in C (#158423)
This change adds support for the OpaqueValueExpr for Complex in C
Issue: https://github.com/llvm/llvm-project/issues/141365
Commit: 652325866ad7c08e8b457d59cd361bf27ed7698c
https://github.com/llvm/llvm-project/commit/652325866ad7c08e8b457d59cd361bf27ed7698c
Author: Dan Bonachea <dobonachea at lbl.gov>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M flang/docs/ParallelMultiImageFortranRuntime.md
Log Message:
-----------
[flang] Update docs link to latest PRIF Specification (#159233)
The PRIF Committee is pleased to announce the publication of the
Parallel
Runtime Interface for Fortran (PRIF) Specification, Revision 0.6. The
latest
iteration of this specification represents the efforts of a
collaborative
design process involving multiple individuals across several
institutions.
The document is available here: <https://doi.org/10.25344/S4M01X>
The PRIF specification is now governed by a formal PRIF Committee.
For more details, see: <https://go.lbl.gov/prif-governance>
The Committee vote to approve the technical content in this revision
began on 2025-08-22 and concluded on 2025-09-07 with unanimous approval.
The 7-day Committee comment period for cosmetic feedback began on
2025-09-08 and concluded on 2025-09-15 with no comments.
See the Change Log in Section 1 of the document for the list of changes
relative to the prior revision.
Commit: b7f0bb9c29e9d62eb1790d4762b6a939abbd3eca
https://github.com/llvm/llvm-project/commit/b7f0bb9c29e9d62eb1790d4762b6a939abbd3eca
Author: Michael Jones <michaelrj at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M libc/src/stdio/printf_core/vasprintf_internal.h
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/asprintf_test.cpp
M libc/test/src/stdio/vasprintf_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add (v)asprintf targets and tests (#159476)
Commit: ea48d14faff82beea4181b72986c72a8929a3186
https://github.com/llvm/llvm-project/commit/ea48d14faff82beea4181b72986c72a8929a3186
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang-tools-extra/clangd/AST.cpp
Log Message:
-----------
[Clangd] [NFC] Fix dereference of null value (#159566)
This is a find from static analysis tool complaining about potential
dereference of `nullptr` for `RD`.
Commit: 6ec08132ee413512c937fb09adaa3344355c1ecb
https://github.com/llvm/llvm-project/commit/6ec08132ee413512c937fb09adaa3344355c1ecb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-identifier-naming in AMDGPUDialect.cpp (NFC)
Commit: c3383d74a735decd70088f382466b4a7d699f948
https://github.com/llvm/llvm-project/commit/c3383d74a735decd70088f382466b4a7d699f948
Author: Shaoce SUN <sunshaoce at outlook.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
A llvm/test/CodeGen/RISCV/GlobalISel/addiw-sext-inreg.ll
Log Message:
-----------
[RISCV][GlobalIsel] Remove redundant sext.w for ADDIW (#159597)
This is the minimal case generated by clang at `-O0`; I'm not sure if
writing the test this way is appropriate.
Commit: 113357f1a8feb0bfa337bb8a0b9d1d6eaa2d4f0f
https://github.com/llvm/llvm-project/commit/113357f1a8feb0bfa337bb8a0b9d1d6eaa2d4f0f
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb][nfc] Remove no-op calls to Fix*Address (#159586)
The first call, in InitializeNonZerothFrame, is inside a logging branch.
For that, it's better to log the real value instead of the fixed one.
The second call, inside RegisterContextUnwind::ReadFrameAddress, is
computing an address which is then passed to
ReadRegisterValueFromMemory, which boils down to a Process::ReadMemory,
which fixes the address if it wants to. The current variable names are
misleading, making readers believe it is the cfa value itself that is
being passed to Fix*Address; that's not the case. This commit renames
the variable to make this abundantly clear.
Commit: 8616dda07ca28cffd283c489037412842b606d8b
https://github.com/llvm/llvm-project/commit/8616dda07ca28cffd283c489037412842b606d8b
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Support type promotion for Scalar unary real & imag ops (#158473)
This change adds support for type promotion in Scalar unary real & imag
ops
Issue: https://github.com/llvm/llvm-project/issues/141365
Commit: b2ad5f5992dc3844caf4b065c57963ae7da98816
https://github.com/llvm/llvm-project/commit/b2ad5f5992dc3844caf4b065c57963ae7da98816
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/test/UnitTest/FPMatcher.h
M libc/test/src/math/smoke/acoshf16_test.cpp
M libc/test/src/math/smoke/acospif16_test.cpp
M libc/test/src/math/smoke/asinpif16_test.cpp
M libc/test/src/math/smoke/cospif16_test.cpp
M libc/test/src/math/smoke/expf16_test.cpp
M libc/test/src/math/smoke/rsqrtf16_test.cpp
M libc/test/src/math/smoke/sinpif16_test.cpp
Log Message:
-----------
[libc][math] Fix sNaN tests for AArch64 (#159483)
Fixes: #134917,
https://github.com/llvm/llvm-project/pull/100632#issuecomment-2258772681,
#159417
---------
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: 7200425ac60819c45c901728ed258f7d9f81f2f4
https://github.com/llvm/llvm-project/commit/7200425ac60819c45c901728ed258f7d9f81f2f4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/unary.cpp
Log Message:
-----------
[CIR] Support type promotion for Scalar unary plus & minus ops (#158486)
Support type promotion for Scalar unary plus & minus ops
Commit: 10516bea2f24c2a247143ec273d01e5449316303
https://github.com/llvm/llvm-project/commit/10516bea2f24c2a247143ec273d01e5449316303
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M flang/test/CMakeLists.txt
Log Message:
-----------
[flang]enable llvm-readelf and llvm-objdump (#159607)
https://github.com/llvm/llvm-project/pull/158125 resulted in CI failure
as `llvm-readelf` and `llvm-objcopy` were not listed in flang test deps.
This PR fixes it.
Commit: 5a339b074e625a7e9c92ae98b93a2bb5e1ae9524
https://github.com/llvm/llvm-project/commit/5a339b074e625a7e9c92ae98b93a2bb5e1ae9524
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang] Only set non-empty bypass to scan VFS (#159605)
Normalizing an empty modules cache path results in an incorrect
non-empty path (the working directory). This PR conditionalizes more
code to avoid this. Tested downstream by swift/llvm-project and the
`DependencyScanningCAPITests.DependencyScanningFSCacheOutOfDate` unit
test.
Commit: b59af5cc9c7f6794a51db189521cad22d97a1605
https://github.com/llvm/llvm-project/commit/b59af5cc9c7f6794a51db189521cad22d97a1605
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-simplify-boolean-expr in LinalgInterfaces.cpp (NFC)
Commit: cda542dd21eb550c58b398f1a47216ed55edf72d
https://github.com/llvm/llvm-project/commit/cda542dd21eb550c58b398f1a47216ed55edf72d
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/Frontend/ASTUnit.h
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Frontend/ASTMerge.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-extdef-mapping/ClangExtDefMapGen.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
Log Message:
-----------
[clang] Pass VFS into `ASTUnit::LoadFromASTFile()` (#159166)
This PR makes the `VFS` parameter to `ASTUnit::LoadFromASTFile()`
required and explicit, rather than silently defaulting to the real file
system. This makes it easy to correctly propagate the fully-configured
VFS and load any input files like the rest of the compiler does.
Commit: a858c9071c25826d7d60af420e4dcf9106bf7cc0
https://github.com/llvm/llvm-project/commit/a858c9071c25826d7d60af420e4dcf9106bf7cc0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-simplify-boolean-expr in InlinerInterfaceImpl.cpp (NFC)
Commit: 50b9ca4ddaea08fc72b7dcba1390c1689eed9a17
https://github.com/llvm/llvm-project/commit/50b9ca4ddaea08fc72b7dcba1390c1689eed9a17
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-wide-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_known_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-struct-return.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-wide-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-metadata.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-hoist-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/remark-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/scalar-steps-with-users-demanding-all-lanes-and-first-lane-only.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-ptradd-with-replicated-operand.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-hoist-load-across-store.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/pr34438.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scev-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_load.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/vplan-native-inner-loop-only.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/constantfolder-infer-correct-gepty.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
M llvm/test/Transforms/LoopVectorize/extract-from-end-vector-constant.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/flags.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction-multiple-uses-in-same-instruction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-requiring-scev-predicates.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invalidate-scev-at-scope-after-vectorization.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-neg-off.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/min-trip-count-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/miniters.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/non-const-n.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-index-width-smaller-than-iv-width.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-unroll.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr154045-dont-fold-extractelement-livein.ll
M llvm/test/Transforms/LoopVectorize/pr36983-multiple-lcssa.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference-simplifications.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-neg-cond.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-hint.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_with_outer_loop.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/strided-accesses-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-loads-p16.ll
M llvm/test/Transforms/LoopVectorize/trunc-reductions.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unroll_nonlatch.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LoopVectorize/widen-intrinsic.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reduction-known-first-value.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
Log Message:
-----------
[VPlan] Simplify Plan's entry in removeBranchOnConst. (#154510)
After https://github.com/llvm/llvm-project/pull/153643, there may be a
BranchOnCond with constant condition in the entry block.
Simplify those in removeBranchOnConst. This removes a number of
redundant conditional branch from entry blocks.
In some cases, it may also make the original scalar loop unreachable,
because we know it will never execute. In that case, we need to remove
the loop from LoopInfo, because all unreachable blocks may dominate each
other, making LoopInfo invalid. In those cases, we can also completely
remove the loop, for which I'll share a follow-up patch.
Depends on https://github.com/llvm/llvm-project/pull/153643.
PR: https://github.com/llvm/llvm-project/pull/154510
Commit: 36692aa7a40183c1b43358288c83f5cc08abf8f1
https://github.com/llvm/llvm-project/commit/36692aa7a40183c1b43358288c83f5cc08abf8f1
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
Log Message:
-----------
[CIR] Implement Logical OR for VectorType (#158668)
This change adds support for local OR op for VectorType
Issue #136487
Commit: d2ba0da7959d545aefd321466c738345c633c09f
https://github.com/llvm/llvm-project/commit/d2ba0da7959d545aefd321466c738345c633c09f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Tools/PDLL/ODS/Context.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in Context.cpp (NFC)
Commit: f1ba44f50a07fbc559e3c40308623dd6b6ab2c47
https://github.com/llvm/llvm-project/commit/f1ba44f50a07fbc559e3c40308623dd6b6ab2c47
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[VPlan] Strip dead code in cst live-in match (NFC) (#159589)
A live-in constant can never be of vector type.
Commit: e19fa930ca838715028c00c234874d1db4f93154
https://github.com/llvm/llvm-project/commit/e19fa930ca838715028c00c234874d1db4f93154
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Quant/IR/TypeParser.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-else-after-return in TypeParser.cpp (NFC)
Commit: 70a7ffdc290ab466c2394d22f38c0368ce5266d1
https://github.com/llvm/llvm-project/commit/70a7ffdc290ab466c2394d22f38c0368ce5266d1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
Log Message:
-----------
[LV] Add missing test cover for replicating load/store costs.
Commit: 53a18ebdcff6ac7584fe5cb27aa651746f39b3d2
https://github.com/llvm/llvm-project/commit/53a18ebdcff6ac7584fe5cb27aa651746f39b3d2
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in VectorUtils.cpp (NFC)
Commit: 3ad40d1535809f354b39e410231da4eea0a6eea4
https://github.com/llvm/llvm-project/commit/3ad40d1535809f354b39e410231da4eea0a6eea4
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Use getNegative instead of manually sub with 0 (NFC) (#158511)
Commit: 3e0c58be49c81931daf285c0973db5fb763e51e4
https://github.com/llvm/llvm-project/commit/3e0c58be49c81931daf285c0973db5fb763e51e4
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
Revert "[IR] Simplify HasCachedHash with is_detected (NFC) (#159510)" (#159622)
This reverts commit d6b7ac830ab4c1b26a1b2eecd15306eccf9cea90. Build
breakages reported on the PR hint at not working with certain versions
of the host compiler.
Commit: 8c41859a21a4d0cfda164cc58f4a5336dbcd30d1
https://github.com/llvm/llvm-project/commit/8c41859a21a4d0cfda164cc58f4a5336dbcd30d1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/non-sched-inst-has-copyable-before.ll
Log Message:
-----------
[SLP]Clear the operands deps of non-schedulable nodes, if previously all operands were copyable
If all operands of the non-schedulable nodes were previously only
copyables, need to clear the dependencies of the original schedule data
for such copyable operands and recalculate them to correctly handle
number of dependecies.
Fixes #159406
Commit: 9628061e055c9f695ff80f9a74e4f6e524b34993
https://github.com/llvm/llvm-project/commit/9628061e055c9f695ff80f9a74e4f6e524b34993
Author: Muzammil <55665739+Muzammiluddin-Syed-ECE at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMDGPU/IR/CMakeLists.txt
M mlir/test/Dialect/AMDGPU/canonicalize.mlir
Log Message:
-----------
[mlir][AMDGPU] Add canonicalization pattern to pack scales for ScaledMFMAOp (#155951)
The ScaledMFMAOp accepts scales as a vector of 4 bytes
(`vector<4xf8E8M0FNU>`) that can be stored in a single register with a
particular scale accessed using the `OpSel` attribute. Currently, we
only use one byte in this 4-byte vector, resulting in 3 wasted
registers.
This is fixed by identifying when single byte extractions are performed
and rewriting them into extractions of 4-byte vectors.
Example:
```
%unit = vector.extract %ScaleSrc[offsets] : f8E8M0FNU from vector<?x?x?xf8E8M0FNU>
%scale = vector.insert %unit, ... : f8E8M0FNU into vector<4xf8E8M0FNU>
amdgpu.scaled_mfma(%scale[0] * ...
```
to
```
%reshaped = vector.shape_cast %ScaleSrc : vector<?x?x?xf8E8M0FNU> to vector<?x4xf8E8M0FNU>
%scale = vector.extract %reshaped[?] : vector<4xf8E8M0FNU> from vector<?x4xf8E8M0FNU>
amdgpu.scaled_mfma(%scale[0-3] * ...
```
---------
Signed-off-by: Muzammiluddin Syed <muzasyed at amd.com>
Commit: de9a50a8a4151e194559b38a7bd56a9aa5bd2539
https://github.com/llvm/llvm-project/commit/de9a50a8a4151e194559b38a7bd56a9aa5bd2539
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Port #155951: amdgpu dialect deps (#159633)
Commit: e8311f8ebc18066e774832b9c594697f28b6ca60
https://github.com/llvm/llvm-project/commit/e8311f8ebc18066e774832b9c594697f28b6ca60
Author: Qiu Chaofan <qcf at ecnelises.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
A llvm/test/DebugInfo/X86/split-dwarf-inline.ll
Log Message:
-----------
[DebugInfo] Emit skeleton to avoid mismatching inlining flags (#153568)
This actually reverts 418120556398c01550d42500d56e6d328290185b.
The original commit omits unit with all symbols inlined into current
one, which leads to crash when a module using split-dwarf inlined a
function from another module with mismatched split-dwarf-inlining
option. This revert guarantees that DIEs are created in both DWO and the
skeleton sections whenever split-dwarf is active.
Commit: 3fe85ca4e024df9330f263a99a2552952a5520bc
https://github.com/llvm/llvm-project/commit/3fe85ca4e024df9330f263a99a2552952a5520bc
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
Log Message:
-----------
[clang] check constant template parameters in dependent contexts (#159463)
This patch makes sure constant template parameters are checked even in
dependent contexts.
This can for example diagnose narrowings earlier, but this is permitted
as these templates would have no valid instantiations.
Commit: a3f901f70a028bf369586b6ab561371a63922ce0
https://github.com/llvm/llvm-project/commit/a3f901f70a028bf369586b6ab561371a63922ce0
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
A llvm/test/tools/llvm-mca/RISCV/SiFive7/scalar-load-store.s
Log Message:
-----------
[RISCV] Update floating point load latency in SiFive7 scheduling model (#159462)
The latency of floating point loads in SiFive7 should be the same as
their integer counterparts.
Co-authored-by: Michael Maitland <michaeltmaitland at gmail.com>
Commit: 1cee4fa968f985489a50b88b66bd392c35f0870e
https://github.com/llvm/llvm-project/commit/1cee4fa968f985489a50b88b66bd392c35f0870e
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/different-sew-instruments.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/fractional-lmul-data.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/multiple-same-sew-instruments.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/needs-sew-but-only-lmul.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-at-start.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-middle.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-region.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-straddles-region.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vector-integer-arithmetic.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetivli-lmul-sew-instrument.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetvli-lmul-sew-instrument.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX390/fractional-lmul-data.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-integer-arithmetic.s
Log Message:
-----------
[RISCV] Update the vector integer division cycle in SiFive7 scheduling model (#159468)
Vector integer division in SiFive7 processes a single bit at a time up
to 4 elements. This patch updates to reflect this behavior.
Co-authored-by: Michael Maitland <michaeltmaitland at gmail.com>
Commit: 1c95d80ba68efd2ca9a0336529ea5fb7dc871417
https://github.com/llvm/llvm-project/commit/1c95d80ba68efd2ca9a0336529ea5fb7dc871417
Author: barsolo2000 <barsolo at meta.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/include/lldb/Core/Opcode.h
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
M lldb/unittests/Instruction/CMakeLists.txt
A lldb/unittests/Instruction/RISCV/TestRiscvInstEmulation.cpp
Log Message:
-----------
RISCV enable assembly unwinding (#158161)
**Added emulator unwinding support for RISCV files.**
Emulated Instructions:
ADD (addi sp, sp, imm)
STORE (sd ra, offset(sp))
LOAD (ld ra, offset(sp)).
We had to overwrite SetInstructions() since UnwindAssemblyInstEmulation
calls EvaluateInstruction() directly after calling SetInstruction(), but
it never calls ReadInstruction(). This means that the m_decoded member
variable in the instruction emulator is never properly initialized. By
overriding SetInstruction(), we decode the instruction bytes and set
m_decoded directly. This ensures that subsequent emulation (including
unwinding) operates on the correct instruction.
We also had to change the the OpCode GetOpcodeBytes function since
recent changes made it so GetOpcodeBytes will return None for type
eType16_32Tuples (an alternative and longer way, would've been to type
check during the overwritten SetInstruction() and call a DataExtractor
with .GetU16(&offset) to set the inst_data.
Added a test - TestSimpleRiscvFunction (took inspiration from:
[link](https://github.com/llvm/llvm-project/blob/main/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp))
[----------] 1 test from TestRiscvInstEmulation
[ RUN ] TestRiscvInstEmulation.TestSimpleRiscvFunction
[ OK ] TestRiscvInstEmulation.TestSimpleRiscvFunction (1 ms)
[----------] 1 test from TestRiscvInstEmulation (1 ms total)
[----------] Global test environment tear-down
[==========] 63 tests from 5 test suites ran. (11 ms total)
[ PASSED ] 63 tests.
---------
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: e3c7b7f806559a361d2cf8374d65230c75bb5829
https://github.com/llvm/llvm-project/commit/e3c7b7f806559a361d2cf8374d65230c75bb5829
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/dpp64_combine.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.gfx1251.ll
A llvm/test/MC/AMDGPU/gfx1251_asm_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop1_err.s
A llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/AMDGPU/gfx9-asm-err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop1_dpp16.txt
Log Message:
-----------
[AMDGPU] gfx1251 VOP1 dpp support (#159637)
Commit: a6662866e88a887ab125c4d533659d27c4134108
https://github.com/llvm/llvm-project/commit/a6662866e88a887ab125c4d533659d27c4134108
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
Log Message:
-----------
[lldb][NFC] Simplify logic in ABIMacOSX_arm64::FixDataAddress (#159612)
I've intentionally split this into two commits to make it easier that
this is an NFC patch; don't think we need to preserve them separately
though upon merging.
Commit: 5a402aca3f1582f329f07be2a501c5139e14b5fb
https://github.com/llvm/llvm-project/commit/5a402aca3f1582f329f07be2a501c5139e14b5fb
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add Bazel rules for rand/srand functions. (#159617)
These functions are unlikely to be used in the overlay mode (since they are stateful), but it's worth verifying the correctness of underlying RNG (which may be reused in other places) in Bazel build regardless.
Commit: 714f032802fd1192b19188daba45de97b825c95d
https://github.com/llvm/llvm-project/commit/714f032802fd1192b19188daba45de97b825c95d
Author: Sterling-Augustine <saugustine at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/SFrame.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSFrame.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCSFrame.cpp
A llvm/test/MC/ELF/cfi-sframe-encoding.s
A llvm/test/MC/ELF/cfi-sframe-fre-cases.s
M llvm/test/MC/ELF/cfi-sframe.s
Log Message:
-----------
[SFrames] reland Emit and relax FREs #158154 (#159643)
[Previously reverted due to msan failures on two uninitialized padding
bits.]
This PR emits and relaxes the FREs generated in the previous PR.
After this change llvm emits usable sframe sections that can be linked
with the gnu linker. There are a few remaining cfi directives to handle
before they are generally usable, however.
The output isn't identical with gnu-gas in every case (this code
produces fewer identical FREs in a row than gas), but I'm reasonably
sure that they are correct regardless. There are even more size
optimizations that can be done later.
Also, while working on the tests, I found a few bugs in older portions
and cleaned those up.
This is a fairly big commit, but I'm not sure how to make it smaller.
Commit: 54c55219ea3fbb44046d385acefcff0b73d3f8f4
https://github.com/llvm/llvm-project/commit/54c55219ea3fbb44046d385acefcff0b73d3f8f4
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
Log Message:
-----------
[mlir][spirv] Use `verifySymbolUses` for `spirv.FunctionCall`. (#159399)
`spirv.FunctionCall`'s verifier was being too aggressive. It included
verification of non-local properties by looking at the callee's
definition.
This caused problems in cases where callee had verification errors and
could lead to null pointer dereferencing.
According to [MLIR's developers guide
](https://mlir.llvm.org/getting_started/DeveloperGuide/#ir-verifier)
> TLDR: only verify local aspects of an operation,
> in particular don’t follow def-use chains
> (don’t look at the producer of any operand or the user
> of any results).
The fix includes adding the `SymbolUserOpInterface` to `FunctionCall`
and moving most of the verification logic to `verifySymbolUses`.
Fixes #159295
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 9f5b02311ae5c47146da642be7978839f087f49c
https://github.com/llvm/llvm-project/commit/9f5b02311ae5c47146da642be7978839f087f49c
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
A clang/test/SemaHLSL/prohibit_resource_edits.hlsl
Log Message:
-----------
[HLSL] Make sure global resources and resource arrays cannot be assigned to (#157772)
Global resources are read-only. The compiler needs to report an error when somebody attempts to assign a value to a global resource, a global resource array element or the whole array.
Test update in `static-local-ctor.hlsl` includes the use of the llvm-cxxfilt tool which takes care of demangling of function names for a more readable test baseline.
Closes #154390
Commit: 082d1d911c1cd79849f74ac203fbcbfbb6737cef
https://github.com/llvm/llvm-project/commit/082d1d911c1cd79849f74ac203fbcbfbb6737cef
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/tools/lldb-dap/package-lock.json
Log Message:
-----------
[lldb-dap] Bump form-data from 4.0.1 to 4.0.4
Bumps form-data from 4.0.1 to 4.0.4 to resolve a critical security
vulnerability in form-data.
Commit: cfaf23927c6b083646a431eb8eea2d286694c0a0
https://github.com/llvm/llvm-project/commit/cfaf23927c6b083646a431eb8eea2d286694c0a0
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
R mlir/test/Interfaces/TilingInterface/tile-using-custom-op.mlir
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
Log Message:
-----------
Revert "[mlir][SCF] Allow using a custom operation to generate loops with `mlir::tileUsingSCF`." (#159598)
Reverts llvm/llvm-project#159506
It was committed by accident. Reverting it for reviews.
Commit: 152a2162a1a9c93358bb69ab839931d95b9537ad
https://github.com/llvm/llvm-project/commit/152a2162a1a9c93358bb69ab839931d95b9537ad
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/tools/driver/cc1as_main.cpp
M clang/tools/driver/driver.cpp
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/tools/obj2yaml/obj2yaml.cpp
M llvm/tools/yaml2obj/yaml2obj.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
M llvm/utils/split-file/split-file.cpp
Log Message:
-----------
[llvm][clang] Pass VFS to `llvm::cl` command line handling (#159174)
This PR passes the VFS down to `llvm::cl` functions so that they don't
assume the real file system.
Commit: 91b05845bcb2befd1ed2407531d3a1adb3c6f828
https://github.com/llvm/llvm-project/commit/91b05845bcb2befd1ed2407531d3a1adb3c6f828
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
A libcxx/utils/benchmark-historical
M libcxx/utils/test-at-commit
Log Message:
-----------
[libc++] Add a tool to produce historical libc++ benchmark results
This is extremely useful for analysis purposes like finding regressions.
The ability to run such historical analysis locally is extremely useful
for doing quick investigations that may involve non-mainstream libc++
configurations.
Commit: 0c028bbf33d96045871f254fa1810f9767292506
https://github.com/llvm/llvm-project/commit/0c028bbf33d96045871f254fa1810f9767292506
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
Log Message:
-----------
[LV] Always add uniform pointers to uniforms list.
Always add pointers proved to be uniform via legal/SCEV to worklist.
This extends the existing logic to handle a few more pointers known to
be uniform.
Commit: cdd78989b83f22b33b4d8f0f12f4d8939c28004d
https://github.com/llvm/llvm-project/commit/cdd78989b83f22b33b4d8f0f12f4d8939c28004d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Pass SDValue by value. NFC
Commit: 04c4e9da133a5f206ded35c7eddd9e2ab34926c7
https://github.com/llvm/llvm-project/commit/04c4e9da133a5f206ded35c7eddd9e2ab34926c7
Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/Transforms/XeGPUVectorLinearize.cpp
A mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
Log Message:
-----------
[mlir][XeGPU][Transform] Add vectorlinearize transform pass. (#158084)
Use upstream patterns to create a vectorlinearize pass needed for
lowering to XeVM.
Linearizes n-D vectors to 1-D vectors.
This is needed because, `vector-to-llvm` does not linearize all the
vectors.
Commit: 324511b8dcc797a49e4b250ae8563d5c53fe734e
https://github.com/llvm/llvm-project/commit/324511b8dcc797a49e4b250ae8563d5c53fe734e
Author: DanilaZhebryakov <d.zhebryakov at yandex.ru>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/PowerPC/ppc-sfvarargs.c
Log Message:
-----------
[PowerPC] fix float ABI selection on ppcle (#154773)
soft float ABI selection was not taking effect on little-endian powerPC
with embedded vectors (e.g. e500v2) leading to errors.
(embedded vectors use "extended" GPRs to store floating-point values,
and this caused issues with variadic arguments assuming dedicated
floating-point registers with hard-float ABI)
Commit: 8cfbace7b2c60682ee37706943a8f72d8c450305
https://github.com/llvm/llvm-project/commit/8cfbace7b2c60682ee37706943a8f72d8c450305
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
A llvm/test/MC/AMDGPU/gfx1251_asm_vop2_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop2_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop2_dpp16.txt
Log Message:
-----------
[AMDGPU] gfx1251 VOP2 dpp support (#159641)
Commit: 1de6f6517b76fa7f7867032d4883a522b731a3b4
https://github.com/llvm/llvm-project/commit/1de6f6517b76fa7f7867032d4883a522b731a3b4
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
Log Message:
-----------
[lldb] Fix build when LLDB_ENABLE_PYTHON is OFF (#159665)
Even if Python scripting is disabled, we still need a Python interpreter
to build, for example to generate SBLanguages.h or fix up the framework
headers.
Commit: 9d6062c490548a5e6fea103e010ab3c9bc73a86d
https://github.com/llvm/llvm-project/commit/9d6062c490548a5e6fea103e010ab3c9bc73a86d
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/test/ClangScanDeps/optimize-canonicalize-macros.m
Log Message:
-----------
[clang][Dependency Scanning] Canonicalize Defines of a Compiler Invocation As Early As Possible (#159620)
Before this patch, we only perform `-D` canonicalization on the deep
copy of the `CompilerInvocation` instance, since the canonicalization
should have no impact on scanning.
However, in the presence of CAS, the content of the `builtin` macros are
included in the context hash. This patch makes sure that we canonicalize
the scanning `CompilerInvocation`'s `-D`s.
Part of work for rdar://136303612.
---------
Co-authored-by: Jan Svoboda <jan at svoboda.ai>
Commit: 6ac0abf8c47247102fe00f6c59b85b2b1d6dca81
https://github.com/llvm/llvm-project/commit/6ac0abf8c47247102fe00f6c59b85b2b1d6dca81
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop1_err.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop2_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop2_err.s
M llvm/test/MC/AMDGPU/vop3-gfx9.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_from_vop1_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_from_vop2_dpp16.txt
Log Message:
-----------
[AMDGPU] gfx1251 VOP3 dpp support (#159654)
Commit: bda1cab20941ed842429f19ed0e22861017d935b
https://github.com/llvm/llvm-project/commit/bda1cab20941ed842429f19ed0e22861017d935b
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/tracing.h
Log Message:
-----------
[scudo] Add missing tracing.h include to primary32 (#159668)
Commit: 725d9e80770e4a8e5888e38a380ff0f7033aa9e0
https://github.com/llvm/llvm-project/commit/725d9e80770e4a8e5888e38a380ff0f7033aa9e0
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Treat arguments of std::ranges::all_of as [[clang::noescape]] (#158419)
The checker already had std::ranges hard-coded to treat its arguments as
[[clang::oescape]] but the fact std::ranges::all_of is implemented as a
struct instead of a function confused the checker and resuled in a
superflous warning being emitted for std::ranges::all_of.
This PR adds the support for recognizing DeclRefExpr which appears as a
callee in VisitCallExpr and generalizes the check in
shouldTreatAllArgAsNoEscape to walk up the decl contexts to find the
target namespaces such as std::ranges:: or a namespace and a function
like WTF::switchOn.
Commit: 3f52e97df77a0c84ffe61f3148ef9b1a18a67f69
https://github.com/llvm/llvm-project/commit/3f52e97df77a0c84ffe61f3148ef9b1a18a67f69
Author: Bitshift <ipudney at umich.edu>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerTracePC.cpp
A compiler-rt/test/fuzzer/SimulateEmptyModuleTest.cpp
A compiler-rt/test/fuzzer/empty-module.test
Log Message:
-----------
Fix libFuzzer array alignment with empty modules (#159661)
The following assertion was being triggered:
```
assert.h assertion failed at llvm-project/compiler-rt/lib/fuzzer/FuzzerTracePC.cpp:237 in void fuzzer::TracePC::UpdateObservedPCs(): M.Size() == (size_t)(ModulePCTable[i].Stop - ModulePCTable[i].Start)
```
# The bug
When built with `-fsanitize=fuzzer`, each “module” (.so file, or the
binary itself) will be instrumented, and when loaded into the process
will make a call to these two functions:
- `__sanitizer_cov_8bit_counters_init`
- `__sanitizer_cov_pcs_init`
Each of these is called with start and end pointers defining an array.
In libFuzzer, these functions are implemented with
`HandleInline8bitCountersInit` and `HandlePCsInit`. Each of them pushes
back the provided pointers into a separate array, `Modules` and
`ModulePCTable` respectively. These arrays are meant to be kept in-sync;
index i into Modules should refer to the same `.so` as index i into
ModulePCTable. The assertion was triggering because these lists got
out-of-sync.
The problem is that the 8bit handler contains this line:
```
if (Start == Stop) return;
```
but the PC handler contains no such corresponding line. This meant that
if a module was ever instrumented but “empty” (its 8bit counter and PC
arrays were both of length 0), then its PC array would still be added
but its 8bit counter array would not.
# Why this issue was never seen before
The circumstances to trigger this issue are unusual:
- You need a compilation unit that doesn't contain any code (though it
may contain global variable declarations and similar). That doesn't
happen very often.
- That compilation unit must be dynamically linked, not statically
linked. If statically linked, it’ll be merged into a single “module”
with the main binary, and the arrays will be merged as well; you won’t
end up with length-0 arrays.
- To notice the issue, assertions must be enabled. If disabled,
libFuzzer will be buggy (it may have worse coverage), but it won't
crash, and "worse coverage" is extremely unlikely to be noticed.
# This change
This change solves the issue by adding the same `if (Start == Stop)
return;` check to `HandlePCsInit`. This prevents the arrays from getting
out-of-sync. This change also adds a test that identifies the previous
issue when compiled with assertions enabled, but now passes with the
fix.
Commit: 339450fa80bd59ad2d0410a0eb58b8b9981aac10
https://github.com/llvm/llvm-project/commit/339450fa80bd59ad2d0410a0eb58b8b9981aac10
Author: Jhalak Patel <jhalakpatel at outlook.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Fix crash in vector.from_elements folding with poison values (#158528)
The vector.from_elements constant folding was crashing when poison
values were present in the element list. The convertIntegerAttr function
was not properly handling poison attributes, leading to assertion
failures in dyn_cast operations.
This patch refactors convertIntegerAttr to take IntegerAttr directly,
moving poison detection to the caller using explicit
isa<ub::PoisonAttrInterface> checks. The function signature change
provides compile-time type safety while the early poison validation in
foldFromElementsToConstant prevents unsafe casting operations. The
folding now gracefully aborts when poison attributes are encountered,
preventing the crash while preserving correct folding for legitimate
mixed-type constants (int/float).
Fixes assertion: "dyn_cast on a non-existent value" when processing
ub.poison values in vector.from_elements operations.
Commit: dda7ce6624e357076fefe55a756ba7181db92ba2
https://github.com/llvm/llvm-project/commit/dda7ce6624e357076fefe55a756ba7181db92ba2
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/xqcicli.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
Log Message:
-----------
[RISCV] Move Xqci Select-likes to use riscv_selectcc (#153147)
The original patterns for the Xqci select-like instructions used
`select`, and marked that ISD node as legal. This is not the usual way
that `select` is dealt with in the RISC-V backend.
Usually on RISC-V, we expand `select` to `riscv_select_cc` which holds
references to the operands of the comparison and the possible values
depending on the comparison. In retrospect, this is a much better fit
for our instructions, as most of them correspond to specific condition
codes, rather than more generic `select` with a truthy/falsey value.
This PR moves the Xqci select-like patterns to use `riscv_select_cc`
nodes. This applies to the Xqcicm, Xqcics and Xqcicli instruction
patterns.
In order to match the existing codegen, minor additions had to be made
to `translateSetCCForBranch` to ensure that comparisons against specific
immediate values are left in a form that can be matched more closely by
the instructions. This prevents having to insert additional `li`
instructions and use the register forms.
There are a few slight regressions:
- There are sometimes more `mv` instructions than entirely necessary. I
believe these would not be seen with larger examples where the register
allocator has more leeway.
- In some tests where just one of the three extensions is enabled,
codegen falls back to using a branch over a move. With all three
extensions enabled (the configuration we most care about), these are not
seen.
- The generated patterns are very similar to each other - they have
similar complexity (7 or 8) and there are still overlaps. Sometimes the
choice between two instructions can be affected by the order of the
patterns in the tablegen file.
One other change is that Xqcicm instructions are prioritised over Xqcics
instructions where they have identical patterns. This is done because
one of the the Xqcicm instructions is compressible (`qc.mveqi`), while
none of the Xqcics instructions are.
Commit: 0c1ab02e46d38e8b67843eb3c88b1dc054d561f8
https://github.com/llvm/llvm-project/commit/0c1ab02e46d38e8b67843eb3c88b1dc054d561f8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/rv64zbs.ll
Log Message:
-----------
[RISCV] Use bseti 31 for (or X, -2147483648) when upper 32 bits aren't used. (#159678)
If the original type was i32, type legalization will sign extend
the constant. This prevents it from having a single bit set or clear
so other patterns can't match. If the upper bits aren't used, we
can ignore the sign extension.
Similar for bclri and binvi.
Commit: 33e8e5a84643f3e2aeb5d85e58000b2a1ba9d3df
https://github.com/llvm/llvm-project/commit/33e8e5a84643f3e2aeb5d85e58000b2a1ba9d3df
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
Log Message:
-----------
AMDGPU: Add more mfma loop test cases (#159492)
Test cases where the exit uses must be VGPRs,
and don't happen to be a store that could use AGPRs.
Commit: 116ca9522e89f1e4e02676b5bbe505e80c4d4933
https://github.com/llvm/llvm-project/commit/116ca9522e89f1e4e02676b5bbe505e80c4d4933
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
M llvm/test/CodeGen/Thumb2/mve-vst4.ll
Log Message:
-----------
Greedy: Take copy hints involving subregisters (#159570)
Previously this would only accept full copy hints. This relaxes
this to accept some subregister copies. Specifically, this now
accepts:
- Copies to/from physical registers if there is a compatible
super register
- Subreg-to-subreg copies
This has the potential to repeatedly add the same hint to the
hint vector, but not sure if that's a real problem.
Commit: 01fca01d3bcbabdebee54bba40157e96152e3e6e
https://github.com/llvm/llvm-project/commit/01fca01d3bcbabdebee54bba40157e96152e3e6e
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ComplexToSPIRV/ComplexToSPIRV.cpp
M mlir/lib/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRV.cpp
M mlir/lib/Conversion/FuncToSPIRV/FuncToSPIRV.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Conversion/IndexToSPIRV/IndexToSPIRV.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/UBToSPIRV/UBToSPIRV.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/lib/Dialect/SPIRV/Transforms/ConvertToReplicatedConstantCompositePass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/DecorateCompositeTypeLayoutPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVWebGPUTransforms.cpp
Log Message:
-----------
[mlir][spirv] Simplify inheriting constructor declarations. NFC. (#159681)
Use the `Base` type alias from https://github.com/llvm/llvm-project/pull/158433.
Commit: 54677d66c4af83351df63e513d7734e2c25160df
https://github.com/llvm/llvm-project/commit/54677d66c4af83351df63e513d7734e2c25160df
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/ConvertComplexPow.cpp
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Lower/HLFIR/binary-ops.f90
M flang/test/Lower/Intrinsics/pow_complex16.f90
M flang/test/Lower/Intrinsics/pow_complex16i.f90
M flang/test/Lower/Intrinsics/pow_complex16k.f90
M flang/test/Lower/power-operator.f90
A flang/test/Transforms/convert-complex-pow.fir
M flang/tools/bbc/bbc.cpp
M mlir/lib/Conversion/ComplexToROCDLLibraryCalls/ComplexToROCDLLibraryCalls.cpp
Log Message:
-----------
[Flang] Add new ConvertComplexPow pass for Flang (#158642)
This PR introduces a new `ConvertComplexPow` pass for Flang that handles
complex power operations. The change forces lowering to complex.pow
operations when `--math-runtime=precise` is not used, then uses the
`ConvertComplexPow` pass to convert these operations back to library
calls.
- Adds a new `ConvertComplexPow` pass that converts complex.pow ops to
appropriate runtime library calls
- Updates complex power lowering to use `complex.pow` operations by
default instead of direct library calls
#158722 Adds a new `complex.powi` op enabling algebraic optimisations.
Commit: daed12d00d4c24c8607e9c3d8ddbc7624471f049
https://github.com/llvm/llvm-project/commit/daed12d00d4c24c8607e9c3d8ddbc7624471f049
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Remove unnecessary AGPR legalize logic (#159491)
The manual legalizeOperands code only need to consider cases that
require full instruction context to know if the operand is legal.
This does not need to handle basic operand register class constraints.
Commit: f7629f5945f6720bac9cdfebcf9c05144afb9028
https://github.com/llvm/llvm-project/commit/f7629f5945f6720bac9cdfebcf9c05144afb9028
Author: Wenju He <wenju.he at intel.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
A llvm/test/Transforms/InferAddressSpaces/AMDGPU/phi-poison.ll
Log Message:
-----------
[InferAddressSpaces] Extend undef pointer operand support to phi inst (#159548)
Previously undef pointer operand is only supported for select inst,
where undef in generic AS behaves like `take the other side`.
This PR extends the support to other instructions, e.g. phi inst. Defer
joining and inferring constant pointer operand until all other operand
AS states considered.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: d41bc6834b8dea5228eb1763da5904e99e97d42f
https://github.com/llvm/llvm-project/commit/d41bc6834b8dea5228eb1763da5904e99e97d42f
Author: Elvin Wang <elvin.wang at intel.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[IntrinsicEmitter] Make AttributesMap PackedID type-adaptive (#158383)
Commit: 1ad5d63e5ec3dd2ac0217fd453db18a5a2fc2bf7
https://github.com/llvm/llvm-project/commit/1ad5d63e5ec3dd2ac0217fd453db18a5a2fc2bf7
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
Log Message:
-----------
[LoongArch] Add generation support for `[x]vnori.b` (#158772)
Commit: fdb1f486387d46bd046d7827fcd19fa44118bffe
https://github.com/llvm/llvm-project/commit/fdb1f486387d46bd046d7827fcd19fa44118bffe
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Transforms/ConvertComplexPow.cpp
M flang/test/Lower/HLFIR/binary-ops.f90
M flang/test/Lower/Intrinsics/pow_complex16i.f90
M flang/test/Lower/Intrinsics/pow_complex16k.f90
M flang/test/Lower/amdgcn-complex.f90
M flang/test/Lower/power-operator.f90
M flang/test/Transforms/convert-complex-pow.fir
M mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
M mlir/lib/Conversion/ComplexToROCDLLibraryCalls/ComplexToROCDLLibraryCalls.cpp
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
M mlir/test/Conversion/ComplexToROCDLLibraryCalls/complex-to-rocdl-library-calls.mlir
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
A mlir/test/Dialect/Complex/powi-simplify.mlir
Log Message:
-----------
[MLIR] Add new complex.powi op (#158722)
This PR adds a new complex.powi operation to MLIR's complex dialect for
computing complex numbers raised to integer powers.
Key changes include:
- Addition of the new `PowiOp` operation definition in the Complex
dialect
- Integration with algebraic simplification passes for optimization
- Support for conversion to ROCDL library calls
- Updates to Flang frontend to generate the new operation
This depends on #158642.
Commit: b26b40b22320ab8b684bfe2575fdbda1c6f2e4ee
https://github.com/llvm/llvm-project/commit/b26b40b22320ab8b684bfe2575fdbda1c6f2e4ee
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Port #158084: xegpu vectorlinearize pass (#159690)
Commit: e5114a2016557fc0dd6014b838e91ca025e23b29
https://github.com/llvm/llvm-project/commit/e5114a2016557fc0dd6014b838e91ca025e23b29
Author: Twice <twice at apache.org>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/IRDL/IR/IRDLAttributes.td
M mlir/include/mlir/Dialect/IRDL/IR/IRDLOps.td
M mlir/include/mlir/Dialect/IRDL/IR/IRDLTypes.td
A mlir/lib/Bindings/Python/DialectIRDL.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/IRDLOps.td
A mlir/python/mlir/dialects/irdl.py
A mlir/test/python/dialects/irdl.py
Log Message:
-----------
[MLIR][Python] Add python bindings for IRDL dialect (#158488)
In this PR we add basic python bindings for IRDL dialect, so that python
users can create and load IRDL dialects in python. This allows users, to
some extent, to define dialects in Python without having to modify
MLIR’s CMake/TableGen/C++ code and rebuild, making prototyping more
convenient.
A basic example is shown below (and also in the added test case):
```python
# create a module with IRDL dialects
module = Module.create()
with InsertionPoint(module.body):
dialect = irdl.DialectOp("irdl_test")
with InsertionPoint(dialect.body):
op = irdl.OperationOp("test_op")
with InsertionPoint(op.body):
f32 = irdl.is_(TypeAttr.get(F32Type.get()))
irdl.operands_([f32], ["input"], [irdl.Variadicity.single])
# load the module
irdl.load_dialects(module)
# use the op defined in IRDL
m = Module.parse("""
module {
%a = arith.constant 1.0 : f32
"irdl_test.test_op"(%a) : (f32) -> ()
}
""")
```
Commit: 67f43c6ee2f0a5e8d252cce589ea7d157676e990
https://github.com/llvm/llvm-project/commit/67f43c6ee2f0a5e8d252cce589ea7d157676e990
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/test/python/dialects/python_test.py
M mlir/test/python/python_test_ops.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[MLIR][Python] add type hints for accessors (#158455)
This PR adds type hints for accessors in the generated builders.
Commit: da71e3c76db9a63eb66ac0415860f84f28cebb78
https://github.com/llvm/llvm-project/commit/da71e3c76db9a63eb66ac0415860f84f28cebb78
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Port #158722: complex.powi op (#159691)
Commit: a2efa7ab207d78bf753b4a9651070fee283d8217
https://github.com/llvm/llvm-project/commit/a2efa7ab207d78bf753b4a9651070fee283d8217
Author: Michael Park <mcypark at gmail.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/lib/AST/Decl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/Modules/merge-anon-in-template-2.cpp
A clang/test/Modules/merge-anon-in-template-3.cpp
Log Message:
-----------
[C++20][Modules] Fix merging of anonymous members of class templates. (#155948)
Commit: dd92609fcc6f2af8adcbc3986d9b0676de36b2a9
https://github.com/llvm/llvm-project/commit/dd92609fcc6f2af8adcbc3986d9b0676de36b2a9
Author: Qihan Cai <caiqihan021 at hotmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/invalid-instruction-spellcheck.s
M llvm/test/MC/RISCV/rv32p-valid.s
Log Message:
-----------
[RISC-V] Add P-ext MC Support for Remaining Pair Operations (#159247)
This patch implements pages 21-24 from jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf
Documentation:
jhauser.us/RISCV/ext-P/RVP-baseInstrs-014.pdf
jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: f8b7f64ad2d94bbda169023f933f18b31c9b4492
https://github.com/llvm/llvm-project/commit/f8b7f64ad2d94bbda169023f933f18b31c9b4492
Author: Hank Chang <hank.chang at sifive.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
A llvm/include/llvm/Analysis/InterestingMemoryOperand.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Transforms/Instrumentation/AddressSanitizerCommon.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/RISCV/asan-rvv-intrinsics.ll
Log Message:
-----------
[TTI][ASan][RISCV] Move InterestingMemoryOperand to Analysis and embed in MemIntrinsicInfo (#157863)
Previously asan considers target intrinsics as black boxes, so asan
could not instrument accurate check. This patch make
SmallVector<InterestingMemoryOperand> a member of MemIntrinsicInfo so
that TTI can make targets describe their intrinsic informations to asan.
Note,
1. This patch move InterestingMemoryOperand from Transforms to Analysis.
2. Extend MemIntrinsicInfo by adding a
SmallVector<InterestingMemoryOperand> member.
3. This patch does not support RVV indexed/segment load/store.
Commit: e7dcf7dc2e63e4ae5e6e03f417eed24516b71bfe
https://github.com/llvm/llvm-project/commit/e7dcf7dc2e63e4ae5e6e03f417eed24516b71bfe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
Log Message:
-----------
TableGen: Remove dead def of implicit node (#159688)
Commit: e79f4511a22fadff502ad3a42812deca11feb407
https://github.com/llvm/llvm-project/commit/e79f4511a22fadff502ad3a42812deca11feb407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
A llvm/test/TableGen/dag-pattern-crash-on-set.td
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
TableGen: Replace assertion with error for unexpected pattern inputs (#159687)
Commit: 48f804d609b38f22307f2e1c1345d1e4054cb2c6
https://github.com/llvm/llvm-project/commit/48f804d609b38f22307f2e1c1345d1e4054cb2c6
Author: Florian Mayer <fmayer at google.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
R llvm/include/llvm/Analysis/InterestingMemoryOperand.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Transforms/Instrumentation/AddressSanitizerCommon.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
R llvm/test/Instrumentation/AddressSanitizer/RISCV/asan-rvv-intrinsics.ll
Log Message:
-----------
Revert "[TTI][ASan][RISCV] Move InterestingMemoryOperand to Analysis and embed in MemIntrinsicInfo" (#159700)
Reverts llvm/llvm-project#157863
Commit: 5a873d3c92946fd45ca432c0a19ab06584f6fad0
https://github.com/llvm/llvm-project/commit/5a873d3c92946fd45ca432c0a19ab06584f6fad0
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M libcxx/test/benchmarks/spec.gen.py
M libcxx/utils/benchmark-historical
Log Message:
-----------
[libc++] Improve error resilience when running historical benchmarks
In benchmark-historical, don't skip gathering the results when the
lit command has failed. Indeed, it is expected to fail as part of
normal operation since it should be pretty frequent for at least one
test to fail when running historical benchmarks. Instead, gather
whatever results we have.
Also, output the build log in spec.gen.py upon failure so we can see
the reason for the failure.
Commit: 7a77127c0f8c44c0eebf8559595fa757608fe5ec
https://github.com/llvm/llvm-project/commit/7a77127c0f8c44c0eebf8559595fa757608fe5ec
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV] Ignore debug instructions in RISCVVLOptimizer (#159616)
Don't put them onto the worklist, since they'll crash when we try to
check their opcode.
Fixes #159422
Commit: 446a490f93de6c4b458fa5bdd959216b0be774f8
https://github.com/llvm/llvm-project/commit/446a490f93de6c4b458fa5bdd959216b0be774f8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Use Subtarget member variable instead of getting it from MachineFunction. NFC (#159664)
Commit: 9d933c794af32362dbbbefe53825054b533d7b2c
https://github.com/llvm/llvm-project/commit/9d933c794af32362dbbbefe53825054b533d7b2c
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-09-18 (Thu, 18 Sep 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
M clang/test/Analysis/Checkers/WebKit/forward-decl-checker.mm
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members.mm
Log Message:
-----------
[WebKit checkers] Add the support for OSObjectPtr (#159484)
Add the support for OSObjectPtr, which behaves like RetainPtr.
Commit: 6d2366c5cc06cb7475538c8cd3d6f08e6d04dc27
https://github.com/llvm/llvm-project/commit/6d2366c5cc06cb7475538c8cd3d6f08e6d04dc27
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
Log Message:
-----------
[Clang][CIR] fix enumeration value 'OMPGroupPrivate' not handled in switch (#159694)
Commit: 680c657a4f91de215394daa08c7d1ee29a839833
https://github.com/llvm/llvm-project/commit/680c657a4f91de215394daa08c7d1ee29a839833
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
Log Message:
-----------
[LoongArch] Simplily fix extractelement on LA32 (#159564)
Commit: dd669c32ec67c1a995134339657ace2a2047c605
https://github.com/llvm/llvm-project/commit/dd669c32ec67c1a995134339657ace2a2047c605
Author: Wenju He <wenju.he at intel.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/issue110433.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/phi-poison.ll
Log Message:
-----------
[InferAddressSpaces] Mark ConstantAggregateZero as safe to cast to a ConstantExpr addrspacecast (#159695)
This PR extends isSafeToCastConstAddrSpace to treat
ConstantAggregateZero like ConstantPointerNull.
Tests shows an extra addrspacecast instruction is removed and icmp
pointer vector operand's address space is now inferred.
This change is motivated by inspecting the test in commit f7629f5945f6.
Commit: 332eb5f693d2e28026aaa4f580cef607898ed756
https://github.com/llvm/llvm-project/commit/332eb5f693d2e28026aaa4f580cef607898ed756
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vadd.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vfadd.ll
Log Message:
-----------
[RISCV][GISel] Support select vx, vf form rvv intrinsics (#157398)
For vx form, we legalize it with widen scalar. And for vf form, we select the right register bank.
Commit: ebe7587256597af0a19707e65e801f9d53307e09
https://github.com/llvm/llvm-project/commit/ebe7587256597af0a19707e65e801f9d53307e09
Author: David Green <david.green at arm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-i16-subreg-extract.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
A llvm/test/CodeGen/AArch64/scalarize-vector-load.ll
Log Message:
-----------
[AArch64] Add some tests for bitcast vector loads and scalarizing loaded vectors. NFC
Commit: 3cc1b7c2e0dbd9b7c04110d7d8c799acb476c204
https://github.com/llvm/llvm-project/commit/3cc1b7c2e0dbd9b7c04110d7d8c799acb476c204
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep-inbounds.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/gep-chain.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Check if non-extracted indices may be negative when preserving inbounds (#159515)
If we know that the initial GEP was inbounds, and we change it to a sequence of
GEPs from the same base pointer where every offset is non-negative, then the
new GEPs are inbounds. So far, the implementation only checked if the extracted
offsets are non-negative. In cases where non-extracted offsets can be negative,
this would cause the inbounds flag to be wrongly preserved.
Fixes an issue in #130617 found by nikic.
Commit: ae1e909de9d7ecb57907849e4df03247b019c5fc
https://github.com/llvm/llvm-project/commit/ae1e909de9d7ecb57907849e4df03247b019c5fc
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-misc-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-sve-instructions.s
M llvm/tools/llvm-mca/Views/InstructionInfoView.cpp
Log Message:
-----------
[llvm-mca] Round UP when formatting Reciprocal Throughput (#159544)
Explicitly round up the reciprocal calculation,
so that .125 is displayed as 0.13 consistently across all hosts.
Fix buildbot failure
https://lab.llvm.org/buildbot/#/builders/193/builds/10666
since https://github.com/llvm/llvm-project/pull/154495
Commit: b3e423df3785ed06e1cb3b70c5ac11b8abffec2f
https://github.com/llvm/llvm-project/commit/b3e423df3785ed06e1cb3b70c5ac11b8abffec2f
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/www/c_status.html
M clang/www/cxx_status.html
Log Message:
-----------
[clang][docs] mark v21 as released (#158629)
Update for the status pages now that v21.1 is out.
Also specify WG14 N3006 "Underspecified object definitions" as available since Clang 19.
Commit: adfa6a4c149d83139627e96df1a04fb54478ff4f
https://github.com/llvm/llvm-project/commit/adfa6a4c149d83139627e96df1a04fb54478ff4f
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/ptradd-sdag-mubuf.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
Log Message:
-----------
[AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (#145329)
Pre-committing tests to show improvements in a follow-up PR.
Commit: e747223c03e16d02cd0dc6f8eedb5c825a7366c1
https://github.com/llvm/llvm-project/commit/e747223c03e16d02cd0dc6f8eedb5c825a7366c1
Author: Jim Lin <jim at andestech.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZvfofp8min.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rvv/zvfbfmin.s
A llvm/test/MC/RISCV/rvv/zvfofp8min.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Implement MC support for Zvfofp8min extension (#157014)
This patch adds MC support for Zvfofp8min
https://github.com/aswaterman/riscv-misc/blob/main/isa/zvfofp8min.adoc.
Commit: a2dcc88f39a86aff728929577135cd161ac91a7a
https://github.com/llvm/llvm-project/commit/a2dcc88f39a86aff728929577135cd161ac91a7a
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-mubuf.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
Log Message:
-----------
[AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (#145330)
There are more places in SIISelLowering.cpp and AMDGPUISelDAGToDAG.cpp
that check for ISD::ADD in a pointer context, but as far as I can tell
those are only relevant for 32-bit pointer arithmetic (like frame
indices/scratch addresses and LDS), for which we don't enable PTRADD
generation yet.
For SWDEV-516125.
Commit: 143551a42c694b0f9c0976ecfa7cb20c28274cb6
https://github.com/llvm/llvm-project/commit/143551a42c694b0f9c0976ecfa7cb20c28274cb6
Author: flovent <flbven at protonmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-scoped-lock.rst
Log Message:
-----------
[clang-tidy][NFC] Fix error in example code for `modernize-use-scoped-lock`'s doc (#159722)
Commit: f96a759ff58afc038e181affee6f8620b71d444b
https://github.com/llvm/llvm-project/commit/f96a759ff58afc038e181affee6f8620b71d444b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[Clang][NFC] Remove duplicated specialization of `llvm::DenseMapInfo<llvm::FoldingSetNodeID>` (#159718)
In preparation of #141776
Commit: 67354837d0ecab43e3e2f99fde234660d1686ce9
https://github.com/llvm/llvm-project/commit/67354837d0ecab43e3e2f99fde234660d1686ce9
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[mlir:python] Port Python bindings of IRDL to bazel build. (#159721)
This PR sets up build rules for the Python bindings of the IRDL dialect
introduced by #158488. The absence of them does not break the bazel
build but some downstream users rely on them.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 771c94c8db14b990a38c95977f708e9480020244
https://github.com/llvm/llvm-project/commit/771c94c8db14b990a38c95977f708e9480020244
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
Log Message:
-----------
[SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (#146074)
This PR adds a TargetLowering hook, canTransformPtrArithOutOfBounds,
that targets can use to allow transformations to introduce out-of-bounds
pointer arithmetic. It also moves two such transformations from the
AMDGPU-specific DAG combines to the generic DAGCombiner.
This is motivated by target features like AArch64's checked pointer
arithmetic, CPA, which does not tolerate the introduction of
out-of-bounds pointer arithmetic.
Commit: c4617bcae1308cf256bbd3738065eba2a4be8eb2
https://github.com/llvm/llvm-project/commit/c4617bcae1308cf256bbd3738065eba2a4be8eb2
Author: Dmitry Chigarev <dmitry.chigarev at intel.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
A mlir/test/Conversion/VectorToXeGPU/gather-to-xegpu.mlir
A mlir/test/Conversion/VectorToXeGPU/scatter-to-xegpu.mlir
Log Message:
-----------
[MLIR][XeGPU][VectorToXeGPU] Add lowering from vector.gather/scatter to xegpu.load/store (#158024)
Lowering for `vector.gather`/`vector.scatter` into `xegpu.load`/`xegpu.store`.
High level steps to lower vector.gather/scatter:
```
%0 = vector.gather %source[%off1, %off2, %off3][%indices], %mask,
%pass_thru : memref<8x16x32xf32>, vector<8xindex>, vector<8xi1>, vector<8xf32> into vector<8xf32>
```
1. Compute strides and a memref offset for the `%source` memref using
`computeMemrefMeta` func from the transfer_read/write lowering
2. Compute a linear offset like `%lin_off = %base_offset + %off1 *
strides#0 + %off2 * strides#1 + %off3 * strides#2`
3. Combine the linear offset with `%indices`: `%off = (broadcast
%lin_off : index to vector<8xindex>) + %indices * strides#2`
4. Convert memref to an i64: `%flat_memref =
memref.extract_aligned_pointer_as_index %source + arith.index_cast`
5. Perform load/store: `%vec = xegpu.load %flat_memref[%off], %mask`
6. Apply selection to propagate values from the pass_thru vector: `%res
= arith.select %mask, %vec, %pass_thru`
Commit: b59d410202d1afb63591e8f78d0fe8b24fb236eb
https://github.com/llvm/llvm-project/commit/b59d410202d1afb63591e8f78d0fe8b24fb236eb
Author: UmeshKalappa <103930015+ukalappa-mips at users.noreply.github.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
A clang/include/clang/Basic/BuiltinsRISCVXMIPS.td
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/riscv_mips.h
A clang/test/CodeGen/RISCV/builtins-riscv-mips.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
A llvm/include/llvm/IR/IntrinsicsRISCVXMIPS.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
A llvm/test/CodeGen/RISCV/xmips-exectl.ll
Log Message:
-----------
RISC-V: builtins support for MIPS RV64 P8700 execution control .
the following changes are made
a)Typo Fix (with previous PRhttps://github.com/llvm/llvm-project/pull/155747)
b)builtins support for MIPS P8700 execution control instructions .
c)Testcase
Commit: 91dba2201ec63907105ffddbea1de82f649d35d8
https://github.com/llvm/llvm-project/commit/91dba2201ec63907105ffddbea1de82f649d35d8
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
Log Message:
-----------
Fix NDEBUG Wundef warning; NFC (#159539)
The `NDEBUG` macro is tested for defined-ness everywhere else. The
instance here triggers a warning when compiling with `-Wundef`.
Commit: d5607694e1270a4fc4e3c6f8c9de5d1c4f9c34ff
https://github.com/llvm/llvm-project/commit/d5607694e1270a4fc4e3c6f8c9de5d1c4f9c34ff
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
Log Message:
-----------
[AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (#146075)
If we can't fold a PTRADD's offset into its users, lowering them to
disjoint ORs is preferable: Often, a 32-bit OR instruction suffices
where we'd otherwise use a pair of 32-bit additions with carry.
This needs to be a DAGCombine (and not a selection rule) because its
main purpose is to enable subsequent DAGCombines for bitwise operations.
We don't want to just turn PTRADDs into disjoint ORs whenever that's
sound because this transform loses the information that the operation
implements pointer arithmetic, which AMDGPU for instance needs when
folding constant offsets.
For SWDEV-516125.
Commit: 9062f5e2c1d9b7cfcbb85acbe6cfef5673c6a876
https://github.com/llvm/llvm-project/commit/9062f5e2c1d9b7cfcbb85acbe6cfef5673c6a876
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port b59d410202d1
Commit: 58a5121ab1740e2e71d6c960c0a32a32e951ce9c
https://github.com/llvm/llvm-project/commit/58a5121ab1740e2e71d6c960c0a32a32e951ce9c
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Port b59d410202d1afb63591e8f78d0fe8b24fb236eb
Commit: f9c996856e84f64dd3c306916f238b713a4d777d
https://github.com/llvm/llvm-project/commit/f9c996856e84f64dd3c306916f238b713a4d777d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
Log Message:
-----------
cmake: Avoid using if(TARGET x AND TARGET y) (#159707)
This appears to not work, and the documentation only has
examples with a single target checked at a time.
Commit: 4d197c89b53febbd4722f9923e511b7215825860
https://github.com/llvm/llvm-project/commit/4d197c89b53febbd4722f9923e511b7215825860
Author: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSort.h
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/test/tools/llvm-debuginfo-analyzer/COFF/01-coff-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/01-dwarf-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test
M llvm/tools/llvm-debuginfo-analyzer/Options.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer] Add `--output-sort=(none|id)` option (#145761)
- The output for `--output-sort=id` matches `--output-sort=offset` for
the available readers. Tests were updated accordingly.
- For `--output-sort=none`, and per `LVReader::sortScopes()`,
`LVScope::sort()` is called on the root scope.
`LVScope::sort()` has no effect if `getSortFunction() == nullptr`, and
thus the elements are currently traversed in the order in which they
were initially added. This should change, however, after
`LVScope::Children` is removed.
Commit: 03e16c8e42a03574062df1c5f2c9c5f2122042d5
https://github.com/llvm/llvm-project/commit/03e16c8e42a03574062df1c5f2c9c5f2122042d5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
Log Message:
-----------
[clang][bytecode] Move generic lambda handling to Compiler (#159733)
So the static invoker's Function still points to the static invoker
instead of the call operator of the lambda record. This is important for
a later commit.
Commit: 4e1c996674cc340f290b0a528e2038e76494d8d4
https://github.com/llvm/llvm-project/commit/4e1c996674cc340f290b0a528e2038e76494d8d4
Author: Raul Tambre <raul at tambre.ee>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/Other/codegen-plugin-loading.ll
M llvm/unittests/CodeGen/CGPluginTest/CMakeLists.txt
M llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
M llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
Log Message:
-----------
[llvm][test][CGPluginTest] Keep plugin in shared library directory
Scoping to the root build directory instead of using the path directly is awkward and the only such
occurrence in the test suite. It's also prone to breakage for downstreams that change the library
path.
But it's not even necessary: during build we have the appropriate RPATHs set so we can just depend
on the dynamic loader to find it. This extra logic is probably just copy-paste from PluginsTest.cpp.
Additionally:
* Removed TargetParser as a dependency because it doesn't seem to actually be used.
* Moved `add_dependencies()` to `DEPENDS` to better match the rest of LLVM.
Commit: a05e8d506bb8f986f810d9872715919ddb773bc7
https://github.com/llvm/llvm-project/commit/a05e8d506bb8f986f810d9872715919ddb773bc7
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/select-smin-smax.ll
Log Message:
-----------
[X86] Allow all legal integers to optimize smin with 0 (#151893)
It makes no sense why smin has to be limited to 32 and 64 bits.
hasAndNot only exists for 32 and 64 bits, so this does not affect smax.
Commit: b6231f5197820026adc452707e920847364f2e6f
https://github.com/llvm/llvm-project/commit/b6231f5197820026adc452707e920847364f2e6f
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
Log Message:
-----------
[DA] Add overflow check in ExactSIV (#157086)
This patch adds an overflow check to the `exactSIVtest` function to fix
the issue demonstrated in the test case added in #157085. This patch
only fixes one of the routines. To fully resolve the test case, the
other functions need to be addressed as well.
Commit: 6b54c92be02079eff4f4edfbe667e60c3a1949df
https://github.com/llvm/llvm-project/commit/6b54c92be02079eff4f4edfbe667e60c3a1949df
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCInstrInfo.h
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
A llvm/test/TableGen/RegClassByHwMode.td
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/AsmWriterEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.h
M llvm/utils/TableGen/Common/InfoByHwMode.cpp
M llvm/utils/TableGen/Common/InfoByHwMode.h
M llvm/utils/TableGen/Common/InstructionEncoding.cpp
M llvm/utils/TableGen/Common/InstructionEncoding.h
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
CodeGen: Add RegisterClass by HwMode (#158269)
This is a generalization of the LookupPtrRegClass mechanism.
AMDGPU has several use cases for swapping the register class of
instruction operands based on the subtarget, but none of them
really fit into the box of being pointer-like.
The current system requires manual management of an arbitrary integer
ID. For the AMDGPU use case, this would end up being around 40 new
entries to manage.
This just introduces the base infrastructure. I have ports of all
the target specific usage of PointerLikeRegClass ready.
Commit: 61166a9345e58ded6e1b7adb0e3a473ae7496cac
https://github.com/llvm/llvm-project/commit/61166a9345e58ded6e1b7adb0e3a473ae7496cac
Author: Raul Tambre <raul at tambre.ee>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/unittests/CodeGen/CGPluginTest/CMakeLists.txt
Log Message:
-----------
[llvm][test][CGPluginTest] Add back missing TargetParser dependency (#159760)
Din't seem to be used, but is.
[737/738] Linking CXX executable unittests/CodeGen/CGPluginTest/CGPluginTest
FAILED: unittests/CodeGen/CGPluginTest/CGPluginTest
: && /usr/bin/c++ -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-uninitialized -Wno-nonnull -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-array-bounds -Wno-stringop-overread -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -Wno-misleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -Wl,--export-dynamic -Wl,--gc-sections unittests/CodeGen/CGPluginTest/CMakeFiles/CGPluginTest.dir/PluginTest.cpp.o unittests/CodeGen/CGPluginTest/CMakeFiles/CGPluginTest.dir/Plugin/CodeGenTestPass.cpp.o -o unittests/CodeGen/CGPluginTest/CGPluginTest -Wl,-rpath,/home/botworker/builds/openmp-offload-amdgpu-runtime-2/llvm.build/lib lib/libLLVMX86CodeGen.so.22.0git lib/libLLVMX86AsmParser.so.22.0git lib/libLLVMX86De
sc.so.22.0git lib/libLLVMX86Disassembler.so.22.0git lib/libLLVMX86Info.so.22.0git lib/libLLVMAMDGPUCodeGen.so.22.0git lib/libLLVMAMDGPUAsmParser.so.22.0git lib/libLLVMAMDGPUDisassembler.so.22.0git lib/libllvm_gtest_main.so.22.0git lib/libLLVMTestingSupport.so.22.0git lib/libLLVMCodeGen.so.22.0git lib/libLLVMTarget.so.22.0git lib/libLLVMAMDGPUDesc.so.22.0git lib/libLLVMAMDGPUInfo.so.22.0git lib/libLLVMAMDGPUUtils.so.22.0git lib/libLLVMCore.so.22.0git lib/libLLVMMC.so.22.0git lib/libllvm_gtest.so.22.0git lib/libLLVMSupport.so.22.0git -Wl,-rpath-link,/home/botworker/builds/openmp-offload-amdgpu-runtime-2/llvm.build/lib && :
/usr/bin/ld: unittests/CodeGen/CGPluginTest/CMakeFiles/CGPluginTest.dir/PluginTest.cpp.o: undefined reference to symbol '_ZN4llvm6TripleC1ERKNS_5TwineES3_S3_'
Fixes: 4e1c996674cc340f290b0a528e2038e76494d8d4
Commit: a254f6524aa511eb0ead54f825262e75d467b82e
https://github.com/llvm/llvm-project/commit/a254f6524aa511eb0ead54f825262e75d467b82e
Author: Claudio Saavedra <csaavedra at igalia.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
[WebKit checkers] fix a typo in a message in one of the checkers (#159593)
Commit: fba55c89c32fd45cc279a903b5a749c5951f4593
https://github.com/llvm/llvm-project/commit/fba55c89c32fd45cc279a903b5a749c5951f4593
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-vpmadd52.ll
Log Message:
-----------
[X86] Fold X * 1 + Z --> X + Z for VPMADD52L (#158516)
This patch implements the fold `lo(X * 1) + Z --> lo(X) + Z --> X iff X
== lo(X)`.
Commit: 3c862b4ba39aa53a2dfcffb2fe7862e02f7bd746
https://github.com/llvm/llvm-project/commit/3c862b4ba39aa53a2dfcffb2fe7862e02f7bd746
Author: Matthias Springer <me at m-sp.org>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir] Expose optional `PatternBenefit` to function / SCF populate functions (NFC) (#159752)
Pattern benefit allows users to give priority to a pattern.
Commit: 7b8fd8f31bc6d65a59b6e09ebbeb77fdfb95360f
https://github.com/llvm/llvm-project/commit/7b8fd8f31bc6d65a59b6e09ebbeb77fdfb95360f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[LLVM][SCEV] Look through common vscale multiplicand when simplifying compares. (#141798)
My usecase is simplifying the control flow generated by LoopVectorize
when vectorising loops whose tripcount is a function of the runtime
vector length. This can be problematic because:
* CSE is a pre-LoopVectorize transform and so it's common for an IR
function to include several calls to llvm.vscale(). (NOTE: Code
generation will typically remove the duplicates)
* Pre-LoopVectorize instcombines will rewrite some multiplies as shifts.
This leads to a mismatch between VL based maths of the scalar loop and
that created for the vector loop, which prevents some obvious
simplifications.
SCEV does not suffer these issues because it effectively does CSE during
construction and shifts are represented as multiplies.
Commit: 1597fad405d75352124289dcce828d1636550026
https://github.com/llvm/llvm-project/commit/1597fad405d75352124289dcce828d1636550026
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/avx512cdintrin.h
M clang/lib/Headers/avx512vlcdintrin.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/constant-builtins-vector.cpp
M libclc/clc/lib/generic/integer/clc_clz.inc
M libclc/clc/lib/generic/integer/clc_ctz.inc
Log Message:
-----------
[Clang] Rename elementwise builtins to `clzg` and `ctzg` (#157128)
Summary:
The added bit counting builtins for vectors used `cttz` and `ctlz`,
which is consistent with the LLVM naming convention. However, these are
clang builtins and implement exactly the `__builtin_ctzg` and
`__builtin_clzg` behavior. It is confusing to people familiar with other
other builtins that these are the only bit counting intrinsics named
differently. This includes the additional operation for the undefined
zero case, which was added as a `clzg` extension.
Commit: 13605abe077d3202119000a9b5da24ebd73b3713
https://github.com/llvm/llvm-project/commit/13605abe077d3202119000a9b5da24ebd73b3713
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/CMakeLists.txt
A llvm/test/FileCheck/CMakeLists.txt
A llvm/test/TableGen/CMakeLists.txt
Log Message:
-----------
[LLVM] Specialize test suites for `TableGen` and `FileCheck` to use smaller set of dependencies (#155929)
Define lit testsuite for FileCheck and TableGen with smaller set of
dependencies. This uses the new `SKIP` argument to `add_lit_testsuites`
that was added in https://github.com/llvm/llvm-project/pull/157176/.
Commit: eed99d50086c730c6422b566d9f82d4babdfa5bd
https://github.com/llvm/llvm-project/commit/eed99d50086c730c6422b566d9f82d4babdfa5bd
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
Log Message:
-----------
[AMDGPU] Fix the magic number RegisterClass for SReg_32 in test (#159761)
Commit: b7e4edca3d56ec87f719c202f5397b245595f7cc
https://github.com/llvm/llvm-project/commit/b7e4edca3d56ec87f719c202f5397b245595f7cc
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/test/CodeGen/PowerPC/vec_constants.ll
Log Message:
-----------
[LLVM][CodeGen] Update PPCFastISel::SelectRet for ConstantInt based vectors. (#159331)
The current implementation assumes ConstantInt return values are scalar,
which is not true when use-constant-int-for-fixed-length-splat is
enabled.
Commit: 68c9ddb93022f46f49d8b1a6063065d3a15aba0f
https://github.com/llvm/llvm-project/commit/68c9ddb93022f46f49d8b1a6063065d3a15aba0f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Typecheck called function pointers more thorougly (#159757)
Fix two older FIXME items from the `functions.cpp` test.
Commit: 9113592312357d777a4e65833c2887f737bc9e6a
https://github.com/llvm/llvm-project/commit/9113592312357d777a4e65833c2887f737bc9e6a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
Log Message:
-----------
SPARC: Use RegClassByHwMode instead of PointerLikeRegClass (#158271)
Commit: cc680fc50c3b42bef920a5411cf902e6a6a9c4d4
https://github.com/llvm/llvm-project/commit/cc680fc50c3b42bef920a5411cf902e6a6a9c4d4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86IndirectThunks.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86ReturnThunks.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
Log Message:
-----------
X86: Avoid using isArch64Bit for 64-bit checks (#157412)
Just directly check x86_64. isArch64Bit just adds extra
steps around this.
Commit: 188c7ed171705b7f50cd18f81de4eec4e316384a
https://github.com/llvm/llvm-project/commit/188c7ed171705b7f50cd18f81de4eec4e316384a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
Log Message:
-----------
[X86] Add test coverage for #159670 (#159767)
Commit: ba49062914f01f68cf3c4e067139a24b29a0e45b
https://github.com/llvm/llvm-project/commit/ba49062914f01f68cf3c4e067139a24b29a0e45b
Author: Devajith <devajith.valaparambil.sreeramaswamy at cern.ch>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/lib/AST/StmtPrinter.cpp
M clang/test/SemaCXX/ast-print.cpp
Log Message:
-----------
[Clang][AST] Fix printing for `atomic_test_and_set` and `atomic_clear` (#159712)
https://github.com/llvm/llvm-project/pull/121943 rewrote
`__atomic_test_and_set` and `__atomic_clear` to be lowered through
AtomicExpr
StmtPrinter::VisitAtomicExpr still treated them like other atomic
builtins with a Val1 operand. This led to incorrect pretty-printing when
dumping the AST.
Skip Val1 for these two builtins like atomic loads.
Commit: 562146499c391f72d3bed6d91a80d432af14db49
https://github.com/llvm/llvm-project/commit/562146499c391f72d3bed6d91a80d432af14db49
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ExecutionDomainFix.h
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/ExecutionDomainFix.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/rda-stack.mir
M llvm/test/CodeGen/SystemZ/rda-stack-copy.mir
M llvm/test/CodeGen/X86/opt-pipeline.ll
A llvm/test/CodeGen/X86/print-reaching-defs.mir
Log Message:
-----------
[CodeGen][NewPM] Port `ReachingDefAnalysis` to new pass manager. (#159572)
In this commit:
(1) Added new pass manager support for `ReachingDefAnalysis`.
(2) Added printer pass.
(3) Make old pass manager use `ReachingDefInfoWrapperPass`
Commit: 2654b511fea7f5e6d56bdf6f1923c7b9f1899542
https://github.com/llvm/llvm-project/commit/2654b511fea7f5e6d56bdf6f1923c7b9f1899542
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86InstrInfo.td
M llvm/lib/Target/X86/X86InstrOperands.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
Log Message:
-----------
X86: Switch to RegClassByHwMode (#158274)
Replace the target uses of PointerLikeRegClass with RegClassByHwMode
Commit: 584af2f89e95f9fc7cb940a0c5380d608639e7d1
https://github.com/llvm/llvm-project/commit/584af2f89e95f9fc7cb940a0c5380d608639e7d1
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang-tools-extra/CMakeLists.txt
M clang-tools-extra/clang-tidy/CMakeLists.txt
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidy.h
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.h
M clang-tools-extra/clang-tidy/ClangTidyForceLinker.h
M clang-tools-extra/clang-tidy/ClangTidyModule.h
M clang-tools-extra/clang-tidy/ClangTidyOptions.cpp
M clang-tools-extra/clang-tidy/ClangTidyOptions.h
M clang-tools-extra/clang-tidy/clang-tidy-config.h.cmake
A clang-tools-extra/clang-tidy/custom/CMakeLists.txt
A clang-tools-extra/clang-tidy/custom/CustomTidyModule.cpp
A clang-tools-extra/clang-tidy/custom/QueryCheck.cpp
A clang-tools-extra/clang-tidy/custom/QueryCheck.h
M clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
A clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
M clang-tools-extra/docs/clang-tidy/index.rst
M clang-tools-extra/test/clang-tidy/check_clang_tidy.py
A clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/clang-tidy.yml
A clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/incorrect-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/checkers/custom/query-incorrect-query.cpp
A clang-tools-extra/test/clang-tidy/checkers/custom/query-partially-active-check.cpp
A clang-tools-extra/test/clang-tidy/checkers/custom/query.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/append-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/empty-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/override-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/root-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/vfsoverlay.yaml
A clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check-not-enable.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
M clang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
Log Message:
-----------
reapply "[clang-tidy] support query based custom check" (#159547)
reapply #131804 and #159289
Fixed cmake link issue.
---------
Co-authored-by: DeNiCoN <denicon1234 at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: 084872a26d1a58129536e654ba9e29bc39cea1bb
https://github.com/llvm/llvm-project/commit/084872a26d1a58129536e654ba9e29bc39cea1bb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MicroMipsInstrInfo.td
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.h
M llvm/lib/Target/Mips/MipsRegisterInfo.td
Log Message:
-----------
Mips: Switch to RegClassByHwMode (#158273)
Commit: be6c4d933d0a4578fb6792807825b2f38c009b8d
https://github.com/llvm/llvm-project/commit/be6c4d933d0a4578fb6792807825b2f38c009b8d
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/milicode64.ll
Log Message:
-----------
[PowerPC] using milicode call for strlen instead of lib call (#153600)
AIX has "millicode" routines, which are functions loaded at boot time
into fixed addresses in kernel memory. This allows them to be customized
for the processor. The __strlen routine is a millicode implementation;
we use millicode for the strlen function instead of a library call to
improve performance.
Commit: e2467cbfa8fdc440debac1cfb930ee476f3d5e42
https://github.com/llvm/llvm-project/commit/e2467cbfa8fdc440debac1cfb930ee476f3d5e42
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Remove no longer used OmpLoopDirective, NFC (#159576)
Commit: cd0f191792d48acd941067abfc59572b0bcc1f6e
https://github.com/llvm/llvm-project/commit/cd0f191792d48acd941067abfc59572b0bcc1f6e
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][rocdl] Add gfx1250+ cvt scale intrinsics (#159649)
Commit: c7054d92442e5e1dae26c1e652761c147b537ec4
https://github.com/llvm/llvm-project/commit/c7054d92442e5e1dae26c1e652761c147b537ec4
Author: Nico Weber <thakis at chromium.org>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/custom/BUILD.gn
Log Message:
-----------
[gn] port 584af2f89e95 (clang-tidy custom)
Commit: ac8f3cdcf31d12f6873e463b63ef09436219d065
https://github.com/llvm/llvm-project/commit/ac8f3cdcf31d12f6873e463b63ef09436219d065
Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
Log Message:
-----------
[AMDGPU] Precommit test for memory intrinics CGP handling
Change-Id: Id229f849b1d8552bbe59d6e18114042ef1614fad
Commit: 1eb575dcaea4cb677e6a977dd41b3843057bca83
https://github.com/llvm/llvm-project/commit/1eb575dcaea4cb677e6a977dd41b3843057bca83
Author: RolandF77 <froese at ca.ibm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/splat-extend.ll
Log Message:
-----------
[PowerPC] Fix vector extend result types in BUILD_VECTOR lowering (#159398)
The result type of the vector extend intrinsics generated by the
BUILD_VECTOR lowering code should match how they are actually defined.
Currently the result type is defaulting to the operand type there. This
can conflict with calls to the same intrinsic from other paths.
Commit: bce48c89a04df5d5918d787e8b481cdfb0707307
https://github.com/llvm/llvm-project/commit/bce48c89a04df5d5918d787e8b481cdfb0707307
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Don't call FixDataAddress when reading fp in ReadGPRValue (#159606)
Based on testing on processors that use pointer metadata, and with all
the work done to delay calls to FixDataAddress, this is no longer
necessary.
Note that, with debugserver in particular, this is an NFC change: the
code path here is for frame zero, and debugserver will strip metadata
when reading fp from frame zero anyway.
Commit: acc156dc6fd84c661b23db57aa9adc1d4ae668e4
https://github.com/llvm/llvm-project/commit/acc156dc6fd84c661b23db57aa9adc1d4ae668e4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
Log Message:
-----------
PPC: Replace PointerLikeRegClass with RegClassByHwMode (#158777)
Commit: 00333ed37779af189a66e971217390165024b1b2
https://github.com/llvm/llvm-project/commit/00333ed37779af189a66e971217390165024b1b2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M libcxx/utils/compare-benchmarks
M libcxx/utils/requirements.txt
A libcxx/utils/visualize-historical
Log Message:
-----------
[libc++] Add a utility to visualize historical benchmark data locally
This should eventually be done using `lnt` instead, but for the time
being this makes it easy to visualize historical data without having
an instance of `lnt` running.
Commit: 815b1641a65c33dd331efb816fdafeafd0a7e794
https://github.com/llvm/llvm-project/commit/815b1641a65c33dd331efb816fdafeafd0a7e794
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M libcxx/test/benchmarks/atomic_wait_1_waiter_1_notifier.bench.cpp
M libcxx/test/benchmarks/atomic_wait_N_waiter_N_notifier.bench.cpp
M libcxx/test/benchmarks/atomic_wait_multi_waiter_1_notifier.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
Log Message:
-----------
[libc++] Disable atomic_wait benchmarks outside of dry-run mode (#158631)
The atomic_wait benchmarks are great, but they tend to overload the
system they're running on. For that reason, we can't run them on our CI
infrastructure on a regular basis.
Instead of removing them, make them unsupported outside of dry-running,
which allows keeping the benchmarks around and ensuring they don't rot,
but doesn't run them along with the other benchmarks. If we need to
investigate atomic_wait performance, it's trivial to mark the benchmark
as supported and run it for local investigations.
This is an alternative to https://github.com/llvm/llvm-project/pull/158289.
Commit: 50ef746a12a77e2e9f0c61f3ad92dfe0d8019194
https://github.com/llvm/llvm-project/commit/50ef746a12a77e2e9f0c61f3ad92dfe0d8019194
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
Fix perf-helper.py (#159745)
When build with assertions, there will be an output like the following
that needs to be filtered out, similar to the other ones.
`'Build config: +assertions'`
Commit: b21dd44dbc00a60b787dcfa90ca0e8b677c5211f
https://github.com/llvm/llvm-project/commit/b21dd44dbc00a60b787dcfa90ca0e8b677c5211f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
R lldb/test/API/macosx/arm-pointer-metadata-stripping/Makefile
R lldb/test/API/macosx/arm-pointer-metadata-stripping/TestArmPointerMetadataStripping.py
R lldb/test/API/macosx/arm-pointer-metadata-stripping/extra_symbols.json
R lldb/test/API/macosx/arm-pointer-metadata-stripping/main.c
A lldb/test/API/pointer-nonaddressable-bits/Makefile
A lldb/test/API/pointer-nonaddressable-bits/TestArmPointerMetadataStripping.py
A lldb/test/API/pointer-nonaddressable-bits/extra_symbols.json
A lldb/test/API/pointer-nonaddressable-bits/main.c
Log Message:
-----------
[lldb][test] Enable non-address bit WritePointerToMemory test on Linux (#157435)
First added in #153585 for Darwin only. All Linux AArch64 systems also
have Top Byte Ignore enabled in userspace so the test "just works"
there.
FreeBSD has very recently gained Top Byte Ignore support:
https://github.com/freebsd/freebsd-src/commit/4c6c27d3fb4ad15931aae2eaf8e624aed99a3fd9
However it's so recent, I don't want to assume it'll be available on any
random FreeBSD system out there.
There isn't really a good place to put this test, so I put it in the top
level of API, next to the other non-address bit test that didn't have a
good home either.
Commit: 80fa3bddd0dfd5c1ed4301033e5647a3c7f226ee
https://github.com/llvm/llvm-project/commit/80fa3bddd0dfd5c1ed4301033e5647a3c7f226ee
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/file.h
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/unit.h
M flang/docs/Intrinsics.md
M flang/include/flang/Runtime/extensions.h
Log Message:
-----------
[flang] Implement FNUM() (#159433)
The GNU Fortran library function FNUM(u) returns the UNIX file
descriptor that corresponds to an open Fortran unit number, if any;
otherwise -1.
This implementation is a library extension only, not an intrinsic.
Commit: 8109c3a27f949d46337047fc9732e84926504ec2
https://github.com/llvm/llvm-project/commit/8109c3a27f949d46337047fc9732e84926504ec2
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/FileCheck/CMakeLists.txt
M llvm/test/TableGen/CMakeLists.txt
Log Message:
-----------
[LLVM] Exclude specialized lit test suites from check-all (#159781)
Commit: 19bc0d6543aedc1d9151e1b2435fc4b998a72d4e
https://github.com/llvm/llvm-project/commit/19bc0d6543aedc1d9151e1b2435fc4b998a72d4e
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lldb/include/lldb/Core/Opcode.h
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.h
M lldb/unittests/Instruction/CMakeLists.txt
R lldb/unittests/Instruction/RISCV/TestRiscvInstEmulation.cpp
Log Message:
-----------
Revert "RISCV unwinding enable" (#159790)
Reverts llvm/llvm-project#158161
Due to reported failures on remote Linux and Swift buildbots.
Commit: 75dba8ea9ee164a297066afae437bc379f86f482
https://github.com/llvm/llvm-project/commit/75dba8ea9ee164a297066afae437bc379f86f482
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/TestRunner.py
A llvm/utils/lit/tests/Inputs/shtest-readfile/absolute-paths.txt
A llvm/utils/lit/tests/Inputs/shtest-readfile/file-does-not-exist.txt
A llvm/utils/lit/tests/Inputs/shtest-readfile/lit.cfg
A llvm/utils/lit/tests/Inputs/shtest-readfile/relative-paths.txt
A llvm/utils/lit/tests/Inputs/shtest-readfile/two-same-line.txt
A llvm/utils/lit/tests/shtest-readfile.py
Log Message:
-----------
[lit] Add readfile substitution
This patch adds a new %{readfile:<file name>} substitution to lit. This
is needed for porting a couple of tests to lit's internal shell. These
tests are all using subshells to pass some option to a command are not
feasible to run within the internal shell without this functionality.
Reviewers: petrhosek, jh7370, ilovepi, cmtice
Reviewed By: jh7370, cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/158441
Commit: 69465ebb22871e5c556ebf22ef4ebbf0a42be3d5
https://github.com/llvm/llvm-project/commit/69465ebb22871e5c556ebf22ef4ebbf0a42be3d5
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-readobj][NFC] Format ElfMachineType array definition (#159793)
Planning to add to the list in
https://github.com/llvm/llvm-project/pull/159791, so format it.
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 74bea4c1ad34c9044b9e02f7f9688a408676df75
https://github.com/llvm/llvm-project/commit/74bea4c1ad34c9044b9e02f7f9688a408676df75
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/metadata.ll
Log Message:
-----------
[IR] enable attaching metadata on ifuncs (#158732)
Teach the IR parser and writer to support metadata on ifuncs, and update
documentation.
In PR #153049, we have a use case of attaching the `!associated`
metadata to an ifunc.
Since an ifunc is similar to a function declaration, it seems natural to
allow metadata on ifuncs.
Currently, the metadata API allows adding Metadata to
llvm::GlobalObject, so the in-memory IR allows for metadata on ifuncs,
but the IR reader/writer is not aware of that.
---------
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 74a0d913435218dc97e2ce2f4bbe7a5ba6d515ec
https://github.com/llvm/llvm-project/commit/74a0d913435218dc97e2ce2f4bbe7a5ba6d515ec
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
Log Message:
-----------
[clang-tidy] Fix `bugprone-sizeof-expression` crash on arrays of dependent type (#159701)
Fixes #158422.
Commit: 8c189327e5573e597b3eead418beab6aaea72ca3
https://github.com/llvm/llvm-project/commit/8c189327e5573e597b3eead418beab6aaea72ca3
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/sections.f90
Log Message:
-----------
[flang][OpenMP] Use OmpDirectiveSpecification in SECTIONS (#159580)
Commit: 7f2dcaab393a75877fe84d40b0a2633b0cae141b
https://github.com/llvm/llvm-project/commit/7f2dcaab393a75877fe84d40b0a2633b0cae141b
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
Log Message:
-----------
[NFC][RISCV] Move Zvfbf* relative stuffs to RISCVInstrInfoZvfbf.td (#159619)
Commit: 15223548addf8aba95dba6cc8c175742dfcc3216
https://github.com/llvm/llvm-project/commit/15223548addf8aba95dba6cc8c175742dfcc3216
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lldb/source/Utility/ArchSpec.cpp
Log Message:
-----------
[lldb] Add a static_assert that g_core_definitions matches the Core enum (#159452)
This PR uses the same trick as 7ced9fff95473 to ensure the
`g_core_definitions` table is correctly indexed by the Core enum. It's
easy to make a mistake. Case in point: this caught two entries that
appeared in the wrong order.
Commit: ffb70b00f970ec72a540a4c3c7f11af139accd1b
https://github.com/llvm/llvm-project/commit/ffb70b00f970ec72a540a4c3c7f11af139accd1b
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
Log Message:
-----------
[RISCV] Fix build after e747223c03e16d02cd0dc6f8eedb5c825a7366c1
Commit: 24b03d3217e41536cee7c868860b5930160ad526
https://github.com/llvm/llvm-project/commit/24b03d3217e41536cee7c868860b5930160ad526
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
Log Message:
-----------
[flang][OpenMP] Move helper functions further up the file, NFC (#159803)
Move them to before any potential users.
Commit: 6119d1f115625cd1b8a2b9d331609eb9e9f676ce
https://github.com/llvm/llvm-project/commit/6119d1f115625cd1b8a2b9d331609eb9e9f676ce
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vw-web-simplification.ll
Log Message:
-----------
[RISCV] Re-work how VWADD_W_VL and similar _W_VL nodes are handled in combineOp_VLToVWOp_VL. (#159205)
These instructions have one already narrow operand. Previously, we
pretended like this operand was a supported extension.
This could cause problems when we called getOrCreateExtendedOp on this
narrow operand when creating the the VWADD_VL. If the narrow operand
happened to be an extend of the opposite type, we would peek through it
and then rebuild it with the wrong extension type. So (vwadd_w_vl (i32
(sext X)), (i16 (zext Y))) would become (vwadd_vl (i16 (sext X)), (i16
(sext Y))).
To prevent this, we ignore the operand instead and pass std::nullopt for
SupportsExt to getOrCreateExtendedOp so it won't peek through any
extends on the narrow source.
Fixes #159152.
Commit: cbb60a32d79fb65401719216dda7e85468bad2d9
https://github.com/llvm/llvm-project/commit/cbb60a32d79fb65401719216dda7e85468bad2d9
Author: Fangrui Song <i at maskray.me>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Options.td
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
M lld/test/ELF/gc-sections-print.s
Log Message:
-----------
[ELF] Add --print-gc-sections=<file> (#159706)
Add `--print-gc-sections=<file>` to redirect garbage collection section
listing to a file, avoiding contamination of stdout with other linker
output. mold has recently added the option.
GNU ld feature request:
https://sourceware.org/bugzilla/show_bug.cgi?id=33331
Commit: 5f86d0b644c4a7a3a51102444faad8b594469e41
https://github.com/llvm/llvm-project/commit/5f86d0b644c4a7a3a51102444faad8b594469e41
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in TosaValidation.cpp (NFC)
Commit: a513b701752b139bde7b4c3ecebd549a8cb40e3e
https://github.com/llvm/llvm-project/commit/a513b701752b139bde7b4c3ecebd549a8cb40e3e
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang-tools-extra/test/CMakeLists.txt
M clang-tools-extra/test/clang-tidy/checkers/custom/query-incorrect-query.cpp
M clang-tools-extra/test/clang-tidy/checkers/custom/query-partially-active-check.cpp
M clang-tools-extra/test/clang-tidy/checkers/custom/query.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
M clang-tools-extra/test/lit.cfg.py
M clang-tools-extra/test/lit.site.cfg.py.in
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
Log Message:
-----------
[clang-tidy][custom-check][NFC] fix test when `CLANG_TIDY_ENABLE_QUERY_BASED_CUSTOM_CHECKS` disable (#159809)
Commit: 250a92fca5148414845bc50a0e1883f250891a39
https://github.com/llvm/llvm-project/commit/250a92fca5148414845bc50a0e1883f250891a39
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/test/Analysis/LifetimeSafety/benchmark.py
Log Message:
-----------
[LifetimeSafety] Avoid adding already present items in sets/maps (#159582)
Optimize lifetime safety analysis performance
- Added early return optimization in `join` function for ImmutableSet
when sets are identical
- Improved ImmutableMap join logic to avoid unnecessary operations when
values are equal
I was under the impression that ImmutableSets/Maps would not modify the
underlying if already existing elements are added to the container (and
was hoping for structural equality in this aspect). It looks like the
current implementation of `ImmutableSet` would perform addition
nevertheless thereby creating (presumably `O(log(N))` tree nodes.
This change considerably brings down compile times for some edge cases
which happened to be present in the LLVM codebase. Now it is actually
possible to compile LLVM in under 20 min with the lifetime analysis.
The compile time hit is still significant but not as bad as before this
change where it was not possible to compile LLVM without severely
limiting analysis' scope (giving up on CFG with > 3000 blocks).
Fixes https://github.com/llvm/llvm-project/issues/157420
<details>
<summary>Report (Before)</summary>
</details>
<details>
<summary>Report (After)</summary>
# Lifetime Analysis Performance Report
> Generated on: 2025-09-18 14:28:00
---
## Test Case: Pointer Cycle in Loop
**Timing Results:**
| N (Input Size) | Total Time | Analysis Time (%) | Fact Generator (%) |
Loan Propagation (%) | Expired Loans (%) |
|:---------------|-----------:|------------------:|-------------------:|---------------------:|------------------:|
| 25 | 53.76 ms | 85.58% | 0.00% | 85.46% | 0.00% |
| 50 | 605.35 ms | 98.39% | 0.00% | 98.37% | 0.00% |
| 75 | 2.89 s | 99.62% | 0.00% | 99.61% | 0.00% |
| 100 | 8.62 s | 99.80% | 0.00% | 99.80% | 0.00% |
**Complexity Analysis:**
| Analysis Phase | Complexity O(n<sup>k</sup>) |
|:------------------|:--------------------------|
| Total Analysis | O(n<sup>3.82</sup> ± 0.01) |
| FactGenerator | (Negligible) |
| LoanPropagation | O(n<sup>3.82</sup> ± 0.01) |
| ExpiredLoans | (Negligible) |
---
## Test Case: CFG Merges
**Timing Results:**
| N (Input Size) | Total Time | Analysis Time (%) | Fact Generator (%) |
Loan Propagation (%) | Expired Loans (%) |
|:---------------|-----------:|------------------:|-------------------:|---------------------:|------------------:|
| 400 | 66.02 ms | 58.61% | 1.04% | 56.53% | 1.02% |
| 1000 | 319.24 ms | 81.31% | 0.63% | 80.04% | 0.64% |
| 2000 | 1.43 s | 92.00% | 0.40% | 91.32% | 0.28% |
| 5000 | 9.35 s | 97.01% | 0.25% | 96.63% | 0.12% |
**Complexity Analysis:**
| Analysis Phase | Complexity O(n<sup>k</sup>) |
|:------------------|:--------------------------|
| Total Analysis | O(n<sup>2.12</sup> ± 0.02) |
| FactGenerator | O(n<sup>1.54</sup> ± 0.02) |
| LoanPropagation | O(n<sup>2.12</sup> ± 0.03) |
| ExpiredLoans | O(n<sup>1.13</sup> ± 0.03) |
---
## Test Case: Deeply Nested Loops
**Timing Results:**
| N (Input Size) | Total Time | Analysis Time (%) | Fact Generator (%) |
Loan Propagation (%) | Expired Loans (%) |
|:---------------|-----------:|------------------:|-------------------:|---------------------:|------------------:|
| 50 | 137.30 ms | 90.72% | 0.00% | 90.42% | 0.00% |
| 100 | 1.09 s | 98.13% | 0.00% | 98.02% | 0.09% |
| 150 | 4.06 s | 99.24% | 0.00% | 99.18% | 0.05% |
| 200 | 10.44 s | 99.66% | 0.00% | 99.63% | 0.03% |
**Complexity Analysis:**
| Analysis Phase | Complexity O(n<sup>k</sup>) |
|:------------------|:--------------------------|
| Total Analysis | O(n<sup>3.29</sup> ± 0.01) |
| FactGenerator | (Negligible) |
| LoanPropagation | O(n<sup>3.29</sup> ± 0.01) |
| ExpiredLoans | O(n<sup>1.42</sup> ± 0.19) |
---
</details>
Commit: c256966fe2129ef75c76a4cab454b35ffa9410f3
https://github.com/llvm/llvm-project/commit/c256966fe2129ef75c76a4cab454b35ffa9410f3
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
A llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir
Log Message:
-----------
[AMDGPU]: Unpack packed instructions overlapped by MFMAs post-RA scheduling (#157968)
This is a cleaned up version of PR #151704. These optimizations are now
performed post-RA scheduling.
Commit: 8009a5bafdc64562a4a3a89242170594454dee40
https://github.com/llvm/llvm-project/commit/8009a5bafdc64562a4a3a89242170594454dee40
Author: Cameron McInally <cameron.mcinally at nyu.edu>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
A llvm/test/MC/AsmParser/native.s
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
[MC] Add support for -mcpu=native. (#159414)
Support -mcpu=native by querying the Host CPU Name and Feature flags.
---------
Co-authored-by: Cameron McInally <cmcinally at nvidia.com>
Commit: e151e84ec0c6a95a08117dac33d555a663beeb50
https://github.com/llvm/llvm-project/commit/e151e84ec0c6a95a08117dac33d555a663beeb50
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for bugprone-argument-comment in LinalgTransformOps.cpp (NFC)
Commit: cac54a8ad08938a66d4f0ce6114c53cb0ace4499
https://github.com/llvm/llvm-project/commit/cac54a8ad08938a66d4f0ce6114c53cb0ace4499
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
A lld/test/wasm/Inputs/tags.s
M lld/test/wasm/tag-section.ll
M llvm/lib/CodeGen/AsmPrinter/WasmException.cpp
M llvm/lib/CodeGen/AsmPrinter/WasmException.h
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Require tags for Wasm EH and Wasm SJLJ to be defined externally (#159143)
Rather then defining these tags in each object file that requires them
we can can declare them as undefined and require that they defined
externally in, for example, compiler-rt or libcxxabi.
Commit: bf835169a52b792acc9f8ad26141fb3e556b6f71
https://github.com/llvm/llvm-project/commit/bf835169a52b792acc9f8ad26141fb3e556b6f71
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[AArch64] Remove post-decoding instruction mutations (#156364)
Add `bits<0>` fields to instructions using the ZTR/MPR/MPR8 register
classes. These register classes contain only one register, and it is
not encoded in the instruction. This way, the generated decoder can
completely decode instructions without having to perform a post-decoding
pass to insert missing operands.
Some immediate operands are also not encoded and have only one possible
value "zero". Use this trick for them, too.
Finally, remove `-ignore-non-decodable-operands` option from
`llvm-tblgen` invocation to ensure that non-decodable operands do not
appear in the future.
Commit: 51e3c3d51ba8064c7dafd57bf19e2a54b553af03
https://github.com/llvm/llvm-project/commit/51e3c3d51ba8064c7dafd57bf19e2a54b553af03
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M offload/liboffload/API/Program.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/PluginManager.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/program/olIsValidBinary.cpp
Log Message:
-----------
[Offload] Implement 'olIsValidBinary' in offload and clean up (#159658)
Summary:
This exposes the 'isDeviceCompatible' routine for checking if a binary
*can* be loaded. This is useful if people don't want to consume errors
everywhere when figuring out which image to put to what device.
I don't know if this is a good name, I was thining like `olIsCompatible`
or whatever. Let me know what you think.
Long term I'd like to be able to do something similar to what OpenMP
does where we can conditionally only initialize devices if we need them.
That's going to be support needed if we want this to be more
generic.
Commit: 90d03a0386a6b9640e50513f6948cd2549937208
https://github.com/llvm/llvm-project/commit/90d03a0386a6b9640e50513f6948cd2549937208
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Use MutableArrayRef instead of SmallVectorImpl&. NFC (#159651)
We're only going to modify existing items, not add or remove any
elements to the vector.
Commit: 21f5f32cc6feacdacd9a22bc74f3e6ceb2a258c4
https://github.com/llvm/llvm-project/commit/21f5f32cc6feacdacd9a22bc74f3e6ceb2a258c4
Author: Gabriel Baraldi <baraldigabriel at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
A llvm/test/Other/pipeline-callbacks-string-api.ll
Log Message:
-----------
[PassBuilder] Add callback invoking to PassBuilder string API (#157153)
This is a very rough state of what this can look like, but I didn't want
to spend too much time on what could be a dead end.
Currently the only way to invoke callbacks is by using the default
pipelines, this is an issue if you want to define your own pipeline
using the C string API (we do that in LLVM.jl in julia) so I extended
the api to allow for invoking those callbacks just like one would call a
pass of that kind.
There are some questions about the params that these callbacks take and
also I'm missing some of them (some of them are also invoked by the
backend so we may not want to expose them)
Code written with AI help, bugs are mine. (Not sure what policy for this
is on LLVM)
Commit: bedfee0b8db6d3a2dba21e6d896ddcb4d38c1ab7
https://github.com/llvm/llvm-project/commit/bedfee0b8db6d3a2dba21e6d896ddcb4d38c1ab7
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/IR/invalid-type-info.cir
Log Message:
-----------
[CIR] Upstream TypeInfo attribute (#159426)
This change adds support for TypeInfoAttr which is needed later for RTTI
in exceptions
Issue https://github.com/llvm/llvm-project/issues/154992
Commit: 2998c74a1e113c63bc2c59685628bd0d0731caee
https://github.com/llvm/llvm-project/commit/2998c74a1e113c63bc2c59685628bd0d0731caee
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
Log Message:
-----------
[mlir][xegpu] Add SIMT distribution support for GEMM transpose B case. (#155517)
This PR adds the features needed for supporting the GEMM with transpose
B case.
Summary of changes.
1). Add distribution logic for `vector.bitcast`, `vector.transpose` and
`memref.extract_aligned_pointer_as_index` cases.
2). Add layout propagation support for `vector.shape_cast`,
`vector.broadcast` and `vector.bitcast`
3). Incorporate slice attribute and `DistributeLayoutAttr` interface
with the core logic in layout prop.
Commit: 4c7ebf825edabb5e0433b312ddac7914028e4488
https://github.com/llvm/llvm-project/commit/4c7ebf825edabb5e0433b312ddac7914028e4488
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_compat_overloads.h
A clang/test/SemaHLSL/BuiltIns/binary-compat-overload-warnings.hlsl
A clang/test/SemaHLSL/BuiltIns/ternary-compat-overload-warnings.hlsl
A clang/test/SemaHLSL/BuiltIns/unary-compat-overload-warnings.hlsl
A clang/test/SemaHLSL/BuiltIns/vec-scalar-compat-overload-warnings.hlsl
Log Message:
-----------
[HLSL] Add deprecation warnings to compatability overloads (#159208)
Add deprecation warnings to compatability overloads and add tests to
show the warnings.
Closes #133452
Commit: 4cace1ff0f9a144de9f46f4521d140080e4e284d
https://github.com/llvm/llvm-project/commit/4cace1ff0f9a144de9f46f4521d140080e4e284d
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
M llvm/test/MC/Disassembler/ARM/arm-tests.txt
Log Message:
-----------
[ARM] Verify that disassembled instruction is correct (#157360)
This change adds basic `MCInst` verification (checks the number of
operands) and fixes detected bugs.
* `RFE*` instructions have only one operand, but `DecodeRFEInstruction`
added two.
* `DecodeMVEModImmInstruction` and `DecodeMVEVCMP` added a `vpred`
operand, but this is what `AddThumbPredicate` normally does. This
resulted in an extra `vpred` operand.
* `DecodeMVEVADCInstruction` added an extra immediate operand.
* `getARMInstruction` added a `pred` operand to instructions that don't
have one (via `DecodePredicateOperand`).
* `AddThumb1SBit` appended an extra register operand to instructions
that don't modify CPSR (such as `tBL`).
* Instructions in `NEONDup` namespace have `pred` operand that the
generated code successfully decodes. The operand was added once again by
`getARMInstruction`/`getThumbInstruction` via `AddThumbPredicate`.
Functional changes extracted from #156540.
Commit: 2e34188513e296f0c3d84b5a808924cafc6fd5a4
https://github.com/llvm/llvm-project/commit/2e34188513e296f0c3d84b5a808924cafc6fd5a4
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.td
Log Message:
-----------
[PowerPC] clean unused PPC target feature FeatureBPERMD (#159782)
clean unused PPC target feature FeatureBPERMD.
Commit: 21821f50cf1c420fe598b1252f04ebce3cc0f79e
https://github.com/llvm/llvm-project/commit/21821f50cf1c420fe598b1252f04ebce3cc0f79e
Author: lntue <lntue at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/FPMatcher.h
Log Message:
-----------
[libc] Update floating testing infra for MSVC compatibility. (#159810)
Commit: 0ce6052a0c08035a07fcabb05271be7313308db3
https://github.com/llvm/llvm-project/commit/0ce6052a0c08035a07fcabb05271be7313308db3
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lldb/utils/TableGen/CMakeLists.txt
Log Message:
-----------
[lldb] install lldb-tblgen by default to ease cross-compilation (one-liner) (#159812)
Right now, cross-building `lldb` means either installing a native
`lldb-tblgen` by hand (non-trivial, as CMake is painful) or first
building all of native clang because of how the CMake rules work, which
is not fun.
In keeping with the pattern established by llvm-tblgen and clang-tblgen,
install lldb-tblgen to ease cross-compilation.
Co-authored-by: Ross Burton <ross.burton at arm.com>
Commit: 8fcb712167fa809af9bec2ffcfe1ac1b8c5e4aa6
https://github.com/llvm/llvm-project/commit/8fcb712167fa809af9bec2ffcfe1ac1b8c5e4aa6
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
Log Message:
-----------
[AMDGPU] gfx1250 runlines for global-atomicrmw-fadd.ll. NFC (#159817)
Commit: 2d503b924c324f7f67ef8b1f5c518c1f80a2825b
https://github.com/llvm/llvm-project/commit/2d503b924c324f7f67ef8b1f5c518c1f80a2825b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M flang-rt/CMakeLists.txt
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M openmp/CMakeLists.txt
M runtimes/CMakeLists.txt
Log Message:
-----------
[LLVM] Simplify GPU runtimes flag handling (#159802)
Summary:
The AMDGPU hack can be removed, and we no longer need to skip 90% of the
`HandleLLVMOptions` if we work around NVPTX earlier. Simplifies the
interface by removing duplicated logic and keeps the GPU targets from
being weirdly divergent on some flags.
Commit: bbf657d5bb52f0f60f16224aba7e05f5eb33638f
https://github.com/llvm/llvm-project/commit/bbf657d5bb52f0f60f16224aba7e05f5eb33638f
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/AST/ExprClassification.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
Log Message:
-----------
[clang] fix expression classification for dependent binary operators (#159819)
This fixes a regression reported here:
https://github.com/llvm/llvm-project/pull/159463#issuecomment-3312157416
Since this regression was never released, there are no release notes.
Commit: 16880116c9a180e1dfed69be383d20e1efd8d3c1
https://github.com/llvm/llvm-project/commit/16880116c9a180e1dfed69be383d20e1efd8d3c1
Author: Anthony Latsis <alatsis at apple.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
Log Message:
-----------
[lldb] Fix Linux build when LLDB_ENABLE_PYTHON is OFF (#159825)
Remove 'lldb-python-scripts' from LLVM_DISTRIBUTION_COMPONENTS when
Python scripting is disabled. Otherwise we get
```
Specified distribution component 'lldb-python-scripts' doesn't have an install target
```
Commit: fc73ef42c92bf50547d5a069e98459a4a5615872
https://github.com/llvm/llvm-project/commit/fc73ef42c92bf50547d5a069e98459a4a5615872
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/Driver/ToolChains/UEFI.cpp
M clang/test/Driver/uefi-constructed-args.c
Log Message:
-----------
[clang][Driver] Clean up UEFI linker argument handling (#159639)
This makes the UEFI driver's handling of linking more canonical
in a few ways:
* Use /option:value syntax with lld-link as in the MSVC driver.
* Handle -nostdlib, -nodefaultlibs, -r and call common
subroutines when they aren't set. This covers sanitizer and
profile runtimes and their associated switches; compiler-rt
builds do not yet provide these libraries, but the driver
behavior is opt-in and supports all the opt-in/out plumbing
like other targets do. This lets command lines immediately
use the opt-out switches even when they are superfluous for
opt-in features, as build system plumbing often needs to do.
It also updates some TODO comments for how the driver behavior
will look when more runtime support is ready.
Commit: 9ba844eb3a21d461c3adc7add7691a076c6992fc
https://github.com/llvm/llvm-project/commit/9ba844eb3a21d461c3adc7add7691a076c6992fc
Author: Walter Erquinigo <werquinigo at nvidia.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lldb/include/lldb/Utility/ArchSpec.h
M lldb/source/Utility/ArchSpec.cpp
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/ObjectFile.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[ELF][LLDB] Add an nvsass triple (#159459)
When handling CUDA ELF files via objdump or LLDB, the ELF parser in LLVM
needs to distinguish if an ELF file is sass or not, which requires a
triple for sass to exist in llvm. This patch includes all the necessary
changes for LLDB and objdump to correctly identify these files with the
correct triple.
Commit: fcf2c4629ccf41d13837748b261bfab6625afb11
https://github.com/llvm/llvm-project/commit/fcf2c4629ccf41d13837748b261bfab6625afb11
Author: Wendi <uwendi at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/docs/QualGroup.rst
R llvm/docs/qual-wg/slides/202507_llvm_qual_wg.pdf
R llvm/docs/qual-wg/slides/202508_llvm_qual_wg.pdf
R llvm/docs/qual-wg/slides/202509_llvm_qual_wg.pdf
Log Message:
-----------
[QualGroup] Update Slides Section, Add AI Transcription Policy, Clean Up (#158842)
This patch makes the following updates to the `QualGroup.rst`
documentation:
✅ 1. Replace slide links with Google Drive URLs
Replaced links to slide PDFs previously hosted in `llvm/docs/qual-wg/`
with publicly accessible links to the same files stored on Google Drive.
✅ 2. Remove duplicated "Current Topics & Backlog" section
Removed an accidental duplication of the "Current Topics & Backlog"
section to improve clarity and structure.
✅ 3. Add "AI Transcription Policy" section
Introduced a dedicated section documenting the group's practices and
expectations regarding AI-based auto-transcription during sync-up
meetings. Includes purpose, consent practices, retention details, and
how participants can opt out or raise concerns.
✅ 4. Remove `qual-wg` subfolder from `docs`
Removed the now-unused `llvm/docs/qual-wg` directory after migrating
slide hosting off-repo. No longer needed for qualification group
documentation.
✅ 5. Revision of the introduction
Updated sentence to reflect the most current and widely relevant safety
standards: adding IEC 61508 and IEC 62304 for broader applicability, and
replacing EN 50128 (older standard in railways) by EN 50716 for
correctness.
---------
Co-authored-by: Wendi Urribarri (Woven by Toyota <wendi.urribarri at woven-planet.global>
Commit: 6e977aabb9494ab0afbe4b4b47465a0798e2bf45
https://github.com/llvm/llvm-project/commit/6e977aabb9494ab0afbe4b4b47465a0798e2bf45
Author: Nico Weber <thakis at chromium.org>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/test/BUILD.gn
Log Message:
-----------
[gn] port a513b701752b1
Commit: 8afea0d0ea1c1d24c8df646a6d8c87fd02ca0ea1
https://github.com/llvm/llvm-project/commit/8afea0d0ea1c1d24c8df646a6d8c87fd02ca0ea1
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A offload/test/offloading/fortran/target-declare-mapper-allocatable.f90
Log Message:
-----------
[OpenMP][MLIR] Preserve to/from flags in mapper base entry for mappers (#159799)
With declare mapper, the parent base entry was emitted as `TARGET_PARAM`
only. The mapper received a map-type without `to/from`, causing
components to degrade to `alloc`-only (no copies), breaking allocatable
payload mapping. This PR preserves the map-type bits from the parent.
This fixes #156466.
Commit: 733c1aded131ca955563ef7ef04fb8acf49aa5e3
https://github.com/llvm/llvm-project/commit/733c1aded131ca955563ef7ef04fb8acf49aa5e3
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMScheduleA57.td
M llvm/lib/Target/ARM/ARMScheduleR52.td
M llvm/lib/Target/ARM/ARMScheduleSwift.td
M llvm/test/Analysis/CostModel/ARM/abs.ll
M llvm/test/Analysis/CostModel/ARM/mve-abs.ll
M llvm/test/CodeGen/Thumb2/abs.ll
Log Message:
-----------
[ARM] Replace ABS and tABS machine nodes with custom lowering (#156717)
Just do a custom lowering instead.
Also copy paste the cmov-neg fold to prevent regressions in nabs.
Commit: e22985795ceddae29d91580f92e0d04d80ce5f60
https://github.com/llvm/llvm-project/commit/e22985795ceddae29d91580f92e0d04d80ce5f60
Author: David Green <david.green at arm.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Clean up the formatting of some bitconvert patterns. NFC
Commit: b28d2ea432ab9ce04225874d893769be109be5c3
https://github.com/llvm/llvm-project/commit/b28d2ea432ab9ce04225874d893769be109be5c3
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
Log Message:
-----------
[CIR] Implement Logical AND for VectorType (#158696)
This change adds support for local AND op for VectorType
Issue https://github.com/llvm/llvm-project/issues/136487
Commit: 580860e8b7341783e8e53114f26b9a9659a3a3e1
https://github.com/llvm/llvm-project/commit/580860e8b7341783e8e53114f26b9a9659a3a3e1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M openmp/device/include/State.h
M openmp/device/src/Misc.cpp
M openmp/device/src/Synchronization.cpp
M openmp/tools/omptest/src/OmptAssertEvent.cpp
Log Message:
-----------
[OpenMP][NFC] Clean up a bunch of warnings and clang-tidy messages (#159831)
Summary:
I made the GPU flags accept more of the default LLVM warnings, which
triggered some new cases. Clean those up and fix some other ones while
I'm at it.
Commit: dcce216289b10f01ac4e974efcbd486f79cc35ea
https://github.com/llvm/llvm-project/commit/dcce216289b10f01ac4e974efcbd486f79cc35ea
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][AArch64] Port #156364: fix tablegen args (#159835)
This was updated in #156364 but `-ignore-non-decodable-operands` was
removed from the wrong tablegen arg list (arm vs aarch64)
Commit: 46ce6a02ffc15e6b3b8a9ca89714c00c06150bed
https://github.com/llvm/llvm-project/commit/46ce6a02ffc15e6b3b8a9ca89714c00c06150bed
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/builtin-structured-binding-size.cpp
Log Message:
-----------
[clang] diagnose invalid std::tuple_size sizes (#159677)
This makes sure the tuple sizes remain within implementation limits, and
this doesn't cause the compiler to crash later, as the tuple size is
assumed to fit within an UnsignedOrNone.
Fixes #159563
Commit: 57a593f6b23be04d47fee0c691e6738bdec0e608
https://github.com/llvm/llvm-project/commit/57a593f6b23be04d47fee0c691e6738bdec0e608
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
R libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
[libc++] Remove obsolete locale-specific regex tests (#159590)
After a recent macOS update, several of the locale-specific regex tests
started failing. These tests were mainly testing two locale specific
features of regular expressions:
- A character class like `[=x=]` matches any character that is
considered equivalent to `x` according to the collation rules of the
current locale.
- A character class like `[[.ch.]]` matches anything that is equivalent
to `ch` (whether as two letters or as a single collation element) in the
current locale.
However, these tests were relying on platform-specific localization
data, specifically they were only working with older macOS localization
data. As can be seen from the numerous XFAILs, most mainstream platforms
didn't actually pass this test. After the macOS update, macOS itself
also doesn't pass these tests anymore.
I looked at whether there are locales where these tests would still make
sense, and I couldn't find any. I am not a localization expert, but it
appears that only legacy locales like the traditional Spanish locale
(which isn't commonly shipped on systems anymore) considers `[.ch.]` to
be a single collation element. Therefore, it seems that the locale
specific part of these tests is not relevant anymore, and this patch
removes them.
The patch also moves some tests for equivalence classes inside character
classes to their non locale-specific tests, since that feature was not
covered there.
Finally, the lookup_collatename.pass.cpp test was fixed by removing an
assertion that `ch` is a collation element in the CZ locale, which seems
to not be the case in recent localization data (and appears to be the
root cause for about half the failures in these tests).
Commit: 19659eec2b81720eb6c827349c8df28331393e1a
https://github.com/llvm/llvm-project/commit/19659eec2b81720eb6c827349c8df28331393e1a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
Log Message:
-----------
[LV] Add additional test for replicating store costs.
Add tests for costing replicating stores with x86_fp80, scalarizing
costs after discarding interleave groups and cost when preferring vector
addressing.
Commit: 93f9ca21f060a7aa34e5bb94557409634bf0e39d
https://github.com/llvm/llvm-project/commit/93f9ca21f060a7aa34e5bb94557409634bf0e39d
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/Yaml.h
A clang/test/Analysis/Inputs/taint-generic-config-vfs.json
M clang/test/Analysis/taint-generic.c
Log Message:
-----------
[clang][analyzer] Load config through the proper VFS (#159164)
This PR ensures that the Clang static analyzer loads the config file
through the properly-configured VFS rather than through the bare real
file system. This enables correctly going through VFS overlays, unifying
the behavior with the rest of the compiler.
Commit: 81c0c7337df51b84feee6c40c4e09f41e740e3b1
https://github.com/llvm/llvm-project/commit/81c0c7337df51b84feee6c40c4e09f41e740e3b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
Log Message:
-----------
[LV] Pass operand info to getMemoryOpCost in getMemInstScalarizationCost.
Pass operand info to getMemoryOpCost in getMemInstScalarizationCost.
This matches the behavior in VPReplicateRecipe::computeCost.
Commit: ef1372af431f62ca05d6c56ad5d13813860c4aae
https://github.com/llvm/llvm-project/commit/ef1372af431f62ca05d6c56ad5d13813860c4aae
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Support/KnownBits.cpp
Log Message:
-----------
[KnownBits] Add setAllConflict to set all bits in Zero and One. NFC (#159815)
This is a common pattern to initialize Knownbits that occurs before
loops that call intersectWith.
Commit: d38979dca24a20b94a682aef5dfbd9e290335ea9
https://github.com/llvm/llvm-project/commit/d38979dca24a20b94a682aef5dfbd9e290335ea9
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.td
Log Message:
-----------
Revert "[PowerPC] clean unused PPC target feature FeatureBPERMD" (#159837)
Reverts llvm/llvm-project#159782
The PR breaks multiple build bots and CI as well.
Commit: d8a4c61fe4c11b16a496a089e2962473c6b1b183
https://github.com/llvm/llvm-project/commit/d8a4c61fe4c11b16a496a089e2962473c6b1b183
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
Log Message:
-----------
[CodeGenPrepare] Consider target memory intrinics as memory use (#159638)
When deciding to sink address instructions into their uses, we check if
it is profitable to do so. The profitability check is based on the types
of uses of this address instruction -- if there are users which are not
memory instructions, then do not fold.
However, this profitability check wasn't considering target intrinsics,
which may be loads / stores.
This adds some logic to handle target memory intrinsics.
Commit: 67244da08e1aa83f34358a32e3fa3b2e1722bc65
https://github.com/llvm/llvm-project/commit/67244da08e1aa83f34358a32e3fa3b2e1722bc65
Author: kkent030315 <hrn832 at protonmail.com>
Date: 2025-09-20 (Sat, 20 Sep 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
M lld/COFF/Writer.cpp
A lld/test/COFF/nodbgdirmerge.test
Log Message:
-----------
[LLD][COFF] Add /nodbgdirmerge to control debug directory section (#159235)
Resolves #141712.
As described in the issue, this PR adds support for `/nodbgdirmerge`
flag in LLD to align with MS link. When the flag is specified, the
linker will emit the debug directory section in `.cvinfo` section,
instead of merging it to the `.rdata`. The flag will be ignored on
MinGW.
---------
Co-authored-by: namazso <admin at namazso.eu>
Commit: fadea8cd1da608fb3c378ab7edc53b7fb2e02c3e
https://github.com/llvm/llvm-project/commit/fadea8cd1da608fb3c378ab7edc53b7fb2e02c3e
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
Log Message:
-----------
[AMDGPU] ds_read2/ds_write2 gfx1250 tests. NFC (#159824)
Commit: 1250095b1a21f219b22e2c50b9789e001813627a
https://github.com/llvm/llvm-project/commit/1250095b1a21f219b22e2c50b9789e001813627a
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts
M lldb/tools/lldb-dap/src-ts/logging.ts
Log Message:
-----------
[vscode-lldb] Improve logging in Server Mode (#159672)
A few improvements to logging when lldb-dap is started in **Server
Mode** AND when the **`lldb-dap.logFolder`** setting is used (not
`lldb-dap.log-path`).
### Improvement #1
**Avoid the prompt of restarting the server when starting each debug
session.**
That prompt is caused by the combination of the following facts:
1. The log filename changes every time a new debug session is starting
(see
[here](https://github.com/llvm/llvm-project/blob/9d6062c490548a5e6fea103e010ab3c9bc73a86d/lldb/tools/lldb-dap/src-ts/logging.ts#L47))
2. The log filename is passed to the server via an environment variable
called "LLDBDAP_LOG" (see
[here](https://github.com/llvm/llvm-project/blob/9d6062c490548a5e6fea103e010ab3c9bc73a86d/lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts#L263-L269))
3. All environment variables are put into the "spawn info" variable (see
[here](https://github.com/llvm/llvm-project/blob/9d6062c490548a5e6fea103e010ab3c9bc73a86d/lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts#L170-L172)).
4. The old and new "spawn info" are compared to decide if a prompt
should show (see
[here](https://github.com/llvm/llvm-project/blob/9d6062c490548a5e6fea103e010ab3c9bc73a86d/lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts#L107-L110)).
The fix is to remove the "LLDBDAP_LOG" from the "spawn info" variable,
so that the same server can be reused if the log path is the only thing
that has changed.
### Improvement #2
**Avoid log file conflict when multiple users share a machine and start
server in the same second.**
The problem: If two users start lldb-dap server in the same second, they
will share the same log path. The first user will create the log file.
The second user will find that they cannot access the same file, so
their server will fail to start.
The fix is to add a part of the VS Code session ID to the log filename.
### Improvement #3
**Avoid restarting the server when the order of environment variables
changed.**
This is done by sorting the environment variables before putting them
into the "spawn info".
Commit: 7165cf3e1266958c4457abeeadf9d9e965b51c92
https://github.com/llvm/llvm-project/commit/7165cf3e1266958c4457abeeadf9d9e965b51c92
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
Log Message:
-----------
[CIR] Fix structors for multidimensional arrrays (#159820)
This patchs implements array constructors and destructors for
multidimensional arrays. This works by bitcasting the pointer to the
first element to a one-dimensional array type of the same extent before
lowering to a loop.
Commit: cfabbf0f3dab99fba27ff8a9abdacc8555b44c98
https://github.com/llvm/llvm-project/commit/cfabbf0f3dab99fba27ff8a9abdacc8555b44c98
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/Inputs/shtest-readfile/lit.cfg
A llvm/utils/lit/tests/shtest-readfile-external.py
M llvm/utils/lit/tests/shtest-readfile.py
Log Message:
-----------
[lit] Add support for readfile to external shell
This patch adds support for the new lit %{readfile:<filename>}
substitution to the external shell. The implementation currently just
appends some test commands to ensure the file exists and uses a subshell
with cat. This is intended to enable running tests using the
substitution in the external shell before we fully switch over to the
internal shell.
This code is designed to be temporary with us deleting it once
everything has migrated over to the internal shell and we are able to
remove the external shell code paths.
Reviewers: petrhosek, cmtice, pogo59, ilovepi, arichardson
Reviewed By: cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/159431
Commit: 7d09d7208ef6f8c3d02e647e26db52a63603e646
https://github.com/llvm/llvm-project/commit/7d09d7208ef6f8c3d02e647e26db52a63603e646
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-19 (Fri, 19 Sep 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .github/CODEOWNERS
M clang-tools-extra/CMakeLists.txt
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/CMakeLists.txt
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidy.h
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.h
M clang-tools-extra/clang-tidy/ClangTidyForceLinker.h
M clang-tools-extra/clang-tidy/ClangTidyModule.h
M clang-tools-extra/clang-tidy/ClangTidyOptions.cpp
M clang-tools-extra/clang-tidy/ClangTidyOptions.h
M clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/DerivedMethodShadowingBaseMethodCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/DerivedMethodShadowingBaseMethodCheck.h
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/clang-tidy/clang-tidy-config.h.cmake
A clang-tools-extra/clang-tidy/custom/CMakeLists.txt
A clang-tools-extra/clang-tidy/custom/CustomTidyModule.cpp
A clang-tools-extra/clang-tidy/custom/QueryCheck.cpp
A clang-tools-extra/clang-tidy/custom/QueryCheck.h
M clang-tools-extra/clang-tidy/modernize/UseEqualsDefaultCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/AST.h
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/Hover.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExpandDeducedType.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/ASTTests.cpp
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExpandDeducedTypeTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
A clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/derived-method-shadowing-base-method.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-scoped-lock.rst
M clang-tools-extra/docs/clang-tidy/index.rst
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang-tools-extra/test/CMakeLists.txt
M clang-tools-extra/test/clang-tidy/check_clang_tidy.py
A clang-tools-extra/test/clang-tidy/checkers/bugprone/derived-method-shadowing-base-method.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
A clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/clang-tidy.yml
A clang-tools-extra/test/clang-tidy/checkers/custom/Inputs/incorrect-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/checkers/custom/query-incorrect-query.cpp
A clang-tools-extra/test/clang-tidy/checkers/custom/query-partially-active-check.cpp
A clang-tools-extra/test/clang-tidy/checkers/custom/query.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/return-braced-init-list.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/append-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/empty-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/override-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/root-clang-tidy.yml
A clang-tools-extra/test/clang-tidy/infrastructure/Inputs/custom-query-check/vfsoverlay.yaml
A clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check-not-enable.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
M clang-tools-extra/test/lit.cfg.py
M clang-tools-extra/test/lit.site.cfg.py.in
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
M clang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/cmake/caches/PGO.cmake
M clang/cmake/modules/CMakeLists.txt
M clang/docs/LanguageExtensions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenMP.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsRISCV.td
A clang/include/clang/Basic/BuiltinsRISCVXMIPS.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OffloadArch.h
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Sema/HeuristicResolver.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ByteCode/InterpStack.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Source.h
M clang/lib/AST/ByteCode/State.cpp
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclOpenMP.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/FreeBSD.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/UEFI.cpp
M clang/lib/Frontend/ASTMerge.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/ChainedIncludesSource.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/avx2intrin.h
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512cdintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/lib/Headers/avx512vlcdintrin.h
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/hlsl/hlsl_compat_overloads.h
A clang/lib/Headers/riscv_mips.h
M clang/lib/Headers/tmmintrin.h
M clang/lib/Headers/xmmintrin.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Yaml.h
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
A clang/lib/StaticAnalyzer/Core/PlistDiagnostics.h
M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
A clang/lib/StaticAnalyzer/Core/SarifDiagnostics.h
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/functions.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/vk_binding_attr.hlsl
A clang/test/AST/cfi-unchecked-callee.cpp
M clang/test/Analysis/ArrayBound/assumption-reporting.c
M clang/test/Analysis/ArrayBound/verbose-tests.c
M clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
M clang/test/Analysis/Checkers/WebKit/forward-decl-checker.mm
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members.mm
A clang/test/Analysis/Inputs/taint-generic-config-vfs.json
M clang/test/Analysis/LifetimeSafety/benchmark.py
A clang/test/Analysis/diagnostics/Inputs/expected-plists/plist-html.c.plist
M clang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-diagnostic-test.c.sarif
A clang/test/Analysis/diagnostics/plist-html.c
M clang/test/Analysis/diagnostics/sarif-multi-diagnostic-test.c
M clang/test/Analysis/taint-generic.c
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/CodeGen/opaque.c
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
A clang/test/CIR/IR/invalid-type-info.cir
M clang/test/CXX/drs/cwg30xx.cpp
M clang/test/ClangScanDeps/optimize-canonicalize-macros.m
A clang/test/CodeGen/AArch64/ptrauth-fmv.c
A clang/test/CodeGen/AArch64/resolver-attributes.c
M clang/test/CodeGen/PowerPC/ppc-sfvarargs.c
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
A clang/test/CodeGen/RISCV/builtins-riscv-mips.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/avx512vldq-builtins.c
M clang/test/CodeGen/X86/avx512vlfp16-builtins.c
M clang/test/CodeGen/X86/sse.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/inline-asm-x86-flag-output.c
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-dyn-index.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-multi-dim.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-subarray-many.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-subarray-one.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-unbounded.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global.hlsl
M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
M clang/test/CodeGenHLSL/static-local-ctor.hlsl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/Driver/DTLTO/dtlto.c
A clang/test/Driver/DTLTO/filename.py
A clang/test/Driver/DTLTO/ps5-dtlto.c
M clang/test/Driver/aarch64-features.c
M clang/test/Driver/aarch64-ptrauth.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/cuda-bad-arch.cu
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/spirv-amd-toolchain.c
M clang/test/Driver/uefi-constructed-args.c
M clang/test/Frontend/cfi-unchecked-callee-attribute.cpp
A clang/test/Frontend/cir-not-built.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
A clang/test/Modules/Inputs/glob-delete-with-virtual-dtor/glob-delete-with-virtual-dtor.h
A clang/test/Modules/Inputs/glob-delete-with-virtual-dtor/module.modulemap
A clang/test/Modules/glob-delete-with-virtual-dtor.cpp
A clang/test/Modules/merge-anon-in-template-2.cpp
A clang/test/Modules/merge-anon-in-template-3.cpp
A clang/test/Modules/pr133720.cppm
A clang/test/Modules/pr159424.cppm
A clang/test/OpenMP/groupprivate_ast_print.cpp
A clang/test/OpenMP/groupprivate_messages.cpp
A clang/test/OpenMP/target_defaultmap_codegen_03.cpp
M clang/test/OpenMP/target_defaultmap_messages.cpp
M clang/test/OpenMP/target_uses_allocators_messages.cpp
A clang/test/PCH/Inputs/glob-delete-with-virtual-dtor.h
A clang/test/PCH/glob-delete-with-virtual-dtor.cpp
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Rewriter/objc-string-concat-1.m
M clang/test/Sema/attr-args.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/constant-builtins-vector.cpp
A clang/test/SemaCUDA/consteval-func.cu
M clang/test/SemaCXX/ast-print.cpp
M clang/test/SemaCXX/builtin-structured-binding-size.cpp
A clang/test/SemaHLSL/BuiltIns/binary-compat-overload-warnings.hlsl
A clang/test/SemaHLSL/BuiltIns/ternary-compat-overload-warnings.hlsl
A clang/test/SemaHLSL/BuiltIns/unary-compat-overload-warnings.hlsl
A clang/test/SemaHLSL/BuiltIns/vec-scalar-compat-overload-warnings.hlsl
A clang/test/SemaHLSL/prohibit_resource_edits.hlsl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/lit.cfg.py
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-extdef-mapping/ClangExtDefMapGen.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/driver/cc1as_main.cpp
M clang/tools/driver/driver.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/CMakeLists.txt
M clang/unittests/AST/ExternalASTSourceTest.cpp
A clang/unittests/AST/QualTypeNamesTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Interpreter/CMakeLists.txt
M clang/unittests/Sema/HeuristicResolverTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
A clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/CMakeLists.txt
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/utils/perf-training/perf-helper.py
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/make_cxx_dr_status
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
A compiler-rt/cmake/caches/hexagon-builtins-baremetal.cmake
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/dfsan/dfsan.cpp
M compiler-rt/lib/fuzzer/FuzzerCorpus.h
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerTracePC.cpp
M compiler-rt/lib/hwasan/hwasan_report.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_file.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/tracing.h
M compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
A compiler-rt/test/asan/TestCases/Darwin/sandbox-vm-region-recurse.cpp
A compiler-rt/test/fuzzer/SimulateEmptyModuleTest.cpp
A compiler-rt/test/fuzzer/empty-module.test
M flang-rt/CMakeLists.txt
M flang-rt/include/flang-rt/runtime/file.h
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/misc-intrinsic.cpp
M flang-rt/lib/runtime/namelist.cpp
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
M flang/docs/Extensions.md
M flang/docs/Intrinsics.md
M flang/docs/ParallelMultiImageFortranRuntime.md
M flang/docs/ReleaseNotes.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/extensions.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FortranVariableInterface.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/ConvertComplexPow.cpp
M flang/lib/Parser/characters.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-do-forall.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/test/CMakeLists.txt
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
A flang/test/Driver/fatlto-err.f90
A flang/test/Driver/loop-fuse.f90
A flang/test/Driver/lto-fatlto.f90
A flang/test/Driver/lto-lld-flags.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm.fir
A flang/test/Integration/debug-dwarf-flags.f90
M flang/test/Lower/HLFIR/actual_target_for_dummy_pointer.f90
M flang/test/Lower/HLFIR/binary-ops.f90
M flang/test/Lower/HLFIR/eoshift.f90
M flang/test/Lower/Intrinsics/pow_complex16.f90
M flang/test/Lower/Intrinsics/pow_complex16i.f90
M flang/test/Lower/Intrinsics/pow_complex16k.f90
A flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
A flang/test/Lower/OpenACC/acc-firstprivate-derived-pointer-component.f90
A flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
A flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/amdgcn-complex.f90
A flang/test/Lower/array-constructor-exactly-once.f90
A flang/test/Lower/box-address.f90
A flang/test/Lower/call-character-array-to-polymorphic-pointer.f90
M flang/test/Lower/power-operator.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/doacross-clause.f90
M flang/test/Parser/OpenMP/if-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/lastprivate-clause.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/masked-unparse.f90
M flang/test/Parser/OpenMP/master-unparse.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/sections.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
M flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Parser/OpenMP/tile-size.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-full.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M flang/test/Parser/OpenMP/unroll-partial.f90
A flang/test/Parser/utf8-01.f90
M flang/test/Semantics/OpenACC/acc-loop.f90
M flang/test/Semantics/OpenMP/simd-only.f90
A flang/test/Semantics/bug158405.f90
A flang/test/Semantics/cdefined.f90
A flang/test/Semantics/definable07.f90
A flang/test/Semantics/resolve127.f90
A flang/test/Transforms/DoConcurrent/allocatable.f90
A flang/test/Transforms/DoConcurrent/host_eval.f90
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
A flang/test/Transforms/DoConcurrent/map_shape_info.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
A flang/test/Transforms/DoConcurrent/non_reference_to_device.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
A flang/test/Transforms/DoConcurrent/runtime_sized_array.f90
A flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
A flang/test/Transforms/convert-complex-pow.fir
A flang/test/Transforms/debug-dwarf-version.fir
M flang/tools/bbc/bbc.cpp
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/rsqrtf16.h
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/new.h
M libc/src/__support/CPP/simd.h
M libc/src/__support/CPP/type_traits/is_unsigned.h
M libc/src/__support/big_int.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/rsqrtf16.h
M libc/src/__support/math_extras.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/rsqrtf16.cpp
A libc/src/math/rsqrtf16.h
M libc/src/stdio/printf_core/vasprintf_internal.h
M libc/src/string/memory_utils/generic/inline_strlen.h
M libc/startup/baremetal/fini.h
M libc/startup/baremetal/init.h
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/FPMatcher.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/CPP/simd_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/rsqrtf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/FmaTest.h
M libc/test/src/math/smoke/acoshf16_test.cpp
M libc/test/src/math/smoke/acospif16_test.cpp
M libc/test/src/math/smoke/asinpif16_test.cpp
M libc/test/src/math/smoke/cospif16_test.cpp
M libc/test/src/math/smoke/expf16_test.cpp
A libc/test/src/math/smoke/rsqrtf16_test.cpp
M libc/test/src/math/smoke/sinpif16_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/asprintf_test.cpp
M libc/test/src/stdio/vasprintf_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M libclc/clc/include/clc/clcfunc.h
M libclc/clc/include/clc/misc/shuffle2_def.inc
M libclc/clc/include/clc/misc/shuffle_def.inc
M libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc
M libclc/clc/lib/generic/atomic/clc_atomic_def.inc
M libclc/clc/lib/generic/integer/clc_clz.inc
M libclc/clc/lib/generic/integer/clc_ctz.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__hash_table
M libcxx/include/__memory/allocate_at_least.h
M libcxx/include/__memory/compressed_pair.h
M libcxx/include/__vector/vector.h
M libcxx/include/ext/hash_map
M libcxx/include/map
M libcxx/include/string
M libcxx/include/unordered_map
M libcxx/src/filesystem/format_string.h
M libcxx/src/string.cpp
M libcxx/test/benchmarks/atomic_wait_1_waiter_1_notifier.bench.cpp
M libcxx/test/benchmarks/atomic_wait_N_waiter_N_notifier.bench.cpp
M libcxx/test/benchmarks/atomic_wait_multi_waiter_1_notifier.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/benchmarks/spec.gen.py
R libcxx/test/libcxx-03/strings/basic.string/string.modifiers/resize_default_initialized.pass.cpp
M libcxx/test/libcxx/input.output/filesystems/class.directory_entry/directory_entry.mods/last_write_time.pass.cpp
M libcxx/test/libcxx/input.output/filesystems/convert_file_time.pass.cpp
R libcxx/test/libcxx/strings/basic.string/string.modifiers/resize_default_initialized.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.modifiers/erase_range.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.pass.cpp
R libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
A libcxx/utils/benchmark-historical
M libcxx/utils/compare-benchmarks
M libcxx/utils/requirements.txt
M libcxx/utils/test-at-commit
A libcxx/utils/visualize-historical
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
M lld/COFF/Writer.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Options.td
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
A lld/test/COFF/nodbgdirmerge.test
M lld/test/ELF/gc-sections-print.s
A lld/test/wasm/Inputs/tags.s
M lld/test/wasm/tag-section.ll
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/dil-expr-lang.ebnf
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Host/common/NativeProcessProtocol.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Utility/ArchSpec.h
M lldb/include/lldb/Utility/StringExtractorGDBRemote.h
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILLexer.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Host/common/File.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/windows/Host.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Process/Utility/HistoryUnwind.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/source/Utility/StringExtractorGDBRemote.cpp
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/frame/var-dil/expr/Literals/TestFrameVarDILLiterals.py
R lldb/test/API/macosx/arm-pointer-metadata-stripping/Makefile
R lldb/test/API/macosx/arm-pointer-metadata-stripping/TestArmPointerMetadataStripping.py
R lldb/test/API/macosx/arm-pointer-metadata-stripping/extra_symbols.json
R lldb/test/API/macosx/arm-pointer-metadata-stripping/main.c
A lldb/test/API/pointer-nonaddressable-bits/Makefile
A lldb/test/API/pointer-nonaddressable-bits/TestArmPointerMetadataStripping.py
A lldb/test/API/pointer-nonaddressable-bits/extra_symbols.json
A lldb/test/API/pointer-nonaddressable-bits/main.c
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/console/TestDAP_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/startDebugging/TestDAP_startDebugging.py
M lldb/test/API/tools/lldb-dap/step/TestDAP_step.py
M lldb/test/API/tools/lldb-dap/stepInTargets/TestDAP_stepInTargets.py
M lldb/test/Shell/SymbolFile/NativePDB/inline_sites.test
M lldb/test/Shell/SymbolFile/PDB/type-quals.test
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/EventHelper.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts
M lldb/tools/lldb-dap/src-ts/logging.ts
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
M lldb/unittests/Expression/CMakeLists.txt
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Host/posix/SupportTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/tools/lldb-server/tests/LLGSTest.cpp
M lldb/utils/TableGen/CMakeLists.txt
M llvm/CMakeLists.txt
M llvm/benchmarks/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/GarbageCollection.rst
M llvm/docs/GettingStartedVS.rst
M llvm/docs/LangRef.rst
M llvm/docs/Passes.rst
M llvm/docs/QualGroup.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
R llvm/docs/qual-wg/slides/202507_llvm_qual_wg.pdf
R llvm/docs/qual-wg/slides/202508_llvm_qual_wg.pdf
R llvm/docs/qual-wg/slides/202509_llvm_qual_wg.pdf
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm/ADT/DenseMapInfo.h
M llvm/include/llvm/ADT/PackedVector.h
M llvm/include/llvm/ADT/PointerSumType.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/Statistic.h
M llvm/include/llvm/ADT/Twine.h
M llvm/include/llvm/ADT/ilist_node.h
M llvm/include/llvm/ADT/ilist_node_options.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/BasicAliasAnalysis.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/LoopAnalysisManager.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TypeBasedAliasAnalysis.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/SFrame.h
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/include/llvm/CodeGen/ExecutionDomainFix.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/LexicalScopes.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSort.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/GlobalObject.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
A llvm/include/llvm/IR/IntrinsicsRISCVXMIPS.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCDecoder.h
M llvm/include/llvm/MC/MCDecoderOps.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCInstrInfo.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSFrame.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/Option/ArgList.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/FormatVariadicDetails.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
A llvm/include/llvm/Transforms/Scalar/DropUnnecessaryAssumes.h
M llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
A llvm/include/llvm/Transforms/Utils/DebugSSAUpdater.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/AsmPrinter/WasmException.cpp
M llvm/lib/CodeGen/AsmPrinter/WasmException.h
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/ExecutionDomainFix.cpp
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/LexicalScopes.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StaticDataAnnotator.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVSort.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/Object/Archive.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/ObjectFile.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Remarks/BitstreamRemarkParser.cpp
M llvm/lib/Remarks/BitstreamRemarkParser.h
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Support/Windows/Program.inc
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600Packetizer.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/ARMScheduleA57.td
M llvm/lib/Target/ARM/ARMScheduleR52.td
M llvm/lib/Target/ARM/ARMScheduleSwift.td
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
A llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMCInstLower.cpp
M llvm/lib/Target/BPF/BPFMCInstLower.h
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
A llvm/lib/Target/BPF/BPFTargetLoweringObjectFile.cpp
A llvm/lib/Target/BPF/BPFTargetLoweringObjectFile.h
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/CMakeLists.txt
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
M llvm/lib/Target/Mips/MicroMipsInstrInfo.td
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.h
M llvm/lib/Target/Mips/MipsRegisterInfo.td
M llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZvfofp8min.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86IndirectThunks.cpp
M llvm/lib/Target/X86/X86InstrInfo.td
M llvm/lib/Target/X86/X86InstrOperands.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86ReturnThunks.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/CMakeLists.txt
A llvm/lib/Transforms/Scalar/DropUnnecessaryAssumes.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopPassManager.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
A llvm/test/Analysis/CostModel/ARM/abs.ll
M llvm/test/Analysis/CostModel/ARM/mve-abs.ll
M llvm/test/Analysis/CostModel/ARM/reduce-add.ll
M llvm/test/Analysis/CostModel/ARM/reduce-and.ll
M llvm/test/Analysis/CostModel/ARM/reduce-bit.ll
M llvm/test/Analysis/CostModel/ARM/reduce-fminmax.ll
M llvm/test/Analysis/CostModel/ARM/reduce-fp.ll
M llvm/test/Analysis/CostModel/ARM/reduce-or.ll
M llvm/test/Analysis/CostModel/ARM/reduce-smax.ll
M llvm/test/Analysis/CostModel/ARM/reduce-smin.ll
M llvm/test/Analysis/CostModel/ARM/reduce-umax.ll
M llvm/test/Analysis/CostModel/ARM/reduce-umin.ll
M llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Assembler/metadata.ll
A llvm/test/Bitcode/upgrade-vector-partial-reduce-add-intrinsic.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-addv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll
M llvm/test/CodeGen/AArch64/GlobalISel/select-splat-vector.ll
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
M llvm/test/CodeGen/AArch64/aarch64-mulv.ll
M llvm/test/CodeGen/AArch64/aarch64-tail-dup-size.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/arm64-fp-contract-zero.ll
M llvm/test/CodeGen/AArch64/arm64-i16-subreg-extract.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/call-rv-marker.ll
M llvm/test/CodeGen/AArch64/callbr-prepare.ll
M llvm/test/CodeGen/AArch64/combine-storetomstore.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-cdot.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-unrolled-cdot.ll
M llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/fnmul.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-fp16.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics.ll
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/global-merge-external.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-vector-match-sve2.ll
M llvm/test/CodeGen/AArch64/ldexp-arm64ec.ll
M llvm/test/CodeGen/AArch64/local-bounds-single-trap.ll
M llvm/test/CodeGen/AArch64/neon-addlv.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/partial-reduction-add.ll
A llvm/test/CodeGen/AArch64/pr157252.mir
M llvm/test/CodeGen/AArch64/ptrauth-fpac.ll
M llvm/test/CodeGen/AArch64/remat-const-float-simd.ll
A llvm/test/CodeGen/AArch64/scalarize-vector-load.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sme-avoid-coalescing-locally-streaming.ll
M llvm/test/CodeGen/AArch64/sme-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
A llvm/test/CodeGen/AArch64/sme-streaming-checkvl-mir.ll
A llvm/test/CodeGen/AArch64/sme-streaming-checkvl.ll
M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/test/CodeGen/AArch64/spill-reload-remarks.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-uniform-dsp-undef.ll
A llvm/test/CodeGen/AArch64/sve2p1-dots-partial-reduction.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-pred.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization-nan.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmaximum.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmin-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fminimum.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
A llvm/test/CodeGen/AArch64/xor-min-max.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-snop-padding.mir
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx11.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
A llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.gfx1251.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-control-flow.ll
A llvm/test/CodeGen/AMDGPU/lower-intrinsics-cluster-barrier.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/neighboring-mfma-padding.mir
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
A llvm/test/CodeGen/AMDGPU/propagate-amdgpu-cluster-dims.ll
A llvm/test/CodeGen/AMDGPU/ptradd-sdag-mubuf.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/regcoalesce-64-bit-only-regs.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
A llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spillv16.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
A llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-kmcnt-scc-different-block.mir
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
A llvm/test/CodeGen/BPF/jump_table_blockaddr.ll
A llvm/test/CodeGen/BPF/jump_table_global_var.ll
A llvm/test/CodeGen/BPF/jump_table_switch_stmt.ll
A llvm/test/CodeGen/Hexagon/hvx-vdeal-vpack.ll
A llvm/test/CodeGen/Hexagon/isel-uinttofp-v32i1tov32f32.ll
A llvm/test/CodeGen/Hexagon/isel-uinttofp-v64i1tov64f16.ll
A llvm/test/CodeGen/Hexagon/vararg-musl.ll
A llvm/test/CodeGen/Hexagon/vsubsat.ll
M llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sadd-sat.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/ssub-sat.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/uadd-sat.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/usub-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sadd-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/ssub-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uadd-sat.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/usub-sat.ll
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/i64_fp.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/milicode64.ll
M llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
M llvm/test/CodeGen/PowerPC/splat-extend.ll
M llvm/test/CodeGen/PowerPC/vec_constants.ll
A llvm/test/CodeGen/PowerPC/vsx-ldst-with-length.ll
A llvm/test/CodeGen/RISCV/GlobalISel/addiw-sext-inreg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ssube-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ssube-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-uadde-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-uadde-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vadd.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vfadd.ll
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/CodeGen/RISCV/bfloat-convert-half.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rda-stack.mir
M llvm/test/CodeGen/RISCV/rv32xtheadba.ll
M llvm/test/CodeGen/RISCV/rv32zba.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvqdotq.ll
M llvm/test/CodeGen/RISCV/rvv/partial-reduction-add.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
A llvm/test/CodeGen/RISCV/xmips-exectl.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
M llvm/test/CodeGen/RISCV/xqcicli.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
A llvm/test/CodeGen/RISCV/zibi.ll
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
M llvm/test/CodeGen/SystemZ/rda-stack-copy.mir
M llvm/test/CodeGen/Thumb2/abs.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
M llvm/test/CodeGen/Thumb2/mve-vst4.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
M llvm/test/CodeGen/X86/apx/ndd-false-deps-asm.mir
M llvm/test/CodeGen/X86/apx/shl.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/avx512-fma.ll
A llvm/test/CodeGen/X86/avx512-mask-bit-manip.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-vfmulc-fadd.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc-fadd.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
M llvm/test/CodeGen/X86/combine-vpmadd52.ll
M llvm/test/CodeGen/X86/dag-combiner-fma-folding.ll
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
M llvm/test/CodeGen/X86/fma-do-not-commute.ll
M llvm/test/CodeGen/X86/fma_patterns.ll
M llvm/test/CodeGen/X86/fma_patterns_wide.ll
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
A llvm/test/CodeGen/X86/print-reaching-defs.mir
M llvm/test/CodeGen/X86/select-smin-smax.ll
A llvm/test/CodeGen/X86/symbol-name.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
A llvm/test/DebugInfo/AArch64/debug-types.ll
A llvm/test/DebugInfo/AArch64/populate-abstract-sp-once.ll
M llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
A llvm/test/DebugInfo/Generic/inlined-static-var.ll
M llvm/test/DebugInfo/X86/DW_AT_LLVM_stmt_seq_sec_offset.ll
A llvm/test/DebugInfo/X86/live-debug-vars-bundle.mir
A llvm/test/DebugInfo/X86/split-dwarf-inline.ll
A llvm/test/FileCheck/CMakeLists.txt
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop1_err.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop2_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop2_err.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop1_err.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop2_dpp16.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop2_err.s
A llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx9-asm-err.s
A llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/vop3-gfx9.s
A llvm/test/MC/AsmParser/native.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop1_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop2_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_from_vop1_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_from_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8-literal16.txt
M llvm/test/MC/Disassembler/ARM/arm-tests.txt
A llvm/test/MC/ELF/cfi-sframe-encoding.s
A llvm/test/MC/ELF/cfi-sframe-fre-cases.s
M llvm/test/MC/ELF/cfi-sframe.s
M llvm/test/MC/ELF/cgprofile.s
M llvm/test/MC/ELF/debug-loc-label.s
M llvm/test/MC/ELF/symbol-names.s
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/invalid-instruction-spellcheck.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rvv/zvfbfmin.s
A llvm/test/MC/RISCV/rvv/zvfofp8min.s
R llvm/test/MC/WebAssembly/tag-section-decoding.ll
A llvm/test/MC/WebAssembly/tag-section-decoding.s
R llvm/test/MC/WebAssembly/tag-section.ll
A llvm/test/MC/WebAssembly/tag-section.s
A llvm/test/MachineVerifier/AMDGPU/test_copy_physregs_llt_virtreg.mir
M llvm/test/MachineVerifier/test_copy_physregs_x86.mir
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/Other/cgscc-devirt-iteration.ll
M llvm/test/Other/codegen-plugin-loading.ll
M llvm/test/Other/loop-pm-invalidation.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
A llvm/test/Other/pipeline-callbacks-string-api.ll
R llvm/test/TableGen/AsmPredicateCondsEmission.td
M llvm/test/TableGen/BitOffsetDecoder.td
A llvm/test/TableGen/CMakeLists.txt
A llvm/test/TableGen/DFAPacketizer.td
A llvm/test/TableGen/DecoderEmitter/AsmPredicateCondsEmission.td
A llvm/test/TableGen/DecoderEmitter/DecoderEmitterBitwidthSpecialization.td
A llvm/test/TableGen/DecoderEmitter/DecoderEmitterFnTable.td
A llvm/test/TableGen/DecoderEmitter/VarLenDecoder.td
M llvm/test/TableGen/DecoderEmitter/additional-encoding.td
M llvm/test/TableGen/DecoderEmitter/operand-decoder.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission2.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission3.td
A llvm/test/TableGen/DecoderEmitter/trydecode-emission4.td
R llvm/test/TableGen/DecoderEmitterBitwidthSpecialization.td
R llvm/test/TableGen/DecoderEmitterFnTable.td
A llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerInvalidHoisting.td
M llvm/test/TableGen/HwModeEncodeDecode3.td
A llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/RegisterEncoder.td
R llvm/test/TableGen/VarLenDecoder.td
A llvm/test/TableGen/dag-pattern-crash-on-set.td
M llvm/test/TableGen/intrinsic-attrs.td
R llvm/test/TableGen/trydecode-emission.td
R llvm/test/TableGen/trydecode-emission2.td
R llvm/test/TableGen/trydecode-emission3.td
R llvm/test/TableGen/trydecode-emission4.td
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/ThinLTO/X86/memprof-indirectcall.ll
M llvm/test/ThinLTO/X86/memprof-inlined.ll
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/CodeGenPrepare/unfold-pow2-test-vec.ll
M llvm/test/Transforms/Coroutines/coro-noop-pacbti.ll
M llvm/test/Transforms/Coroutines/coro-noop.ll
A llvm/test/Transforms/DropUnnecessaryAssumes/basic.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/issue110433.ll
A llvm/test/Transforms/InferAddressSpaces/AMDGPU/phi-poison.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/exact.ll
M llvm/test/Transforms/InstCombine/icmp-range.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
A llvm/test/Transforms/InstCombine/may-alias-errno.ll
A llvm/test/Transforms/InstCombine/redundant-fcmp.ll
M llvm/test/Transforms/InstSimplify/ConstProp/bswap.ll
M llvm/test/Transforms/LICM/promote-capture.ll
A llvm/test/Transforms/LoopStrengthReduce/AArch64/prefer-all.ll
M llvm/test/Transforms/LoopStrengthReduce/duplicated-phis.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-wide-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_known_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
A llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-struct-return.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-wide-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-metadata.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-hoist-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/remark-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/scalar-steps-with-users-demanding-all-lanes-and-first-lane-only.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-ptradd-with-replicated-operand.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-hoist-load-across-store.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/pr34438.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scev-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_load.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/vplan-native-inner-loop-only.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/bsd_regex.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/constantfolder-infer-correct-gepty.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
A llvm/test/Transforms/LoopVectorize/cse-gep-source-element-type.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
M llvm/test/Transforms/LoopVectorize/extract-from-end-vector-constant.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/flags.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction-multiple-uses-in-same-instruction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-requiring-scev-predicates.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invalidate-scev-at-scope-after-vectorization.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-neg-off.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/make-followup-loop-id.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/min-trip-count-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/miniters.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/non-const-n.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-index-width-smaller-than-iv-width.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-unroll.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr154045-dont-fold-extractelement-livein.ll
M llvm/test/Transforms/LoopVectorize/pr36983-multiple-lcssa.ll
M llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference-simplifications.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-neg-cond.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-hint.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_with_outer_loop.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/strided-accesses-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-loads-p16.ll
M llvm/test/Transforms/LoopVectorize/trunc-reductions.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/uitofp-preserve-nneg.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_div_urem.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/unroll_nonlatch.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LoopVectorize/widen-intrinsic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/dot.ll
M llvm/test/Transforms/MemProfContextDisambiguation/duplicate-context-ids.ll
M llvm/test/Transforms/MemProfContextDisambiguation/indirectcall.ll
M llvm/test/Transforms/MemProfContextDisambiguation/inlined.ll
M llvm/test/Transforms/MemProfContextDisambiguation/tailcall-nonunique.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/infer-align-from-assumption.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reduction-known-first-value.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PhaseOrdering/pr45682.ll
M llvm/test/Transforms/PhaseOrdering/pr45687.ll
M llvm/test/Transforms/PhaseOrdering/pr98799-inline-simplifycfg-ub.ll
M llvm/test/Transforms/SCCP/overdefined-ext.ll
A llvm/test/Transforms/SCCP/relax-range-checks.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-sched-inst-has-copyable-before.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep-inbounds.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/gep-chain.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
M llvm/test/Transforms/VectorCombine/intrinsic-scalarize.ll
M llvm/test/Verifier/AMDGPU/llvm.amdgcn.cooperative.atomic.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
M llvm/test/tools/llvm-debuginfo-analyzer/COFF/01-coff-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/01-dwarf-print-basic-details.test
M llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-clear-upper-regs.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-forwarding.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-misc-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-writeback.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
A llvm/test/tools/llvm-mca/RISCV/SiFive7/scalar-load-store.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/different-sew-instruments.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/fractional-lmul-data.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/multiple-same-sew-instruments.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/needs-sew-but-only-lmul.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-at-start.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-middle.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-region.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-straddles-region.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vector-integer-arithmetic.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetivli-lmul-sew-instrument.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetvli-lmul-sew-instrument.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX390/fractional-lmul-data.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-integer-arithmetic.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/test/tools/llvm-readobj/ELF/malformed-pt-dynamic.test
M llvm/test/tools/llvm-size/totals.test
M llvm/test/tools/obj2yaml/ELF/program-headers.yaml
M llvm/test/tools/yaml2obj/ELF/program-header-size-offset.yaml
M llvm/tools/llvm-debuginfo-analyzer/Options.cpp
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
M llvm/tools/llvm-lipo/llvm-lipo.cpp
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-mca/Views/InstructionInfoView.cpp
M llvm/tools/llvm-mca/llvm-mca.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-size/llvm-size.cpp
M llvm/tools/obj2yaml/obj2yaml.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/yaml2obj/yaml2obj.cpp
M llvm/unittests/ADT/PackedVectorTest.cpp
M llvm/unittests/ADT/STLExtrasTest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/CAS/ProgramTest.cpp
M llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
M llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
M llvm/unittests/CodeGen/LexicalScopesTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/GlobalObjectTest.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Support/ProgramTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Utils/CMakeLists.txt
A llvm/unittests/Transforms/Utils/DebugSSAUpdaterTest.cpp
M llvm/unittests/Transforms/Vectorize/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
A llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/AsmWriterEmitter.cpp
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
M llvm/utils/TableGen/CodeEmitterGen.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.h
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/InfoByHwMode.cpp
M llvm/utils/TableGen/Common/InfoByHwMode.h
M llvm/utils/TableGen/Common/InstructionEncoding.cpp
M llvm/utils/TableGen/Common/InstructionEncoding.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DFAPacketizerEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/custom/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/test/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/AST/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/BPF/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/shtest-readfile-external.py
M llvm/utils/lit/tests/shtest-readfile.py
M llvm/utils/profcheck-xfail.txt
M llvm/utils/split-file/split-file.cpp
M mlir/docs/Dialects/Affine.md
M mlir/docs/Dialects/SPIR-V.md
M mlir/include/mlir/Analysis/DataFlow/DeadCodeAnalysis.h
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
M mlir/include/mlir/Dialect/IRDL/IR/IRDLAttributes.td
M mlir/include/mlir/Dialect/IRDL/IR/IRDLOps.td
M mlir/include/mlir/Dialect/IRDL/IR/IRDLTypes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/MemRef/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCooperativeMatrixOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/DataFlow/DeadCodeAnalysis.cpp
M mlir/lib/AsmParser/Parser.cpp
A mlir/lib/Bindings/Python/DialectIRDL.cpp
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ComplexToROCDLLibraryCalls/ComplexToROCDLLibraryCalls.cpp
M mlir/lib/Conversion/ComplexToSPIRV/ComplexToSPIRV.cpp
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRV.cpp
M mlir/lib/Conversion/FuncToSPIRV/FuncToSPIRV.cpp
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Conversion/IndexToSPIRV/IndexToSPIRV.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/UBToSPIRV/UBToSPIRV.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMDGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/XeVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Linalg/Transforms/WinogradConv2D.cpp
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FlattenMemRefs.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/Quant/IR/TypeParser.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
R mlir/lib/Dialect/SCF/Transforms/IfConditionPropagation.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/SPIRV/Transforms/ConvertToReplicatedConstantCompositePass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/DecorateCompositeTypeLayoutPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVWebGPUTransforms.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaConvertIntegerTypeToSignless.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Vector/Transforms/LowerVectorFromElements.cpp
A mlir/lib/Dialect/Vector/Transforms/LowerVectorShuffle.cpp
R mlir/lib/Dialect/Vector/Transforms/LowerVectorToElements.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
A mlir/lib/Dialect/XeGPU/Transforms/XeGPUVectorLinearize.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Tools/PDLL/ODS/Context.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/IRDLOps.td
A mlir/python/mlir/dialects/irdl.py
M mlir/test/Conversion/ArithToAMDGPU/scaling-extf.mlir
M mlir/test/Conversion/ArithToAMDGPU/scaling-truncf.mlir
M mlir/test/Conversion/ComplexToROCDLLibraryCalls/complex-to-rocdl-library-calls.mlir
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
M mlir/test/Conversion/ConvertToSPIRV/vector-unroll.mlir
M mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-khr-coop-matrix.mlir
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
A mlir/test/Conversion/VectorToXeGPU/gather-to-xegpu.mlir
A mlir/test/Conversion/VectorToXeGPU/scatter-to-xegpu.mlir
M mlir/test/Dialect/AMDGPU/canonicalize.mlir
A mlir/test/Dialect/Complex/powi-simplify.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/LLVMIR/xevm.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/OpenACC/invalid.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/for-loop-peeling.mlir
R mlir/test/Dialect/SCF/if-cond-prop.mlir
A mlir/test/Dialect/SCF/trip_count.mlir
M mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/Vector/flatten-memref-and-emulate-narrow-types.mlir
A mlir/test/Dialect/Vector/vector-shuffle-lowering.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
A mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
M mlir/test/IR/invalid.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
A mlir/test/Target/LLVMIR/nvvm/clusterlaunchcontrol.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
A mlir/test/Target/LLVMIR/openmp-target-default-as.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Target/SPIRV/arithmetic-ops.mlir
M mlir/test/Target/SPIRV/array-two-step-roundtrip.mlir
M mlir/test/Target/SPIRV/array.mlir
M mlir/test/Target/SPIRV/atomic-ops.mlir
M mlir/test/Target/SPIRV/barrier-ops.mlir
M mlir/test/Target/SPIRV/bit-ops.mlir
M mlir/test/Target/SPIRV/cast-ops.mlir
M mlir/test/Target/SPIRV/composite-op.mlir
M mlir/test/Target/SPIRV/entry-point.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/Target/SPIRV/group-ops.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
M mlir/test/Target/SPIRV/image.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/khr-cooperative-matrix-ops.mlir
M mlir/test/Target/SPIRV/logical-ops.mlir
M mlir/test/Target/SPIRV/matrix.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/Target/SPIRV/mesh-ops.mlir
M mlir/test/Target/SPIRV/module.mlir
M mlir/test/Target/SPIRV/non-uniform-ops.mlir
M mlir/test/Target/SPIRV/ocl-ops.mlir
M mlir/test/Target/SPIRV/physical-storage-buffer.mlir
M mlir/test/Target/SPIRV/primitive-ops.mlir
M mlir/test/Target/SPIRV/sampled-image.mlir
M mlir/test/Target/SPIRV/spec-constant.mlir
M mlir/test/Target/SPIRV/tensorARM.mlir
M mlir/test/Target/SPIRV/terminator.mlir
M mlir/test/Target/SPIRV/undef.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgRankReduceContractionOps.cpp
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/test/python/CMakeLists.txt
A mlir/test/python/dialects/irdl.py
M mlir/test/python/dialects/python_test.py
M mlir/test/python/python_test_ops.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
M offload/liboffload/API/Program.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/PluginManager.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/JIT.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/JIT.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/test/offloading/force-usm.cpp
A offload/test/offloading/fortran/do-concurrent-to-omp-saxpy-2d.f90
A offload/test/offloading/fortran/do-concurrent-to-omp-saxpy.f90
A offload/test/offloading/fortran/target-declare-mapper-allocatable.f90
M offload/tools/deviceinfo/llvm-offload-device-info.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Fixtures.hpp
A offload/unittests/OffloadAPI/program/olIsValidBinary.cpp
M openmp/CMakeLists.txt
M openmp/device/include/State.h
M openmp/device/src/Misc.cpp
M openmp/device/src/Synchronization.cpp
M openmp/docs/SupportAndFAQ.rst
M openmp/tools/omptest/src/OmptAssertEvent.cpp
M runtimes/CMakeLists.txt
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/0c5c9e9092dc...7d09d7208ef6
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