[all-commits] [llvm/llvm-project] b28d2e: [CIR] Implement Logical AND for VectorType (#158696)

[Amr Hesham via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b28d2ea432ab9ce04225874d893769be109be5c3
      https://github.com/llvm/llvm-project/commit/b28d2ea432ab9ce04225874d893769be109be5c3
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2025-09-19 (Fri, 19 Sep 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
    M clang/test/CIR/CodeGen/vector-ext.cpp
    M clang/test/CIR/CodeGen/vector.cpp

  Log Message:
  -----------
  [CIR] Implement Logical AND for VectorType (#158696)

This change adds support for local AND op for VectorType

Issue https://github.com/llvm/llvm-project/issues/136487



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