[all-commits] [llvm/llvm-project] 01b4b2: [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns...

[Fabian Ritter via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 01b4b2a5b88c4b93d635a5049fa85e569b405982
      https://github.com/llvm/llvm-project/commit/01b4b2a5b88c4b93d635a5049fa85e569b405982
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-09-18 (Thu, 18 Sep 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll

  Log Message:
  -----------
  [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (#143881)

This patch mirrors similar patterns for ISD::ADD. The main difference is
that ISD::ADD is commutative, so that a pattern definition for, e.g.,
(add (mul x, y), z), automatically also handles (add z, (mul x, y)).
ISD::PTRADD is not commutative, so we would need to handle these cases
explicitly. This patch only implements (ptradd z, (op x, y)) patterns,
where the nested operation (shift or multiply) is the offset of the
ptradd (i.e., the right operand), since base pointers that are the
result of a shift or multiply seem less likely.

For SWDEV-516125.



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