[all-commits] [llvm/llvm-project] 9be83e: AMDGPU: Select VGPR MFMAs by default

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/select-vgpr-mfma-by-default
  Home:   https://github.com/llvm/llvm-project
  Commit: 9be83ee93251a08500b826cb87555692b8886dd7
      https://github.com/llvm/llvm-project/commit/9be83ee93251a08500b826cb87555692b8886dd7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-18 (Thu, 18 Sep 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx942.mir
    M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
    M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
    M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.simple.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
    M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
    M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
    M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
    M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
    M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll

  Log Message:
  -----------
  AMDGPU: Select VGPR MFMAs by default

AGPRs are undesirable since they are only usable by a
handful instructions like loads, stores and mfmas and everything
else requires copies to/from VGPRs. Using the AGPR form should be
a measure of last resort if we must use more than 256 VGPRs.



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