[all-commits] [llvm/llvm-project] 4bac9d: [RISCV] Add isel for bitcasting between bfloat and...

Ying Wang via All-commits all-commits at lists.llvm.org
Wed Sep 17 12:11:08 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4bac9d4911a14c5d444f8a6b94c449e5a2c4a332
      https://github.com/llvm/llvm-project/commit/4bac9d4911a14c5d444f8a6b94c449e5a2c4a332
  Author: Ying Wang <yingwang1555 at linux.alibaba.com>
  Date:   2025-09-17 (Wed, 17 Sep 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
    A llvm/test/CodeGen/RISCV/bfloat-convert-half.ll

  Log Message:
  -----------
  [RISCV] Add isel for bitcasting between bfloat and half types (#158828)

There is no RISCV isel for bitcast between f16 and bf16 which will
trigger "cannot select" fatal error.

Co-authored-by: Ying Wang <wy446777 at alibaba-inc.com>



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