[all-commits] [llvm/llvm-project] 71c128: [Mips] Fix inst `sc` disassemble assert when confi...

[yingopq via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 71c128232b994d1470f5cc2bae7049d68b5b5635
      https://github.com/llvm/llvm-project/commit/71c128232b994d1470f5cc2bae7049d68b5b5635
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2025-09-16 (Tue, 16 Sep 2025)

  Changed paths:
    M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
    A llvm/test/MC/Disassembler/Mips/mips64/sc-ptr64.txt

  Log Message:
  -----------
  [Mips] Fix inst `sc` disassemble assert when configured -mattr=+ptr64 (#158253)

When mips disassembler process `DecodeMem`, does not consider
Mips::SC64, leading to `Operands.size() = 3`.
And the right `Size` value is 4, when printMemOperand would occur
asserts: `assert(idx < size());`

Fix #157508.



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