[all-commits] [llvm/llvm-project] 95fc94: [lit] Remove Python 2 string support (#157979)
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Fri Sep 12 09:53:41 PDT 2025
Branch: refs/heads/users/boomanaiden154/main.clang-port-ulimit-tests-to-work-with-internal-shell
Home: https://github.com/llvm/llvm-project
Commit: 95fc948c0a07953ae9d0973854336e197e36d349
https://github.com/llvm/llvm-project/commit/95fc948c0a07953ae9d0973854336e197e36d349
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/lit/lit/util.py
Log Message:
-----------
[lit] Remove Python 2 string support (#157979)
There are some code paths within lit that still check what string types
are supported with the aim of being compatible with Python 2 and 3.
Given LLVM's minimum Python version is 3.8 and we do not have any
upstream testing for Python 2, I think we can safely drop this.
Commit: 188901d6cab1d717eb8d114e76d9033c204a84e6
https://github.com/llvm/llvm-project/commit/188901d6cab1d717eb8d114e76d9033c204a84e6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
A llvm/test/CodeGen/AMDGPU/stack-passed-subdword-arg-crash-issue157997.ll
Log Message:
-----------
AMDGPU: Fix returning wrong type for stack passed sub-dword arguments (#158002)
Fixes assertion with -debug-only=isel on LowerFormalArguments result.
That assert really shouldn't be under LLVM_DEBUG.
Fixes #157997
Commit: af82c1a67b3a1dfc05b6149e68caa30103c15ce8
https://github.com/llvm/llvm-project/commit/af82c1a67b3a1dfc05b6149e68caa30103c15ce8
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Remove an unused variable (NFC)
/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp:3416:9:
error: unused variable 'ValVT' [-Werror,-Wunused-variable]
EVT ValVT = VA.getValVT();
^
1 error generated.
Commit: 2508851798d727517f60d8b5a76c3001cabb7c59
https://github.com/llvm/llvm-project/commit/2508851798d727517f60d8b5a76c3001cabb7c59
Author: benwu25 <soggysocks206 at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
A llvm/test/Transforms/InstCombine/min-zext.ll
Log Message:
-----------
[InstCombine] Fold `min(X+1, Y) - min(X, Y) --> zext X < Y` (#157782)
This PR closes #157524.
alive2: https://alive2.llvm.org/ce/z/xe_vb2
godbolt: https://alive2.llvm.org/ce/z/7A8PxK
This fold is invalid for `@llvm.smin.i1` since `smin(-1, 0) == -1`. I
also avoided i1 in general since this uses zext, but it seems like those
checks for width might not be necessary, since other folds get to it
first.
The alive2 proof in #157524 used a select for the fold, but it seems
like `select X < Y, 1, 0` should be canonicalized to `zext X < Y` if the
bit width is correct.
Commit: 5621fa1c1ee210e24070b58ba9fa9e1c8fe5c132
https://github.com/llvm/llvm-project/commit/5621fa1c1ee210e24070b58ba9fa9e1c8fe5c132
Author: lntue <lntue at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/type_traits/is_destructible.h
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/endian_internal.h
M libc/src/__support/macros/config.h
M libc/src/__support/math_extras.h
Log Message:
-----------
[libc] Some more MSVC compatibility in src/__support. (#158108)
Commit: 30010f49ca4de03762a31202c82e9c763d4a8822
https://github.com/llvm/llvm-project/commit/30010f49ca4de03762a31202c82e9c763d4a8822
Author: Tony Varghese <tonypalampalliyil at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-eqv.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-nand.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-nor.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-not-b.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-not-c.ll
Log Message:
-----------
[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary(A, X, eqv(B,C)), ternary(A, X, not(C)), ternary(A, X, not(B)), ternary(A, X, nand(B,C)) and ternary(A, X, nor(B,C)) patterns (#158091)
Pre-commit test case for exploitation of `xxsel` for ternary operations
of the pattern. This adds support for v4i32, v2i64, v16i8 and v8i16
operand types for the following patterns.
The following are the patterns involved in the change:
```
ternary(A, and(B,C), nor(B,C))
ternary(A, B, nor(B,C))
ternary(A, C, nor(B,C))
ternary(A, xor(B,C), nor(B,C))
ternary(A, not(C), nor(B,C))
ternary(A, not(B), nor(B,C))
ternary(A, nand(B,C), nor(B,C))
ternary(A, or(B,C), eqv(B,C))
ternary(A, nor(B,C), eqv(B,C))
ternary(A, not(C), eqv(B,C))
ternary(A, nand(B,C), eqv(B,C))
ternary(A, and(B,C), not(C))
ternary(A, B, not(C))
ternary(A, xor(B,C), not(C))
ternary(A, or(B,C), not(C))
ternary(A, not(B), not(C))
ternary(A, nand(B,C), not(C))
ternary(A, and(B,C), not(B))
ternary(A, xor(B,C), not(B))
ternary(A, or(B,C), not(B))
ternary(A, nand(B,C), not(B))
ternary(A, B, nand(B,C))
ternary(A, C, nand(B,C))
ternary(A, xor(B,C), nand(B,C))
ternary(A, or(B,C), nand(B,C))
ternary(A, eqv(B,C), nand(B,C))
```
Exploitation of `xxeval` for the above patterns to be added as a follow
up.
Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
Commit: 092de9bb90cbcee445b31e504a4c2a09ecf09714
https://github.com/llvm/llvm-project/commit/092de9bb90cbcee445b31e504a4c2a09ecf09714
Author: Vedant Paranjape <vedantparanjape160201 at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
A llvm/test/Transforms/InstCombine/fold-fadd-with-zero-gh154238.ll
Log Message:
-----------
[InstCombine] Enable FAdd simplifications when user can ignore sign bit (#157757)
When FAdd result is used by fabs, we can safely ignore the sign bit of
fp zero. This patch enables an instruction simplification optimization
that folds fadd x, 0 ==> x, which would otherwise not work as the
compiler cannot prove that the zero isn't -0. But if the result of the
fadd is used by fabs we can simply ignore this and still do the
optimization.
Fixes #154238
Commit: d5aa5e33e6fd7c0d4035be5e7877f275b3205a36
https://github.com/llvm/llvm-project/commit/d5aa5e33e6fd7c0d4035be5e7877f275b3205a36
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M libc/test/IntegrationTest/test.h
M libc/test/integration/src/pthread/pthread_create_test.cpp
M libc/test/integration/src/pthread/pthread_join_test.cpp
M libc/test/integration/src/pthread/pthread_name_test.cpp
M libc/test/integration/src/unistd/getcwd_test.cpp
M libc/test/integration/startup/linux/tls_test.cpp
Log Message:
-----------
[libc] Update errno usage in integration tests. (#158147)
Instead of using libc_errno directly, include <errno.h> and use regular
"errno" in the code. (to verify that errno-as-an-interface works
properly).
This is the recipe prescribed in the libc/src/__support/libc_errno.h
header - let's actually follow it in the integration tests.
Commit: aef2f41f3fdc12d40db244e61fbe812db5612dda
https://github.com/llvm/llvm-project/commit/aef2f41f3fdc12d40db244e61fbe812db5612dda
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/altera/StructPackAlignCheck.cpp
M clang-tools-extra/clang-tidy/altera/UnrollLoopsCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Enable `performance-type-promotion-in-math-fn` check in the codebase (#158186)
Closes #156155.
Commit: fefe670be067cd698a71ab8dcd6a92803e2192ef
https://github.com/llvm/llvm-project/commit/fefe670be067cd698a71ab8dcd6a92803e2192ef
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/Modules/lambda-merge.cpp
Log Message:
-----------
[clang][bytecode] Compile the definition, not the most recent decl (#158093)
Commit: df2a7a9ec9afbcc2d1ab87cdcb55059fc2a0aaa8
https://github.com/llvm/llvm-project/commit/df2a7a9ec9afbcc2d1ab87cdcb55059fc2a0aaa8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/IndexedMap.h
M llvm/include/llvm/ADT/SparseMultiSet.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/ADT/identity.h
Log Message:
-----------
[ADT] clang-format several files (NFC)
I'm planning to modify these files.
Commit: 13daa1e6efdbdc322265fda7ad8f5b265d2ab4aa
https://github.com/llvm/llvm-project/commit/13daa1e6efdbdc322265fda7ad8f5b265d2ab4aa
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
Log Message:
-----------
[lldb-dap] Add `debugAdapterEnv` for `attach` requests & improve regex (#157980)
# Changes
#153536 added a new debug configuration field called `debugAdapterEnv`
and enabled it in `launch.json` **for `launch` requests**. This patch
enables the same for **`attach` requests**.
This patch also improves the regex used in this field, i.e. shortens it
and fixes the double backslashes (`\\`) in `debug-adapter-factory.ts`
(note: the ones in `package.json` need the double backslashes).
# Test
Manually tested the following values in `attach` requests (so that we
are testing both changes at the same time):
```
// Accepted
"debugAdapterEnv": [
"AAA=BBB",
],
"debugAdapterEnv": [
"AAA=",
],
"debugAdapterEnv": [
"AAA",
],
// Rejected
"debugAdapterEnv": [
"=AAA",
],
"debugAdapterEnv": [
"=",
],
"debugAdapterEnv": [
"",
],
```
Commit: 586c0ad918aa3e725224246260b458b4b90615c2
https://github.com/llvm/llvm-project/commit/586c0ad918aa3e725224246260b458b4b90615c2
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISD.def
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
A llvm/test/CodeGen/WebAssembly/partial-reduce-accumulate.ll
Log Message:
-----------
[WebAssembly] Support partial-reduce accumulator (#158060)
We currently only support partial.reduce.add in the case where we are
performing a multiply-accumulate. Now add support for any partial
reduction where the input is being extended, where we can take advantage
of extadd_pairwise.
Commit: 73cfd45e3401b18730e283b8a13e21fb85de3a38
https://github.com/llvm/llvm-project/commit/73cfd45e3401b18730e283b8a13e21fb85de3a38
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Lexer/cxx-features.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Set the FTM for trivial relocation (#142936)
The language of side seems fairly stable.
Setting the feature test macro will ease implementation in standard
libraries.
Commit: 4bb250d6a3d63c41f5d539c9b9a162070ea5b619
https://github.com/llvm/llvm-project/commit/4bb250d6a3d63c41f5d539c9b9a162070ea5b619
Author: Luke Lau <luke at igalia.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
A llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
Log Message:
-----------
[VPlan] Always consider register pressure on RISC-V (#156951)
Stacked on #156923
In https://godbolt.org/z/8svWaredK, we spill a lot on RISC-V because
whilst the largest element type is i8, we generate a bunch of pointer
vectors for gathers and scatters. This means the VF chosen is quite high
e.g. <vscale x 16 x i8>, but we end up using a bunch of <vscale x 16 x
i64> m8 registers for the pointers.
This was briefly fixed by #132190 where we computed register pressure in
VPlan and used it to prune VFs that were likely to spill. The legacy
cost model wasn't able to do this pruning because it didn't have
visibility into the pointer vectors that were needed for the
gathers/scatters.
However VF pruning was restricted again to just the case when max
bandwidth was enabled in #141736 to avoid an AArch64 regression, and
restricted again in #149056 to only prune VFs that had max bandwidth
enabled.
On RISC-V we take advantage of register grouping for performance and
choose a default of LMUL 2, which means there are 16 registers to work
with – half the number as SVE, so we encounter higher register pressure
more frequently.
As such, we likely want to always consider pruning VFs with high
register pressure and not just the VFs from max bandwidth.
This adds a TTI hook to opt into this behaviour for RISC-V which fixes
the motivating godbolt example above. When last checked this
significantly reduces the number of spills on SPEC CPU 2017, up to
80% on 538.imagick_r.
Commit: 76aba5d415fbf206e0d9443a5822fcd9244fa33f
https://github.com/llvm/llvm-project/commit/76aba5d415fbf206e0d9443a5822fcd9244fa33f
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
Log Message:
-----------
[MC] Add parseSymbol() helper (NFC) (#158106)
This combines parseIdentifier() + getOrCreateSymbol(). This should make
it a bit easier if we want to change the parseIdentifier() API.
Commit: 3a2c8f7af8b38dd17649a42fc1f291d47f6e175d
https://github.com/llvm/llvm-project/commit/3a2c8f7af8b38dd17649a42fc1f291d47f6e175d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/machine-combiner.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
Log Message:
-----------
[RISCV] Move MachineCombiner to addILPOpts() (#158071)
So that it runs before `MachineCSE` and other passes.
Fixes https://github.com/llvm/llvm-project/issues/158063.
Commit: 152d0f5c0c0eaea369bf534b673d7625700ca7ef
https://github.com/llvm/llvm-project/commit/152d0f5c0c0eaea369bf534b673d7625700ca7ef
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Endian.h
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/unittests/Support/EndianTest.cpp
Log Message:
-----------
[Support] Deprecate one form of support::endian::write (NFC) (#156140)
We have two forms of write:
template <typename value_type, std::size_t alignment = unaligned>
inline void write(void *memory, value_type value, endianness endian)
template <typename value_type, endianness endian, std::size_t alignment>
inline void write(void *memory, value_type value)
The difference is that endian is a function parameter in the former
but a template parameter in the latter.
This patch streamlines the code by migrating the use of the latter to
the former while deprecating the latter.
I'm planning to do the same for byte_swap and read in follow-up
patches to keep this patch simple and small.
Commit: a7521a81c4b7aa135086488a566eab2dbc6b1326
https://github.com/llvm/llvm-project/commit/a7521a81c4b7aa135086488a566eab2dbc6b1326
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/zibi-invalid.s
A llvm/test/MC/RISCV/zibi-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add MC support of Zibi experimental extension (#127463)
This adds the MC support of Zibi v0.1 experimental extension.
References:
*
https://lf-riscv.atlassian.net/wiki/spaces/USXX/pages/599261201/Branch+with+Immediate+Zibi+Ratification+Plan
* https://lf-riscv.atlassian.net/browse/RVS-3828
* https://github.com/riscv/zibi/releases/tag/v0.1.0
Commit: d7b7b9cd6d12a8cbc35fba4ecfd0a557011e9cdd
https://github.com/llvm/llvm-project/commit/d7b7b9cd6d12a8cbc35fba4ecfd0a557011e9cdd
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
Revert "[compiler-rt][test] Use packaging.version.Version to compare glibc versions" (#158230)
Reverts llvm/llvm-project#142596
Got reports that some tests previously skipped are running again and
failing.
Commit: 59102db770183835f549c58ad6954f39a407fe5e
https://github.com/llvm/llvm-project/commit/59102db770183835f549c58ad6954f39a407fe5e
Author: kper <kevin.per at protonmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc-lshr.ll
Log Message:
-----------
[InstCombine] Added optimisation for trunc (Negated Pow2 >> x) to i1 (#157998)
Follow up of https://github.com/llvm/llvm-project/pull/157030
```
trunc ( lshr i8 C1, V1) to i1 -> icmp ugt V1, cttz(C1) - 1 iff (C1) is negative power of 2
trunc ( ashr i8 C1, V1) to i1 -> icmp ugt V1, cttz(C1) - 1 iff (C1) is negative power of 2
```
General proof:
lshr: https://alive2.llvm.org/ce/z/vVfaJc
ashr: https://alive2.llvm.org/ce/z/8aAcgD
Commit: 7982980e078481fb1c52360691206f10160b1e5a
https://github.com/llvm/llvm-project/commit/7982980e078481fb1c52360691206f10160b1e5a
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
Log Message:
-----------
[AMDGPUPromoteAlloca][NFC] Avoid unnecessary APInt/int64_t conversions (#157864)
Follow-up to #157682
Commit: 5374f16270f02fdbedbbba96951a8b9ffd9c482f
https://github.com/llvm/llvm-project/commit/5374f16270f02fdbedbbba96951a8b9ffd9c482f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libcxx/utils/ci/Dockerfile
Log Message:
-----------
[libcxx][ci][NFC] Remove commented install line and disutils reference (#158015)
76667c768e6403e71718340a946e6f2f356bf745 added distutils because "spawn"
was used, which I then removed in
268a4b0a451432833d3b398c7182d133c865dff5.
I removed it as part of removing all uses of distutils in llvm-project,
tracked in #54337. Python has removed distutils in its latest versions.
Distutils was not being installed in the docker image but just mentioned
in a commented out line. I think this line was leftover from when it was
reformated into the multi-line command above.
So I'm removing the whole line and relocating the comments a bit.
Commit: 220d705d2189d2ce5b993fcd1eabccf7e30efefb
https://github.com/llvm/llvm-project/commit/220d705d2189d2ce5b993fcd1eabccf7e30efefb
Author: Andy MacGregor <amacgregor.1776 at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/Format.cpp
A clang/lib/Format/NumericLiteralCaseFixer.cpp
A clang/lib/Format/NumericLiteralCaseFixer.h
M clang/unittests/Format/CMakeLists.txt
A clang/unittests/Format/NumericLiteralCaseTest.cpp
Log Message:
-----------
[clang-format] Add an option to format numeric literal case (#151590)
Some languages have the flexibility to use upper or lower case
characters interchangeably in integer and float literal definitions.
I'd like to be able to enforce a consistent case style in one of my
projects, so I added this clang-format style option to control it.
With this .clang-format configuration:
```yaml
NumericLiteralCaseStyle:
UpperCasePrefix: Never
UpperCaseHexDigit: Always
UpperCaseSuffix: Never
```
This line of code:
```C
unsigned long long 0XdEaDbEeFUll;
```
gets reformatted into this line of code:
```C
unsigned long long 0xDEAFBEEFull;
```
-----
I'm new to this project, so please let me know if I missed something in
the process. I modeled this PR from
[IntegerLiteralSeparatorFixer](https://reviews.llvm.org/D140543)
Commit: 5539daf8120cfe20c0c36d115319e14077e5fa79
https://github.com/llvm/llvm-project/commit/5539daf8120cfe20c0c36d115319e14077e5fa79
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/test/CodeGen/Thumb2/bti-indirect-branches.ll
Log Message:
-----------
[ARM] Make test more robust (NFC)
Make sure this doesn't optimize down to something simpler.
Commit: 4d24407e7d0ae66a8fef29f2100706d85706ae10
https://github.com/llvm/llvm-project/commit/4d24407e7d0ae66a8fef29f2100706d85706ae10
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libcxx/include/__cxx03/fstream
M libcxx/include/__cxx03/ios
M libcxx/include/__cxx03/sstream
M libcxx/include/__cxx03/string
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/default.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/pointer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/string.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/default.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/pointer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/string.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/default.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/pointer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/string.pass.cpp
M libcxx/test/std/input.output/iostreams.base/ios/basic.ios.members/copyfmt.pass.cpp
M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/default.pass.cpp
M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp
M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.pass.cpp
M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/default.pass.cpp
M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp
M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.pass.cpp
M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/default.pass.cpp
M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/move.pass.cpp
M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.pass.cpp
Log Message:
-----------
[libc++][C++03] cherry-pick #101889 (#157881)
Commit: 1b05212acc1964837135930a129ee26e1a392278
https://github.com/llvm/llvm-project/commit/1b05212acc1964837135930a129ee26e1a392278
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/utils/lit/lit/DiffUpdater.py
Log Message:
-----------
[Utils] fix diff_test_updater on Windows (#158235)
Commit: fae68b6c77058dd10d7c6780181ff312e46f0689
https://github.com/llvm/llvm-project/commit/fae68b6c77058dd10d7c6780181ff312e46f0689
Author: Georgiy Samoylov <g.samoylov at syntacore.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/test/DebugInfo/RISCV/dw_op_entry_value_32bit.ll
A llvm/test/DebugInfo/RISCV/dw_op_entry_value_64bit.ll
Log Message:
-----------
[RISCV] Enabled debug entry support by default (#157703)
This patch enables support for debug entry values. This improves quality
of debug info for RISC-V
Commit: 4884d6cbce99286e349e239c1c1103b9f3820b56
https://github.com/llvm/llvm-project/commit/4884d6cbce99286e349e239c1c1103b9f3820b56
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libcxx/include/__type_traits/desugars_to.h
M libcxx/include/__utility/default_three_way_comparator.h
M libcxx/include/__utility/lazy_synth_three_way_comparator.h
M libcxx/include/string
A libcxx/test/libcxx/utilities/utility/has_default_three_way.compile.pass.cpp
Log Message:
-----------
[libc++] Extend __default_three_way_comparator to any types that only implements operator<=> (#157602)
This uses the new `__builtin_lt_synthesises_from_spaceship` builtin from
clang to use three way comparison for arbitrary user-defined types that
only provide a spaceship operator.
Commit: baec6c55c1ddb226aa50f1663d9a4d61f44e1665
https://github.com/llvm/llvm-project/commit/baec6c55c1ddb226aa50f1663d9a4d61f44e1665
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/test/Analysis/ctu-import-type-decl-definition.c
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] Fixed test 'ctu-import-type-decl-definition' and ASTImporter (#158016)
The test was faulty and did not reproduce the error in ASTImporter. The
previous fix #156056 for the crash was not correct, this is fixed here.
Commit: 9e1d656c682cd0bf6f123fba2064ffdb8861f790
https://github.com/llvm/llvm-project/commit/9e1d656c682cd0bf6f123fba2064ffdb8861f790
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
Log Message:
-----------
AMDGPU: Remove MIMG special case in adjustAllocatableRegClass (#158184)
I have no idea why this was here. MIMG atomics use tied operands
for the input and output, so AV classes should have always worked.
We have poor test coverage for AGPRs with atomics, so add a partial
set. Everything seems to work OK, although it seems image cmpswap
always uses VGPRs unnecessarily.
Commit: 1bafd020c7c80be476f211bc239ce43424f7e0ce
https://github.com/llvm/llvm-project/commit/1bafd020c7c80be476f211bc239ce43424f7e0ce
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Mark __{emplace,push}_back_slow_path as noinline (#94379)
These are almost certainly intended to not be inlined. This
significantly reduces code size when `push_back` and `emplace_back` are
used heavily.
Fixes #94360
Commit: 381e1bb461564b829f7fa558801c317a619b32de
https://github.com/llvm/llvm-project/commit/381e1bb461564b829f7fa558801c317a619b32de
Author: Haibo Jiang <jianghaibo9 at huawei.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/MCPlusBuilder.cpp
A bolt/test/AArch64/print-mem-data.test
Log Message:
-----------
[BOLT] fix print-mem-data not working (#156332)
This option `print-mem-data` is currently not working, use this fix to
restore its functionality.
Commit: 47b490b4dcda4ac5d4adae88a7c90ffac8068312
https://github.com/llvm/llvm-project/commit/47b490b4dcda4ac5d4adae88a7c90ffac8068312
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
Log Message:
-----------
[AArch64][SME] Refactor MachineSMEABI pass state (NFCI) (#156674)
This removes the pass state (aside from target classes) from the
MachineSMEABI class, and instead passes/returns state between functions.
The intention is to make dataflow (and where state is mutated) more
apparent.
Commit: 2331fbb01978463a218d80883d29a003fdef6e14
https://github.com/llvm/llvm-project/commit/2331fbb01978463a218d80883d29a003fdef6e14
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
M llvm/lib/Target/ARM/ThumbRegisterInfo.h
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.h
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.h
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.h
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.h
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
M llvm/lib/Target/Sparc/SparcRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VERegisterInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
Log Message:
-----------
CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185)
getPointerRegClass is a layering violation. Its primary purpose
is to determine how to interpret an MCInstrDesc's operands RegClass
fields. This should be context free, and only depend on the subtarget.
The model of this is also wrong, since this should be an
instruction / operand specific property, not a global pointer class.
Remove the the function argument to help stage removal of this hook
and avoid introducing any new obstacles to replacing it.
The remaining uses of the function were to get the subtarget, which
TargetRegisterInfo already belongs to. A few targets needed new
subtarget derived properties copied there.
Commit: ccaeebcd04de4aa908c7101375e5834087cec330
https://github.com/llvm/llvm-project/commit/ccaeebcd04de4aa908c7101375e5834087cec330
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_cnt.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface-remarks.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/Transforms/InstCombine/AArch64/sme-intrinsic-opts-counting-elems.ll
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSME/Utils/Utils.h
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Dialect/ArmSME/IR/Utils.cpp
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Target/LLVMIR/arm-sme-invalid.mlir
M mlir/test/Target/LLVMIR/arm-sme.mlir
Log Message:
-----------
[AArch64][SME] Improve codegen for aarch64.sme.cnts* when not in streaming mode (#154761)
Builtins for reading the streaming vector length are canonicalised to
use the aarch64.sme.cntsd intrinisic and a multiply, i.e.
- cntsb -> cntsd * 8
- cntsh -> cntsd * 4
- cntsw -> cntsd * 2
This patch also removes the LLVM intrinsics for cnts[b,h,w], and adds
patterns to improve codegen when cntsd is multiplied by a constant.
Commit: 4b03252ad6a31db0cfacf75330f41eafe2f027a6
https://github.com/llvm/llvm-project/commit/4b03252ad6a31db0cfacf75330f41eafe2f027a6
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[NFC][AMDGPU][SIMemoryLegalizer] remove effectively empty function (#156806)
The removed function SIGfx90ACacheControl::enableLoadCacheBypass() does
not actually do anything except one assert and one unreachable.
Commit: 3b48c64d0822dfaee98ab85a9299d03f50490f8e
https://github.com/llvm/llvm-project/commit/3b48c64d0822dfaee98ab85a9299d03f50490f8e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
AMDGPU: Move spill pseudo special case out of adjustAllocatableRegClass (#158246)
This is special for the same reason av_mov_b64_imm_pseudo is special.
Commit: 14ae5f32f70f965df822de18ca93521ffb820079
https://github.com/llvm/llvm-project/commit/14ae5f32f70f965df822de18ca93521ffb820079
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M lldb/source/Utility/Scalar.cpp
M lldb/unittests/Utility/ScalarTest.cpp
Log Message:
-----------
[lldb] Allow division by floating point zero in Scalar (#158115)
`Scalar` produced an invalid value when detecting any division by zero.
This should be only for integer division.
Commit: 1f49c9494e9a12396a94f36e7e7507304bc83c0e
https://github.com/llvm/llvm-project/commit/1f49c9494e9a12396a94f36e7e7507304bc83c0e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
A llvm/test/Transforms/InstSimplify/get_active_lane_mask.ll
Log Message:
-----------
[InstSimplify] Simplify get.active.lane.mask when 2nd arg is zero (#158018)
When the second argument passed to the get.active.lane.mask intrinsic is
zero we can simplify the instruction to return an all-false mask
regardless of the first operand.
Commit: 0d65856584dffafbc417919d8fcb8ad66f9fbf8a
https://github.com/llvm/llvm-project/commit/0d65856584dffafbc417919d8fcb8ad66f9fbf8a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libclc/utils/CMakeLists.txt
M libclc/utils/prepare-builtins.cpp
Log Message:
-----------
libclc: Remove HAVE_LLVM version macros (#158257)
This doesn't need to pretend to support multiple versions of llvm
and these are old anyway.
Commit: 77596b78e5664fff8d272599c0420fc9b87e2c2d
https://github.com/llvm/llvm-project/commit/77596b78e5664fff8d272599c0420fc9b87e2c2d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
A mlir/test/Dialect/Vector/td/xfer-drop-unit-dims.mlir
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Add a new TD op to wrap unit-dim collapsing patterns (#157507)
Adds a new TD Op,
* `apply_patterns.vector.drop_inner_most_unit_dims_from_xfer_ops`,
which wraps the following Vector patterns:
* `DropInnerMostUnitDimsTransferRead`
* `DropInnerMostUnitDimsTransferWrite`
This complements other existing unit-dimension–related patterns.
To reduce duplication, the
`TestVectorTransferCollapseInnerMostContiguousDims`
pass has been removed. That pass was only used for testing, and its
functionality is now covered by the newly added TD Op.
Commit: 8457e68b6b59f8daf5fb747fe3a2f9c48c3c3ba8
https://github.com/llvm/llvm-project/commit/8457e68b6b59f8daf5fb747fe3a2f9c48c3c3ba8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
Log Message:
-----------
Introduce LDBG_OS() macro as a variant of LDBG() (#157194) (#158260)
Also, improve LDBG() to accept debug type and level in any order, and
add unit-tests for LDBG() and LGDB_OS().
LDBG_OS() is a macro that behaves like LDBG() but instead of directly
using it to stream the output, it takes a callback function that will be
called with a raw_ostream.
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: 83b48b13f3a70bf56053e92593270c519859cfd7
https://github.com/llvm/llvm-project/commit/83b48b13f3a70bf56053e92593270c519859cfd7
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
Log Message:
-----------
[lldb][test] Disable more of TestDAP_attach.py on Windows
Flaky on our Windows on Arm bot:
https://lab.llvm.org/buildbot/#/builders/141/builds/11465
See #137660
Commit: 7289f2cd0c371b2539faa628ec0eea58fa61892c
https://github.com/llvm/llvm-project/commit/7289f2cd0c371b2539faa628ec0eea58fa61892c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/MLxExpansionPass.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
Log Message:
-----------
CodeGen: Remove MachineFunction argument from getRegClass (#158188)
This is a low level utility to parse the MCInstrInfo and should
not depend on the state of the function.
Commit: 40d8af816c4a7262b198c6d6459da815c45e87d0
https://github.com/llvm/llvm-project/commit/40d8af816c4a7262b198c6d6459da815c45e87d0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
Log Message:
-----------
Revert "Introduce LDBG_OS() macro as a variant of LDBG() (#157194)" (#158264)
Reverts llvm/llvm-project#158260
second attempt to land this fixed some bots, but left others broken,
need an extra iteration!
Commit: 54fc5367f63cca8e011d93bbd55764b0a7ecbbd5
https://github.com/llvm/llvm-project/commit/54fc5367f63cca8e011d93bbd55764b0a7ecbbd5
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
Log Message:
-----------
[LV] Fix crash in uncountable exit with side effects checking
Fixes an ICE reported on PR #145663, as an assert was found to be
reachable with a specific combination of unreachable blocks.
Commit: b936a7cf990391b5e7d10524619c955ce42d5932
https://github.com/llvm/llvm-project/commit/b936a7cf990391b5e7d10524619c955ce42d5932
Author: Karlo Basioli <k.basioli at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
Fix bazel build failure (introduced in #157507) (#158268)
Commit: 1e10b782ecac29eff6057889d64519666f0d43b2
https://github.com/llvm/llvm-project/commit/1e10b782ecac29eff6057889d64519666f0d43b2
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-whilelo.ll
Log Message:
-----------
[AArch64][InstCombine] Canonicalize whilelo intrinsic (#151553)
InstCombine llvm.aarch64.sve.whilelo to the generic LLVM
llvm.get.active.lane.mask intrinsic
Commit: de8859da5485ab06b7331c37f98aa778cb469e6b
https://github.com/llvm/llvm-project/commit/de8859da5485ab06b7331c37f98aa778cb469e6b
Author: Wenju He <wenju.he at intel.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Create LIBCLC_OUTPUT_LIBRARY_DIR directory before build (#158171)
This fixes `No such file or directory` error when "Unix Makefiles"
generator is used, see https://github.com/intel/llvm/issues/20058.
Ninja generator implicitly creates output directory when generating
libclc libraries, but "Unix Makefiles" generator does not.
Commit: 2832717ecc84a93519aaf9a6558b8ce4e1c40933
https://github.com/llvm/llvm-project/commit/2832717ecc84a93519aaf9a6558b8ce4e1c40933
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
Log Message:
-----------
Introduce LDBG_OS() macro as a variant of LDBG() (#158277)
Also, improve LDBG() to accept debug type and level in any order, and
add unit-tests for LDBG() and LGDB_OS().
LDBG_OS() is a macro that behaves like LDBG() but instead of directly
using it to stream the output, it takes a callback function that will be
called with a raw_ostream.
This is a re-land with workarounds for older gcc and clang versions.
Previous attempts in #157194 and #158260
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: a2a9601ea49afff950f9267b378b30ef799d6ad9
https://github.com/llvm/llvm-project/commit/a2a9601ea49afff950f9267b378b30ef799d6ad9
Author: Gaurav Verma <48321602+xintin at users.noreply.github.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/permlane.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Log Message:
-----------
[mlir][AMDGPU] Updated `PermlaneSwapOp` to select correct val (#157586)
* as per the instruction description, updated `PermlaneSwapOp` to select
correct val
* updated corresponding lit tests
Issue it resolves: the block reduction was failing otherwise as we were
selecting the `{0}` always.
---------
Signed-off-by: xintin <gaurav.verma at amd.com>
Commit: 93a1470a97ec2c57247824ff2a59437831fea6de
https://github.com/llvm/llvm-project/commit/93a1470a97ec2c57247824ff2a59437831fea6de
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Analysis/BasicAA/featuretest.ll
M llvm/test/Transforms/InstCombine/assume-align.ll
Log Message:
-----------
[InstCombine] Remove redundant alignment assumptions. (#123348)
Use known bits to remove redundant alignment assumptions.
Libc++ now adds alignment assumptions for std::vector::begin() and
std::vector::end(), so I expect we will see quite a bit more assumptions
in C++ [1]. Try to clean up some redundant ones to start with.
[1] https://github.com/llvm/llvm-project/pull/108961
PR: https://github.com/llvm/llvm-project/pull/123348
Commit: 45f6c5015892cc0361645319833fffcfe2dafd2f
https://github.com/llvm/llvm-project/commit/45f6c5015892cc0361645319833fffcfe2dafd2f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
R llvm/test/TableGen/FixedLenDecoderEmitter/InitValue.td
A llvm/test/TableGen/FixedLenDecoderEmitter/operand-decoder.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Decode operands with "all zeros" encoding (#158163)
Follow-up to #156358. The original change didn't take into account
operands with "all zeros" encoding, now fixed.
Commit: 61664b61032edf8763f48099636bc7cd35ef622e
https://github.com/llvm/llvm-project/commit/61664b61032edf8763f48099636bc7cd35ef622e
Author: Romaric Jodin <rjodin at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/cmake/modules/CMakeLists.txt
Log Message:
-----------
[clang] fix clang_cmake_builddir (#155844)
When building llvm from a subdirectory (like clspv does)
`CMAKE_BINARY_DIR` is at the top of the build directory.
When building runtimes (libclc for example), the build fails looking for
clang (through `find_package` looking at `LLVM_BINARY_DIR` with
`NO_DEFAULT_PATH` & `NO_CMAKE_FIND_ROOT_PATH`) because clang is not in
`LLVM_BINARY_DIR`.
Fix that issue by setting `clang_cmake_builddir` the same way we set
`llvm_cmake_builddir` from `LLVM_BINARY_DIR`.
For default llvm build (using llvm as the main cmake project), it should
not change anything.
Commit: 5149e51cb25d6a68365ca3bd9300cff1b18213e2
https://github.com/llvm/llvm-project/commit/5149e51cb25d6a68365ca3bd9300cff1b18213e2
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Coarray.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Coarray.cpp
A flang/test/Lower/Coarray/sync_all.f90
A flang/test/Lower/Coarray/sync_images.f90
A flang/test/Lower/Coarray/sync_memory.f90
Log Message:
-----------
[flang][Lower] Add lowering to SYNC ALL, SYNC MEMORY and SYNC IMAGES to PRIF (#154166)
In relation to the approval and merge of the
https://github.com/llvm/llvm-project/pull/76088 specification about
multi-image features in Flang.
Here is a PR on adding support for SYNC ALL, SYNC MEMORY and SYNC IMAGES
in conformance with the PRIF specification.
---------
Co-authored-by: Katherine Rasmussen <krasmussen at lbl.gov>
Commit: 03e3ce82b926a4c138e6e0bacfcd1d5572c3e380
https://github.com/llvm/llvm-project/commit/03e3ce82b926a4c138e6e0bacfcd1d5572c3e380
Author: Matthias Springer <me at m-sp.org>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/ReconcileUnrealizedCasts/reconcile-unrealized-casts.mlir
M mlir/test/Integration/Dialect/MemRef/assume-alignment-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/atomic-rmw-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/store-runtime-verification.mlir
Log Message:
-----------
[mlir][Transforms] Fix crash in `reconcile-unrealized-casts` (#158067)
The `reconcile-unrealized-casts` pass used to crash when the input
contains circular chains of `unrealized_conversion_cast` ops.
Furthermore, the `reconcileUnrealizedCasts` helper functions used to
erase ops that were not passed via the `castOps` operand. Such ops are
now preserved. That's why some integration tests had to be changed.
Also avoid copying the set of all unresolved materializations in
`convertOperations`.
This commit is in preparation of turning `RewriterBase::replaceOp` into
a non-virtual function.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: e8f61801c6237e56b3d69190af7a7acfdcede1e8
https://github.com/llvm/llvm-project/commit/e8f61801c6237e56b3d69190af7a7acfdcede1e8
Author: Christopher Di Bella <cjdb at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M libcxx/include/__split_buffer
M libcxx/include/__vector/vector.h
M libcxx/include/deque
M libcxx/test/libcxx/type_traits/is_replaceable.compile.pass.cpp
M libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M lldb/examples/synthetic/libcxx.py
Log Message:
-----------
[libcxx] adds size-based `__split_buffer` representation to unstable ABI (#139632)
**tl;dr** We can significantly improve the runtime performance of
`std::vector` by changing its representation from three pointers to one
pointer and two integers. This document explains the details of this
change, along with the justifications for making it. See the [RFC] for
more information.
`vector` depends on `__split_buffer` for inserting elements. Changing
`__split_buffer` to match `vector`'s representation simplifies the
model, as it eliminates the need to convert between two different
representations of a contiguous buffer in the same configuration of
libc++.
[RFC]: https://discourse.llvm.org/t/adding-a-size-based-vector-to-libc-s-unstable-abi/86306
---------
Co-authored-by: Jorge Gorbe Moya <jgorbe at google.com>
Commit: 13547a9a777790ea05058e37c63b134e425fc8c2
https://github.com/llvm/llvm-project/commit/13547a9a777790ea05058e37c63b134e425fc8c2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Turn IsStrictlyStructuredBlock into utility function,… (#158111)
… NFC
Commit: cdd54ff927e0207a3e65bade576e3c2511112953
https://github.com/llvm/llvm-project/commit/cdd54ff927e0207a3e65bade576e3c2511112953
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Parser/OpenMP/replayable-clause.f90
A flang/test/Parser/OpenMP/transparent-clause.f90
A flang/test/Semantics/OpenMP/replayable-clause.f90
A flang/test/Semantics/OpenMP/transparent-clause.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Frontend support for REPLAYABLE and TRANSPARENT clauses (#158149)
Parsing and semantic checks.
Commit: b39da343a2cb958016d37081e3fc3b0cfe5cb2ab
https://github.com/llvm/llvm-project/commit/b39da343a2cb958016d37081e3fc3b0cfe5cb2ab
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/ReconcileUnrealizedCasts/reconcile-unrealized-casts.mlir
M mlir/test/Integration/Dialect/MemRef/assume-alignment-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/atomic-rmw-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/store-runtime-verification.mlir
Log Message:
-----------
Revert "[mlir][Transforms] Fix crash in `reconcile-unrealized-casts`" (#158295)
Reverts llvm/llvm-project#158067
Buildbot is broken.
Commit: 1a746b6ca3862165360c48fff5d807d5b400b541
https://github.com/llvm/llvm-project/commit/1a746b6ca3862165360c48fff5d807d5b400b541
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.h
A mlir/test/Target/SPIRV/graph-ops.mlir
Log Message:
-----------
[mlir][spirv] Add support for SPV_ARM_graph extension - part 2 (#156665)
This is the second patch to add support for the `SPV_ARM_graph` SPIR-V
extension to MLIR’s SPIR-V dialect. The extension introduces a new
`Graph` abstraction for expressing dataflow computations over full
resources.
The part 2 implementation includes:
- Serialization and deserialization support for:
- `OpGraphARM`, `OpGraphInputARM`, `OpGraphSetOutputARM`,
`OpGraphEndARM`
- `OpGraphEntryPointARM`, `OpGraphConstantARM`, `OpTypeGraphARM`
- Tests covering binary round-tripping.
Graphs currently support only `SPV_ARM_tensors`, but are designed to
generalize to other resource types, such as images.
Spec: https://github.com/KhronosGroup/SPIRV-Registry/pull/346
RFC:
https://discourse.llvm.org/t/rfc-add-support-for-spv-arm-graph-extension-in-mlir-spir-v-dialect/86947
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 248ad71747e0e0f49876e7d95905219822f400a6
https://github.com/llvm/llvm-project/commit/248ad71747e0e0f49876e7d95905219822f400a6
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/fprcvt-cvtf.ll
Log Message:
-----------
[AArch64] Correct SCVTF/UCVTF instructions for vector input (#152974)
This pull request improves support for scalar floating-point conversions
from integer vectors on AArch64, specifically for the `scvtf` and
`ucvtf` instructions. It fixes pattern matching so that single-element
conversions from vectors now generate the expected scalar instructions
and adds a new test to verify correct behavior for extracting a lane
from a widened vector.
**Pattern matching and code generation improvements:**
* Added new patterns in `AArch64InstrInfo.td` to correctly match
conversions from `v2i32` to `v1f64` using `scvtf` and `ucvtf`, ensuring
the scalar instructions (`scvtf d0, s0` and `ucvtf d0, s0`) are
generated when extracting a single lane.
**Test updates and additions:**
* Updated `scvtf_f64i32_simple` and `ucvtf_f64i32_simple` tests in
`fprcvt-cvtf.ll` to reflect the correct generation of scalar
instructions, removing previous comments about incorrect codegen and
showing the expected output.
* Added a new test `uitofp_sext_v2i32_extract_lane0` to verify correct
code generation when extracting a lane from a widened vector and
converting to double.
Commit: 8036edb21dbedf79687613caef3d40aa5a50ddf2
https://github.com/llvm/llvm-project/commit/8036edb21dbedf79687613caef3d40aa5a50ddf2
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/test/Dialect/SPIRV/IR/target-and-abi.mlir
M mlir/test/Dialect/SPIRV/Transforms/abi-interface.mlir
Log Message:
-----------
[mlir][spirv] Add support for SPV_ARM_graph extension - part 3 (#156845)
This is the third patch to add support for the `SPV_ARM_graph` SPIR-V
extension to MLIR’s SPIR-V dialect. The extension introduces a new
`Graph` abstraction for expressing dataflow computations over full
resources.
The part 3 implementation includes:
- ABI lowering support for graph entry points via
`LowerABIAttributesPass`.
- Tests covering ABI handling.
Graphs currently support only `SPV_ARM_tensors`, but are designed to
generalize to other resource types, such as images.
Spec: https://github.com/KhronosGroup/SPIRV-Registry/pull/346
RFC:
https://discourse.llvm.org/t/rfc-add-support-for-spv-arm-graph-extension-in-mlir-spir-v-dialect/86947
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: acd08993b2ab7e5d64a7932fb5b4630f51eedc72
https://github.com/llvm/llvm-project/commit/acd08993b2ab7e5d64a7932fb5b4630f51eedc72
Author: Abhinav Pappu <53156924+abhinavp5 at users.noreply.github.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/lib/Headers/f16cintrin.h
M clang/test/CodeGen/X86/f16c-builtins.c
Log Message:
-----------
[X86] Add F16C f16 -> f32 constexpr support (#158142)
Fixes #154310
Commit: da82d72a3dd986b90b179fda142114b540243213
https://github.com/llvm/llvm-project/commit/da82d72a3dd986b90b179fda142114b540243213
Author: Matthias Springer <me at m-sp.org>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/ReconcileUnrealizedCasts/reconcile-unrealized-casts.mlir
M mlir/test/Integration/Dialect/MemRef/assume-alignment-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/atomic-rmw-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/store-runtime-verification.mlir
M mlir/test/lib/Pass/TestVulkanRunnerPipeline.cpp
Log Message:
-----------
[mlir][Transforms] Fix crash in `reconcile-unrealized-casts` (#158298)
The `reconcile-unrealized-casts` pass used to crash when the input
contains circular chains of `unrealized_conversion_cast` ops.
Furthermore, the `reconcileUnrealizedCasts` helper functions used to
erase ops that were not passed via the `castOps` operand. Such ops are
now preserved. That's why some integration tests had to be changed.
Also avoid copying the set of all unresolved materializations in
`convertOperations`.
This commit is in preparation of turning `RewriterBase::replaceOp` into
a non-virtual function.
This is a re-upload of #158067, which was reverted due to CI failures.
Note for LLVM integration: If you are seeing tests that are failing with
`error: LLVM Translation failed for operation:
builtin.unrealized_conversion_cast`, you may have to add the
`-reconcile-unrealized-casts` pass to your pass pipeline. (Or switch to
the `-convert-to-llvm` pass instead of combining the various
`-convert-*-to-llvm` passes.)
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 50f539c858aa4d7e71d9b5d5d7da7c30ffaf4bea
https://github.com/llvm/llvm-project/commit/50f539c858aa4d7e71d9b5d5d7da7c30ffaf4bea
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/IR/Remarks.cpp
M mlir/lib/Tools/mlir-opt/CMakeLists.txt
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Pass/remarks.mlir
M mlir/test/lib/Pass/CMakeLists.txt
A mlir/test/lib/Pass/TestRemarksPass.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/unittests/IR/CMakeLists.txt
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
[MLIR] Add remark flags to mlir-opt (#156825)
Commit: 179f01b800e29b38f7d97c043ff331d4f202a12a
https://github.com/llvm/llvm-project/commit/179f01b800e29b38f7d97c043ff331d4f202a12a
Author: Brandon Kirincich <44515121+BrandonKi at users.noreply.github.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/docs/Tutorials/transform/Ch0.md
Log Message:
-----------
Fix MLIR Transform Tutorial Doc (#155285)
Fixes a small issue I noticed while reading through the tutorial.
Commit: 889c289a409eea443cc5eba54d68cc6a3161be07
https://github.com/llvm/llvm-project/commit/889c289a409eea443cc5eba54d68cc6a3161be07
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/branch-fold-threshold.ll
M llvm/test/Transforms/SimplifyCFG/branch-fold.ll
M llvm/test/Transforms/SimplifyCFG/preserve-branchweights.ll
Log Message:
-----------
[SimplfyCFG] Set `MD_prof` for `select` used for certain conditional simplifications (#154426)
There’s a pattern where a branch is conditioned on a conjunction or disjunction that ends up being modeled as a `select` where the first operand is set to `true` or the second to `false`. If the branch has known branch weights, they can be copied to the `select`. This is worth doing in case later the `select` gets transformed to something else (i.e. if we know the profile, we should propagate it).
Issue #147390
Commit: b22a97d9d28ad25ecf7c28c0b11e9bfca52923a5
https://github.com/llvm/llvm-project/commit/b22a97d9d28ad25ecf7c28c0b11e9bfca52923a5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/HashBuilder.h
Log Message:
-----------
[Support] Merge two implementations of addRangeElementsImpl (NFC) (#158212)
This patch uses "constexpr if" to merge two implementations of
addRangeElementsImpl. While the line count does not change much, the
"if" condition should be a lot more readable than in std::enable_if.
Commit: 0d7f66d49cd80c5c688433427c74ae9b32e818f7
https://github.com/llvm/llvm-project/commit/0d7f66d49cd80c5c688433427c74ae9b32e818f7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/lib/Sema/HeuristicResolver.cpp
Log Message:
-----------
[Sema] Use llvm::is_contained instead of llvm::all_of (NFC) (#158213)
The code in question uses llvm::all_of and llvm::identity to see if
every pointer is nonnull:
Ptr1 && Ptr2 && Ptr3 && ...
This patch simplifies the expression by checking for the absence of
nullptr with !llvm::is_contained.
Commit: 43906cb0867383b32781b7647f5b1bec7109ddfe
https://github.com/llvm/llvm-project/commit/43906cb0867383b32781b7647f5b1bec7109ddfe
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/docs/ConvergentOperations.rst
Log Message:
-----------
[llvm] Proofread ConvergentOperations.rst (#158214)
Commit: b0cb4e17e6ee362bbd8311adf2da7f3acb625fee
https://github.com/llvm/llvm-project/commit/b0cb4e17e6ee362bbd8311adf2da7f3acb625fee
Author: dyung <douglas.yung at sony.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/utils/lit/tests/diff-test-update.py
Log Message:
-----------
Fix test on Windows by telling diff to ignore Windows-specific line endings. (#158297)
Should fix bot: https://lab.llvm.org/buildbot/#/builders/46/builds/23206
Commit: b2521ae01c3ae777c088960e0edbc4cf417f6dbb
https://github.com/llvm/llvm-project/commit/b2521ae01c3ae777c088960e0edbc4cf417f6dbb
Author: Matthias Springer <me at m-sp.org>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/lib/IR/Remarks.cpp
Log Message:
-----------
[mlir][IR] Fix build error with gcc-7 (#158305)
Fix build after #156825.
Commit: af53104fa4cc104b678b8cd204fcffc2680871c8
https://github.com/llvm/llvm-project/commit/af53104fa4cc104b678b8cd204fcffc2680871c8
Author: Karlo Basioli <basioli at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Fix bazel build issue - from #158298 (#158307)
Commit: 04320c0d24350d2e76e2ea4c94f05ca2bad9c736
https://github.com/llvm/llvm-project/commit/04320c0d24350d2e76e2ea4c94f05ca2bad9c736
Author: Matthias Springer <me at m-sp.org>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Remove `reconcileUnrealizedCasts` forward-declaration (#158291)
This is a follow-up to
https://github.com/llvm/llvm-project/pull/158067/files#r2343711946.
Commit: 6c11130bcd4cb636e13d55d2df7f6072069bbe07
https://github.com/llvm/llvm-project/commit/6c11130bcd4cb636e13d55d2df7f6072069bbe07
Author: Karlo Basioli <basioli at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix bazel build issue - caused in #156825 (#158313)
Commit: 149f91bad66972ad8bf0add5c79bf74055f6905a
https://github.com/llvm/llvm-project/commit/149f91bad66972ad8bf0add5c79bf74055f6905a
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M compiler-rt/lib/builtins/aarch64/sme-abi.S
Log Message:
-----------
[compiler-rt][AArch64] Don't use x18 in __arm_sme_save (#157802)
The AAPCS recommends avoiding the use of x18 as it may be used for other
purposes such as a shadow call stack.
In this particular case it could just as well use x16 instead.
Commit: be587941c22f16df6fb2053cc06cf91c5a378613
https://github.com/llvm/llvm-project/commit/be587941c22f16df6fb2053cc06cf91c5a378613
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/Maintainers.md
Log Message:
-----------
[mlir] Self-nominate for arith dialect maintenance (#157355)
Following https://llvm.org/docs/DeveloperPolicy.html#maintainers, I'd
like to self-nominate for arith dialect maintenance.
As per the policy:
> Maintainers are volunteering to take on the following shared
responsibilities within an area of a project:
> ...
I believe I've been already performing most of the maintenance duties
over the past few years, including direct code contributions, code
reviews, and both starting and participating in relevant RFCs on
discourse. You can look those up with:
* `git log --author=Jakub --oneline --
'mlir/include/mlir/Dialect/Arith*' 'mlir/lib/Dialect/Arith*'`
*
https://github.com/llvm/llvm-project/pulls?q=is%3Apr+label%3Amlir%3Aarith+reviewed-by%3Akuhar
* Some notable RFCs authored:
https://discourse.llvm.org/t/rfc-define-precise-arith-semantics/65507,
https://discourse.llvm.org/t/rfc-poison-semantics-for-mlir/66245,
https://discourse.llvm.org/t/rfc-arith-add-extended-multiplication-ops/66869,
https://discourse.llvm.org/t/rfc-add-integer-add-with-carry-op-to-arith/64573,
https://discourse.llvm.org/t/rfc-arith-should-we-support-scalar-vector-arith-bitcast-s/65427.
In addition to the `core` category maintainers, I can bring additional
perspective as I care both about conversion to llvm (as a user) and to
spirv (as a maintainer).
Commit: 7ebfcbd0ec525810d3874b5826ac1cb53f14c6e4
https://github.com/llvm/llvm-project/commit/7ebfcbd0ec525810d3874b5826ac1cb53f14c6e4
Author: Jeaye Wilkerson <contact at jeaye.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
Allow for custom code model in clang::Interpreter (#156977)
This is necessary when using ASan, since the larger code size will lead
to errors such as:
```
JIT session error: In graph clojure_core-clojure.core$clojure_core_cpp_cast_24538-24543-jitted-objectbuffer, section .eh_frame: relocation target 0x7bffe374b000 (DW.ref.__gxx_personality_v0) is out of range of Delta32 fixup at address 0x7bffe374b000 (<anonymous block> @ 0x7fffebf48158 + 0x13)
```
Previously, `clang::Interpreter` would hard-code the usage of a small
code model. With this change, we default to small, but allow for custom
values. This related to #102858 and #135401.
There is no change to default behavior here.
@lhames for review.
Commit: ead4f3e271fdf6918aef2ede3a7134811147d276
https://github.com/llvm/llvm-project/commit/ead4f3e271fdf6918aef2ede3a7134811147d276
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/get_active_lane_mask.ll
Log Message:
-----------
[InstCombine] Canonicalize active lane mask params (#158065)
Rewrite active lane mask intrinsics to begin their range from 0 when
both parameters are constant integers.
Commit: ed1f1b88e49b244658aebc8a48dc8cd458363e70
https://github.com/llvm/llvm-project/commit/ed1f1b88e49b244658aebc8a48dc8cd458363e70
Author: Alex Trotta <44127594+Ahajha at users.noreply.github.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M utils/bazel/WORKSPACE
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
Revert "[bazel][mlir][python] Port #155741: stub auto-generation (#157173)" (#157995)
This reverts commit 46d8fdd86ec79ba241b0db6c7fedc835902bc960.
The whole set of commits got reverted in
https://github.com/llvm/llvm-project/pull/157831, reverting this one
too.
Commit: b8eaceb39b0b2e4f6493decbee2b66e239e720e9
https://github.com/llvm/llvm-project/commit/b8eaceb39b0b2e4f6493decbee2b66e239e720e9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
Log Message:
-----------
[VPlan] Explicitly replicate VPInstructions by VF. (#155102)
Extend replicateByVF added in #142433 (aa240293190) to also explicitly
unroll replicating VPInstructions.
Now the only remaining case where we replicate for all lanes is
VPReplicateRecipes in replicate regions.
PR: https://github.com/llvm/llvm-project/pull/155102
Commit: 2491dc3d6fa6f5e7474fbdac28a8eefdeba52d49
https://github.com/llvm/llvm-project/commit/2491dc3d6fa6f5e7474fbdac28a8eefdeba52d49
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[Utils] Fix a warning
This patch fixes:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp:338:6: error: unused
function 'isSelectInRoleOfConjunctionOrDisjunction'
[-Werror,-Wunused-function]
Commit: c45aa5c764ffcd1f0a4ce9f006f266d664ea6f19
https://github.com/llvm/llvm-project/commit/c45aa5c764ffcd1f0a4ce9f006f266d664ea6f19
Author: Vedant Paranjape <vedantparanjape160201 at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/fold-fadd-with-zero-gh154238.ll
Log Message:
-----------
[InstCombine] Revert FSub optimization from #157757 (#158315)
Since FSub X, 0 gets canoncialised to FAdd X, -0 the said optimization
didn't make much sense for FSub. Remove it from IC and the adjoined
testcase.
Commit: 5d088ba30440d37f180f6b2e2f2fcc25d5c77018
https://github.com/llvm/llvm-project/commit/5d088ba30440d37f180f6b2e2f2fcc25d5c77018
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M lldb/include/lldb/Target/StackID.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackID.cpp
A lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/Makefile
A lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/TestArmPointerMetadataCFADwarfExpr.py
A lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/main.s
Log Message:
-----------
[lldb] Track CFA pointer metadata in StackID (#157498)
[lldb] Track CFA pointer metadata in StackID
In this commit:
9c8e71644227 [lldb] Make StackID call Fix{Code,Data} pointers (#152796)
We made StackID keep track of the CFA without any pointer metadata in
it. This is necessary when comparing two StackIDs to determine which one
is "younger".
However, the CFA inside StackIDs is also used in other contexts through
the method StackID::GetCallFrameAddress. One notable case is
DWARFExpression: the computation of `DW_OP_call_frame_address` is done
using StackID. This feeds into many other places, e.g. expression
evaluation may require the address of a variable that is computed from
the CFA; to access the variable without faulting, we may need to
preserve the pointer metadata. As such, StackID must be able to provide
both versions of the CFA.
In the spirit of allowing consumers of pointers to decide what to do
with pointer metadata, this patch changes StackID to store both versions
of the cfa pointer. Two getter methods are provided, and all call sites
except DWARFExpression preserve their existing behavior (stripped
pointer). Other alternatives were considered:
* Just store the raw pointer. This would require changing the
comparisong operator `<` to also receive a Process, as the comparison
requires stripped pointers. It wasn't clear if all call-sites had a
non-null process, whereas we know we have a process when creating a
StackID.
* Store a weak pointer to the process inside the class, and then strip
metadata as needed. This would require a `weak_ptr::lock` in many
operations of LLDB, and it felt wasteful. It also prevents stripping
of the pointer if the process has gone away.
This patch also changes RegisterContextUnwind::ReadFrameAddress, which
is the method computing the CFA fed into StackID, to also preserve the
signature pointers.
Commit: 9b0d7ddb04665e76cfa90b5d69c6183b90772243
https://github.com/llvm/llvm-project/commit/9b0d7ddb04665e76cfa90b5d69c6183b90772243
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[mlir][xegpu] Add support for `vector.multi_reduction` and `vector.shape_cast` SIMT distribution. (#157560)
Add support for distributing the `vector.multi_reduction` operation
across lanes in a warp. Currently only 2D to 1D reductions are
supported. Given layouts for the source and accumulator vectors,
* If the reduction dimension is distributed across lanes, the reduction
is non-lane-local and the reduction is done using warp shuffles. Here we
simply rewrite the `MultiDimReductionOp` to a sequence of `ReductionOp`s
inside the warp op body. Actual distribution will be done by
`WarpOpReduction` pattern.
* If the reduction dimension is not distributed across lanes, the
reduction is lane-local. In this case, we yield the source and
accumulator vectors from the warp op and perform the lane-local
reduction outside the warp op using a sequence of `ReductionOp`s.
PR also adds support for distributing `vector.shape_cast` based on
layouts.
Commit: f3b712f6e4e9afed735962c6b96e0a2cadb03dc1
https://github.com/llvm/llvm-project/commit/f3b712f6e4e9afed735962c6b96e0a2cadb03dc1
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M mlir/lib/Pass/Pass.cpp
Log Message:
-----------
[MLIR] Add debug log to the pass manager (NFC) (#156205)
Commit: 04d38bed70698d8591b3ac7b6b13635b1e894c5a
https://github.com/llvm/llvm-project/commit/04d38bed70698d8591b3ac7b6b13635b1e894c5a
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M clang/test/C/C11/n1285_1.c
M clang/test/C/C2y/n3254.c
M clang/test/CodeGen/AArch64/fp8-init-list.c
M clang/test/CodeGen/AArch64/ls64-inline-asm.c
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
M clang/test/CodeGen/PowerPC/builtins-ppc-build-pair-mma.c
M clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-bitcast-less-8.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-bitcast.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-cast.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-globals.c
M clang/test/CodeGen/SystemZ/builtins-systemz-i128.c
M clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-16Al.c
M clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-8Al.c
M clang/test/CodeGen/SystemZ/sync-builtins-i128-16Al.c
M clang/test/CodeGen/SystemZ/zvector2.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
M clang/test/CodeGen/attr-counted-by-for-pointers.c
M clang/test/CodeGen/attr-counted-by-pr110385.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/builtin-maxnum-minnum.c
M clang/test/CodeGen/cleanup-destslot-simple.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/math-libcalls-tbaa.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGenCXX/attr-likelihood-if-branch-weights.cpp
M clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp
M clang/test/CodeGenCXX/attr-likelihood-switch-branch-weights.cpp
M clang/test/CodeGenCXX/cfi-mfcall-nomerge.cpp
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/load-reference-metadata.cpp
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/preserve_vec3.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
M clang/test/DebugInfo/Generic/unsigned-promotion-debuginfo.c
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/wasm.c
M clang/test/OpenMP/bug54082.c
M clang/test/OpenMP/bug56913.c
M clang/test/OpenMP/bug57757.cpp
M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
M clang/test/OpenMP/parallel_if_codegen_PR51349.cpp
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
Log Message:
-----------
[clang] Regenerate test checks including TBAA semantics (NFC)
Tests exercizing TBAA metadata (both purposefully and not), and
previously generated via UTC, have been regenerated and updated
to version 6.
Commit: 6885950931b8dd7a8c956bc1f3e8b8ac52dff8d2
https://github.com/llvm/llvm-project/commit/6885950931b8dd7a8c956bc1f3e8b8ac52dff8d2
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
Log Message:
-----------
[SCEV] Fix a hang introduced by collectForPHI (#158153)
If we have a phi where one of it's source blocks is an unreachable
block, we don't want to traverse back into the unreachable region. Doing
so allows e.g. finding a trivial self loop when walking back the
predecessor chain.
Commit: bd7c2f15e8b9ff09cd415e7f8d01117cb0296e6e
https://github.com/llvm/llvm-project/commit/bd7c2f15e8b9ff09cd415e7f8d01117cb0296e6e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/PointerIntPair.h
Log Message:
-----------
[ADT] Simplify PointerBitMask in PointerIntPair.h (NFC) (#158210)
A left shift of (uintptr_t)-1) is simpler.
Commit: 615d07ea55ea57afab0205aa739239070448a038
https://github.com/llvm/llvm-project/commit/615d07ea55ea57afab0205aa739239070448a038
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
A llvm/utils/lit/lit/builtin_commands/_launch_with_limit.py
A llvm/utils/lit/tests/Inputs/shtest-ulimit/lit.cfg
A llvm/utils/lit/tests/Inputs/shtest-ulimit/print_limits.py
A llvm/utils/lit/tests/Inputs/shtest-ulimit/ulimit-bad-arg.txt
A llvm/utils/lit/tests/Inputs/shtest-ulimit/ulimit_okay.txt
A llvm/utils/lit/tests/shtest-ulimit.py
Log Message:
-----------
[lit] Implement ulimit builtin
This patch implements ulimit inside the lit internal shell.
Implementation wise, this functions similar to umask. But instead of
setting the limits within the lit test worker process, we set
environment variables and add a wrapper around the command to be
executed. The wrapper then sets the limits. This is because we cannot
increase the limits after lowering them, so we would otherwise end up
with a lit test worker stuck with a lower limit.
There are several tests where the use of ulimit is essential to the
semantics of the test (two in clang, ~7 in compiler-rt), so we need to
implement this in order to switch on the internal shell by default
without losing test coverage.
Reviewers: cmtice, petrhosek, ilovepi
Reviewed By: cmtice, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/157958
Commit: 66fbe98c3f17474d8df37b8c15df3b5542a4bac5
https://github.com/llvm/llvm-project/commit/66fbe98c3f17474d8df37b8c15df3b5542a4bac5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-12 (Fri, 12 Sep 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/MCPlusBuilder.cpp
A bolt/test/AArch64/print-mem-data.test
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/altera/StructPackAlignCheck.cpp
M clang-tools-extra/clang-tidy/altera/UnrollLoopsCheck.cpp
M clang/cmake/modules/CMakeLists.txt
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Function.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/Format.cpp
A clang/lib/Format/NumericLiteralCaseFixer.cpp
A clang/lib/Format/NumericLiteralCaseFixer.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/f16cintrin.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/test/Analysis/ctu-import-type-decl-definition.c
M clang/test/C/C11/n1285_1.c
M clang/test/C/C2y/n3254.c
M clang/test/CodeGen/AArch64/fp8-init-list.c
M clang/test/CodeGen/AArch64/ls64-inline-asm.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_cnt.c
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
M clang/test/CodeGen/PowerPC/builtins-ppc-build-pair-mma.c
M clang/test/CodeGen/PowerPC/builtins-ppc-dmf.c
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-bitcast-less-8.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-bitcast.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-cast.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-globals.c
M clang/test/CodeGen/SystemZ/builtins-systemz-i128.c
M clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-16Al.c
M clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-8Al.c
M clang/test/CodeGen/SystemZ/sync-builtins-i128-16Al.c
M clang/test/CodeGen/SystemZ/zvector2.c
M clang/test/CodeGen/X86/f16c-builtins.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
M clang/test/CodeGen/attr-counted-by-for-pointers.c
M clang/test/CodeGen/attr-counted-by-pr110385.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/builtin-maxnum-minnum.c
M clang/test/CodeGen/cleanup-destslot-simple.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/math-libcalls-tbaa.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGenCXX/attr-likelihood-if-branch-weights.cpp
M clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp
M clang/test/CodeGenCXX/attr-likelihood-switch-branch-weights.cpp
M clang/test/CodeGenCXX/cfi-mfcall-nomerge.cpp
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/load-reference-metadata.cpp
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/preserve_vec3.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
M clang/test/DebugInfo/Generic/unsigned-promotion-debuginfo.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/wasm.c
M clang/test/Lexer/cxx-features.cpp
M clang/test/Modules/lambda-merge.cpp
M clang/test/OpenMP/bug54082.c
M clang/test/OpenMP/bug56913.c
M clang/test/OpenMP/bug57757.cpp
M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
M clang/test/OpenMP/parallel_if_codegen_PR51349.cpp
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M clang/test/Preprocessor/riscv-target-features.c
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/Format/CMakeLists.txt
A clang/unittests/Format/NumericLiteralCaseTest.cpp
M clang/www/cxx_status.html
M compiler-rt/lib/builtins/aarch64/sme-abi.S
M compiler-rt/test/lit.common.cfg.py
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Coarray.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Coarray.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Lower/Coarray/sync_all.f90
A flang/test/Lower/Coarray/sync_images.f90
A flang/test/Lower/Coarray/sync_memory.f90
A flang/test/Parser/OpenMP/replayable-clause.f90
A flang/test/Parser/OpenMP/transparent-clause.f90
A flang/test/Semantics/OpenMP/replayable-clause.f90
A flang/test/Semantics/OpenMP/transparent-clause.f90
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/type_traits/is_destructible.h
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/endian_internal.h
M libc/src/__support/macros/config.h
M libc/src/__support/math_extras.h
M libc/test/IntegrationTest/test.h
M libc/test/integration/src/pthread/pthread_create_test.cpp
M libc/test/integration/src/pthread/pthread_join_test.cpp
M libc/test/integration/src/pthread/pthread_name_test.cpp
M libc/test/integration/src/unistd/getcwd_test.cpp
M libc/test/integration/startup/linux/tls_test.cpp
M libclc/CMakeLists.txt
M libclc/utils/CMakeLists.txt
M libclc/utils/prepare-builtins.cpp
M libcxx/include/__cxx03/fstream
M libcxx/include/__cxx03/ios
M libcxx/include/__cxx03/sstream
M libcxx/include/__cxx03/string
M libcxx/include/__split_buffer
M libcxx/include/__type_traits/desugars_to.h
M libcxx/include/__utility/default_three_way_comparator.h
M libcxx/include/__utility/lazy_synth_three_way_comparator.h
M libcxx/include/__vector/vector.h
M libcxx/include/deque
M libcxx/include/string
M libcxx/test/libcxx/type_traits/is_replaceable.compile.pass.cpp
M libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
A libcxx/test/libcxx/utilities/utility/has_default_three_way.compile.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/default.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/pointer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/string.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/default.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/pointer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/string.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/default.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/pointer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/string.pass.cpp
M libcxx/test/std/input.output/iostreams.base/ios/basic.ios.members/copyfmt.pass.cpp
M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/default.pass.cpp
M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp
M libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/string.pass.cpp
M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/default.pass.cpp
M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp
M libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/string.pass.cpp
M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/default.pass.cpp
M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/move.pass.cpp
M libcxx/test/std/input.output/string.streams/stringstream/stringstream.cons/string.pass.cpp
M libcxx/utils/ci/Dockerfile
M lldb/examples/synthetic/libcxx.py
M lldb/include/lldb/Target/StackID.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackID.cpp
M lldb/source/Utility/Scalar.cpp
A lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/Makefile
A lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/TestArmPointerMetadataCFADwarfExpr.py
A lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/main.s
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/unittests/Utility/ScalarTest.cpp
M llvm/docs/ConvergentOperations.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/IndexedMap.h
M llvm/include/llvm/ADT/PointerIntPair.h
M llvm/include/llvm/ADT/SparseMultiSet.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/ADT/identity.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/include/llvm/Support/Endian.h
M llvm/include/llvm/Support/HashBuilder.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/COFFAsmParser.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCParser/WasmAsmParser.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/MLxExpansionPass.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
M llvm/lib/Target/ARM/ThumbRegisterInfo.h
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRRegisterInfo.h
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.h
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
M llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
M llvm/lib/Target/MSP430/MSP430RegisterInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
M llvm/lib/Target/Mips/Mips16RegisterInfo.h
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.h
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
M llvm/lib/Target/Sparc/SparcRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/VE/VERegisterInfo.cpp
M llvm/lib/Target/VE/VERegisterInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISD.def
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Analysis/BasicAA/featuretest.ll
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
M llvm/test/CodeGen/AArch64/fprcvt-cvtf.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface-remarks.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
A llvm/test/CodeGen/AMDGPU/stack-passed-subdword-arg-crash-issue157997.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-eqv.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-nand.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-nor.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-not-b.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-not-c.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/machine-combiner.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/Thumb2/bti-indirect-branches.ll
A llvm/test/CodeGen/WebAssembly/partial-reduce-accumulate.ll
A llvm/test/DebugInfo/RISCV/dw_op_entry_value_32bit.ll
A llvm/test/DebugInfo/RISCV/dw_op_entry_value_64bit.ll
A llvm/test/MC/RISCV/zibi-invalid.s
A llvm/test/MC/RISCV/zibi-valid.s
R llvm/test/TableGen/FixedLenDecoderEmitter/InitValue.td
A llvm/test/TableGen/FixedLenDecoderEmitter/operand-decoder.td
M llvm/test/Transforms/InstCombine/AArch64/sme-intrinsic-opts-counting-elems.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-whilelo.ll
M llvm/test/Transforms/InstCombine/assume-align.ll
A llvm/test/Transforms/InstCombine/fold-fadd-with-zero-gh154238.ll
A llvm/test/Transforms/InstCombine/get_active_lane_mask.ll
A llvm/test/Transforms/InstCombine/min-zext.ll
M llvm/test/Transforms/InstCombine/trunc-lshr.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
A llvm/test/Transforms/InstSimplify/get_active_lane_mask.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
A llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
M llvm/test/Transforms/SimplifyCFG/branch-fold-threshold.ll
M llvm/test/Transforms/SimplifyCFG/branch-fold.ll
M llvm/test/Transforms/SimplifyCFG/preserve-branchweights.ll
M llvm/unittests/Support/DebugLogTest.cpp
M llvm/unittests/Support/EndianTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/lit/lit/DiffUpdater.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/lit/lit/util.py
M llvm/utils/lit/tests/diff-test-update.py
M mlir/Maintainers.md
M mlir/docs/Tutorials/transform/Ch0.md
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSME/Utils/Utils.h
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Dialect/ArmSME/IR/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/IR/Remarks.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.h
M mlir/lib/Tools/mlir-opt/CMakeLists.txt
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/AMDGPUToROCDL/permlane.mlir
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/ReconcileUnrealizedCasts/reconcile-unrealized-casts.mlir
M mlir/test/Dialect/SPIRV/IR/target-and-abi.mlir
M mlir/test/Dialect/SPIRV/Transforms/abi-interface.mlir
A mlir/test/Dialect/Vector/td/xfer-drop-unit-dims.mlir
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
M mlir/test/Integration/Dialect/MemRef/assume-alignment-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/atomic-rmw-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/store-runtime-verification.mlir
A mlir/test/Pass/remarks.mlir
M mlir/test/Target/LLVMIR/arm-sme-invalid.mlir
M mlir/test/Target/LLVMIR/arm-sme.mlir
A mlir/test/Target/SPIRV/graph-ops.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/test/lib/Pass/CMakeLists.txt
A mlir/test/lib/Pass/TestRemarksPass.cpp
M mlir/test/lib/Pass/TestVulkanRunnerPipeline.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/unittests/IR/CMakeLists.txt
M mlir/unittests/IR/RemarkTest.cpp
M utils/bazel/WORKSPACE
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/478b88d56386...66fbe98c3f17
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