[all-commits] [llvm/llvm-project] 85fb1f: [AMDGPU] Extending wave reduction intrinsics for `...
Mingjie Xu via All-commits
all-commits at lists.llvm.org
Thu Sep 11 06:32:11 PDT 2025
Branch: refs/heads/users/Enna1/perf/fold-dead-phi-web-opt-time
Home: https://github.com/llvm/llvm-project
Commit: 85fb1f1b776d68aa1c01b1f671343daaacf32058
https://github.com/llvm/llvm-project/commit/85fb1f1b776d68aa1c01b1f671343daaacf32058
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
Log Message:
-----------
[AMDGPU] Extending wave reduction intrinsics for `i64` types - 1 (#150169)
Supporting Min/Max Operations: `min`, `max`, `umin`, `umax`
Commit: 63647074ba97dc606c7ba48c3800ec08ca501d92
https://github.com/llvm/llvm-project/commit/63647074ba97dc606c7ba48c3800ec08ca501d92
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationOps.td
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Interfaces/CMakeLists.txt
R mlir/include/mlir/Interfaces/CopyOpInterface.h
R mlir/include/mlir/Interfaces/CopyOpInterface.td
M mlir/lib/Interfaces/CMakeLists.txt
R mlir/lib/Interfaces/CopyOpInterface.cpp
M mlir/test/lib/Dialect/Test/TestDialect.h
M mlir/test/lib/Dialect/Test/TestOps.h
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[MLIR] Remove CopyOpInterface (#157711)
This interface isn't used anywhere anymore.
Commit: 0a83e96f6616c79a2ac63588a550ed420798791f
https://github.com/llvm/llvm-project/commit/0a83e96f6616c79a2ac63588a550ed420798791f
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M .ci/all_requirements.txt
M mlir/cmake/modules/AddMLIRPython.cmake
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/python/CMakeLists.txt
R mlir/python/mlir/_mlir_libs/.gitignore
A mlir/python/mlir/_mlir_libs/_mlir/__init__.pyi
A mlir/python/mlir/_mlir_libs/_mlir/dialects/pdl.pyi
A mlir/python/mlir/_mlir_libs/_mlir/dialects/quant.pyi
A mlir/python/mlir/_mlir_libs/_mlir/dialects/transform/__init__.pyi
A mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
A mlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
A mlir/python/mlir/_mlir_libs/_mlirExecutionEngine.pyi
M mlir/python/requirements.txt
Log Message:
-----------
Revert stubgen-related patches (#157831)
Despite several hotfixes, things remain broken, in particular:
- installation/distribution (`ninja install / install-distribution`);
- downstream projects with bindings exposed.
See
https://github.com/llvm/llvm-project/pull/157583#issuecomment-3274164357
for more details.
Reverts #155741, #157583, #157697. Let's make sure things are fixed and
re-land as a unit.
Commit: 57391423450ad82a932804d5ef7cce40c841714c
https://github.com/llvm/llvm-project/commit/57391423450ad82a932804d5ef7cce40c841714c
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
Log Message:
-----------
[LV][AArch64][NFC]: Change TC in a test case. (#157512)
- In sve-epilog-vscale-fixed.ll file, it tests the preference of
fixed-width epilogue VF vs scalable when costs are equal. This NFC patch
is changing the TC in the test case to be unknown to avoid folding the
epilogue in future LV changes.
Commit: be773c1554b54fee3ef60e87097494a5139f1ec2
https://github.com/llvm/llvm-project/commit/be773c1554b54fee3ef60e87097494a5139f1ec2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsSubtarget.cpp
Log Message:
-----------
Revert "Mips: Force 64bit subtarget feature to be set for ABI options (#157446)" (#157833)
This reverts commit 7768cca2c6617523e38ba9a8a3e8366752992ec5.
This is less necessary after 7f4c297e94dd604d66429dd0eb85c79e4d8c50a9
Commit: 0f05f927f8a63e7fcb1158e68dd3f2c592c744a1
https://github.com/llvm/llvm-project/commit/0f05f927f8a63e7fcb1158e68dd3f2c592c744a1
Author: Carlos Andres Ramirez <CarlosAndresRamirez at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/docs/QualGroup.rst
Log Message:
-----------
LLVM Qualification Group - Backlog documentation and Discussion Updates (#156184)
I have created backlog file for the Qualification group that contains
all the topics currently under discussion and I have added the new
section in the main group's page, referencing the backlog.
This Backlog will be used as the quick reference for anyone to know what
are the current topics under discussion and what priorities have been
given to them by the group.
Note for future editors: Add "Last updated:" comment on top of the
document, easily keep track of the last updated dates.
Commit: 349544d7ab353475ac5983b3964ef2ec0f108e2d
https://github.com/llvm/llvm-project/commit/349544d7ab353475ac5983b3964ef2ec0f108e2d
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
M llvm/test/CodeGen/AMDGPU/finalizebundle.mir
Log Message:
-----------
[CodeGen] Fix handling dead redefs in finalizeBundle (#157427)
A dead redefinition should override any earlier non-dead definition
inside a bundle.
Also remove KilledDefSet since it can be folded into DeadDefSet.
Commit: 1c58bc77bc2e2a3352db8a8ddc6717bdd957b44b
https://github.com/llvm/llvm-project/commit/1c58bc77bc2e2a3352db8a8ddc6717bdd957b44b
Author: Karlo Basioli <k.basioli at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix build issues caused by #157711 (#157838)
Commit: 3327a4c8f63b37301eaed2b9af8c0c696dff13fb
https://github.com/llvm/llvm-project/commit/3327a4c8f63b37301eaed2b9af8c0c696dff13fb
Author: Tobias Stadler <mail at stadler-tobias.de>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
R llvm/include/llvm/Remarks/BitstreamRemarkParser.h
M llvm/lib/Remarks/BitstreamRemarkParser.cpp
M llvm/lib/Remarks/BitstreamRemarkParser.h
Log Message:
-----------
[Remarks] Move BitstreamRemarkParser helpers to private header (NFC) (#156302)
These helpers are only used in the implementation, and we also don't
expose similar details for the YAMLRemarkParser.
Pull Request: https://github.com/llvm/llvm-project/pull/156302
Commit: 9465ef54067625cfbcd0dcbb0ab2991a974d51e3
https://github.com/llvm/llvm-project/commit/9465ef54067625cfbcd0dcbb0ab2991a974d51e3
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/include/mlir/TableGen/Operator.h
M mlir/lib/TableGen/Operator.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][tblgen] Fix bug when mixing props and InferTypes (#157367)
This patch fixes a bug occurring when properties are mixed with any of
the InferType traits, causing tblgen to crash. A simple reproducer is:
```
def _TypeInferredPropOp : NS_Op<"type_inferred_prop_op_with_properties", [
AllTypesMatch<["value", "result"]>
]> {
let arguments = (ins Property<"unsigned">:$prop, AnyType:$value);
let results = (outs AnyType:$result);
let hasCustomAssemblyFormat = 1;
}
```
The issue occurs because of the call:
```
op.getArgToOperandOrAttribute(infer.getIndex());
```
To understand better the issue, consider:
```
attrOrOperandMapping = [Operand0]
arguments = [Prop0, Operand0]
```
In this case, `infer.getIndex()` will return `1` for `Operand0`, but
`getArgToOperandOrAttribute` expects `0`, causing the discrepancy that
causes the crash.
The fix is to change `attrOrOperandMapping` to also include props.
Commit: 94e2c19f86a699d7a19ff0f4130b696699189c8d
https://github.com/llvm/llvm-project/commit/94e2c19f86a699d7a19ff0f4130b696699189c8d
Author: BaiXilin <54905170+BaiXilin at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx512vlvnniintrin.h
M clang/lib/Headers/avx512vnniintrin.h
M clang/lib/Headers/avxvnniintrin.h
M clang/test/CodeGen/X86/avx512vlvnni-builtins.c
M clang/test/CodeGen/X86/avx512vnni-builtins.c
M clang/test/CodeGen/X86/avxvnni-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512vnni-intrinsics.ll
A llvm/test/CodeGen/X86/avx_vnni-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx_vnni-intrinsics.ll
M llvm/test/CodeGen/X86/stack-folding-int-avxvnni.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx_vnni-intrinsics.ll
Log Message:
-----------
[x86][AVX-VNNI] Fix VPDPBUSD Argument Types (#155194)
Fixed intrinsic VPDPBUSD[,S]_128/256/512's argument types to match with the ISA.
Fixes part of #97271
Commit: a76b02ddebf365c578f4902bba6946e8c2bfb1fc
https://github.com/llvm/llvm-project/commit/a76b02ddebf365c578f4902bba6946e8c2bfb1fc
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
Log Message:
-----------
[AMDGPU] Extending wave reduction intrinsics for `i64` types - 2 (#151309)
Supporting Arithemtic Operations: `add`, `sub`
Commit: 79e93178934eb93acf252de093c263f4db9eb8b7
https://github.com/llvm/llvm-project/commit/79e93178934eb93acf252de093c263f4db9eb8b7
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/IR/DebugLoc.cpp
Log Message:
-----------
[DebugInfo] When merging locations prefer unannotated empty locs (#157707)
When merging DILocations, we prefer to use DebugLoc::getMergedLocation
when possible to better preserve DebugLoc coverage tracking information
through transformations (as conversion to DILocations drops all coverage
tracking data). Currently, DebugLoc::getMergedLocation checks to see if
either DebugLoc is empty and returns it directly if so, to propagate
that DebugLoc's coverage tracking data to the merged location; however,
it only checks whether either location is valid, not whether they are
annotated.
This is significant because an annotated location is not a bug, while an
empty unannotated location may be one; therefore, we check to see if
either location is unannotated, and prefer to return that location if it
exists rather than an annotated one.
This change is NFC outside of DebugLoc coverage tracking builds.
Commit: acea1f512ea804d7c35b60682f62327dceea1e18
https://github.com/llvm/llvm-project/commit/acea1f512ea804d7c35b60682f62327dceea1e18
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/TableGen/HwModeEncodeAPInt.td
M llvm/test/TableGen/HwModeEncodeDecode3.td
M llvm/utils/TableGen/CodeEmitterGen.cpp
Log Message:
-----------
[LLVM][MC][CodeEmitterGen] Reduce various `InstBits` table sizes (#156213)
Change various `InstBits` tables have an entry only for non-pseudo
target instructions and adjust the indexing into these tables
accordingly.
Some minor refactoring related to this:
- Use early return after handling variable length encodings
- Reduce the scope of anonymous namespace to just the class declaration.
Example reductions in these table sizes for some targets:
```
Target FirstSupportedOpcode Reduction in size
AMDGPU 10813 10813 * 16 = 168KB
RISCV 12051 12051 * 8 = 94KB
```
Commit: 93b91730757cb6216464980d2a78350557d048a7
https://github.com/llvm/llvm-project/commit/93b91730757cb6216464980d2a78350557d048a7
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
Log Message:
-----------
[Analysis][NFC] Improve documentation for getMemoryOpCost (#156875)
The operand info argument appears to refer to different things depending
upon whether it's a load or a store, so I've clarified this in the
documentation.
Commit: 5b81367960e71d40b948f433664790ec8a19f224
https://github.com/llvm/llvm-project/commit/5b81367960e71d40b948f433664790ec8a19f224
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep-of-gep.ll
Log Message:
-----------
[AMDGPU] Generate canonical additions in AMDGPUPromoteAlloca (#157810)
When we know that one operand of an addition is a constant, we might was
well put it on the right-hand side and avoid the work to canonicalize it
in a later pass.
Commit: 3c810b76b97456e4e1c115dcf3238a799067c466
https://github.com/llvm/llvm-project/commit/3c810b76b97456e4e1c115dcf3238a799067c466
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
Log Message:
-----------
[LV] Add initial legality checks for early exit loops with side effects (#145663)
This adds initial support to LoopVectorizationLegality to analyze loops
with side effects (particularly stores to memory) and an uncountable
exit. This patch alone doesn't enable any new transformations, but
does give clearer reasons for rejecting vectorization for such a loop.
The intent is for a loop like the following to pass the specific checks,
and only be rejected at the end until the transformation code is
committed:
```
// Assume a is marked restrict
// Assume b is known to be large enough to access up to b[N-1]
for (int i = 0; i < N; ++) {
a[i]++;
if (b[i] > threshold)
break;
}
```
Commit: b7e31e746298002e99306ff6c3be2ad6baaea24f
https://github.com/llvm/llvm-project/commit/b7e31e746298002e99306ff6c3be2ad6baaea24f
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Strip findForkedPointer (NFC) (#140298)
Remove a level of indirection due to findForkedPointer, in an effort to
improve code.
Commit: 106eb4623d0c50cd14a7bdf08d159eef6907d0d7
https://github.com/llvm/llvm-project/commit/106eb4623d0c50cd14a7bdf08d159eef6907d0d7
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
A llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
A llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
M llvm/lib/Target/AArch64/CMakeLists.txt
Log Message:
-----------
[AArch64] Break up `AArch64FrameLowering::emitPrologue` (NFCI) (#157485)
`emitPrologue` was almost 1k SLOC, with a large portion not actually
related to emitting the vast majority of prologues.
This patch creates a new class `AArch64PrologueEmitter` for emitting the
prologue, which keeps common state/target classes as members. This makes
adding methods that handle niche cases easy, and allows methods to be
marked "const" when they don't redefine flags/state.
With this change, the core "emitPrologue" is around 275 LOC, with cases
like Windows stack probes or Swift frame pointers split into routines.
This makes following the logic much easier.
Commit: d452e67ee7b5d17aa040f71d8997abc1a47750e4
https://github.com/llvm/llvm-project/commit/d452e67ee7b5d17aa040f71d8997abc1a47750e4
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/include/flang/Lower/OpenMP.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Semantics/resolve-directives.cpp
R flang/test/Lower/OpenMP/nested-loop-transformation-construct01.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/simd.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
A flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/SCFToOpenMP/scf-to-openmp.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/omptarget-wsloop-collapsed.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[flang][OpenMP] Enable tiling (#143715)
This patch enables tiling in flang. In MLIR tiling is handled by
changing the the omp.loop_nest op to be able to represent both collapse
and tiling, so the flang front-end will combine the nested constructs into
a single MLIR op. The MLIR->LLVM-IR lowering of the LoopNestOp is
enhanced to first do the tiling if present, then collapse.
Commit: 1e6a63e4fff4a496c537e5c155af8b355d3a988c
https://github.com/llvm/llvm-project/commit/1e6a63e4fff4a496c537e5c155af8b355d3a988c
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
Log Message:
-----------
[AMDGPU] Extending wave reduction intrinsics for `i64` types - 3 (#151310)
Supporting Arithemtic Operations: `and`, `or`, `xor`
Commit: 924bf242c8e0ef61544471488eb9e729dda72a50
https://github.com/llvm/llvm-project/commit/924bf242c8e0ef61544471488eb9e729dda72a50
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
Log Message:
-----------
[AMDGPU] Add builtins for wave reduction intrinsics (#150170)
Commit: dcdbb39786a56181e1612354ecb8ecf5a7b0f449
https://github.com/llvm/llvm-project/commit/dcdbb39786a56181e1612354ecb8ecf5a7b0f449
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Use intersectForOffsetAdd() in CommonPointerBase (#157851)
Transforms using this helper will add up all the offsets, so we should
use intersectForOffsetAdd() instead of plain intersection.
Annoyingly, this requires specially handling the first GEP to avoid
losing flags in that case.
Fixes https://github.com/llvm/llvm-project/issues/157714.
Commit: 6580c9102f26789c655d6945372dd259b9e52e33
https://github.com/llvm/llvm-project/commit/6580c9102f26789c655d6945372dd259b9e52e33
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
Log Message:
-----------
[SCEV] Fold ((-1 * C1) * D / C1) -> -1 * D. (#157555)
Treat negative constants C as -1 * abs(C1) when folding multiplies and
udivs.
Alive2 Proof: https://alive2.llvm.org/ce/z/bdj9W2
PR: https://github.com/llvm/llvm-project/pull/157555
Commit: 619d36ff4f7552b0e5786f4cf24d93d8b881aa58
https://github.com/llvm/llvm-project/commit/619d36ff4f7552b0e5786f4cf24d93d8b881aa58
Author: jyli0116 <yu.li at arm.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
A llvm/test/CodeGen/AArch64/lshr-trunc-lshr.ll
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AArch64/urem-lkk.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
Log Message:
-----------
[GISel] Combine shift + trunc + shift pattern (#155583)
Folds shift(trunc(shift(...))) pattern into trunc(shift(...)) by
combining the two shift instructions
Commit: d18eca0c9c63b878ce853534e2c1e07967ec9b98
https://github.com/llvm/llvm-project/commit/d18eca0c9c63b878ce853534e2c1e07967ec9b98
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Analysis/Lint.cpp
R llvm/test/Analysis/Lint/get-active-lane-mask.ll
Log Message:
-----------
[LLVM][LangRef] Remove "n > 0" restriction from get.active.lanes.mask. (#152140)
The specification for get.active.lanes.mask says a limit value of zero
results in poison. This seems like an artificial restriction and means
you cannot use the intrinsic to create minimal loops of the form:
```
foo(int count, ....) {
int i = 0;
while (mask = get.active.lane.mask(i, count)) {
; do work
i += count_bits(mask);
}
}
```
I cannot see any code that generates poison in this case, in fact
ConstantFoldFixedVectorCall returns the logical result (i.e. an all
false vector).
There are also cases like `can_overflow_i64_induction_var` in
sve-tail-folding-overflow-checks.ll that look broken by the current
definition? for the case when "%N <= vscale * 4".
Commit: d070960319802c9dbfbb3224555e1dff8709860e
https://github.com/llvm/llvm-project/commit/d070960319802c9dbfbb3224555e1dff8709860e
Author: Daniel Kuts <kutz at ispras.ru>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
Log Message:
-----------
[mlir][spirv] Check variable for null before dereferencing (#157457)
FIxes #157453
Commit: 312b5615dfa7a75e097c524f8355ddb0e56d1fa2
https://github.com/llvm/llvm-project/commit/312b5615dfa7a75e097c524f8355ddb0e56d1fa2
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[offload] Fix finding libomptarget in runtimes build (#157856)
Per the logic in top-level CMakeLists, `libomptarget` is placed into
`LLVM_LIBRARY_OUTPUT_INTDIR` when this variable is set. Adjust the test
logic to include this directory in `-L` and `-Wl,-rpath` arguments as
well, in order to fix finding tests when building via the `runtimes`
top-level directory.
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 62f2641d603db9aef99dd5c434a1dfe7d3f56346
https://github.com/llvm/llvm-project/commit/62f2641d603db9aef99dd5c434a1dfe7d3f56346
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrControl.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
Log Message:
-----------
X86: Stop using MachineFunction in getPointerRegClass (#156880)
This should be a low level function used to interpret an
MCInstrDesc that only depends on the hwmode. It should not depend
on other dynamic context like the parent function. In general more
ABI properties like this should be expressed directly in the instruction
definitions, so introduce new TCRETURN pseudos to use with the special
case register classes (e.g. in a better future the callee saved
registers
would always be encoded directly in a mask on the return instruction).
This will help unify X86 onto a pending replacement mechanism for
getPointerRegClass.
Commit: bdebbd90150fbba210c097188e49b51d0eb960a4
https://github.com/llvm/llvm-project/commit/bdebbd90150fbba210c097188e49b51d0eb960a4
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/Transforms/InstSimplify/ConstProp/AMDGPU/wave.reduce.ll
Log Message:
-----------
[AMDGPU] Propagate Constants for Wave Reduction Intrinsics (#150395)
Commit: a301e1a8952935a67c32ce76982bd50d8179e415
https://github.com/llvm/llvm-project/commit/a301e1a8952935a67c32ce76982bd50d8179e415
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/test/CodeGen/union-tbaa1.c
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Analysis/BasicAA/featuretest.ll
M llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll
M llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll
M llvm/test/Transforms/InstCombine/gepofconstgepi8.ll
M llvm/test/Transforms/InstCombine/gepphigep.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
M llvm/test/Transforms/InstCombine/opaque-ptr.ll
M llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll
M llvm/test/Transforms/InstCombine/select-gep.ll
M llvm/test/Transforms/InstCombine/strcmp-3.ll
M llvm/test/Transforms/InstCombine/strlen-7.ll
M llvm/test/Transforms/InstCombine/strlen-8.ll
M llvm/test/Transforms/InstCombine/vectorgep-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
Log Message:
-----------
[InstCombine] Split GEPs with multiple non-zero offsets (#151333)
Split GEPs that have more than one non-zero offset into two GEPs. This
is in preparation for the ptradd migration, which can only represent
such GEPs.
This also enables CSE and LICM of the common base.
Commit: 6ff97d0526cc2ea55441e5ca88cd4ba7202345b7
https://github.com/llvm/llvm-project/commit/6ff97d0526cc2ea55441e5ca88cd4ba7202345b7
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/lib/Headers/cpuid.h
M clang/test/Headers/__cpuidex_conflict.c
Log Message:
-----------
[Clang] Fix __cpuidex conflict with other offloading targets (#157741)
It seems that for whatever reason we must:
1) Declare aux builtins when the compiling for an offload device
and
2) Define the aux builtin target macros when compiling for an offload
device.
In `cpuid.h` we try to define `__cpuidex` if it is not defined. Given
the above, the function will both be defined as a builtin in the
compiler and we can't rely on the `X86` macros to be undefined in the
case the aux-triple is `X86`.
Previously a workaround was added for NVPTX in
https://github.com/llvm/llvm-project/pull/152556, extend it for the
other offloading targets.
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 3751b6b1712cb1244f8df3dace32e7391d425741
https://github.com/llvm/llvm-project/commit/3751b6b1712cb1244f8df3dace32e7391d425741
Author: nerix <nerixdev at outlook.de>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
A llvm/test/tools/llvm-pdbutil/publics-yaml2pdb.test
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
Log Message:
-----------
[llvm-pdbutil] Create public symbols in yaml2pdb (#157362)
pdb2yaml dumps the public symbols, but yaml2pdb didn't create these in
the exported PDB. With this PR, they're added to the final PDB.
Commit: fa0bb6a20e97ee23587f583e1a15212d6735467e
https://github.com/llvm/llvm-project/commit/fa0bb6a20e97ee23587f583e1a15212d6735467e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-sse41.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-ssse3.s
Log Message:
-----------
[X86] Fix throughput typo in XMM/YMM PACK/PALIGNR schedule classes (#157867)
Only the ZMM PACK/PALIGNR instructions are half-rate on znver4 -
confirmed with AMD SOG, uops.info and Agner
Noticed because comparing costs table shuffle costs vs llvm-mca costs
kept giving weird numbers if I tested it on znver4 vs any other
avx2/avx512 target
It looks like there's other znver4 overrides that make this mistake but
many of these need cleaning up properly to use the (currently unused)
default classes
Commit: fc9fe0f7b7bbd6c980cdb775ae0b2eed794ef8dc
https://github.com/llvm/llvm-project/commit/fc9fe0f7b7bbd6c980cdb775ae0b2eed794ef8dc
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Semantics/unparse-with-symbols.cpp
A flang/test/Parser/OpenMP/declare-reduction-unparse-with-symbols.f90
Log Message:
-----------
[flang][OpenMP] Fix crash on DECLARE REDUCTION in unparse-with-symbols (#157871)
Commit: 3c60c03f538f7da6a58f79d6979d6a87e06b8e72
https://github.com/llvm/llvm-project/commit/3c60c03f538f7da6a58f79d6979d6a87e06b8e72
Author: Karlo Basioli <k.basioli at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
Mark variable as maybe unused (only used in debug mode) (#157875)
Commit: 7d3672747b1cd07512b0f17d107253960fceaef5
https://github.com/llvm/llvm-project/commit/7d3672747b1cd07512b0f17d107253960fceaef5
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
Log Message:
-----------
AMDGPU: Add uniformity analysis test for G_ZEXTLOAD and G_SEXTLOAD (#157844)
Commit: acb38c8be7152aa26e6958752499619eeeeddd1c
https://github.com/llvm/llvm-project/commit/acb38c8be7152aa26e6958752499619eeeeddd1c
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
M lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Add command line option `--connection-timeout` (#156803)
# Usage
This is an optional new command line option to use with `--connection`.
```
--connection-timeout <timeout> When using --connection, the number of seconds to
wait for new connections after the server has started and after all clients
have disconnected. Each new connection will reset the timeout. When the
timeout is reached, the server will be closed and the process will exit.
Not specifying this argument or specifying non-positive values will cause
the server to wait for new connections indefinitely.
```
A corresponding extension setting `Connection Timeout` is added to the
`lldb-dap` VS Code extension.
# Benefits
Automatic release of resources when lldb-dap is no longer being used
(e.g. release memory used by module cache).
# Test
See PR.
Commit: 752c1cf8056c3ca1e326cfc7692f2e32e5917374
https://github.com/llvm/llvm-project/commit/752c1cf8056c3ca1e326cfc7692f2e32e5917374
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[Instrumentation] Fix formatting of MemorySanitizer.cpp
Commit: 56122f769f59c7dbd643f294a1d4fef598c524d7
https://github.com/llvm/llvm-project/commit/56122f769f59c7dbd643f294a1d4fef598c524d7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
Log Message:
-----------
[AArch64] Use SignExtend64<N> (NFC) (#157788)
This patch uses SignExtend64<N> to simplify sign extensions.
Commit: cac3802a1647339ee13821969d8382a3cad03876
https://github.com/llvm/llvm-project/commit/cac3802a1647339ee13821969d8382a3cad03876
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/ADT/STLForwardCompat.h
Log Message:
-----------
[ADT] Fix comment typos in STLForwardCompat.h (#157789)
st::type_identity_t is from C++20, not C++23.
Commit: 9a64fa7b7e446651bf40fe0e1289505bc115c6dd
https://github.com/llvm/llvm-project/commit/9a64fa7b7e446651bf40fe0e1289505bc115c6dd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/AST/Expr.h
M llvm/include/llvm/Support/PointerLikeTypeTraits.h
Log Message:
-----------
[Support] Use CTLog2 from PointerLikeTypeTraits.h (NFC) (#157790)
This patch replaces ConstantLog2 with CTLog2. ConstantLog2 only
operates on alignment values, making the two interchangeable in this
context. CTLog2 also has the benefit of a static_assert that ensures
its parameter is a power of two.
Commit: 65994cc929c26f29fc89a55903352d51e4e22c0b
https://github.com/llvm/llvm-project/commit/65994cc929c26f29fc89a55903352d51e4e22c0b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/type_traits.h
Log Message:
-----------
[Support] Use std::conditional_t in several type traits (NFC) (#157791)
With std::conditional_t, we don't have to have two templates for each
of these type traits.
Commit: a1fc0f985b0302601b7f054a0c5e4f337097dac3
https://github.com/llvm/llvm-project/commit/a1fc0f985b0302601b7f054a0c5e4f337097dac3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/docs/Contributing.rst
Log Message:
-----------
[llvm] Proofread Contributing.rst (#157792)
Commit: e92cbfbe30875071b3764cee39103a797eae4b1a
https://github.com/llvm/llvm-project/commit/e92cbfbe30875071b3764cee39103a797eae4b1a
Author: lntue <lntue at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M libc/src/__support/CPP/bit.h
M libc/src/__support/macros/CMakeLists.txt
M libc/src/__support/macros/config.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Update some __builtin_* usage to be compatible with MSVC. (#157870)
__builtin_trap, __builtin_expect, __builtin_ctz*, __builtin_clz*,
__builtin_popcount*.
Commit: c82d09c96a4c0c5454143cc35c935557528bb86b
https://github.com/llvm/llvm-project/commit/c82d09c96a4c0c5454143cc35c935557528bb86b
Author: nerix <nerixdev at outlook.de>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/PDB/Native/PublicsStream.h
M llvm/lib/DebugInfo/PDB/Native/PublicsStream.cpp
M llvm/unittests/DebugInfo/PDB/CMakeLists.txt
A llvm/unittests/DebugInfo/PDB/PublicsStreamTest.cpp
Log Message:
-----------
[PDB] Add public symbol lookup by address (#157361)
This adds a method on the `PublicsStream` to look up symbols using their
address (segment + offset).
It's largely a reimplementation of
[`NearestSym`](https://github.com/microsoft/microsoft-pdb/blob/805655a28bd8198004be2ac27e6e0290121a5e89/PDB/dbi/gsi.cpp#L1492-L1581)
from the reference. However, we don't return the nearest symbol, but the
exact symbol.
Still, in case of ICF, we return the symbol that's first in the address
map. Users can then use the returned offset to read the next records to
check if multiple symbols overlap, if desired.
>From #149701.
Commit: e5102e2931973eeea9adbf96e07cd72e1904b56e
https://github.com/llvm/llvm-project/commit/e5102e2931973eeea9adbf96e07cd72e1904b56e
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/builtins-elementwise.c
Log Message:
-----------
[CIR] Upstream FPToFPBuiltin ASinOp (#157350)
Upstream support for FPToFPBuiltin ASinOp
Commit: 397e5a457ae8458fe4687c607c75be6ede453a25
https://github.com/llvm/llvm-project/commit/397e5a457ae8458fe4687c607c75be6ede453a25
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
Log Message:
-----------
[ExpandVectorPredication] Expand vp_merge and vp_select in expandPredication. (#157777)
Commit: 61e4d2312d59d059f775734a3a7c96a6914c07b7
https://github.com/llvm/llvm-project/commit/61e4d2312d59d059f775734a3a7c96a6914c07b7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/and-negpow2-cmp.ll
M llvm/test/CodeGen/RISCV/bittest.ll
Log Message:
-----------
[RISCV] Fold (X & -(1 << C1) & 0xffffffff) == C2 << C1 to sraiw X, C1 == C2. (#157617)
We had an existing fold for (X & -(1 << C1) & 0xffffffff) == 0
which we can generalize to support comparing to constants other
than 0.
Previously we used srliw, but this generalizes better using sraiw.
I'm restricting to the case where C2 is simm12 or 2048 to allow
sraiw+addi/xori+seqz/snez to be used. Other constants require a
more careful analysis of the constants involved.
Commit: 265b032bdae0550de69ff52b4ef9deaf78bae522
https://github.com/llvm/llvm-project/commit/265b032bdae0550de69ff52b4ef9deaf78bae522
Author: kper <kevin.per at protonmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc-lshr.ll
Log Message:
-----------
[InstCombine] Added optimisation for trunc (Pow2 >> x) to i1 (#157030)
Closes #156898
I have added two cases. The first one matches when the constant is
exactly power of 2. The second case was to address the general case
mentioned in the linked issue. I, however, did not really solve the
general case.
We can only emit a `icmp ult` if all the bits are one and that's only
the case when the constant + 1 is a power of 2. Otherwise, we need to
create `icmp eq` for every bit that is one.
Here are a few examples which won't be working with the two cases:
- constant is `9`: https://alive2.llvm.org/ce/z/S5FLJZ
- subrange in `56`: https://alive2.llvm.org/ce/z/yn_ZNG
- and finally an example as worst case (because it alternates the bits):
https://alive2.llvm.org/ce/z/nDitNA
Commit: 41c685975e17704b25e461744ebd57429cdd95f1
https://github.com/llvm/llvm-project/commit/41c685975e17704b25e461744ebd57429cdd95f1
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
Log Message:
-----------
AMDGPU/UniformityAnalysis: fix G_ZEXTLOAD and G_SEXTLOAD (#157845)
Use same rules for G_ZEXTLOAD and G_SEXTLOAD as for G_LOAD.
Flat addrspace(0) and private addrspace(5) G_ZEXTLOAD and G_SEXTLOAD
should be always divergent.
Commit: f75622469588f1f20e53752df29fb403bd6084a7
https://github.com/llvm/llvm-project/commit/f75622469588f1f20e53752df29fb403bd6084a7
Author: Faith Rivera <fnrivera at ucsd.edu>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/LTO/Resolution/X86/unified-lto-check.ll
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
[llvm-lto2] Added llvm-lto2 -unified-lto descriptions (revised) (#155462)
This is a revised PR of #148309 (closed due to some git issues). The
changes do the following:
- Adds description for the modes of `-unified-lto=mode` option
- Changes parsing of `unified-lto` descriptions from string to cEnumValN
for continuity of description formatting
- Adds testing of error output in `unified-lto-check.ll`
Commit: e07716de0f85dd121f85cfdf1b413cb764beda2e
https://github.com/llvm/llvm-project/commit/e07716de0f85dd121f85cfdf1b413cb764beda2e
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/TableGen/FixedLenDecoderEmitter/conflict.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen][DecoderEmitter] Report all decoding conflicts (#157847)
Do not exit when the first decoding conflict is encountered. Instead
record the conflict and continue to report any additional decoding
conflicts and exit fatally after all instructions have been processed.
Commit: 00483379fbe018e51840e4783cecf6b76de8d3f9
https://github.com/llvm/llvm-project/commit/00483379fbe018e51840e4783cecf6b76de8d3f9
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP] Add definitions of TASKGRAPH, GRAPH_ID and GRAPH_RESET (#157502)
This only adds the definitions of the TASKGRAPH directive and the
associated clauses, plus the minimal additional changes to make
everything compile without errors.
Commit: 7b828738c692ba64a48b4f4f6763064d58ef0618
https://github.com/llvm/llvm-project/commit/7b828738c692ba64a48b4f4f6763064d58ef0618
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[LV] Add tests with multiple store groups re-using widened ops.
Test coverage for https://github.com/llvm/llvm-project/issues/156190.
Commit: 149b9ac171e0c27388b881cfe00f373b38252ce2
https://github.com/llvm/llvm-project/commit/149b9ac171e0c27388b881cfe00f373b38252ce2
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/source/Utility/ArchSpec.cpp
Log Message:
-----------
[NFC][lldb] Cleanup the ArchDefinitionEntry definitons. (#152618)
This patch has default initialization values for the "sub", "cpu_mask"
and "sub_mask" member variables of the ArchDefinitionEntry structure.
This can simplify and cleanup the ArchDefinitionEntry arrays by allowing
those that don't override the values to not have to initialize the
values in the definitions if they match the default values.
This patchs also disables clang format to align the values in the
columns for easier readability.
Commit: b44e6e01f7f778bbb569e07821f5ddfdb90c4d4d
https://github.com/llvm/llvm-project/commit/b44e6e01f7f778bbb569e07821f5ddfdb90c4d4d
Author: Amit Kumar Pandey <137622562+ampandey-1995 at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M compiler-rt/lib/dfsan/dfsan.cpp
M compiler-rt/lib/fuzzer/FuzzerCorpus.h
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/hwasan/hwasan_report.cpp
Log Message:
-----------
[NFC] Fix CodeQL violations in compiler-rt. (#157793)
This pull request addresses fixes against violations happening under
subcategory 'cpp/wrong-type-format-argument' related to
dfsan,fuzzer,hwasan.
Commit: 2701a220fae7a4fea97cba3fadcfd8f8aae8326e
https://github.com/llvm/llvm-project/commit/2701a220fae7a4fea97cba3fadcfd8f8aae8326e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/range.ll
M llvm/test/Transforms/JumpThreading/branch-debug-info2.ll
Log Message:
-----------
[LVI] Support no constant range of cast value in getEdgeValueLocal. (#157614)
proof: https://alive2.llvm.org/ce/z/8emkHY
Commit: a65aca6201e2455f7627732f5b378028fe651dec
https://github.com/llvm/llvm-project/commit/a65aca6201e2455f7627732f5b378028fe651dec
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/thread/step_until/TestStepUntil.py
M lldb/test/API/functionalities/thread/step_until/TestStepUntilAPI.py
Log Message:
-----------
[lldb][test] StepUntil disable test for unsupported linkers. (#157474)
`INSERT BEFORE` keyword is not supported in current versions gold and
mold linkers. Since we cannot confirm accurately what linker and version
is available on the system and when it will be supported. We test it
with a sample program using the script keywords.
Commit: ef9d04f0d6901ec79cf8d2747efcdf0306a74596
https://github.com/llvm/llvm-project/commit/ef9d04f0d6901ec79cf8d2747efcdf0306a74596
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[docs][OpenMP] Update loop transformation impementation status
Commit: f5315bd135b6e65ebfb0d27f6333501c3a4b32b3
https://github.com/llvm/llvm-project/commit/f5315bd135b6e65ebfb0d27f6333501c3a4b32b3
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py
Log Message:
-----------
[lldb][test] Re-enable `TestRerunAndExprDylib.py` (#157872)
the `skipTestIfFn` requires a function that return a string to skip or
None to run the test. The `isUbuntu18_04` function returns a bool and
the test is skipped on all platforms.
https://github.com/llvm/llvm-project/blob/25ebdfe0ab202a6cb30232d84bc5838439fd67d5/lldb/packages/Python/lldbsuite/test/decorators.py#L145-L157
Commit: e2d9420272e2f479dc714706be5a4aa0a4b2c90d
https://github.com/llvm/llvm-project/commit/e2d9420272e2f479dc714706be5a4aa0a4b2c90d
Author: jimingham <jingham at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/examples/python/cmdtemplate.py
M lldb/examples/python/templates/parsed_cmd.py
M lldb/test/API/commands/command/script/add/TestAddParsedCommand.py
M lldb/test/API/commands/command/script/add/test_commands.py
Log Message:
-----------
Make flag-only options work in the ParsedCommand mode of adding commands (#157756)
I neglected to add a test when I was writing tests for this, so of
course it broke. This makes it work again and adds a test.
rdar://159459160
Commit: 0a69cd4e34e3a1a8a84a2b9fe8764a4b535a9e37
https://github.com/llvm/llvm-project/commit/0a69cd4e34e3a1a8a84a2b9fe8764a4b535a9e37
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
A llvm/test/Transforms/JumpThreading/simplify-partially-redundant-load-debugloc.ll
Log Message:
-----------
[JumpThreading][DebugInfo] Propagate DebugLocs when simplifying loads (#157683)
In simplifyPartiallyRedundantLoad we may replace a load with a PHI of
available values in predecessor blocks. As part of this process, we may
need to cast those values, which we do by inserting a new cast at the
end of the predecessor. These cast instructions should take their debug
location from the load instruction, just as the PHI does; we make an
exception if the predecessor does not unconditionally branch to the
load's block, as in that case we are not guaranteed to reach the load
and must therefore drop its debug location.
Found using https://github.com/llvm/llvm-project/pull/107279.
Commit: 71389a5c7bbcf1b2200f5434d794e6ee44c59e4b
https://github.com/llvm/llvm-project/commit/71389a5c7bbcf1b2200f5434d794e6ee44c59e4b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/io-stmt.cpp
Log Message:
-----------
[flang][runtime] Preserve some list-directed input state in child (#157571)
Child list-directed input needs to inherit and return the state used to
process trailing separators (eatComma_) and terminal '/' (hitSlash_)
from any parent list-directed input statement.
Fixes https://github.com/llvm/llvm-project/issues/157509 and
https://github.com/llvm/llvm-project/issues/154971.
Commit: 7c66302343186decf6c541aefab1bc72ffea0a3b
https://github.com/llvm/llvm-project/commit/7c66302343186decf6c541aefab1bc72ffea0a3b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
Log Message:
-----------
[Libc++][NFC] Fix typos in tests (#157699)
Commit: b574e63f9fd1adb52786f9dc03ec6f479229e1a7
https://github.com/llvm/llvm-project/commit/b574e63f9fd1adb52786f9dc03ec6f479229e1a7
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/source/Commands/CommandObjectMemory.cpp
Log Message:
-----------
[lldb] Pass execution context to CompilerType::GetByteSize - in CommandObjectMemoryRead (NFC) (#157750)
Some type systems require an execution context be available when working with types
(ex: Swift). This fixes `memory read --type` to support such type systems, by passing in
an execution context to `GetByteSize()`, instead of passing null.
rdar://158968545
Commit: c511e1a0f8b899621dc253bd8e404fa6ed199294
https://github.com/llvm/llvm-project/commit/c511e1a0f8b899621dc253bd8e404fa6ed199294
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Preserve nneg in foldLogicCastConstant (#157865)
This patch makes use of the new public helper function to preserve nneg
in `foldLogicCastConstant`.
Commit: f1cdb447a8031027222c06646e2da292abd512f9
https://github.com/llvm/llvm-project/commit/f1cdb447a8031027222c06646e2da292abd512f9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/test/APINotes/yaml-roundtrip-2.test
M clang/test/APINotes/yaml-roundtrip.test
Log Message:
-----------
Reapply "[APINotes] Prefer diff -u over diff -b" (#157894)
This reverts commit 8d35bcc52117b79517f518de952b4b50463de160.
This was causing failures on MacOS due to the head command there not
supporting negative offsets. This patch fixes that by removing the call
to HEAD and relaxing the requirements around removing the last line of
the file.
Commit: 1495ceacbf511a0694df90341772d286fbcf2032
https://github.com/llvm/llvm-project/commit/1495ceacbf511a0694df90341772d286fbcf2032
Author: Valery Dmitriev <valeryd at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/include/flang/Lower/HlfirIntrinsics.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/HlfirIntrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
A flang/test/HLFIR/index-lowering.fir
M flang/test/HLFIR/invalid.fir
A flang/test/Lower/HLFIR/index.f90
M flang/test/Lower/volatile-string.f90
Log Message:
-----------
[flang] Add hlfir.index op to represent index intrinsic function (#157575)
The change adds a new HLFIR operation. A call to index intrinsic now
becomes lowered into the hlfir.index op and then naive lowering of the
op translates it back to appropriate runtime call. The change set is
aimed to be functionally equivalent to exiting index functionality, but
is much more efficient in a case of presence of the 'kind' intrinsic
parameter.
Also fixed couple of parameter lowering issues which were revealed while
working on the index-related functional parts.
Commit: 57bd1c6c74804540df80c3896f74788be6166d3f
https://github.com/llvm/llvm-project/commit/57bd1c6c74804540df80c3896f74788be6166d3f
Author: Tobias Stadler <mail at stadler-tobias.de>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/Remarks/BitstreamRemarkContainer.h
Log Message:
-----------
[Remarks] Remove redundant size from StringRefs (NFC) (#156357)
Pull Request: https://github.com/llvm/llvm-project/pull/156357
Commit: c685a205de0cef54062d0a93ff9b79f904f9eb22
https://github.com/llvm/llvm-project/commit/c685a205de0cef54062d0a93ff9b79f904f9eb22
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 106eb4623d0c
Commit: 5912c76b988a391c26ad6ca664d3e10f6b5e2c44
https://github.com/llvm/llvm-project/commit/5912c76b988a391c26ad6ca664d3e10f6b5e2c44
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/PDB/BUILD.gn
Log Message:
-----------
[gn build] Port c82d09c96a4c
Commit: ab26257c0334e0ba2a55ccd9acd2ccbf2267977d
https://github.com/llvm/llvm-project/commit/ab26257c0334e0ba2a55ccd9acd2ccbf2267977d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/google/BUILD.gn
Log Message:
-----------
[gn build] Port ed9dded83f5b
Commit: 675b01a4a3302211c070c6a95af5da23b950532b
https://github.com/llvm/llvm-project/commit/675b01a4a3302211c070c6a95af5da23b950532b
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64][instr] Remove instructions on saving and restoring NZCV (#156994)
Remove the `NZCV` save and restore instructions from instrumentation
sequence because the instructions used for getting counter address,
counter increment and stack push/pop won't impact `NZCV`. And with
this, we can use `X1` to do counter increment and remove the two
instructions that saves and later restores `X2`.
Commit: 0dddfab54cc3091ca6d29d9b733f0987ed79dc16
https://github.com/llvm/llvm-project/commit/0dddfab54cc3091ca6d29d9b733f0987ed79dc16
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
Log Message:
-----------
[SLP]Recalculate deps if the original instruction scheduled after being copyable
If the original instruction is going to be scheduled after same
instruction being scheduled as copyable, need to recalculate
dependencies. Otherwise, the dependencies maybe calculated incorrectly.
Commit: b580829c2b16de0b22716b3f9b9a9b2e79c55af5
https://github.com/llvm/llvm-project/commit/b580829c2b16de0b22716b3f9b9a9b2e79c55af5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Add helper method for checking for Zicond or XVentanaCondOps. NFC (#157891)
These two extensions have identical functionality so we always want to
treat them the same.
Commit: 33c9236bf870bc732a48a0256e90b907d1c21a49
https://github.com/llvm/llvm-project/commit/33c9236bf870bc732a48a0256e90b907d1c21a49
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvqdotq.ll
Log Message:
-----------
[RISCV] Extend zvqdot matching to handle disjoint or (#157901)
This patch makes use of pattern matching to handle disjoint or. Also, it
simplifies the multiplication matching.
Commit: ebf86b1c28d9e358403fe2b1bd145f339806799a
https://github.com/llvm/llvm-project/commit/ebf86b1c28d9e358403fe2b1bd145f339806799a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Fix mistake in comment in RISCVInstrInfoP.td. NFC
Commit: 20cfaf067912292b006dcb2c20cf6a925e640894
https://github.com/llvm/llvm-project/commit/20cfaf067912292b006dcb2c20cf6a925e640894
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/bindings/python/python.swig
Log Message:
-----------
[lldb] Remove unused swig macro (NFC) (#157905)
Commit: cb9cb4eb2e54917e80c93d7c44a559cc92964078
https://github.com/llvm/llvm-project/commit/cb9cb4eb2e54917e80c93d7c44a559cc92964078
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/tbaa-semantics-checks.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/tbaa-semantics-checks.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/tbaa-semantics-checks.test
Log Message:
-----------
[UTC] Introduce test for PR147670 (NFC)
Commit: 1cacc7339b21099bee85f7bb5d14b1964bdb3f74
https://github.com/llvm/llvm-project/commit/1cacc7339b21099bee85f7bb5d14b1964bdb3f74
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/tbaa-semantics-checks.ll.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/tbaa-semantics-checks.test
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/update_cc_test_checks.py
M llvm/utils/update_test_checks.py
Log Message:
-----------
[UTC] Record TBAA semantics when autogenerating check lines
UpdateTestChecks have been updated to take into account TBAA
semantics as well, when emitting checks. This is achieved by
parsing TBAA metadata for each tool invocation – whose tool
is identified by their prefixes –, and maintaining a global
dict of prefixes, TBAA nodes.
Commit: 8062b166762b51f1c3a9168e7031babde3e330a8
https://github.com/llvm/llvm-project/commit/8062b166762b51f1c3a9168e7031babde3e330a8
Author: Amit Kumar Pandey <pandey.kumaramit2023 at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M compiler-rt/lib/dfsan/dfsan.cpp
M compiler-rt/lib/fuzzer/FuzzerCorpus.h
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/hwasan/hwasan_report.cpp
Log Message:
-----------
Revert "[NFC] Fix CodeQL violations in compiler-rt. (#157793)" (#157913)
This reverts commit b44e6e01f7f778bbb569e07821f5ddfdb90c4d4d.
Commit: 6241cb34befb10ceff75293ce17560f016e2e79b
https://github.com/llvm/llvm-project/commit/6241cb34befb10ceff75293ce17560f016e2e79b
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
Log Message:
-----------
Driver: Fix two comments for accuracy.
Reviewers: carlocab, AaronBallman
Reviewed By: carlocab
Pull Request: https://github.com/llvm/llvm-project/pull/157769
Commit: 110ab5aa35bcd6091c02be8b814db20caf26b13a
https://github.com/llvm/llvm-project/commit/110ab5aa35bcd6091c02be8b814db20caf26b13a
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
[AMDGPU] Add builtins and intrinsics for cluster attributes (#157877)
Co-authored-by: Ivan Kosarev <ivan.kosarev at amd.com>
Commit: a879be833a4995e3b43f927db80b22f77571c702
https://github.com/llvm/llvm-project/commit/a879be833a4995e3b43f927db80b22f77571c702
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
A mlir/test/Dialect/LLVMIR/mmra.mlir
A mlir/test/Target/LLVMIR/Import/metadata-mmra.ll
A mlir/test/Target/LLVMIR/mmra.mlir
Log Message:
-----------
[mlir][LLVMIR] Support memory model relaxation annotations (MMRA) (#157770)
This commit adds support for exportind and importing MMRA data in the
LLVM dialect. MMRA is a potentilly-discardable piece of metadata that
can be placed on any operation that touches memory (fences, loads,
stores, atomics, and intrinsics that operate on memory). It includes one
(technically zero) ome more prefix:suffix string pairs which indicate
ways in which the LLVM memory model can be relaxed for these
annotations.
At the MLIR level, each tag is represented with a
`#llvm.mmra_tag<"prefix":"suffex">` attribute, and the MMRA metadata as
a whole is represented as a discardable llvm.mmra attribute. (This
discardability both allows us to transparently enable MMRA for wrapper
dialects like ROCDL and ensures that MLIR passes which don't know about
MMRA combining will, conservatively, discard the annotations, per the
LLVM spec).
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 0d404509be903f7a6bf62ea9f9cff4cfca893651
https://github.com/llvm/llvm-project/commit/0d404509be903f7a6bf62ea9f9cff4cfca893651
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
Log Message:
-----------
[HLSL] Add static methods for resource initialization (#155866)
Adds static methods `__createFromBinding` and `__createFromImplicitBinding` to resource classes. These methods will be
used for resource initialization instead of resource constructors that take binding information.
Updated proposal: https://github.com/llvm/wg-hlsl/pull/336
Commit: ccc340316ab94ee5370bb25c299851f3ee50cc4a
https://github.com/llvm/llvm-project/commit/ccc340316ab94ee5370bb25c299851f3ee50cc4a
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/FModTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf16_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/cospif_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp10m1f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp2m1f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/sinpif_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
Log Message:
-----------
[libc] Clean up errno header usage in math tests. (#157898)
This is one more follow-up to PR
https://github.com/llvm/llvm-project/pull/157517 that cleans up the
usage of
libc_errno in math unit-tests (non-smoke). It follows the same rule:
* if you use libc_errno in code literally, include
src/__support/libc_errno.h
* if you only rely on errno constants, include hdr/errno_macros.h
Several tests for exp/log still retain the direct libc_errno usage,
since in some cases they skip doing any validation if the error was
raised. But the direct usage of libc_errno is removed from all other
cases.
Commit: 9fdf2c7105972f16137bfc74456617dd4669febe
https://github.com/llvm/llvm-project/commit/9fdf2c7105972f16137bfc74456617dd4669febe
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-allocatable-device.cuf
Log Message:
-----------
[flang][cuda] Call runtime initialize for derived type with device components (#157914)
Commit: 055e4ff35ab0789494ff9a3d41e3182a3aca8d0a
https://github.com/llvm/llvm-project/commit/055e4ff35ab0789494ff9a3d41e3182a3aca8d0a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
Log Message:
-----------
[VPlan] Don't narrow op multiple times in narrowInterleaveGroups.
Track which ops already have been narrowed, to avoid narrowing the same
operation multiple times. Repeated narrowing will lead to incorrect
results, because we could first narrow from an interleave group -> wide
load, and then narrow the wide load > single-scalar load.
Fixes thttps://github.com/llvm/llvm-project/issues/156190.
Commit: 5ceb450cfbc6c629620ba02949cfced4ff61c2a5
https://github.com/llvm/llvm-project/commit/5ceb450cfbc6c629620ba02949cfced4ff61c2a5
Author: cmtice <cmtice at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M compiler-rt/test/hwasan/TestCases/Posix/dlerror.cpp
M compiler-rt/test/rtsan/unrecognized_flags.cpp
M compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
M compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
M compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
[compiler-rt] Update some tests to pass with lit internal shell. (#157910)
The lit internal shell needs environment variable definitions to be
preceded by the 'env' keyword. This PR add that to tests that were
missing it.
Commit: 78853df2bf8236a0d218c20e4c62829e196c5d3d
https://github.com/llvm/llvm-project/commit/78853df2bf8236a0d218c20e4c62829e196c5d3d
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
A flang/test/Transforms/DoConcurrent/basic_device.f90
M flang/test/Transforms/DoConcurrent/basic_device.mlir
A flang/test/Transforms/DoConcurrent/use_loop_bounds_in_body.f90
Log Message:
-----------
[flang][OpenMP] Extend `do concurrent` mapping to device (#155987)
Upstreams further parts of `do concurrent` to OpenMP conversion pass
from AMD's fork. This PR extends the pass by adding support for mapping
to the device.
PR stack:
- https://github.com/llvm/llvm-project/pull/155754
- https://github.com/llvm/llvm-project/pull/155987 ◀️
- https://github.com/llvm/llvm-project/pull/155992
- https://github.com/llvm/llvm-project/pull/155993
- https://github.com/llvm/llvm-project/pull/157638
- https://github.com/llvm/llvm-project/pull/156610
- https://github.com/llvm/llvm-project/pull/156837
Commit: 11a4f5b8c49698d8be5f4da550dbac43e6c0de8c
https://github.com/llvm/llvm-project/commit/11a4f5b8c49698d8be5f4da550dbac43e6c0de8c
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
Log Message:
-----------
[lldb-dap] Fix test: TestDAP_server.py (#157924)
See
https://github.com/llvm/llvm-project/pull/156803#issuecomment-3275911510
for full context.
Summary:
* In https://github.com/llvm/llvm-project/pull/156803, we see a builtbot
failure for `TestDAP_server.py` on Debian. Note that macOS and other
Linux distributions (like CentOS, or whatever Linux the [required
buildbot](https://github.com/llvm/llvm-project/actions/runs/17594257911/job/49982560193#logs)
uses) seem to pass the tests.
* In the 3 newly added tests, the most complex test case passed, while
the other easier ones failed.
```
PASS: LLDB (/home/worker/2.0.1/lldb-x86_64-debian/build/bin/clang-x86_64) :: test_connection_timeout_multiple_sessions (TestDAP_server.TestDAP_server.test_connection_timeout_multiple_sessions)
FAIL: LLDB (/home/worker/2.0.1/lldb-x86_64-debian/build/bin/clang-x86_64) :: test_connection_timeout_long_debug_session (TestDAP_server.TestDAP_server.test_connection_timeout_long_debug_session)
FAIL: LLDB (/home/worker/2.0.1/lldb-x86_64-debian/build/bin/clang-x86_64) :: test_connection_timeout_at_server_start (TestDAP_server.TestDAP_server.test_connection_timeout_at_server_start)
```
* The error is that `process.wait(timeout)` timed out during the
teardown of the tests.
* The above suggests that maybe the root cause is that the timeout is
set too strictly (and that maybe the server termination on Debian is
slower than the other Linux distribution for some reason).
* This patch loosens that timeout from 2s to 5s. Let's see if this
works.
* FWIW, I cannot verify the root cause, because I don't have a Debian
machine.
Commit: 9e778f6cd155f64896a9a0580e96aa4814ca999b
https://github.com/llvm/llvm-project/commit/9e778f6cd155f64896a9a0580e96aa4814ca999b
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Support/DXILABI.h
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll
Log Message:
-----------
[DirectX] Removing dxbc DescriptorRange from mcbxdc (#154629)
MC Descriptor Range Representation currently depend on Object
structures. This PR removes that dependency and in order to facilitate
removing to_underlying usage in follow-up PRs.
Commit: 6a581f72031ed4e1165c735481b358988ab9e01e
https://github.com/llvm/llvm-project/commit/6a581f72031ed4e1165c735481b358988ab9e01e
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ASTContext.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
Log Message:
-----------
[clang] fix incorrect assumption about function type 's ExtInfo (#157925)
This fixes an assumption that the ExtInfo for two same function types
would have referential equality.
This should compare these ExtInfos by value instead.
The bug is pre-existing to
https://github.com/llvm/llvm-project/pull/147835, but that PR adds
another way to reproduce it.
Commit: c6947dad53dacc19d47b4da6b1984ca39ec111f6
https://github.com/llvm/llvm-project/commit/c6947dad53dacc19d47b4da6b1984ca39ec111f6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Add helper method for detecting BEXTI or TH_TST is supported. NFC (#157915)
These instructions both extract single bit to bit 0 and fill the upper
bits with 0.
There's at least one place where we check for BEXTI but not TH_TST. I
wanted to keep this patch NFC so that will be a follow up fix.
Commit: 262c7b7b5a996b0c46fdfc3480273f1864edc1c0
https://github.com/llvm/llvm-project/commit/262c7b7b5a996b0c46fdfc3480273f1864edc1c0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-diff-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-diff-rv64.mir
Log Message:
-----------
[RISCV][GISel] Widen G_ABDS/G_ABDU before lowering when Zbb is enabled. (#157766)
This allows us to use G_SMIN/SMAX/UMIN/UMAX in the lowering.
Commit: f0b80699ccb9262a789523a4c987af7864d8ee55
https://github.com/llvm/llvm-project/commit/f0b80699ccb9262a789523a4c987af7864d8ee55
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/include/flang/Semantics/tools.h
Log Message:
-----------
[flang][cuda][NFC] Simplify IsCUDAShared (#157931)
Commit: d7e6e7289d668354e63c48fd229198ae697f8521
https://github.com/llvm/llvm-project/commit/d7e6e7289d668354e63c48fd229198ae697f8521
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
A llvm/test/MC/RISCV/rv32zbkb-aliases-valid.s
A llvm/test/MC/RISCV/rv64zbkb-aliases-valid.s
Log Message:
-----------
[RISCV] Correct the predicate for the ror and rorw with immediate InstAliases. (#157921)
Commit: 55e99efdf1bdd7150f680eee171e0d867a0864c6
https://github.com/llvm/llvm-project/commit/55e99efdf1bdd7150f680eee171e0d867a0864c6
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py
Log Message:
-----------
[lldb][test] skip test `TestRerunAndExprDylib.py` on remote (#157916)
Commit: c745c5497069a966a43e5ba03d137e0189921073
https://github.com/llvm/llvm-project/commit/c745c5497069a966a43e5ba03d137e0189921073
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/tools/llvm-cgdata/empty.test
M llvm/test/tools/llvm-cgdata/error.test
M llvm/test/tools/llvm-gsymutil/X86/elf-dwarf.yaml
M llvm/test/tools/llvm-objcopy/ELF/add-invalid-note.test
M llvm/test/tools/llvm-profdata/binary-ids-padding.test
M llvm/test/tools/llvm-profdata/raw-32-bits-be.test
M llvm/test/tools/llvm-profdata/raw-32-bits-le.test
M llvm/test/tools/llvm-profdata/raw-64-bits-be.test
M llvm/test/tools/llvm-profdata/raw-64-bits-le.test
M llvm/test/tools/llvm-strings/negative-char.test
M llvm/test/tools/llvm-strings/stdin.test
M llvm/test/tools/llvm-symbolizer/basic.s
M llvm/test/tools/llvm-symbolizer/split-dwarf-dwp.test
M llvm/test/tools/sanstats/elf.test
Log Message:
-----------
[LLVM] Prefer octal to hex for printf (#157884)
Hex escapes of the form \xff are not universally supported in the printf
implementations on the platforms that LLVM runs on (although they
apparently are in the shell builtins). Octal escapes are required to be
supported by POSIX. This patch converts all hex escapes to octal escapes
for compatibility reasons.
This came up when trying to turn on lit's internal shell by default for
llvm/. We started using /usr/bin/printf instead of the shell builtin on
MacOS, which does not support hex escapes.
I used the following python script to automate most of the conversion
with a few manual touchups needed:
```py
import sys
def process_line(to_process: str):
output = ""
i = 0
while i < len(to_process):
if to_process[i:i+2] == '\\x':
hex_string = to_process[i+2:i+4]
number = int(hex_string, 16)
output += "\\"
octal_string = oct(number)[2:]
if len(octal_string) == 1:
octal_string = "00" + octal_string
elif len(octal_string) == 2:
octal_string = "0" + octal_string
assert(len(octal_string) == 3)
output += octal_string
i += 4
else:
output += to_process[i]
i += 1
return output
with open(sys.argv[1]) as input_file:
lines = input_file.readlines()
for i, _ in enumerate(lines):
lines[i] = process_line(lines[i])
with open(sys.argv[1], 'w') as output_file:
output_file.writelines(lines)
```
Commit: 17723e472e228be5404ab4377498b52a0c5db03b
https://github.com/llvm/llvm-project/commit/17723e472e228be5404ab4377498b52a0c5db03b
Author: Bangtian Liu <liubangtian at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
Log Message:
-----------
[mlir][Linalg] Allow PartialReductionOpInterface ops in tile_reduction_using_forall (#157932)
Following [PR
#120118](https://github.com/llvm/llvm-project/pull/120118), this PR
extends transform.structured.tile_reduction_using_forall so that it can
be applied to any operation implementing `PartialReductionOpInterface`,
rather than being restricted to LinalgOp.
Existing tests relevant to linalg ops remain valid:
https://github.com/llvm/llvm-project/blob/2a2296b1aab4614bf6c95c3003000832c9d43de5/mlir/test/Dialect/Linalg/transform-tile-reduction.mlir#L114
Additional tests for non-Linalg operations (e.g., IREE custom ops that
implement `PartialReductionOpInterface`) will be added on the IREE side.
Signed-off-by: Bangtian Liu <liubangtian at gmail.com>
Commit: 3af202abf88882e05d6c1e9aa8d7a471c2af9d64
https://github.com/llvm/llvm-project/commit/3af202abf88882e05d6c1e9aa8d7a471c2af9d64
Author: Druzhkov Sergei <serzhdruzhok at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[NFC][LLVM] Fix link in Maintainers.md (#157857)
Fixed link to LLDB maintainers list (format was changed in 48ace3f.
Commit: 24e9ee44a8a58ae4b23a2508ca331ebf001972e2
https://github.com/llvm/llvm-project/commit/24e9ee44a8a58ae4b23a2508ca331ebf001972e2
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Evaluate/check-expression.cpp
M flang/test/Lower/components.f90
A flang/test/Semantics/contiguous02.f90
Log Message:
-----------
[flang] Improve contiguity checker for component references (#153222)
Component references to array values had a couple of TODOs in the
contiguity checker; implement them so that contiguity errors/warnings
and code generation are more accurate. Specifically, "a(1:1)%b" is
contiguous because there's a single element; "a(1:2)%b" is contiguous
when the type of "a" has but a single component. The case of multiple
components in the type is discontiguous when the array is known to have
multiple elements.
Commit: 827d775d6727c786278acea7dbe74c91ac25a49d
https://github.com/llvm/llvm-project/commit/827d775d6727c786278acea7dbe74c91ac25a49d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[docs][OpenMP] Claim TASKGRAPH (#157947)
cc: @jtb20
Commit: 7f007b572d63fe802a1f5587c74aae437f9f50e6
https://github.com/llvm/llvm-project/commit/7f007b572d63fe802a1f5587c74aae437f9f50e6
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
Log Message:
-----------
[MLIR][Vector] Add warp distribution for `scf.if` (#157119)
This PR adds `scf.if` op distribution to the existing `VectorDistribute`
patterns. The logic mostly follows that of `scf.for`: move op outside, wrap each
branch with `gpu.warp_execute_on_lane_0`. A notable difference to `scf.for` is
that each branch has its own set of escaping values, and `scf.if` itself does not
have block arguments.
Commit: 35b141f6c976bc90ffb361f3f8cfd584d737e6eb
https://github.com/llvm/llvm-project/commit/35b141f6c976bc90ffb361f3f8cfd584d737e6eb
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Semantics/expression.cpp
A flang/test/Evaluate/bug157379.f90
Log Message:
-----------
[flang] Translate +x to (x), not x (#157513)
In expression semantics, don't completely delete the unary plus
operator, but instead translate it into parentheses. The distinction
matters in contexts where the bounds of x are significant or when x must
not be misinterpreted as a variable.
Fixes https://github.com/llvm/llvm-project/issues/157379.
Commit: de5f9fa7b3fb1a22751f2d222e75e80bfdd138a0
https://github.com/llvm/llvm-project/commit/de5f9fa7b3fb1a22751f2d222e75e80bfdd138a0
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
Log Message:
-----------
[NFCI] Fix Wattributes warnings from Sema. (#157906)
See: https://github.com/llvm/llvm-project/issues/157834
There is some visibility concerns here, so this patch suppresses the
diagnostic. I believe we are doing this intentionally, so unless someone
comes up with a good reason we should either remove the visibility of
Sema, or make these types visible, this seems like the right way
forward.
Fixes: #157834
Commit: e062b9c9a3433c968786f0d8107b032f53ebe14f
https://github.com/llvm/llvm-project/commit/e062b9c9a3433c968786f0d8107b032f53ebe14f
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/test/Semantics/resolve20.f90
Log Message:
-----------
[flang] Downgrade error to warning for consistency (#157191)
When a procedure name is declared EXTERNAL and then followed up with an
explicit INTERFACE, the compiler emits an error when the procedure is a
dummy procedure but only a warning otherwise. Since the EXTERNAL
statement is harmless in both cases, accept the case of a dummy
procedure as well for consistency.
Fixes https://github.com/llvm/llvm-project/issues/157162.
Commit: 8ae3aeaca0b2de1702c90b120ef4b57accef9a3c
https://github.com/llvm/llvm-project/commit/8ae3aeaca0b2de1702c90b120ef4b57accef9a3c
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
Log Message:
-----------
[AMDGPU] NFC. Add testcase to test SIInsertWaitcnts::generateWaitcntInstBefore (#157938)
Pre-commit testcase for https://github.com/llvm/llvm-project/pull/157821
Commit: 701b839885477df72e376adc2c74f070adcb80a9
https://github.com/llvm/llvm-project/commit/701b839885477df72e376adc2c74f070adcb80a9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Fix type mismatch when transferring logical (#157952)
Commit: 1efa997317b7fb7ad2eacf5ff1497f09d8ca203b
https://github.com/llvm/llvm-project/commit/1efa997317b7fb7ad2eacf5ff1497f09d8ca203b
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Handle stores to single-scalar addr in narrowToSingleScalars.
Move handling of stores to single-scalar/uniform address from
replicateByVF to narrowToSingleScalar.
Commit: 10cb68593912971ad6fc844162fb659197a55f11
https://github.com/llvm/llvm-project/commit/10cb68593912971ad6fc844162fb659197a55f11
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.rst
Log Message:
-----------
[AMDGPU] llvm.prefetch documentation for gfx1250. NFC (#157949)
Commit: 0c07efdebce381e87b1a68f91e9184dcd98cc5ca
https://github.com/llvm/llvm-project/commit/0c07efdebce381e87b1a68f91e9184dcd98cc5ca
Author: cmtice <cmtice at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/duplicate_os_log_reports.cpp
M compiler-rt/test/asan/TestCases/Linux/read_binary_name_regtest.c
M compiler-rt/test/asan/TestCases/suppressions-library.cpp
M compiler-rt/test/asan/TestCases/verbose-log-path_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/external_symbolizer_path.cpp
M compiler-rt/test/sanitizer_common/TestCases/suffix-log-path_test.c
M compiler-rt/test/ubsan/TestCases/Misc/coverage-levels.cpp
M compiler-rt/test/ubsan/TestCases/Misc/log-path_test.cpp
Log Message:
-----------
[compiler-rt] Removed unnecessary 'REQUIRES: shell' from lit tests. (#157951)
As part of our work to migrate tests to use the lit internal shell by
default, this removes 'REQUIRES: shell' from tests that don't actually
require it. In one case the test was updated slightly to pass without
requiring shell.
Commit: 984251acadb4b14bdb73b7a16fb0ccf134120c4b
https://github.com/llvm/llvm-project/commit/984251acadb4b14bdb73b7a16fb0ccf134120c4b
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/Thumb2/active_lane_mask.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-i16-add.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-i8-add.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll
M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
M llvm/test/CodeGen/Thumb2/mve-vld2.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
M llvm/test/CodeGen/Thumb2/mve-vld4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vld4.ll
M llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/test-shrink-bug.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
Log Message:
-----------
Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)
Reverts llvm/llvm-project#157658
Causes hangs, see
https://github.com/llvm/llvm-project/pull/157658#issuecomment-3276441812
Commit: f2b6ec689b5abe65c1aa4c50a2c7ef2f290f0a08
https://github.com/llvm/llvm-project/commit/f2b6ec689b5abe65c1aa4c50a2c7ef2f290f0a08
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Quant/Transforms/NormalizeQuantTypes.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for performance-unnecessary-value-param in NormalizeQuantTypes.cpp (NFC)
Commit: 690b9c991b40dea6e116510d9c9562d50e800db4
https://github.com/llvm/llvm-project/commit/690b9c991b40dea6e116510d9c9562d50e800db4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-container-size-empty in DecomposeGenericByUnfoldingPermutation.cpp (NFC)
Commit: 89508c359249b80a9a0bf678c2c4ef5421fe791d
https://github.com/llvm/llvm-project/commit/89508c359249b80a9a0bf678c2c4ef5421fe791d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in TosaOps.cpp (NFC)
Commit: 5cf35f177230696d5f3b932556b4edb4d2c08df7
https://github.com/llvm/llvm-project/commit/5cf35f177230696d5f3b932556b4edb4d2c08df7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for performance-for-range-copy in OpenMPDialect.cpp (NFC)
Commit: 112be8970de5d644e629dd97fcc8b9a458f47396
https://github.com/llvm/llvm-project/commit/112be8970de5d644e629dd97fcc8b9a458f47396
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Add test introduced in #156477 to profcheck-xfail list (#157961)
The test exposes existing root profile propagation issues
Commit: c04b98fbd4a2c70d547e3b9eb03446624b414d31
https://github.com/llvm/llvm-project/commit/c04b98fbd4a2c70d547e3b9eb03446624b414d31
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Add tbaa-semantics-checks.test to profcheck-xfail.txt post- #147670 (#157963)
Commit: c087da4b18192220debcd41d29de100987d1f324
https://github.com/llvm/llvm-project/commit/c087da4b18192220debcd41d29de100987d1f324
Author: GeorgeHuyubo <113479859+GeorgeHuyubo at users.noreply.github.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
Log Message:
-----------
[lldb][ElfCore] Improve main executable detection in core files (#157170)
This change improves how LLDB's ProcessElfCore plugin identifies the
main executable when loading ELF core files. Previously, the code would
simply use the first entry in the NT_FILE section, which is not
guaranteed to be the main executable, also the first entry might not
have a valid UUID.
1. **Storing executable name**: Extract the executable name from the ELF
NT_PRPSINFO note and store it in `m_executable_name`
2. **Preferential matching**: When selecting the main executable from
NT_FILE entries, prefer entries whose path ends with the stored
executable name
3. **UUID-based lookup**: Call `FindModuleUUID()` helper function to
properly match modules by path and retrieve a valid UUID
Co-authored-by: George Hu <hyubo at meta.com>
Commit: 4a4bddec3571d78c8073fa45b57bbabc8796d13d
https://github.com/llvm/llvm-project/commit/4a4bddec3571d78c8073fa45b57bbabc8796d13d
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
A clang/test/Modules/modules-cache-path-canonicalization-output.c
Log Message:
-----------
[clang] Delay normalization of `-fmodules-cache-path` (#150123)
This PR is part of an effort to remove file system usage from the
command line parsing code. The reason for that is that it's impossible
to do file system access correctly without a configured VFS, and the VFS
can only be configured after the command line is parsed. I don't want to
intertwine command line parsing and VFS configuration, so I decided to
perform the file system access after the command line is parsed and the
VFS is configured - ideally right before the file system entity is used
for the first time.
This patch delays normalization of the module cache path until
`CompilerInstance` is asked for the cache path in the current
compilation context.
Commit: b8cefcb601ddaa18482555c4ff363c01a270c2fe
https://github.com/llvm/llvm-project/commit/b8cefcb601ddaa18482555c4ff363c01a270c2fe
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Restrict operands of ld_scale_paired to low 256 vgprs. NFCI (#157935)
This is NFC because these instructions are never selected just
by itself.
Commit: 613caa909c78f707e88960723c6a98364656a926
https://github.com/llvm/llvm-project/commit/613caa909c78f707e88960723c6a98364656a926
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
R clang/test/Modules/modules-cache-path-canonicalization-output.c
Log Message:
-----------
Revert "[clang] Delay normalization of `-fmodules-cache-path` (#150123)"
This reverts commit 4a4bddec3571d78c8073fa45b57bbabc8796d13d. The Serialization library doesn't link Frontend, where CompilerInstance lives, causing link failures on some build bots.
Commit: f2d827c444d07b722a94689b427d6ad2d1c6b1b7
https://github.com/llvm/llvm-project/commit/f2d827c444d07b722a94689b427d6ad2d1c6b1b7
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/lib/IR/ProfDataUtils.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/test/Transforms/JumpTableToSwitch/basic.ll
M llvm/test/Transforms/PGOProfile/prof-inject-existing.ll
M llvm/test/Transforms/PGOProfile/prof-verify-existing.ll
M llvm/test/Transforms/WholeProgramDevirt/branch-funnel-profile.ll
M llvm/test/Verifier/branch-weight.ll
Log Message:
-----------
[profcheck] Require `unknown` metadata have an origin parameter (#157594)
Rather than passes using `!prof = !{!”unknown”}`for cases where don’t have enough information to emit profile values, this patch captures the pass (or some other information) that can help diagnostics - i.e. `!{!”unknown”, !”some-pass-name”}`.
For example, suppose we emitted a `select` with the unknown metadata, and, later, end up needing to lower that to a conditional branch. If we observe (via sample profiling, for example) that the branch is biased and would have benefitted from a valid profile, the extra information can help speed up debugging.
We can also (in a subsequent pass) generate optimization remarks about such lowered selects, with a similar aim - identify patterns lowering to `select` that may be worth some extra investment in extracting a more precise profile.
Commit: 1b9b79071de634c8d77785c4d2c8da02857b533b
https://github.com/llvm/llvm-project/commit/1b9b79071de634c8d77785c4d2c8da02857b533b
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstoreprefetch.mlir
M mlir/test/Conversion/XeGPUToXeVM/materializecast.mlir
R mlir/test/Conversion/XeGPUToXeVM/update_offset.mlir
Log Message:
-----------
[MLIR][Conversion] Convert XeGPU to XeVM pass: Remove lowering support for tensor descriptor with offsets. (#157550)
And update load/store/prefetch test cases to use direct offsets.
Tensor descriptors with offsets are getting deprecated.
Commit: 0b87d27097dc71916dd041e5be87fefd26006867
https://github.com/llvm/llvm-project/commit/0b87d27097dc71916dd041e5be87fefd26006867
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/simd.h
M libc/test/src/__support/CPP/simd_test.cpp
Log Message:
-----------
[libc] Implement vector 'split' and 'concat' routines (#157537)
Summary:
This provides some helpers for the split and concatenation routines for
changing the size of an existing vector. This includes a simple tuple
type to do the splitting. The tuple doesn't support structured bindings
yet.
The concat function is more limited than what would be ideal, but the
shufflevector builtin requires things of equivalent sizes and I
didn't think it was worth wrangling with that just yet.
Commit: d7318ebe9338cd2d4cd4023bd308d981b5e01ece
https://github.com/llvm/llvm-project/commit/d7318ebe9338cd2d4cd4023bd308d981b5e01ece
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M libc/test/src/wchar/CMakeLists.txt
M libc/test/src/wchar/WcstolTest.h
M libc/test/src/wchar/mblen_test.cpp
M libc/test/src/wchar/mbrlen_test.cpp
M libc/test/src/wchar/mbrtowc_test.cpp
M libc/test/src/wchar/mbsnrtowcs_test.cpp
M libc/test/src/wchar/mbsrtowcs_test.cpp
M libc/test/src/wchar/mbstowcs_test.cpp
M libc/test/src/wchar/mbtowc_test.cpp
M libc/test/src/wchar/wcrtomb_test.cpp
M libc/test/src/wchar/wctomb_test.cpp
Log Message:
-----------
[libc] Clean up errno header usage in wchar tests. (#157942)
See PR #157898 and PR #157517 for similar changes to math tests.
Don't include libc_errno.h header, since the tests don't manipulate
errno directly. Instead, where appropriate, include hdr/errno_macros.h
proxy header to get errno constant values to match against.
Commit: 55bef46146f05e1911fcb98715716d914efd518c
https://github.com/llvm/llvm-project/commit/55bef46146f05e1911fcb98715716d914efd518c
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/HeaderSearch.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
A clang/test/Modules/modules-cache-path-canonicalization-output.c
Log Message:
-----------
Reland "[clang] Delay normalization of `-fmodules-cache-path` (#150123)"
This reverts commit 613caa909c78f707e88960723c6a98364656a926, essentially
reapplying 4a4bddec3571d78c8073fa45b57bbabc8796d13d after moving
`normalizeModuleCachePath` from clangFrontend to clangLex.
This PR is part of an effort to remove file system usage from the
command line parsing code. The reason for that is that it's impossible
to do file system access correctly without a configured VFS, and the VFS
can only be configured after the command line is parsed. I don't want to
intertwine command line parsing and VFS configuration, so I decided to
perform the file system access after the command line is parsed and the
VFS is configured - ideally right before the file system entity is used
for the first time.
This patch delays normalization of the module cache path until
`CompilerInstance` is asked for the cache path in the current
compilation context.
Commit: 675ecf6d73534c4c18081667e4b843561540c36a
https://github.com/llvm/llvm-project/commit/675ecf6d73534c4c18081667e4b843561540c36a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
Log Message:
-----------
[RISCV] Use default promotion for i32 CTLZ_ZERO_UNDEF on RV64 with XTHeadBb. (#157955)
If we don't need to worry about the input being zero, we can shift the
input right by 32 and use TH_FF1.
Commit: db74eae1dc92719fe91e0101d8255427933a61d5
https://github.com/llvm/llvm-project/commit/db74eae1dc92719fe91e0101d8255427933a61d5
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
[WebKit checkers] Treat NULL, 0, and nil like nullptr (#157700)
This PR makes WebKit checkers treat NULL, 0, and nil like nullptr in
various places.
Commit: 4644099b54e8c794bce56adabc5f3c3d714e325f
https://github.com/llvm/llvm-project/commit/4644099b54e8c794bce56adabc5f3c3d714e325f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
Log Message:
-----------
AMDGPU: Remove most manual AVLdSt decoder code (#157861)
This was additional hacking around using incorrect register class
constraints for paired data operands. I'm not really sure why we
need any of what's left. In particular the IS_VGPR special case
seems backwards from how the encoding works.
Commit: 8f8429540e8acb67df4e9f260326a372d2695dee
https://github.com/llvm/llvm-project/commit/8f8429540e8acb67df4e9f260326a372d2695dee
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
Log Message:
-----------
[ExpandVectorPredication] Keep the original value name when expanding predicated instructions. (#157943)
This makes it easier to follow a value through the pass. If we pass the
original name to the create function, a number will be added as a suffix
since the original name is still used until it is replaced.
Commit: f869d7a1b100c9f9fc5bb06effcf4f73346c0919
https://github.com/llvm/llvm-project/commit/f869d7a1b100c9f9fc5bb06effcf4f73346c0919
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/test/lit.cfg.py
Log Message:
-----------
Reapply "[llvm] Use lit internal shell by default"
This reverts commit ee5bc5701bbe9c0deb44dc5ab036c40f2a7bf7e0.
This was causing test failures on Darwin due to printf there not supporting hex
escapes. That has since been fixed in a separate patch.
Commit: 9179d3f19e32630dd54efd8a41cb57737b5ec4f3
https://github.com/llvm/llvm-project/commit/9179d3f19e32630dd54efd8a41cb57737b5ec4f3
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/Frontend/HLSL/HLSLBinding.h
M llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
A llvm/test/CodeGen/DirectX/rootsignature-valid-textures.ll
A llvm/test/CodeGen/DirectX/rootsignature-valid-typedbuffer.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-textures-fail.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-typedbuffer-fail.ll
Log Message:
-----------
[DirectX] Validate if Textures/TypedBuffers are being bound in Root Signatures (#147573)
DXC doesn't allow Textures/TypedBuffers to bind with root signature
descriptors, this implements the same check.
Closes: #126647
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Co-authored-by: Joao Saffran <{ID}+{username}@users.noreply.github.com>
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 3e898bc40fc344b72cdf6b0ee75eb22b73ee840f
https://github.com/llvm/llvm-project/commit/3e898bc40fc344b72cdf6b0ee75eb22b73ee840f
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
Log Message:
-----------
[LV] Fix cost misaligned when gather/scatter w/ addr is uniform. (#157387)
This patch fix the assertion when the `isUniform` (from legacy model)
and `isSingleScalar`(from Vplan-based model) mismatch.
The simplify test that cause assertion
```
loop:
loadA = load %a => %a is loop invariant.
loadB = load %LoadA
...
```
In the legacy cost model, it cannot analysis that addr of `%loadB` is
uniform but in the Vplan-based cost model both addr in `%loadA` and
`loadB` is single scalar.
Full test caused crash: https://llvm.godbolt.org/z/zEG8YKjqh.
---------
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 0efa75de650c41cce0e56d2b1a396d740fd96ab4
https://github.com/llvm/llvm-project/commit/0efa75de650c41cce0e56d2b1a396d740fd96ab4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Semantics/symbol.cpp
Log Message:
-----------
[flang] Fix MSVC build break after e062b9c9a3433 (#157971)
Commit: b8e1cc5c72d1e4243a189b2516517bcd5de7ea18
https://github.com/llvm/llvm-project/commit/b8e1cc5c72d1e4243a189b2516517bcd5de7ea18
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M libc/test/src/time/CMakeLists.txt
M libc/test/src/time/asctime_r_test.cpp
M libc/test/src/time/asctime_test.cpp
M libc/test/src/time/ctime_r_test.cpp
M libc/test/src/time/ctime_test.cpp
M libc/test/src/time/gmtime_r_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/nanosleep_test.cpp
Log Message:
-----------
[libc] Migrate some test/src/time tests to ErrnoCheckingTest. (#157960)
Use ErrnoCheckingTest harness to clear out / validate errno value
before/after the test respectively. Clean up explicit libc_errno.h
inclusions which is unnecessary, since no test modifies errno directly.
Commit: 4eadb45f83cef00165055f8038f179ca5c3e88ef
https://github.com/llvm/llvm-project/commit/4eadb45f83cef00165055f8038f179ca5c3e88ef
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/unwind/cortex-m-exception/TestCortexMExceptionUnwind.py
Log Message:
-----------
[lldb][NFC] Try to adapt Cortex-M API test for an Unbuntu bot
When I added support for the Cortex-M exception return unwinding,
I got CI test failures on the lldb-remote-linux-ubuntu bot. The
triple from my test `binary.json`, "armv7m-apple", was not being
used for the Target, so the incorrect SysV / AAPCS ABI was being
selected, and that ABI plugin has default unwind plans that hardcode
the arm-code r11 frame pointer behavior. This is a Cortex-M
core, and r7 should be used. The Darwin Arm ABI plugin uses r7 for
both arm and thumb, and behaves correctly.
Try getting the triple from `binary.json` in the API test, creating
the target with that triple explicitly before loading the corefile.
This may help prevent however we were losing the "-apple-" part of
the triple. We'll see what the CI bot looks like with this added.
Commit: 96413995d485783b2c1eede30e1fc7e277ba4e9c
https://github.com/llvm/llvm-project/commit/96413995d485783b2c1eede30e1fc7e277ba4e9c
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/unittests/Support/VirtualOutputBackendsTest.cpp
Log Message:
-----------
Fix a `-Wunused-variable` warning on windows (#157973)
The `UID` variable is only being used inside the `#ifndef _WIN32` block - move
the definition into the block as well.
Commit: 0dbea52dde644e23672cde3bcc8bcef560a0eaf8
https://github.com/llvm/llvm-project/commit/0dbea52dde644e23672cde3bcc8bcef560a0eaf8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Parser/OpenMP/taskgraph.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Parse TASKGRAPH, GRAPH_ID, and GRAPH_RESET (#157926)
This is parsing only, no semantic check are performed.
Commit: 21857ae337e0892a5522b6e7337899caa61de2a6
https://github.com/llvm/llvm-project/commit/21857ae337e0892a5522b6e7337899caa61de2a6
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/unwind/cortex-m-exception/TestCortexMExceptionUnwind.py
Log Message:
-----------
Revert "[lldb][NFC] Try to adapt Cortex-M API test for an Unbuntu bot"
This reverts commit 4eadb45f83cef00165055f8038f179ca5c3e88ef.
Commit: d8f0a57d4c18f92447d231650ed36dd6d56593f8
https://github.com/llvm/llvm-project/commit/d8f0a57d4c18f92447d231650ed36dd6d56593f8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/builtin_commands/cat.py
Log Message:
-----------
[lit] Remove StringIO imports
StringIO was moved to io.StringIO in Python 3. These try/catch
statements were intended to provide cross compatibility between the two.
Now that LLVM's minimum required Python version is 3.8 and Python 2 has
been deprecated for a while, we can probably drop support. Especially
since there is no upstream testing for this configuration.
Commit: 79012fcfd333040e517f82e235d114c3bc960a99
https://github.com/llvm/llvm-project/commit/79012fcfd333040e517f82e235d114c3bc960a99
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/unittests/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[LowerTypeTests] Optimize buildBitSet (#157386)
`buildBitSet` had a loop trough entire GlobalLayout to pickup matching
offsets.
The patch maps all offsets to correspondign
`TypeId`, so we pass prepared list of offsets into
`buildBitSet`.
On one large internal binary, `LowerTypeTests`
took 58% of ThinLTO link time before the patch.
After the patch just 7% (absolute saving is 200s).
Commit: 902f1fcb321f2cf59e42ef771feab956886ac18e
https://github.com/llvm/llvm-project/commit/902f1fcb321f2cf59e42ef771feab956886ac18e
Author: Shunsuke Watanabe <watanabe.shu-06 at fujitsu.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/cl-options.c
M clang/test/Driver/fp-model.c
A clang/test/Driver/range-warnings.c
M clang/test/Driver/range.c
Log Message:
-----------
[clang][driver] Improve warning message for complex range overrides (#154899)
This patch improves the warnings to show which user options override the
complex range. When a complex range is overridden, explicitly display
both the option name and the implied complex range value for both the
overriding and the overridden options.
See also the discussion in the following discourse post:
https://discourse.llvm.org/t/the-priority-of-fno-fast-math-regarding-complex-number-calculations/84679
Commit: c69172637efbe756b3987eb3531d7932886fbef7
https://github.com/llvm/llvm-project/commit/c69172637efbe756b3987eb3531d7932886fbef7
Author: woruyu <1214539920 at qq.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
Log Message:
-----------
[RISCV][GISel] Lower G_SADDE (#156865)
### Summary
Try to implemente Lower G_SADDE in LegalizerHelper::lower
Commit: 8a8a810506cb8ba9b7992c3174e53aa60e9175f7
https://github.com/llvm/llvm-project/commit/8a8a810506cb8ba9b7992c3174e53aa60e9175f7
Author: Garth Lei <35474819+garthlei at users.noreply.github.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Remove unused local variable in lambda (#156835)
Commit: 41d7ae84e5040b70aa6663c7ef643ba2264760a0
https://github.com/llvm/llvm-project/commit/41d7ae84e5040b70aa6663c7ef643ba2264760a0
Author: Shaoce SUN <sunshaoce at outlook.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith-f16.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith.mir
Log Message:
-----------
[RISCV][GlobalIsel] Lower G_FMINIMUMNUM, G_FMAXIMUMNUM (#157295)
Similar to the implementation in
https://github.com/llvm/llvm-project/pull/104411 , the `fmin.s`/`fmax.s`
instructions follow IEEE 754-2019 semantics, and
`G_FMINIMUMNUM`/`G_FMAXIMUMNUM` are legal.
Commit: cf5ae4d81582223ca59247b5c32c0619d3b3e633
https://github.com/llvm/llvm-project/commit/cf5ae4d81582223ca59247b5c32c0619d3b3e633
Author: jtstogel <jtstogel at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel target broken in #157537 (#157982)
Commit: 6a6311497656ade59634ed47b9efbf78b164aa98
https://github.com/llvm/llvm-project/commit/6a6311497656ade59634ed47b9efbf78b164aa98
Author: cmtice <cmtice at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/suppressions-library.cpp
M compiler-rt/test/asan/TestCases/verbose-log-path_test.cpp
M compiler-rt/test/ubsan/TestCases/Misc/coverage-levels.cpp
M compiler-rt/test/ubsan/TestCases/Misc/log-path_test.cpp
Log Message:
-----------
[compiler-rt] Mark some tests as unsupported on Windows. (#157972)
PR157951 removed 'REQUIRES: shell' from several tests, which (among
other things) caused them to start running on some Windows builders --
the 'REQUIRES: shell' prevented that. Some of those tests fail on
Windows. This PR marks those failing tests as UNSUPPORTED on Windows.
Commit: afaea7f2a6b3e92a419f166ae1660c37b338e5ac
https://github.com/llvm/llvm-project/commit/afaea7f2a6b3e92a419f166ae1660c37b338e5ac
Author: cmtice <cmtice at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M compiler-rt/test/fuzzer/sig-trap.test
Log Message:
-----------
[compiler-rt] Fix sig-trap.test to work with lit internal shell. (#157966)
Update sig-trap.test to work with the lit internal shell, as part of our
migration to make the internal shell the default for lit tests.
Commit: 14cf515f0aad34864470e56870cda4f6400773af
https://github.com/llvm/llvm-project/commit/14cf515f0aad34864470e56870cda4f6400773af
Author: cmtice <cmtice at google.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M compiler-rt/test/fuzzer/focus-function.test
Log Message:
-----------
[compiler-rt] Update fuzzer/focus-function.test to not require shell. (#157967)
Replace sub-shell for-loops with python calls so this test can run in
the lit internal shell. This is part of our work migrating to use the
internal shell as the default for lit tests.
Commit: 33757cdda84e0effe93f05e526c52653f8517828
https://github.com/llvm/llvm-project/commit/33757cdda84e0effe93f05e526c52653f8517828
Author: Feng Zou <feng.zou at intel.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/LTO/LTOCodeGenerator.cpp
A llvm/test/LTO/empty-triple.ll
Log Message:
-----------
[LTO] Fix the issue of resetting the triple to default when it's empty (#157829)
The empty triple is passed to lookupTarget function and it's not set to
default one. This issue is exposed after changes in
https://github.com/llvm/llvm-project/pull/157591.
Commit: 004231aaebdcae1c735c354a9a754ec00e4523c9
https://github.com/llvm/llvm-project/commit/004231aaebdcae1c735c354a9a754ec00e4523c9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
A clang/test/AST/ByteCode/builtins.c
Log Message:
-----------
[clang][bytecode] Check strlen impl for primitive arrays (#157494)
Fixes #157428
Commit: fc0f1fc6952e424fb14b60cc6ab5bfab53680a69
https://github.com/llvm/llvm-project/commit/fc0f1fc6952e424fb14b60cc6ab5bfab53680a69
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/ARM/issue147935-half-convert-libcall-abi.ll
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
ARM: Move remaining half convert libcall config into tablegen (#153408)
The __truncdfhf2 handling is kind of convoluted, but reproduces
the existing, likely wrong, handling.
Commit: 2b058411e9718cbda7388e11527e2a57a265d91e
https://github.com/llvm/llvm-project/commit/2b058411e9718cbda7388e11527e2a57a265d91e
Author: Weibo He <NewSigma at 163.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
A llvm/test/Transforms/Coroutines/coro-alloca-09.ll
Log Message:
-----------
[CoroSplit] AllocaUseVisitor visits insertvalue/insertelement (#156788)
Pointers to allocas might be escaped by users of
`insertvalue/insertelement`. `AllocaUseVisitor` should visit these
instructions so that CoroSplit can successfully determine which allocas
should live on the frame.
Commit: c883b67e17ad3e945d5e14bc19a582fea549d7f2
https://github.com/llvm/llvm-project/commit/c883b67e17ad3e945d5e14bc19a582fea549d7f2
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
A llvm/docs/AdminTasks.rst
M llvm/docs/UserGuides.rst
Log Message:
-----------
Document some of the regular admin tasks (#133825)
This is not everything, but it's a start.
Commit: 21b99e1311547dbe4807b4d1af8f5043cb82539f
https://github.com/llvm/llvm-project/commit/21b99e1311547dbe4807b4d1af8f5043cb82539f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/references.cpp
Log Message:
-----------
[clang][bytecode] Check reads for null block pointers (#157695)
All pointer types can be null, so check that independently from the
pointer type.
Fixes #157650
Commit: 8fae5a51321d5d807b0cb6982fb2e07c66948f59
https://github.com/llvm/llvm-project/commit/8fae5a51321d5d807b0cb6982fb2e07c66948f59
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtins.cpp
Log Message:
-----------
[clang][bytecode] Check builtin carryops for dummy pointers (#157490)
Fixes #157422
Commit: 7e38793795006df01f77e0ad44fed3a9198e2d2a
https://github.com/llvm/llvm-project/commit/7e38793795006df01f77e0ad44fed3a9198e2d2a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
A flang/test/Lower/CUDA/cuda-stream.cuf
Log Message:
-----------
[flang][cuda] Make sure stream is a i64 reference (#157957)
When the stream is a scalar constant, it is lowered as i32. Stream needs
to be i64 to pass the verifier. Detect and update the stream reference
when it is i32.
Commit: 6fda136617a701234b535da0f43ff2ba6ce9d666
https://github.com/llvm/llvm-project/commit/6fda136617a701234b535da0f43ff2ba6ce9d666
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][ExprConst][NFC] Take a const ASTContext in a few places (#157985)
We don't need a mutable `ASTContext` here.
Commit: 1278ac71d32ed53735b3342fbc48b4f67042ec56
https://github.com/llvm/llvm-project/commit/1278ac71d32ed53735b3342fbc48b4f67042ec56
Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
Log Message:
-----------
[NFC][GlobalISel] Pass `APInt` by const reference (#157827)
Change `SpecificConstantMatch` constructor and `isBuildVectorConstantSplat` overloads to take `const APInt&` instead of by value to avoid unnecessary copies, especially for wide integers.
Commit: 336503c4e1cdb5eaefde0536a34f0a95bc0c57bf
https://github.com/llvm/llvm-project/commit/336503c4e1cdb5eaefde0536a34f0a95bc0c57bf
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/unwind/cortex-m-exception/TestCortexMExceptionUnwind.py
Log Message:
-----------
[lldb][NFC] Force some logging on to TestCortexMExceptionUnwind.py
to possibly debug why this test fails on the
lldb-remote-linux-ubuntu CI bot. I'm sure the Target ArchSpec is
somehow ending up _not_ armv7m-apple-* like it should be, but I'd
like to gather a little more info before I just give up on running
this test on linux systems.
Commit: 6a719387704c8c01b29bdb418a4d8a3b5df6b090
https://github.com/llvm/llvm-project/commit/6a719387704c8c01b29bdb418a4d8a3b5df6b090
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-09-10 (Wed, 10 Sep 2025)
Changed paths:
M lldb/test/API/functionalities/unwind/cortex-m-exception/TestCortexMExceptionUnwind.py
Log Message:
-----------
Revert "[lldb][NFC] Force some logging on to TestCortexMExceptionUnwind.py"
This reverts commit 336503c4e1cdb5eaefde0536a34f0a95bc0c57bf.
Commit: bf6debcfe18866269eb370f470d84e010957171b
https://github.com/llvm/llvm-project/commit/bf6debcfe18866269eb370f470d84e010957171b
Author: Alan Zhao <ayzhao at google.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/test/Transforms/FunctionSpecialization/profile-counts.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[FunctionSpecialization] Fix profile count preserving logic (#157939)
The previous fix in #157768 had a bug; instead of subtracting the
original function's call count per call site of a specialization, we
were subtracting the running total of the specialization's calls.
Tracking issue: #147390
Commit: e790c97f65687bece901072cb4f6935061785536
https://github.com/llvm/llvm-project/commit/e790c97f65687bece901072cb4f6935061785536
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vlenb.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/riscv-default-features.c
M clang/test/Driver/riscv-features.c
M flang/test/Driver/target-cpu-features.f90
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Make "target-feature +i" explicit (#157835)
Add "target-feature +i" for RV32I/RV64I.
Current behavior:
RV32E/RV64E: "target-feature +e" "target-feature -i"
RV32I/RV64I: "target-feature -e"
Adding "target-feature +i" explicitly makes the behavior consistent.
Commit: 1723f80b083a5c72019d5f89013e65652f9aadcb
https://github.com/llvm/llvm-project/commit/1723f80b083a5c72019d5f89013e65652f9aadcb
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/inlineasm-fp-half.ll
Log Message:
-----------
[ARM] Allow s constraints on half (#157860)
Fix a regression from https://github.com/llvm/llvm-project/pull/147559.
Commit: fa63642dcebbf74c051fc058679c4eaebaa82dde
https://github.com/llvm/llvm-project/commit/fa63642dcebbf74c051fc058679c4eaebaa82dde
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/atomic-cmpxchg.ll
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomic-cmpxchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomic-cmpxchg-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomic-cmpxchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomic-cmpxchg-rv64.mir
Log Message:
-----------
[RISC-V][GlobaISel] Legalize G_ATOMIC_CMPXCHG and G_ATOMIC_CMPXCHG_WITH_SUCCESS (#157634)
This change introduces legalization for `G_ATOMIC_CMPXCHG` and
`G_ATOMIC_CMPXCHG_WITH_SUCCESS`. Additionally, support for the
`riscv_masked_cmpxchg intrinsic` is added to legalizeIntrinsic, ensuring
that masked compare-and-exchange operations are recognized during
legalization.
---------
Co-authored-by: Kane Wang <kanewang95 at foxmail.com>
Commit: 0c6141a07a4bcaf578fcead0981c5ce4237d33d3
https://github.com/llvm/llvm-project/commit/0c6141a07a4bcaf578fcead0981c5ce4237d33d3
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
Log Message:
-----------
[GlobalISel] Add computeNumSignBits for SHL (#152067)
This patch ports the `ISD::SHL` handling from SelectionDAG’s
`ComputeNumSignBits` to GlobalISel.
Related to #150515.
Commit: e2a067e7e543222c729ef7e60adba5a4cd8eef40
https://github.com/llvm/llvm-project/commit/e2a067e7e543222c729ef7e60adba5a4cd8eef40
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove an else after a return (#157999)
Commit: 859e8a6d6b70805074867c01d1bea983256b8d76
https://github.com/llvm/llvm-project/commit/859e8a6d6b70805074867c01d1bea983256b8d76
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/SemaCXX/labeled-break-continue-constexpr.cpp
Log Message:
-----------
[clang][bytecode] Implement C23 named loops (#156856)
Commit: d267fac3bcd35d726e45ebfa7b716ef9832e254f
https://github.com/llvm/llvm-project/commit/d267fac3bcd35d726e45ebfa7b716ef9832e254f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[AMDGPU] Use subtarget call to determine number of VGPRs (#157927)
Since the register file was increased that is no longer valid to
call VGPR_32RegClass.getNumregs() to get a total number of arch
registers available on a subtarget.
Fixes: SWDEV-550425
Commit: 0e8f9fce78f8d3971d62bb66fd9813bbe193f99a
https://github.com/llvm/llvm-project/commit/0e8f9fce78f8d3971d62bb66fd9813bbe193f99a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
R llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avxvnni.s
Log Message:
-----------
[MCA][X86] Remove AVXVNNI tests from IceLakeServer (#158010)
As noted on #157892 - icelake/rocketlake/tigerlake don't support avxvnni (just avx512vnni which we still have tests for)
Commit: 70012fda6312ba87bc0bf9009402e0869a816d1f
https://github.com/llvm/llvm-project/commit/70012fda6312ba87bc0bf9009402e0869a816d1f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
M llvm/test/Transforms/LoopStrengthReduce/duplicated-phis.ll
Log Message:
-----------
[SCEV] Fold (C1 * A /u C2) -> A /u (C2 /u C1), if C2 > C1. (#157656)
If C2 >u C1 and C1 >u 1, fold to A /u (C2 /u C1).
Depends on https://github.com/llvm/llvm-project/pull/157555.
Alive2 Proof: https://alive2.llvm.org/ce/z/BWvQYN
PR: https://github.com/llvm/llvm-project/pull/157656
Commit: 3fb9412b794099fe457d10faf678813a2149138b
https://github.com/llvm/llvm-project/commit/3fb9412b794099fe457d10faf678813a2149138b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M libcxx/include/__cxx03/__algorithm/find.h
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
Log Message:
-----------
[libc++][C++03] partially cherry-pick #122641 (#157596)
This patch only cherry-picks the parts that actually fix the issue, but
not the numerous NFC refactorings around it.
Commit: 3a7da9a2fd90ff13efc1095550d3a73efabf3aa5
https://github.com/llvm/llvm-project/commit/3a7da9a2fd90ff13efc1095550d3a73efabf3aa5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h
M llvm/lib/LTO/LTOCodeGenerator.cpp
Log Message:
-----------
LTO: Stop storing string triple (#157991)
Commit: f56309ac2846e4846d23e97b7bde7f7b286abb92
https://github.com/llvm/llvm-project/commit/f56309ac2846e4846d23e97b7bde7f7b286abb92
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[compiler-rt][test] Use packaging.version.Version to compare glibc versions (#142596)
Instead of distutils.LooseVersion. distutils was depracated
(https://peps.python.org/pep-0632/) and has been removed in Python 3.12
(https://docs.python.org/3/whatsnew/3.12.html)
> Of note, the distutils package has been removed from the standard library.
packaging's version is able to handle glibc's major.minor:
https://packaging.pypa.io/en/latest/version.html#packaging.version.Version
> For these modules or types, use the standards-defined Python Packaging
Authority packages specified:
> distutils.version — use the packaging package
Relates to https://github.com/llvm/llvm-project/issues/54337
Commit: 98f1ae057b8b829bdc18fba4b5209b5aceb5cf80
https://github.com/llvm/llvm-project/commit/98f1ae057b8b829bdc18fba4b5209b5aceb5cf80
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/PPDirectives.cpp
M clang/test/Preprocessor/embed___has_embed_parsing_errors.c
Log Message:
-----------
[clang] Fix assertion with invalid embed limit parameter value (#157896)
If a negative value was given we would fail to skip till the end of the
directive and trip a failed assertion.
Fixes https://github.com/llvm/llvm-project/issues/157842
Commit: c62ea6598eaab0a1c18a3ff1f067907a58b9a144
https://github.com/llvm/llvm-project/commit/c62ea6598eaab0a1c18a3ff1f067907a58b9a144
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
M llvm/test/Transforms/VectorCombine/X86/bitop-of-castops.ll
Log Message:
-----------
[VectorCombine] Add Ext and Trunc support in foldBitOpOfCastConstant (#157822)
Follow-up of https://github.com/llvm/llvm-project/pull/155216.
This patch doesn't preserve the flags. I will implement it in the
follow-up patch.
Commit: d04b6dadb65faed3d2858ab6bd4dc06bf09e81ba
https://github.com/llvm/llvm-project/commit/d04b6dadb65faed3d2858ab6bd4dc06bf09e81ba
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/LunarlakeP/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avxvnni.s
Log Message:
-----------
[llvm-mca][x86] Ensure avxvnni tests actually test the avxvnni instructions (#157892)
Noticed while checking #97271 - discovered we weren't actually testing
the vex variants of the vnni instructions in the avxvnni mca tests
Fixing this causes the znver4 results to break, because it turns out we
didn't have consistent instruction naming for the avx and avx512
variants, breaking the regex matching
So add the missing reg operand to the avx512 vnni instruction signatures
to match avx vnni
Commit: b4c98fcbe1504841203e610c351a3227f36c92a4
https://github.com/llvm/llvm-project/commit/b4c98fcbe1504841203e610c351a3227f36c92a4
Author: Marco Elver <elver at google.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Analysis/Analyses/ThreadSafetyCommon.h
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/ThreadSafetyCommon.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Basic capability alias-analysis (#142955)
Add basic alias analysis for capabilities by reusing LocalVariableMap,
which tracks currently valid definitions of variables. Aliases created
through complex control flow are not tracked. This implementation would
satisfy the basic needs of addressing the concerns for Linux kernel
application [1].
For example, the analysis will no longer generate false positives for
cases such as (and many others):
void testNestedAccess(Container *c) {
Foo *ptr = &c->foo;
ptr->mu.Lock();
c->foo.data = 42; // OK - no false positive
ptr->mu.Unlock();
}
void testNestedAcquire(Container *c) EXCLUSIVE_LOCK_FUNCTION(&c->foo.mu)
{
Foo *buf = &c->foo;
buf->mu.Lock(); // OK - no false positive
}
Given the analysis is now able to identify potentially unsafe patterns
it was not able to identify previously (see added FIXME test case for an
example), mark alias resolution as a "beta" feature behind the flag
`-Wthread-safety-beta`.
**Fixing LocalVariableMap:** It was found that LocalVariableMap was not
properly tracking loop-invariant aliases: the old implementation failed
because the merge logic compared raw VarDefinition IDs. The algorithm
for handling back-edges (in createReferenceContext()) generates new
'reference' definitions for loop-scoped variables. Later ID comparison
caused alias invalidation at back-edge merges (in intersectBackEdge())
and at subsequent forward-merges with non-loop paths (in
intersectContexts()).
Fix LocalVariableMap by adding the getCanonicalDefinitionID() helper
that resolves any definition ID down to its non-reference base. As a
result, a variable's definition is preserved across control-flow merges
as long as its underlying canonical definition remains the same.
Link:
https://lore.kernel.org/all/CANpmjNPquO=W1JAh1FNQb8pMQjgeZAKCPQUAd7qUg=5pjJ6x=Q@mail.gmail.com/
[1]
Commit: 30f9fb7ca896a64701fda35f1a6629be912e086a
https://github.com/llvm/llvm-project/commit/30f9fb7ca896a64701fda35f1a6629be912e086a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][ExprConst][NFC] Move EvalMode enum to State (#157988)
Make it an enum class and move the enum to State.h as well as the
`EvalMode` member to `State`. This is in preparation of using the
evaluation mode from `InterpState` as well.
Commit: 40270e8ef207a25850fd3cd14cbf3301e1785080
https://github.com/llvm/llvm-project/commit/40270e8ef207a25850fd3cd14cbf3301e1785080
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combiner-crash.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant32bit.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-divergent.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform-in-vgpr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/store-divergent-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/store-uniform-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-sign-bits.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add regbanklegalize rules for load and store (#153176)
Cover all the missing cases and add very detailed tests for each rule.
In summary:
- Flat and Scratch, addrspace(0) and addrspace(5), loads are always
divergent.
- Global and Constant, addrspace(1) and addrspace(4), have real uniform
loads, s_load, but require additional checks for align and flags in mmo.
For not natural align or not uniform mmo do uniform-in-vgpr lowering.
- Private, addrspace(3), only has instructions for divergent load, for
uniform do uniform-in-vgpr lowering.
- Store rules are simplified using Ptr32 and Ptr64.
All operands need to be vgpr.
Some tests have code size regression since they use more sgpr instructions,
marked with FixMe comment to get back to later.
Commit: 0f13cae7ff1b0efe37e1f1a2d6cdda48803b44ca
https://github.com/llvm/llvm-project/commit/0f13cae7ff1b0efe37e1f1a2d6cdda48803b44ca
Author: Owen Anderson <resistor at mac.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/utils/TableGen/Basic/VTEmitter.cpp
Log Message:
-----------
[CodeGen, CHERI] Add capability types to MVT. (#156616)
This adds value types for representing capability types, enabling their use in instruction selection and other parts of the backend.
These types are distinguished from each other only by size. This is sufficient, at least today, because no existing CHERI configuration supports multiple capability sizes simultaneously. Hybrid configurations supporting intermixed integral pointers and capabilities do exist, and are one of the reasons why these value types are needed beyond existing integral types.
Co-authored-by: David Chisnall <theraven at theravensnest.org>
Co-authored-by: Jessica Clarke <jrtc27 at jrtc27.com>
Commit: 75099c224632b7e424e2c59e3fdee980c1483348
https://github.com/llvm/llvm-project/commit/75099c224632b7e424e2c59e3fdee980c1483348
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
Log Message:
-----------
[ConstantFolding] Fold scalable get_active_lane_masks (#156659)
Scalable get_active_lane_mask intrinsics with a range of 0 can be
lowered to zeroinitializer. This helps remove no-op scalable masked
stores and loads.
Commit: 861dc29d760181367ab07bcd033072c6ebf2280e
https://github.com/llvm/llvm-project/commit/861dc29d760181367ab07bcd033072c6ebf2280e
Author: Shawn <kimshawn02 at icloud.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/Headers/avxintrin.h
M clang/test/CodeGen/X86/avx-builtins.c
Log Message:
-----------
[Headers][X86] Allow AVX vector concatenation intrinsics to be used in constexpr (#158020)
Fix #157705
Vector concatentation intrinsics made constexpr and test coverage added to avx-builtins.c for the following:
```
_mm256_set_m128 _mm256_setr_m128
_mm256_set_m128d _mm256_setr_m128d
_mm256_set_m128i _mm256_setr_m128i
```
Commit: b97010865caa0439d4cedc45e9582e645816519f
https://github.com/llvm/llvm-project/commit/b97010865caa0439d4cedc45e9582e645816519f
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
Log Message:
-----------
AMDGPU/GlobalISel: Import D16 load patterns and add combines for them (#153178)
Add G_AMDGPU_LOAD_D16 generic instructions and GINodeEquivs for them,
this will import D16 load patterns to global-isel's tablegened
instruction selector.
For newly imported patterns to work add combines for G_AMDGPU_LOAD_D16
in AMDGPURegBankCombiner.
Commit: 9334ef98984f53f344cf5953ab74cdc29a0675de
https://github.com/llvm/llvm-project/commit/9334ef98984f53f344cf5953ab74cdc29a0675de
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Specify that load of alloca outside lifetime is poison (#157852)
We consider (in bounds) loads from allocas to always be speculatable,
without taking lifetimes into account. This means that such loads cannot
be immediate UB. Specify them as returning poison instead.
Due to stack coloring, such a load may end up loading from a different
alloca, but that's compatible with poison.
Stores are still UB, but that's a much more narrow problem (I think the
only transform violating that part is store scalar promotion in LICM).
Fixes https://github.com/llvm/llvm-project/issues/141892 (and probably a
bunch of others...)
Commit: e25e25de7d364a9cf928369344b6cb6f4a08a86f
https://github.com/llvm/llvm-project/commit/e25e25de7d364a9cf928369344b6cb6f4a08a86f
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[Dexter] Add `-v` to lit dexter substitutions (#158025)
Buildbot cross-project-tests-sie-ubuntu has been flaky after moving to
lldb-dap.
https://lab.llvm.org/buildbot/#/builders/181/builds/27670 - this test
fails for a single run but unfortunately there's not enough output to
diagnose it.
Add `-v` to the substitutions to get as much info as possible out of
failures. Most tests already have -v added manually. If we ever find a
tests needs to specifically run without it we can revert this and add
`-v` manually to tests it's missing from.
Commit: a401f4696b1a80d9792b25757cf57870af68bc98
https://github.com/llvm/llvm-project/commit/a401f4696b1a80d9792b25757cf57870af68bc98
Author: Théo Degioanni <theo.degioanni.llvm.deluge062 at simplelogin.fr>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
A mlir/docs/Dialects/IRDL.md
M mlir/include/mlir/Dialect/IRDL/IR/CMakeLists.txt
Log Message:
-----------
[IRDL] [NFC] Add the IRDL dialect rationale document (#157858)
Commit: 71f7f8afaca759706c46de8c7612d47739890c0c
https://github.com/llvm/llvm-project/commit/71f7f8afaca759706c46de8c7612d47739890c0c
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/test/tsan/Darwin/os_unfair_lock.c
Log Message:
-----------
[TSan] Add interceptor for os_unfair_lock_lock_with_flags (#153815)
Also update os_unfair_lock tsan test to check this function on platforms
where it is available.
rdar://158294950
Commit: 94d5c54a4f63636b6ea2c49c385928dcfc08dd6d
https://github.com/llvm/llvm-project/commit/94d5c54a4f63636b6ea2c49c385928dcfc08dd6d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode] Don't update temporary in InitGlobalTemp* (#158022)
We can save ourselves the conversion to an APValue here since we will do
that later in updateGlobalTemporaries() anyway.
Commit: daa88b3f43aedf648d0b1715dd2c3ebe26eea484
https://github.com/llvm/llvm-project/commit/daa88b3f43aedf648d0b1715dd2c3ebe26eea484
Author: Vinay Deshmukh <vinay_deshmukh at outlook.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M libcxx/include/__config
M libcxx/include/__hash_table
M libcxx/include/__tree
Log Message:
-----------
[libc++] Remove UB from `std::__tree_node` construction (#153908)
This patch also updates `__hash_table` to match what we do in `__tree`
now.
Fixes #102547
Fixes
https://github.com/llvm/llvm-project/pull/134330#discussion_r2265558356
Commit: e7429c2e10b1e30a0b1a18cc7290ab95a7e83b6a
https://github.com/llvm/llvm-project/commit/e7429c2e10b1e30a0b1a18cc7290ab95a7e83b6a
Author: Karlo Basioli <k.basioli at gmail.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
Remove extra include - fixes bazel build, introduced by 55bef46 (#158037)
Commit: 2f755c543ab357bd83235592fcee37fa391cdd9d
https://github.com/llvm/llvm-project/commit/2f755c543ab357bd83235592fcee37fa391cdd9d
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/OpenMP/for_lst_private_codegen_c.c
Log Message:
-----------
[OpenMP] Conditional modifier on lastprivate clause is producing incorrect result in C mode (#156004)
Conditional modifier on lastprivate clause is producing incorrect result
when compiled with clang( C compiler). IR is not emitting while
compilation with C compiler.
However it is working correctly with clang++
The OpenMP hook that emits the conditional modifier
(checkAndEmitLastprivateConditional) is skipped in C because assignment
is a prvalue and takes the scalar path.
Original Codegen Support :
[eddb8](https://github.com/llvm/llvm-project/commit/a58da1a2ff039dd3bb4c43db3919995cf4a74cc7#diff-629e03f730f901cdf96b6b48fb0aed8ef156590aaff37857b8e5ad0694beddb8)
```
C = → prvalue → EmitAnyExpr(TEK_Scalar) → ScalarExprEmitter::VisitBinAssign (hook not reached)
C++ = → lvalue → EmitBinaryOperatorLValue
```
```
Failing Test Case :
#include <stdio.h>
#define N 10
int A[N];
void condlastprivate() {
int x, y, z, k;
x = y = z = k = 0;
#pragma omp parallel for lastprivate(conditional: x,y, z) lastprivate(k)
for( k=0; k<N; k++){
if ((k >2 ) && (k <6))
{ x = A[k]; z = A[k]+111; }
else
{ y = A[k]+222; }
}
printf("Expecting: x=5, y=231, z=116 k=10 Got: x=%d y=%d z=%d k=%d \n", x,y,z,k);
}
int main() {
for( int i=0; i<N; i++)
{ A[i] = i; }
condlastprivate();
return 0;
}
```
```
#>./clang -fopenmp cond_c.c
#> ./a.out
Expecting: x=5, y=231, z=116 k=10 **Got: x=-1376379760 y=231 z=631465600** k=10
```
---------
Co-authored-by: Chandra Ghale <ghale at pe31.hpc.amslabs.hpecorp.net>
Commit: 61f7f9bddc7f337972c41922259cae42a589fa65
https://github.com/llvm/llvm-project/commit/61f7f9bddc7f337972c41922259cae42a589fa65
Author: Nathan Gauër <brioche at google.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[Clang][docs] Modify generator for HLSL semantics documentation (#157841)
HLSL semantics are split between system semantics with some kind of
spelling, and user semantics with no actual spelling. Those have been
documented as normal function attributes, but they'd benefit from a
custom section with a slightly different handling.
This will allow #152537 to land.
Verified the resulting RST file, and only diff are around HLSL
semantics.
Rendered output:
<img width="1064" height="1035" alt="Screenshot from 2025-09-10
14-05-08"
src="https://github.com/user-attachments/assets/554b70d6-2bf8-4131-b343-8f379babaca8"
/>
Commit: e285602fdab9d8c4f17c35727624446b69e038ba
https://github.com/llvm/llvm-project/commit/e285602fdab9d8c4f17c35727624446b69e038ba
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
Log Message:
-----------
[LV] Enforce addrec in current loop for uncountable exit load address check
Addresses post-commit review raised for #145663
Commit: 9b00a58cbd8485ebf57e66e1c35b8ce86285e8fa
https://github.com/llvm/llvm-project/commit/9b00a58cbd8485ebf57e66e1c35b8ce86285e8fa
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][bytecode] Use bytecode interpreter in EvaluateAsLValue (#158038)
Set the EvalMode on InterpState and abort when initalizing a global
temporary, like the current interpreter does. The rest is just plumbing
in EvaluateAsLValue.
Fixes #157497
Commit: c52cb96324871c99644304d423f3912539182456
https://github.com/llvm/llvm-project/commit/c52cb96324871c99644304d423f3912539182456
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
AMDGPU/GlobalISel: Fix tablegen definition for G_AMDGPU_LOAD_D16 (#158039)
Second source operand was missing.
Commit: 48661a4fad9d572d9e8403f356cae33972f7a06f
https://github.com/llvm/llvm-project/commit/48661a4fad9d572d9e8403f356cae33972f7a06f
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vfadd.ll
Log Message:
-----------
[RISCV][GISel] Add initial support for rvv intrinsics (#156415)
This pr removes the falling back to SDISel of rvv intrinsics and marks
them legalized in the legalize pass. Another pr would be created for
regbankselect pass to make vf form intriniscs have the right scalar
register bank.
Commit: c84f34bcd8c7fb6d5038b3f52da8c7be64ad5189
https://github.com/llvm/llvm-project/commit/c84f34bcd8c7fb6d5038b3f52da8c7be64ad5189
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
Log Message:
-----------
Introduce LDBG_OS() macro as a variant of LDBG() (#157194)
Also, improve LDBG() to accept debug type and level in any order, and
add unit-tests for LDBG() and LGDB_OS().
LDBG_OS() is a macro that behaves like LDBG() but instead of directly
using it to stream the output, it takes a callback function that will be
called with a raw_ostream.
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: 3eedaa83c412f06f03e797d24342b6686d9d3c0c
https://github.com/llvm/llvm-project/commit/3eedaa83c412f06f03e797d24342b6686d9d3c0c
Author: Haibo Jiang <jianghaibo9 at huawei.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
A bolt/test/AArch64/print-sorted-by-order.s
Log Message:
-----------
[BOLT] Fix unrecognized option values for print-sorted-by-order (#155613)
Currently llvm-bolt does not recognize the input value for
’-print-sorted-by-order‘.
This patch adds support for ascending and descending values
for the flag.
Commit: 5e6564b0989879f8699b476b9ca482653dc0769b
https://github.com/llvm/llvm-project/commit/5e6564b0989879f8699b476b9ca482653dc0769b
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/and.ll
A llvm/test/CodeGen/AMDGPU/and.r600.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/or.ll
A llvm/test/CodeGen/AMDGPU/or.r600.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/vector_range_metadata.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (#140694)
- Enable s_or_b64/s_and_b64/s_xor_b64 for v2i32. Add various additional
combines to make use of these newly legalised instructions.
- Update several tests and separate legacy r600 tests where necessary.
Commit: df8cfefc9e8c4efed1f3850db59a87918eae4ac4
https://github.com/llvm/llvm-project/commit/df8cfefc9e8c4efed1f3850db59a87918eae4ac4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/TableGen/x86-instr-mapping.inc
Log Message:
-----------
[X86] Standardize (V)AESKEYGENASSIST instruction naming (#158046)
Remove unnecessary 128 postfix
Add missing immediate to the signature (e.g. AESKEYGENASSISTrr ->
AESKEYGENASSISTrri).
Makes it easier for downstream scripts to determine the instruction name
from the assembly without overrides
Commit: c09cc2c5a3d57506d8744fa889f35a6aa260a52b
https://github.com/llvm/llvm-project/commit/c09cc2c5a3d57506d8744fa889f35a6aa260a52b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
Log Message:
-----------
Revert "Introduce LDBG_OS() macro as a variant of LDBG()" (#158058)
Reverts llvm/llvm-project#157194
Bots are broken, investigation needed.
Commit: b9fd1e6fce8c5ea80cb0db9b73fbdfdc371409c6
https://github.com/llvm/llvm-project/commit/b9fd1e6fce8c5ea80cb0db9b73fbdfdc371409c6
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-cmp-folds.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-whilelo.mir
Log Message:
-----------
[AArch64][SVE2p1] Remove redundant PTESTs when predicate is a WHILEcc_x2 (#156478)
The optimisation in canRemovePTestInstr tries to remove ptest instructions when
the predicate is the result of a WHILEcc. This patch extends the support to
WHILEcc (predicate pair) by:
- Including the WHILEcc_x2 intrinsics in isPredicateCCSettingOp, allowing
performFirstTrueTestVectorCombine to create the PTEST.
- Setting the isWhile flag for the predicate pair instructions in tablegen.
- Looking through copies in canRemovePTestInstr to test isWhileOpcode.
Commit: d67ab11f2edcadd3fe1997eb691821fb7ee8e8c2
https://github.com/llvm/llvm-project/commit/d67ab11f2edcadd3fe1997eb691821fb7ee8e8c2
Author: Nathan Gauër <brioche at google.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/structurizer/switch-fallthrough.ll
Log Message:
-----------
[SPIR-V] Move structurizer to ISel prepare (#157886)
Some passes like LoopSimplify/SimplifyCFF are running between IRPasses
and ISelPrepare. This is an issue because the structurizer generates
OpSelectionMerge/OpLoopMerge instructions at specific places, and those
passes are moving them.
Moving the structurizer later solves this issue.
Commit: 3168a62a3b25e3df87ea4374814ff2853037d524
https://github.com/llvm/llvm-project/commit/3168a62a3b25e3df87ea4374814ff2853037d524
Author: Nikhil Kalra <nkalra at apple.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M mlir/docs/BytecodeFormat.md
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/unittests/Bytecode/BytecodeTest.cpp
Log Message:
-----------
[MLIR][Bytecode] Followup 8106c81 (#157136)
Addressed code review feedback:
- Fixed some issues in the unit test
- Adjusted line wrapping in the docs
- Clarified comments in the bytecode reader
Commit: 23302a2aacb31f30a80e9ae3105d215c14ab363e
https://github.com/llvm/llvm-project/commit/23302a2aacb31f30a80e9ae3105d215c14ab363e
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/test/AST/ByteCode/openmp.cpp
R clang/test/OpenMP/amdgcn_target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/nvptx_target_codegen.cpp
M clang/test/OpenMP/nvptx_target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
R clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M openmp/device/include/DeviceTypes.h
M openmp/device/src/Parallelism.cpp
Log Message:
-----------
[offload][OpenMP] Remove device code for num_threads strict (#157893)
Due to potential performance issues, this commit temporarily removes
support for the num_threads 'strict' modifier and its corresponding
message and severity clauses on the device.
Commit: 517bd7c05a7c78641fa42a78d88f17a4f2e58da1
https://github.com/llvm/llvm-project/commit/517bd7c05a7c78641fa42a78d88f17a4f2e58da1
Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
Date: 2025-09-11 (Thu, 11 Sep 2025)
Changed paths:
M .ci/all_requirements.txt
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/test/AArch64/print-sorted-by-order.s
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Analysis/Analyses/ThreadSafetyCommon.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/ThreadSafetyCommon.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/avx512vlvnniintrin.h
M clang/lib/Headers/avx512vnniintrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/avxvnniintrin.h
M clang/lib/Headers/cpuid.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/ForwardDeclChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/test/APINotes/yaml-roundtrip-2.test
M clang/test/APINotes/yaml-roundtrip.test
A clang/test/AST/ByteCode/builtins.c
M clang/test/AST/ByteCode/builtins.cpp
M clang/test/AST/ByteCode/openmp.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/CIR/CodeGen/builtins-elementwise.c
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vlenb.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512vlvnni-builtins.c
M clang/test/CodeGen/X86/avx512vnni-builtins.c
M clang/test/CodeGen/X86/avxvnni-builtins.c
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/Driver/cl-options.c
M clang/test/Driver/fp-model.c
A clang/test/Driver/range-warnings.c
M clang/test/Driver/range.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/riscv-default-features.c
M clang/test/Driver/riscv-features.c
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Modules/modules-cache-path-canonicalization-output.c
R clang/test/OpenMP/amdgcn_target_parallel_num_threads_codegen.cpp
A clang/test/OpenMP/for_lst_private_codegen_c.c
M clang/test/OpenMP/nvptx_target_codegen.cpp
M clang/test/OpenMP/nvptx_target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
R clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/Preprocessor/embed___has_embed_parsing_errors.c
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/labeled-break-continue-constexpr.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/test/asan/TestCases/Darwin/duplicate_os_log_reports.cpp
M compiler-rt/test/asan/TestCases/Linux/read_binary_name_regtest.c
M compiler-rt/test/asan/TestCases/suppressions-library.cpp
M compiler-rt/test/asan/TestCases/verbose-log-path_test.cpp
M compiler-rt/test/fuzzer/focus-function.test
M compiler-rt/test/fuzzer/sig-trap.test
M compiler-rt/test/hwasan/TestCases/Posix/dlerror.cpp
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/rtsan/unrecognized_flags.cpp
M compiler-rt/test/sanitizer_common/TestCases/external_symbolizer_path.cpp
M compiler-rt/test/sanitizer_common/TestCases/suffix-log-path_test.c
M compiler-rt/test/tsan/Darwin/os_unfair_lock.c
M compiler-rt/test/ubsan/TestCases/Misc/coverage-levels.cpp
M compiler-rt/test/ubsan/TestCases/Misc/log-path_test.cpp
M compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
M compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
M compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
M compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
M cross-project-tests/lit.cfg.py
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/io-stmt.cpp
M flang/include/flang/Lower/HlfirIntrinsics.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/HlfirIntrinsics.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/test/Driver/target-cpu-features.f90
A flang/test/Evaluate/bug157379.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/HLFIR/index-lowering.fir
M flang/test/HLFIR/invalid.fir
M flang/test/Lower/CUDA/cuda-allocatable-device.cuf
A flang/test/Lower/CUDA/cuda-stream.cuf
A flang/test/Lower/HLFIR/index.f90
R flang/test/Lower/OpenMP/nested-loop-transformation-construct01.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/simd.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/components.f90
M flang/test/Lower/volatile-string.f90
A flang/test/Parser/OpenMP/declare-reduction-unparse-with-symbols.f90
A flang/test/Parser/OpenMP/do-tile-size.f90
A flang/test/Parser/OpenMP/taskgraph.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
A flang/test/Semantics/contiguous02.f90
M flang/test/Semantics/resolve20.f90
A flang/test/Transforms/DoConcurrent/basic_device.f90
M flang/test/Transforms/DoConcurrent/basic_device.mlir
A flang/test/Transforms/DoConcurrent/use_loop_bounds_in_body.f90
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/simd.h
M libc/src/__support/macros/CMakeLists.txt
M libc/src/__support/macros/config.h
M libc/test/src/__support/CPP/simd_test.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/FModTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf16_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/cospif_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp10m1f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp2m1f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/sinpif_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
M libc/test/src/time/CMakeLists.txt
M libc/test/src/time/asctime_r_test.cpp
M libc/test/src/time/asctime_test.cpp
M libc/test/src/time/ctime_r_test.cpp
M libc/test/src/time/ctime_test.cpp
M libc/test/src/time/gmtime_r_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/nanosleep_test.cpp
M libc/test/src/wchar/CMakeLists.txt
M libc/test/src/wchar/WcstolTest.h
M libc/test/src/wchar/mblen_test.cpp
M libc/test/src/wchar/mbrlen_test.cpp
M libc/test/src/wchar/mbrtowc_test.cpp
M libc/test/src/wchar/mbsnrtowcs_test.cpp
M libc/test/src/wchar/mbsrtowcs_test.cpp
M libc/test/src/wchar/mbstowcs_test.cpp
M libc/test/src/wchar/mbtowc_test.cpp
M libc/test/src/wchar/wcrtomb_test.cpp
M libc/test/src/wchar/wctomb_test.cpp
M libcxx/include/__config
M libcxx/include/__cxx03/__algorithm/find.h
M libcxx/include/__hash_table
M libcxx/include/__tree
M libcxx/test/libcxx/algorithms/cpp17_iterator_concepts.verify.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M lldb/bindings/python/python.swig
M lldb/examples/python/cmdtemplate.py
M lldb/examples/python/templates/parsed_cmd.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
M lldb/source/Utility/ArchSpec.cpp
M lldb/test/API/commands/command/script/add/TestAddParsedCommand.py
M lldb/test/API/commands/command/script/add/test_commands.py
M lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py
M lldb/test/API/functionalities/thread/step_until/TestStepUntil.py
M lldb/test/API/functionalities/thread/step_until/TestStepUntilAPI.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
M lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M llvm/Maintainers.md
M llvm/docs/AMDGPUUsage.rst
A llvm/docs/AdminTasks.rst
M llvm/docs/Contributing.rst
M llvm/docs/LangRef.rst
M llvm/docs/QualGroup.rst
M llvm/docs/UserGuides.rst
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/ValueTypes.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/include/llvm/DebugInfo/PDB/Native/PublicsStream.h
M llvm/include/llvm/Frontend/HLSL/HLSLBinding.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Remarks/BitstreamRemarkContainer.h
R llvm/include/llvm/Remarks/BitstreamRemarkParser.h
M llvm/include/llvm/Support/DXILABI.h
M llvm/include/llvm/Support/PointerLikeTypeTraits.h
M llvm/include/llvm/Support/type_traits.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/DebugInfo/PDB/Native/PublicsStream.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/IR/ProfDataUtils.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/MC/DXContainerRootSignature.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/Remarks/BitstreamRemarkParser.cpp
M llvm/lib/Remarks/BitstreamRemarkParser.h
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
A llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrControl.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/BasicAA/featuretest.ll
R llvm/test/Analysis/Lint/get-active-lane-mask.ll
M llvm/test/Analysis/ScalarEvolution/mul-udiv-folds.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
A llvm/test/CodeGen/AArch64/lshr-trunc-lshr.ll
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/sve-cmp-folds.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-whilelo.mir
M llvm/test/CodeGen/AArch64/urem-lkk.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combiner-crash.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant32bit.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-divergent.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform-in-vgpr.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/store-divergent-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/store-uniform-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
M llvm/test/CodeGen/AMDGPU/and.ll
A llvm/test/CodeGen/AMDGPU/and.r600.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/finalizebundle.mir
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-sign-bits.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/or.ll
A llvm/test/CodeGen/AMDGPU/or.r600.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep-of-gep.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/vector_range_metadata.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/ARM/inlineasm-fp-half.ll
M llvm/test/CodeGen/ARM/issue147935-half-convert-libcall-abi.ll
M llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll
A llvm/test/CodeGen/DirectX/rootsignature-valid-textures.ll
A llvm/test/CodeGen/DirectX/rootsignature-valid-typedbuffer.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-textures-fail.ll
A llvm/test/CodeGen/DirectX/rootsignature-validation-typedbuffer-fail.ll
A llvm/test/CodeGen/RISCV/GlobalISel/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomic-cmpxchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomic-cmpxchg-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-diff-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-diff-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomic-cmpxchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomic-cmpxchg-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith-f16.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-arith.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sadde-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/vfadd.ll
M llvm/test/CodeGen/RISCV/and-negpow2-cmp.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvqdotq.ll
A llvm/test/CodeGen/SPIRV/structurizer/switch-fallthrough.ll
M llvm/test/CodeGen/Thumb2/active_lane_mask.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-i16-add.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-i8-add.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll
M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
M llvm/test/CodeGen/Thumb2/mve-vld2.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
M llvm/test/CodeGen/Thumb2/mve-vld4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vld4.ll
M llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512vnni-intrinsics.ll
A llvm/test/CodeGen/X86/avx_vnni-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx_vnni-intrinsics.ll
M llvm/test/CodeGen/X86/stack-folding-int-avxvnni.ll
M llvm/test/CodeGen/X86/test-shrink-bug.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx_vnni-intrinsics.ll
M llvm/test/LTO/Resolution/X86/unified-lto-check.ll
A llvm/test/LTO/empty-triple.ll
A llvm/test/MC/RISCV/rv32zbkb-aliases-valid.s
A llvm/test/MC/RISCV/rv64zbkb-aliases-valid.s
M llvm/test/TableGen/FixedLenDecoderEmitter/conflict.td
M llvm/test/TableGen/HwModeEncodeAPInt.td
M llvm/test/TableGen/HwModeEncodeDecode3.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/TableGen/x86-instr-mapping.inc
A llvm/test/Transforms/Coroutines/coro-alloca-09.ll
M llvm/test/Transforms/CorrelatedValuePropagation/range.ll
M llvm/test/Transforms/FunctionSpecialization/profile-counts.ll
M llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll
M llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll
M llvm/test/Transforms/InstCombine/gepofconstgepi8.ll
M llvm/test/Transforms/InstCombine/gepphigep.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
M llvm/test/Transforms/InstCombine/opaque-ptr.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll
M llvm/test/Transforms/InstCombine/select-gep.ll
M llvm/test/Transforms/InstCombine/strcmp-3.ll
M llvm/test/Transforms/InstCombine/strlen-7.ll
M llvm/test/Transforms/InstCombine/strlen-8.ll
M llvm/test/Transforms/InstCombine/trunc-lshr.ll
M llvm/test/Transforms/InstCombine/vectorgep-crash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/AMDGPU/wave.reduce.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
M llvm/test/Transforms/JumpTableToSwitch/basic.ll
M llvm/test/Transforms/JumpThreading/branch-debug-info2.ll
A llvm/test/Transforms/JumpThreading/simplify-partially-redundant-load-debugloc.ll
M llvm/test/Transforms/LoopStrengthReduce/duplicated-phis.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/PGOProfile/prof-inject-existing.ll
M llvm/test/Transforms/PGOProfile/prof-verify-existing.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
A llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
M llvm/test/Transforms/VectorCombine/X86/bitop-of-castops.ll
M llvm/test/Transforms/WholeProgramDevirt/branch-funnel-profile.ll
M llvm/test/Verifier/branch-weight.ll
M llvm/test/lit.cfg.py
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/tbaa-semantics-checks.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/tbaa-semantics-checks.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/tbaa-semantics-checks.test
M llvm/test/tools/llvm-cgdata/empty.test
M llvm/test/tools/llvm-cgdata/error.test
M llvm/test/tools/llvm-gsymutil/X86/elf-dwarf.yaml
M llvm/test/tools/llvm-mca/X86/AlderlakeP/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/Generic/resources-avxvnni.s
R llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/LunarlakeP/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx1.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx2.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bwvl.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-avxvnni.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-sse2.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-sse41.s
M llvm/test/tools/llvm-mca/X86/Znver4/resources-ssse3.s
M llvm/test/tools/llvm-objcopy/ELF/add-invalid-note.test
A llvm/test/tools/llvm-pdbutil/publics-yaml2pdb.test
M llvm/test/tools/llvm-profdata/binary-ids-padding.test
M llvm/test/tools/llvm-profdata/raw-32-bits-be.test
M llvm/test/tools/llvm-profdata/raw-32-bits-le.test
M llvm/test/tools/llvm-profdata/raw-64-bits-be.test
M llvm/test/tools/llvm-profdata/raw-64-bits-le.test
M llvm/test/tools/llvm-strings/negative-char.test
M llvm/test/tools/llvm-strings/stdin.test
M llvm/test/tools/llvm-symbolizer/basic.s
M llvm/test/tools/llvm-symbolizer/split-dwarf-dwp.test
M llvm/test/tools/sanstats/elf.test
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/unittests/DebugInfo/PDB/CMakeLists.txt
A llvm/unittests/DebugInfo/PDB/PublicsStreamTest.cpp
M llvm/unittests/Support/VirtualOutputBackendsTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/IPO/LowerTypeTests.cpp
M llvm/utils/TableGen/Basic/VTEmitter.cpp
M llvm/utils/TableGen/CodeEmitterGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/UpdateTestChecks/asm.py
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/google/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/PDB/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/builtin_commands/cat.py
M llvm/utils/profcheck-xfail.txt
M llvm/utils/update_cc_test_checks.py
M llvm/utils/update_test_checks.py
M mlir/cmake/modules/AddMLIRPython.cmake
M mlir/docs/BytecodeFormat.md
A mlir/docs/Dialects/IRDL.md
M mlir/examples/standalone/python/CMakeLists.txt
M mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationOps.td
M mlir/include/mlir/Dialect/IRDL/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Interfaces/CMakeLists.txt
R mlir/include/mlir/Interfaces/CopyOpInterface.h
R mlir/include/mlir/Interfaces/CopyOpInterface.td
M mlir/include/mlir/TableGen/Operator.h
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Quant/Transforms/NormalizeQuantTypes.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Interfaces/CMakeLists.txt
R mlir/lib/Interfaces/CopyOpInterface.cpp
M mlir/lib/TableGen/Operator.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/python/CMakeLists.txt
R mlir/python/mlir/_mlir_libs/.gitignore
A mlir/python/mlir/_mlir_libs/_mlir/__init__.pyi
A mlir/python/mlir/_mlir_libs/_mlir/dialects/pdl.pyi
A mlir/python/mlir/_mlir_libs/_mlir/dialects/quant.pyi
A mlir/python/mlir/_mlir_libs/_mlir/dialects/transform/__init__.pyi
A mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
A mlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
A mlir/python/mlir/_mlir_libs/_mlirExecutionEngine.pyi
M mlir/python/requirements.txt
M mlir/test/Conversion/SCFToOpenMP/scf-to-openmp.mlir
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstoreprefetch.mlir
M mlir/test/Conversion/XeGPUToXeVM/materializecast.mlir
R mlir/test/Conversion/XeGPUToXeVM/update_offset.mlir
A mlir/test/Dialect/LLVMIR/mmra.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
A mlir/test/Target/LLVMIR/Import/metadata-mmra.ll
A mlir/test/Target/LLVMIR/mmra.mlir
M mlir/test/Target/LLVMIR/omptarget-wsloop-collapsed.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/lib/Dialect/Test/TestDialect.h
M mlir/test/lib/Dialect/Test/TestOps.h
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/Bytecode/BytecodeTest.cpp
M offload/test/lit.cfg
M openmp/device/include/DeviceTypes.h
M openmp/device/src/Parallelism.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/Enna1/perf/fold-dead-phi-web-opt-time
Compare: https://github.com/llvm/llvm-project/compare/e0d096ffbbaf...517bd7c05a7c
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