[all-commits] [llvm/llvm-project] 437da9: X86: Stop using MachineFunction in getPointerRegClass

Matt Arsenault via All-commits all-commits at lists.llvm.org
Wed Sep 10 07:09:23 PDT 2025


  Branch: refs/heads/users/arsenm/x86/avoid-using-machine-function-getPointerRegClass
  Home:   https://github.com/llvm/llvm-project
  Commit: 437da9945c8196ee2c8bb45b7cfa680ee6660b15
      https://github.com/llvm/llvm-project/commit/437da9945c8196ee2c8bb45b7cfa680ee6660b15
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86AsmPrinter.cpp
    M llvm/lib/Target/X86/X86ExpandPseudo.cpp
    M llvm/lib/Target/X86/X86FrameLowering.cpp
    M llvm/lib/Target/X86/X86InstrCompiler.td
    M llvm/lib/Target/X86/X86InstrControl.td
    M llvm/lib/Target/X86/X86InstrPredicates.td
    M llvm/lib/Target/X86/X86RegisterInfo.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.h

  Log Message:
  -----------
  X86: Stop using MachineFunction in getPointerRegClass

This should be a low level function used to interpret an
MCInstrDesc that only depends on the hwmode. It should not depend
on other dynamic context like the parent function. In general more
ABI properties like this should be expressed directly in the instruction
definitions, so introduce new TCRETURN pseudos to use with the special
case register classes (e.g. in a better future the callee saved registers
would always be encoded directly in a mask on the return instruction).

This will help unify X86 onto a pending replacement mechanism for
getPointerRegClass.


  Commit: bab2e0d87d5b2919b676dbdc7b414a8bc87b58b6
      https://github.com/llvm/llvm-project/commit/bab2e0d87d5b2919b676dbdc7b414a8bc87b58b6
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrPredicates.td

  Log Message:
  -----------
  Adjust win64cc condition


  Commit: c850c3a864ac07dd0bdbb5436df550a76c6ca751
      https://github.com/llvm/llvm-project/commit/c850c3a864ac07dd0bdbb5436df550a76c6ca751
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrControl.td

  Log Message:
  -----------
  Fix using esp instead of rsp on TCRETURN_WIN64ri


  Commit: 361b09b5d325753eef2d18a78569c9a65b4d986f
      https://github.com/llvm/llvm-project/commit/361b09b5d325753eef2d18a78569c9a65b4d986f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrCompiler.td

  Log Message:
  -----------
  Add ImportCallOptimizationDisabled to TCRETURN_WIN64ri predicates


  Commit: 476fe70149be55d00215d7d4f4f9bbe8e84d9474
      https://github.com/llvm/llvm-project/commit/476fe70149be55d00215d7d4f4f9bbe8e84d9474
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrCompiler.td

  Log Message:
  -----------
  Remove redundant In64BitMode predicate


  Commit: 54e6e587c9153eb0da13c8407f971168337a9259
      https://github.com/llvm/llvm-project/commit/54e6e587c9153eb0da13c8407f971168337a9259
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrCompiler.td

  Log Message:
  -----------
  Move win64 pattern after base case


  Commit: 4e374869bd86207321d0cf6450de52519421d79e
      https://github.com/llvm/llvm-project/commit/4e374869bd86207321d0cf6450de52519421d79e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrCompiler.td
    M llvm/lib/Target/X86/X86InstrPredicates.td

  Log Message:
  -----------
  Make sure TCRETURNri64 not selected for win64


Compare: https://github.com/llvm/llvm-project/compare/df3888196435...4e374869bd86

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