[all-commits] [llvm/llvm-project] acea1f: [LLVM][MC][CodeEmitterGen] Reduce various `InstBit...

[Rahul Joshi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: acea1f512ea804d7c35b60682f62327dceea1e18
      https://github.com/llvm/llvm-project/commit/acea1f512ea804d7c35b60682f62327dceea1e18
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2025-09-10 (Wed, 10 Sep 2025)

  Changed paths:
    M llvm/test/TableGen/HwModeEncodeAPInt.td
    M llvm/test/TableGen/HwModeEncodeDecode3.td
    M llvm/utils/TableGen/CodeEmitterGen.cpp

  Log Message:
  -----------
  [LLVM][MC][CodeEmitterGen] Reduce various `InstBits` table sizes (#156213)

Change various `InstBits` tables have an entry only for non-pseudo
target instructions and adjust the indexing into these tables
accordingly.

Some minor refactoring related to this:
- Use early return after handling variable length encodings
- Reduce the scope of anonymous namespace to just the class declaration.

Example reductions in these table sizes for some targets:

```
Target      FirstSupportedOpcode         Reduction in size
AMDGPU                     10813         10813 * 16 = 168KB
RISCV                      12051         12051 * 8 = 94KB
```



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications